Sanyo FXR-303GB, FXR-303G Service Manual

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FILE NO.

SERVICE MANUAL

Full Auto Reverse CarFidelity Receiver Cassette Player

FXR-303GB(GENERAL) FXR-303GB(TAIWAN)

PRODUCT CODE No. 147 582 66(General) 147 582 67(Taiwan)

Specifications


Cassette
4.75 cm/s
0.15%
Maximum 25Wx2
50dB
40dB
63 — 12,500Hz

Tuner section

Frequency range	AM:	531 —	1602kHz
	FM:	87.5 —	108MHz

Specifications are subject to change without notice

Channel spacing ..... AM: 9kHz FM: 100kHz

General

Power source ...... DC 12V (11 ~ 16V) Negative ground only

Speaker output impedance...... 4Ω Dimensions ....................................

REFERENCE NO. SM750088

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ALIGNMENT PROCEDURE

* Power Supply
DC 14.0V

500mW

* Signal generator output: Modulation frequency Modulation percentage

400Hz (AM); 1KHz (FM) 30pct (AM); 22.5KHz (FM)

* Reference output Signal application:
Antenna receptacle through the dummy antenna.
* Output meter connection: Across speaker or dummy load (4 ohms)

AM ALIGNMENT

Step	Signal	Frequency	Dial Set	Test Equipment	Adjustment
1	АМ		531kHz	Connect a DC Voltmeter to Terminal 6 & common GND	Adjust T303 for voltage to be 1.2V
2	~	603kHz	603kHz	Connect VTVM to Terminal 17 or 18	Tune T301, T302 for maximum output
3	Dummy ANT (Fig.1)	999kHz	999kHz		Tune T304, T305 for maximum output
4		999kHz 30dBµ	999kHz	Connect a DC Voltmeter to Terminal 20 & GND. Add a 10K resistor from Terminal 20 to +5V	Adjust SVR301 for the voltage to be just go to high level (>1V)

Fig. 1 Dummy antenna for AM alignment

FM ALIGNMENT

Step	Signal	Frequency	Dial Set	Test Equipment	Adjustment
1			87.50MHz	Connect DC voltmeter to terminal 6 & GND.	Adjust L404 for voltage to be 1.7V
2		90.00MHz	90.00MHz	Connect VTVM to Terminal 17 or 18	Adjust L401, 403 for max. output
з	Direct	98.00 MHz	98.00MHz		Adjust T401 for max. output
4		98.00MHz 60dBµ	98.00MHz	Connect a DC Voltmeter across R412	Adjust T402 to 0V ±20mV
5		98.00 M Hz 20dBµ	98.00MHz	Connect a DC Voltmeter to Terminal 20 & GND. Add a 10K resistor from Terminal 20 to +5V	Adjust SVR403 for the voltage to be just go to high level (>1V)
6		98.00MHz 60dBµ	98.00MHz	Connect VTVM to Terminal 17 or 18	Setthe Audio Signal to 0dB reference. Reduce SSG output to 14dBµV. Adjust. SVR406 to achieve -3dB of audio signal

FM MULTIPLEX ALIGNMENT

PRELIMINIARIES

1. A stereo signal modulator (SSM) is necessary for this alignment.
2. All adjustment below must be done, setting the frequency at the 98MHz on LCD display and applying 60dB FM signal modulated by specified signals as described below.
3. MPX button should be place in stereo position during FM Multiplex alignment.

Step	Alignment	Instrument	Connections	Adjustment
		Input	Output
1	Maximum Separation Control	Apply FM stereo. Signal modulated only by 8 pct pilot signal and 30 pct stereo signal thru' dummy ANT to antenna terminal. Set the output select switch of SSM to the left mode.	Connect VTVM to Terminal 18 (Right channel).	Adjust SVR404 to minimum output on VTVM.
2	10dB (SNC) Separation Control	In addition, set the output signal under input level of 40dBµ.	Connect VTVM to Terminal 17 & 18 of left and right channel.	Adjust the SVR405 to make separation of 10dB +5/-0dB between left and right channel.
з	Repeat steps (1) & (2)

HEAD AZIMUTH ALIGNMENT

1. Insert a 10kHz standard test tape and set the unit play mode.
2. Turn the azimuth adjustment screw until you obtain maximum reading for both channel on the VTVM.
3. Repeat step 2 until both REV and FWD obtain maximum output.

TAPE SPEED ALIGNMENT

Insert 3kHz standard test tape and set the unit at play mode. Connect the Wow & Flutter Meter to speaker output.
3. The correct speed must be 3030Hz ±10Hz.

MAIN PARTS IDENTIFICATION ILLUSTRATION

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MAIN PARTS IDENTIFICATION ILLUSTRATION (TOP VIEW & BOTTOM VIEW)

IC BLOCK DIAGRAM

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IC AND TRANSISTOR VOLTAGE CHART-

5				·····	T		T	· ·							,	, -							(V)
ic	PIN	1	2	3	4	5	6	7	8	9	10	11	12	13	14	15	16	17	18	3 19	2	0 21	22
IC1	ON OFF	1.3	0.7	2.2	6.4	0	2.2	0.7	1.3
IC41	ON OFF	0	0	0.1	- 4.4	2.6 0.2	- 0	0	0	4.9	4.9 0	4.9 0	0	0	ο	0	5.0				+
IC51		1.3	14.0	0.6	0.6	0	0.6	0.6	6.6	6.7	0	6.7	14.0						+		╞
											1						L	.1
IC	PIN		1	2		3	4	5	6		7	8		9	10	11		12	13	14	L I	15	16
1021	- R. T/	A -	1.0 0.1	0.3	\|	0	1.0 1.0	0		\| \|	0	0	_\|_	4.9	4.9 0	4.9	- \| -	0	1.0	1.		1.0	5.0
										,I.,	I			1		L							(V)
PIN	TR	Q 83	1 8	Q 32	Q 833	Q 834	Q 835	Q 837	Q 803	Q 804	80	2 )6 8	Q 341	Q 842	Q 843	Q 844	C 80		Q 302	Q 40	2		Q 103
E	OFF ON	- N.(		I.C	N.C	1.0 4.5	N.C	N.C	5.5	3.1 4.6	- 8.	1	N.C	N.C	N.C	N.C	5.	5	0	0.6	6		0
с	OFF	- N.(		I.C	N.C	0	N.C	N.C	5.5	3.1	0 8.	1 1	N.C	N.C	N.C	N.C	12	.3	0	FM1.8 AM1.3	~7.7 ~6.9	FM1 AM1	.8~7.7 .3~6.9
в	OFF	2.0		).4	0	0.3 4.5	0	0	- 0	1.0	8.	2 !	5. 3 3.8	5.3 3.8	5.3 3.8	5.3 3.8	- 6.	2	0.6	1.2	2		0.6
													· L				-1		L				(V)
PIN	TR		Q 1	Q 101	Q 21	1	Q 21	Q 41	Q 141	Q 805	0 82	2	Q 823	Q 825	Q 827	4	ב 04	Q 541	Q 54	2 5	ב סו	Q 2	Q 102
Е			0	0	0.4	0	.4	1.1	1.1	0	0		0	0	0		0	0	0	8	.2	0	0
с	OF	F	0	0	4.2	! 4	.2	6.2	6.2	8.2	- 0		0	0	0		.9 0	0	0	13	1.3	0	0
в	OF	F	0	0	- 1.0	1	.0	1.7	1.7	0	- 0	4 -	0	0	0	7 4	0.4	0 0.6	0.0	6 8	.7	0

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CIRCUIT OPERATION DESCRIPTION -

1. BASIC OPERATION OF PLL FREQUENCY SYNTHESIZER

The illustration above is a block diagram which is a fundamental PLL frequency synthesizer.

In order to obtain reference frequency fr, the frequency of 4.5 MHz generated from a crystal oscillator (OSC) is passed into a divider circuit of 1/d.

This fr is compared with fr', and runs through phase detector (PD) and low pass filter (LPF) to be inverted to directcurrent signal, which is then applied as varicap voltage of voltage control oscillator (VCO), thereby controlling the oscillation frequency.

This oscillation frequency fout is divided down to 1/N by programmable divider (PD), so that one closed loop is fixed in the relation of

fout=frxN

therefore, the operation of PLL is stabilized.

In case of automatic channel selection, the dividing ratio N is altered by the PD by a command from controller, and fout is changed accordingly.

Programmable divider

Since the oscillation frequency of VCO is very high as compared with fr, it is divided down to 1/N (in the case of AM) to decrease the difference from fr in this circuit.

Phase detector

This is a circuit to detect the difference in frequency and phase between reference frequency fr and comparison frequency fr' in terms of pulses.

Low pass filter

This circuit is intended to vary and fix the output voltage in order to deliver a varicap voltage necessary for desired VCO frequency, on the basis of the output of the phase detector.

Prescaler

The local oscillation frequency in FM is higher than the operating speed of the programmable divider of PLL, thereby opposing to accurate operation. To avoid this, the local oscillation frequency is preliminarily divided down in this circuit to a proper frequency permitting reliable operation of the programmable divider.

Pulse swallow count system is employed. A couple of programmable divider (swallow counter and programmable counter) can be selected.

The prescaler at first starts the frequency division with the ratio M+1. Then the swallow counter and the programmable counter starts counting simultaneously. When N1 inputs are applied, the swallow counter stops counting. Then the frequency division ratio of the prescaler is switched to M. Programmable counter continues to count and stops when the input reaches N2. The frequency division ratio of the prescaler switches back to M+1 and swallow counter and the programmable counter start to count again.

FM reception employs the pulse swallow count system. AM reception does not employ the pulse swallow count system but employs the direct frequency division system and so only programmable counter is operated.

2. GENERAL DESCRIPTION OF LOGIC IC (IC801)

a) IC801 LC7232-8385

This IC includes PLL and controller is a C-MOS LSI for digital tuning of FM/AM PLL frequency synthesizer system and controls such functions as FM/AM automatic channel selections, preset memory and frequency digital display driver. It is packed in a 80-pin flat package.

3. AUTOSTOP

If counter start, when High level signal is applied to SD terminal (Q822 base). Then IF frequency became 10.7MHz ±30kHz at FM or 450kHz ±3kHz at AM. When SD and IF is agreed radio auto search tuning stops.

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CIRCUIT OPERATION DESCRIPTION

DESCRIPTION (LC7232-8385)

PIN	SYN	BOL	FUNCTIONAL EXPLANATION
NO	IN	OUT
1	XIN		Input side of inverter for OSC
2	GI	ND
з	AREA3		Key return signal input
4	GI	ND
5	GI	ND
6	DIS AMSS		Key return signal input
7		BEEP	BEEP Signal output
8		BAND1	BAND FM MW LW FM'SDK
9		BAND2	BAND1 1 0 0 1
10		VF
11	DIS DOLBY		Key return signal input
12	DIS MTL		Key return signal input
13	SDK		SDK signal output
14		MUTE	MUTE signal output
15		MODE1
16		MODE2
17		STBY	AMP STBY output
18
19
20		10
20
20		AMEE
22		AMSS
23
24		KAMUTE	HA MUTE signal output
25		K55	Key matrix return signal output 5
20		KS4	Key matrix return signal output 4
27		KS3	Key matrix return signal output 3
28		KS2	Key matrix return signal output 2
29		KS1	Key matrix return signal output 1
30		KS0	Key matrix return signal output 0
31	VDD		VDD 5V
32	КЗ		Key matrix return signal output 3
33	K2		Key matrix return signal output 2
34 -	K1		Key matrix return signal output 1
35	КО		Key matrix return signal output 0
36		S28	LCD 28 output for LCD
37		S27	LCD 27 output for LCD
38		S26	LCD 26 output for LCD
39		S25	LCD 25 output for LCD
40		S24	LCD 24 output for I CD
41		S23	LCD 23 output for LCD
42		S22	LCD 22 output for LCD
43		S21	LCD 21 output for LCD
44		S20	LCD 20 output for LCD
45		S10
40		019
40		017
4/		51/
48		S16	LCD 16 output for LCD

PIN	SYN	BOL
NO	IN
49		S15	LCD 15 output for LCD
50		S14	LCD 14 output for LCD
51		S13	LCD 13 output for LCD
52		S12	LCD 12 output for LCD
53		S11	LCD 11 output for LCD
54		S10	LCD 10 output for LCD
55		S9	LCD 9 output for LCD
56		S8	LCD 8 output for LCD
57		$7	LCD 7 output for LCD
58		S6	LCD 6 output for LCD
59		S5	LCD 5 output for LCD
60		S4	LCD 4 output for LCD
61		S3	LCD 3 output for LCD
62		S2	LCD 2 output for LCD
63		S1	LCD 1 output for LCD
64		COM1	COMMON signal 2 output for LCD
65		COM2	COMMON signal 1 output for LCD
66	INT		VDD 5V
67	CE		ChipEnable (+5V)
68	RES		RESET
69	ADC		Signal meter level input
70	FM IF		FM IF input
71	AM IF	·	AM IF input
72	SNS		VDD 5V
73	VDD		VDD 5V
74	FM in		FM OSC input
75	AM in		AM OSC input
76	GND		GND
77		E01	Phase detector output 1
78		E02	Phase detector output 2
79	G	D
80		Холт	Output side of inverter for OSC

SEGMENT

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NOTES:1. Part orders must contain Model Number, Part Number and Description. 2. Ordering quantity of screws and resistors must be multiple of 10 pcs.

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PARTS LIST (CASSETTE MECHANISM)


Ref. No.	PART No.	Description	Q'ty	Ref. No.	PART No.	Description	Q'ty
	CASSETTE N	ECHANISM(641 001 7874)		A58	632 516 9842	FLYWHEEL	1
	1	·		A59	632 536 1116	FLYWHEEL	1
A1	641 001 8192	CHASSIS ASSY	1	A60	411 089 7000	WASHER Y2 X 4X 0.13	2
A2	632 604 0737	SHAFT, MECH	1	A61	632 310 2827	SPECIAL WASHER	3
43	412 044 4102	SPECIAL SCREW	1	A62	632 310 2834	SPECIAL WASHER	2
4 4	641 001 8147 ^.	LEVER, REVERSE A	1	A63	632 536 9228	BELT, FLYWHEEL	1
46	641 001 8178	LEVER HEAD RIVETTING	1	A64	641 000 3488	MOTOR PULLEY ASSY, WITH	1
47	632 573 7621	SPRING, COMP	2			PULLEY
48	632 572 9909	SLIDE	1	A67	632 554 7398	BELT	1
49	411 037 2804	SCR PAN + W 2X4	1	A68	632 517 0114	GEAR PULLEY	1
A10	412 017 1107	SCR PAN + SW +W2X6	1	A70	641 001 8239	PULLEY, IDLER	1 1
412	641 001 8284	SLEEVE	1	A71	632 568 7414	MT M WASHER	1
A13	411 015 8309	RING E 1.5	1	A72	632 519 1416	LEVER ASSY, FF GEAR	1
417	641 000 8889	SPRING	1	A73	632 543 1666	GEAR ASSY, FF	1
420	632 519 1348	LEVER ASSY, REVERSE C	1	A75	411 000 9908	RING E3	1
À21	632 540 0174	WIRE SPRING	1 .	A76	632 516 9729	LEVER, FF B	1
122	641 001 3457	HEAD	1	A77	632 519 1423	CHASSIS ASSY, GEAR	1
124	411 027 1008	SCR S-TPG BIN 2X3	1	A78	632 517 0152	REEL, TAKE UP	2
128	632 521 8854	LEVER ASSY, PLAY GEAR C	1	A79	632 544 1221	REEL RING	2
129	632 516 9668	LEVER, PLAY GEAR B	1	A80	632 540 0099	SENSOR, A	2
30	632 305 5987	SPECIAL WASHER	1	A81	632 543 2496	COMPRESSION SPRING	2
31.	641 001 8130	LEVER, PLAY GEAR A	1	A82	632 536 9211	CUSHION.FELT	2
132	641 001 8185	LEVER, PINCH ROLLER F	1	A83	412 036 6008	SPECIAL SCREW	2
133	632 544 9579	LEVER, REVERSE B	1	A84	632 517 0138	GEAB. B	l ī
434	411 000 9403	RING E2	1	A85	632 543 1642	GEAR TAKE UP ASSY	1
435	632 523 3765	LEVER, FF LOCK	1	A86	632 517 0107	GEAR A	1
36	632 517 0718	COIL SPRING	1	488	632 313 4897	SPECIAL WASHER
437	641 001 8208	LEVER, PINCH ROLLER R	1	A89	632 517 0220	LEVER, SENSOR	1
438	641 001 8253	LEVER LEAD BACK	1	490	632 535 2169	PLATE SPRING	2
139	641 000 8872	SPACER	1	A91	632 531 7718	SHAFT	i i
40	632 519 1368	GUIDE ASSY, LEVER FF	1	492	632 517 0022	GEAR SENSOR	I i
41	641 043 3106	SCR BIN 2X4	1	493	641 001 8154	GEAR ASSY REVERSE	1
42	632 516 9903	LEVER FE PN	1	495	632517 0176	LEVER LOCK GEAR
43	632 516 9927	LEVER FR PN		100	641 001 8260	SPRING TENS
44	632 543 2519	COIL SPRING	2	497	632 517 0565	WIRE SPRING
45	632 543 0324	LEVER ASSY, EJECT	1	499	411 131 9907	SCR F+ PCS 1 7Y3	2
46	641 001 0820	COIL SPRING		A112	412 016 5601	SPECIAL SCREW	1
47	632 541 8322	CASE A		A112	622 248 0887	MICRO SWITCH	1
48	632 516 9965	CASE, B		A114	412 029 5803	SPECIAL SCREW
49	632 517 0190	GUIDE CASSETTE		A118	411 089 6508	WASHER V 2V2 5V0 25
50	632 519 1409	LEVER ASSY CASE C		A121	600 648 8000	CODING TENS	1
151	632 516 9637	LEVER, CASE D		A122	632 554 8241	SPRING TENS
152	632 543 9228	TOBSION SPRING		052	641 001 2602	CORD 2 PIN
153	632 541 8490	WIRE SPRING		0.02	641 000 2897	WIDE TIE
454	632 340 9544	CUSHION BUBBEB			402 040 4204	ELECT 10U M ENV
155	632 518 5132	COIL SPRING			403 049 4204	CORD 2 DIN
157	412 016 4208	SPECIAL SCREW			041 000 8230
407	412 010 4208	Jarevial aunen			641 001 8246	SHEET	\| 1

NOTES:1. Part orders must contain Model Number, Part Number and Description. 2. Ordering quantity of screws and resistors must be multiple of 10 pcs.

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SANYO Electric Co., Ltd. Osaka, Japan.

June/'92/600