• Pick-up that emits a laser beam is used in this CD player section.
CAUTION :
USE OF CONTROLS OR ADJUSTMENTS
OR PERFORMANCE OF PROCEDURES
OTHER THAN THOSE SPECIFIED HEREIN
MAY RESULT IN HAZARDOUS RADIATION
EXPOSURE
LASER OUTPUT..........0.6 mW Max. (CW)
WAVELENGTH ............. 790 nm
IC BLOCK DIAGRAM & DESCRIPTION
CAUTION – INVISIBLE LASER RADIATION WHEN OPEN AND
INTERLOCKS DEFEATED. AVOID EXPOSURE TO BEAM.
ADVARSEL – USYNLIG LASER STRÅLING VED ÅBNING, NÅR
SIKKERHEDSAFBRYDERE ER UDE AF FUNKTION, UNDGÅ UDS ÆTTELSE
FOR STRÅLING.
VARNING – OSYNLIG LASER STRÅLNING NÄR DENNA DEL ÄR ÖPPNAD
OCH SPÄRR ÄR URKOPPLAD. STRÅLEN ÄR FARLIG.
VORSICHT – UNSICHTBARE LASERSTRAHLUNG TRITT AUS, WENN
DECKEL GEÖFFNET UND WENN SICHERHEITSVERRIEGELUNG
ÜBERBRÜCKT IST. NICHT, DEM STRAHL AUSSETZEN.
VARO – AVATTAESSA JA SUOJALUKITUS OHITETTAESSA OLET ALTTIINA
NÄKYMÄTTÖMÄLLE LASERSÄTEILYLLE. ÄLÄ KA
TSO SÄTEESEEN.
IC101 LA1823 (FM/AM MIX.)
FM
DET
DET
PILOT
COMP
PHASE
FFFFFF
FM
OSC
VCO
ST SW
FM
TRIG
MIX
DECODER
MUTEV
AGCST
AM
DET
FM
S-METER
SD
AM
FM
IF
IC102 LC72131 (PLL)
IF
IF
BUFFER
IC401 KIA7808 (Regulator)
2GND2
CC
242322212019181716151413
FM
RF
AM
AM
MIX
RF
OSC
BUFFER
AM
1GND1
CC
OSC
REGV
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- 1 -
Page 3
TUNER ADJUSTMENTS
Use a plastic screw driver for adjustments.
Adjust the intermediate frequency of AM and FM to the frequency of ceramic filter.
Supply voltage : DC 12.0V
Phones impedance : 32 ohms
Function switch : RADIO
EACH PRECAUTION IN THIS MANUAL SHOULD BE FOLLOWED DURING SERVICING. COMPONENTS IDENTIFIED WITH
!!
!
THE IEC SYMBOL
CAN OF SPECIAL SIGNIFICANCE. WHEN REPLACING A COMPONENT IDENTIFIED , USE ONLY THE REPLACEMENT
PARTS DESIGNATED, OR PARTS WITH THE SAME RATINGS OF RESISTANCE, WATTAGE OR VOLTAGE THAT ARE
DESIGNATED IN THE PARTS LIST IN THIS MANUAL. LEAKAGE-CURRENT OR RESISTANCE MEASUREMENTS MUST
BE MADE TO DETERMINE THAT EXPOSED PARTS ARE ACCEPTABLY INSULATED FROM THE SUPPLY CIRCUIT BEFORE
RETURNING THE PRODUCT TO THE CUSTOMER.
CAUTION :Regular type resistors and capacitors are not listed. To know those values, refer to the schematic diagram.
IN THE PARTS LIST AND THE SCHEMATIC DIAGRAM DESIGNATE COMPONENTS IN WHICH SAFETY
Regular type resistors are less than 1/4W carbon type and 0 ohm chip resistors.
Regular type capacitors are less than 50V and less than 1000µF of Ceramic type and Electrolytic type.
Connections for the resistorsand capacitors that form thebass band filters.
SS1
SS2
Vo lume control and equalizer input
T
Vo lume and e qualizer outputs
Connections for the capacitors that form the treble band filters
Connection to the 0.5xVDD voltage generator circuit used asthe analog signalground.
Vref
Vss
VDD
Applications must connect a c apacitor ofabout 10 uFbetween this pina nd Vss
to exclude powersupply ripple
.
Ground
Po wer supply
.
Chip enable
2CE
Data is writtento the internal latch when thispin goes fromhigh to low.
The internal analog switches operate at this point.Data transfer is
enabled when thispin is high.
1
30
4
15
16
27
Vss
NC
DI
CL
Serial data and clock inputs used for IC control .
Electronic volume and tone control testing
Thispin must be tied toVss during normal operation.
Unused.
These pins must be left open or connected toVss during normal operation.
- 7 -
Page 9
IC BLOCK DIAGRAM & DESCRIPTION
IC701 LC587008 (4bit MICON)
Address
V
DD
V
SS
V
1
DD
2
V
DD
CUP1
CUP2
Input
CFIN
Output
CFOUT
XTINInput20
Output
XTOUT
S1
S2
Input
S3
S4
K1
K2
I/O
K3
K4
M1
M2
I/O
M3
M4
A1
A2
I/O
A3
A4
P1
P2
I/O
P3
P4
Pin No.
24
Power supply
23
LCD drive power supply
22
VDD
21
VDD1
VDD2
VSS
Switching pin used to supply the LCD drive voltage to the VDD1and
V2PINS
DD
3
Connect a nonpolarized capacitor between CUP1 and CUP2 when
4
1/2 or 1/3bias is used
Leave open when a bias other than 1/2 or1/3 is used.
System clock oscillator connections
25
Ceramic resonator connection (CF specifications)
RC component connection (RC specifications)
External signal input pin (CFOUT isleft open)
26
This oscillator is stopped by the execution of aSTOP or SLOW
instruction.
Referenc e calculation(cl ock specification s,LCD alternain g freq uency),
system clock oscillator
Types Ito III can be specified asmask options.
LCD/general -purpo se output contro l is handle d by the segme nt PLA,
and thus program control is not required.
These pins support output latch control on reset andin standby
states when theoscillators are stopped.
Arbitrary com binat ions of LCD drive and gene ral-purpose output s can
be used.
LCD panel drive common polarity outputs
The table below shows how these pins are used depen ding on the duty
used.( values for alterna ting freque ncy reflect a typical specif ication of
32.768 MHz for f 0.)
2
1
COM1
COM2
80
79
COM3
COM4
Alternation
frequency
Note: A cross( X ) indicates that the pin is not used with that duty type.
SO2:Serial output pin
SO3:Serial clock pin
Static duty
32 Hz32 Hz
Function
1/2 duty
32 Hz
output
options.
1/3 duty
42.7 Hz
The same as for K1
to K4
type:
The outp ut levels on
pins N1 to N4 can be
specified as an opti on
LCD drive
*:Determined by
mask options
General purpose
outputs
Note:
These pins go to
the static drive
mode during the
reset
The static drive
waveform is output
during the reset
period.
*There are cases
where the
alternati ng
frequenc y stops for
the CF,RC and
external clock
specifica tions.
(These cases differ
dependi ng on option
specifica t
At reset
All se gm ents on
All se gm ents off
High level
Low level
Determined by
mask options
When a
combinatio n of
LCD drive and
general-
purpose
outputs,the
output state is
either:
All lit/hig h level
All off/low level.
period.
ions.)
Option
Tran sis tors to hold
alowor high level
Selecti on of either
pull-up or pulldown resistors
Interna l serial clock
divisor selecti on
I1/1
II 1/2
III 1/4
Pins N1 to N4
output circuit
Pins N1 toN4
output
level
Tran sistors to hold
a low or high level
Select ion of either
pull-up or pulldown resistors
Signal convers ion
(rising/f alling)
selectio n
*Only when the
input resisto r open
specificat ion is
selected
1DEFII Input terminal for detect signal of defect
2TAII Input terminal for test.
3PDOO The phase comparison output terminal for
external VCO control.
4VVSS- Ground terminal for built-in VCO
5ISETI Resistance connection terminal for
electric current adjustment of PDO output.
6VVDD- Built-in VCO power supply terminal.
7FRIVCO frequency range adjustment.
8VSS- Ground for Digital
9EFMOO EFM signal output terminal for slice level control.
10EFMINI EFM signal input terminal for slice level control.
11TEST2I TEST pin. Normal time is non connection.
12CLV+O Output terminal for Disc motor control.
13CLV-O Output terminal for Disc motor control.
14V/PO Change of rough servo / phase control
Rough servo : "H", Phase control : "L"
15HFLI Input terminal of track search signal.
16TESI Input terminal of tracking error signal.
17TOFFO Output terminal of tracking off.
18TGLOOutput terminal for change of tracking gain.
19JP+O Output terminal for tracking jump control.
20JP-O Output terminal for tracking jump control.
21PCKO Clock monitor output terminal for EFM data
playback. (4.3218 MHz)
22FSEQO Output terminal for detect of SYNC signal.
23DVDD- +5V
24CONT1I/O
25CONT2I/O This output can control at serial control from
26CONT3I/O micro processor.
27CONT4I/O
28CONT5I/O
29EMPHO Output terminal of de-emphasis monitor .
"H" : de-emphasis
30C2FO Output terminal of C2 flag
31DOUTO Output terminal of digital out
2KÅ~8bit
RAM
C1 C2 Error Detect &
Correct Control Flag
X'tal Root
Timing Generator
4.2M16MEFLGEMPHCONT5
XV
SS
No. Pin Name I/OFunction
32TEST3I Test pin.
33TEST4I Test pin.
34NC- Non connection.
35MUTELO Mute output terminal for L-ch
36LVDD- Power supply for L-ch
37LCHOOOutput terminal for L-ch
38LVSS- GND for L-ch
39RVSS- GND for R-ch
40RCHOO Output terminal for R-ch
41RVDD- Power supply for R-ch
42MUTERO Mute output terminal for R-ch
43XVDD-Power supply of crystal oscillation
44XOUTO Connection terminal of crystal oscillation (16.9344MHz)
45XINI Connection terminal of crystal oscillation (16.9344MHz)
46XVSS- GND of crystal oscillation
47SBSYO Output terminal for synchronizing signal of
48EFLGOOutput terminal for correction monitor of C1, C2,
49PWO Output terminal for sub-cord of P, Q, R, S, T, U and W
50SFSYOOutput terminal for synchronizing signal of
51SBCKI Input terminal for readout clock of sub-cord
52FSXO Output terminal of Synchronizing signal (7.35kHz)
53WRQOOutput terminal for standby of sub-cord Q output
54RWCI Input terminal of read / write control
55SQOUTO Output terminal of sub-cord Q
56COINI Input terminal of command from micro processor
57CQCKI Clock input for reading sub-cord from SQOUT
58RESI Reset (turn on : L)
59TST11O Test pin
6016MO 16.9344MHz
614.2MO 4.2336MHz
62TEST5I Test pin
63CSI Chip select terminal
64TEST1I Test pin
- 10 -
XINFSX
XOUT
XV
DD
RAM Address
Generatorl
Interpolalation Mute
Billingual
Digital Attenuator
Quadruple Over Sampling
Digital Filter
1bit DAC
RV
DD
MUTER
RCHO
RV
SS
sub-cord block
Single and Double
sub-cord frame
L.P.F
C2F
30
Digital Out
MUTELLCHO
DD
LV
LV
SS
31
DOUT
(NC)
34
Page 12
IC BLOCK DIAGRAM & DESCRIPTION
1
2
4
3
11
+
ñ
IN
PredriverPower
13
12
PredriverPower
Load short
protector
Overvoltage/
surge protector
Output pin-to-GND
short protector
Output pin-to-V
CC
short protector
Thermal
shutdown
Standby
SW
BIAS
circuit
Ripple
filter
Pop noise
prevention
circuit
V
CC
6
5
8
+
ñ
IN
PredriverPower
9
10
PredriverPower
Load short
protector
Power
GND2
Output pin-to-GND
short protector
Output pin-to-V
CC
short protector
7
14
IC903 LC6541D (4 ch. Bridge CD Driver)
VccVrefVIN4VG4Vo8Vo7GNDVo6Vo5VG3VIN3CDRES
11k Ω 11k Ω
Vcc
131415161718192021222324
Level
Sift
Level
Sift
123456789
VccMuteVIN1VG1Vo1Vo2GNDVo3Vo4VG2VIN2 Reg OUT Reg IN