• Pick-up that emits a laser beam is used in this CD player section.
CAUTION :
THIS PRODUCT CONTAINS A LOW POWER LASER DEVICE,
TO ENSURE CONTINUED SAFETY DO NOT REMOVE ANY
COVERS OR ATTEMPT TO GAIN ACCESS TO THE INSIDE
OF THE PRODUCT.
REFER ALL SERVICING TO QUALIFIED PERSONNEL.
LASER OUTPUT ..............0.6 mW Max. (CW)
WAVELENGTH ..................790 nm
CAUTION – INVISIBLE LASER RADIATION WHEN OPEN AND
INTERLOCKS DEFEATED. AVOID EXPOSURE TO BEAM.
ADVARSEL – USYNLIG LASER STRÅLING VED ÅBNING, NÅR
SIKKERHEDSAFBRYDERE ER UDE AF FUNKTION, UNDGÅ UDS ÆTTELSE
FOR STRÅLING.
VARNING – OSYNLIG LASER STRÅLNING NÄR DENNA DEL ÄR ÖPPNAD
OCH SPÄRR ÄR URKOPPLAD. STRÅLEN ÄR FARLIG.
VORSICHT – UNSICHTBARE LASERSTRAHLUNG TRITT AUS, WENN
DECKEL GEÖFFNET UND WENN SICHERHEITSVERRIEGELUNG
ÜBERBRÜCKT IST. NICHT, DEM STRAHL AUSSETZEN.
VARO – AVATTAESSA JA SUOJALUKITUS OHITETTAESSA OLET ALTTIINA
NÄKYMÄTTÖMÄLLE LASERSÄTEILYLLE. ÄLÄ KATSO SÄ
TAPE ADJUSTMENTS
1. Azimuth Adjustment
TEESEEN.
• Be sure to clean the heads before attempting to make any adjustment.
• Be sure both channels (1 and 2) are the same level.
(Using a dual-channel oscilloscope)
• Be sure both channel's waveform are same for the phase matching.
• After completion of the adjustment, use the threadlock (TB-1401B) to
secure the azimuth adjustment screws.
1. Remove the cover deck as Fig.1.
2. Load a test tape (VTT-738 etc. : 10kHz) in the Deck.
3. Press the PLAY button. (Normal playback)
4. Use a + tip screwdriver to turn the screw for normal azimuth
adjustment so that the left and right outputs are maximized at
the same phase during normal playback. See Fig.2.
NORMAL
5. Adjust so that the waveforms for the left and right channels are in alignment.
2. Tape Speed Adjustment
• Connect the Frequency Counter to TAPE OUT.
MOTOR
1. Insert the test tape (MTT-111N, etc.; 3,000Hz) into the DECK.
2. Press the PLAY button. .
3. Adjust a hole on the motor bottom so that a frequency counter reading of 3,000 ±5Hz is obtained.See Fig.3.
4. Press the STOP button, and eject the test tape.
Fig.1
Fig.2
hole for adjustment
Fig.3
3. Torque Measurement
- 1 -
Page 3
(MW)
TUNER ADJUSTMENTS
R2201
R2205
C2203
R2458
R2203
R2202
C2304
R2302
C2323
C2310
C2308
R2312
R2309
R2308
R2306
C2902
C2101
C2318
R2107
R2101
C2325
C2141
C2152
C2502
C2504
C2515
C2521
C2456
R2453
• Use a plastic screw driver for adjustments.• MODE : ST (Stereo)
Show a clean procedure in the following in reference by swab of cotton.
1. Cotton swab is wrapped with Cleaning paper.
2. Add the isopropyl alcohol.
3. Gently move the tip of cotton swab just like a draw a whirlpool from inside to outside on the surface of lens.
- 2 -
Remark
Remark
Maximum
Maximum
Page 4
EXPLODED VIEW
1
2
3
5
4
6
7
8
9
71
73
51
52
53
54
55
57
56
58
59
60
63
Y16
11
13
72
12
74
14
16
17
18
19
15
20
21
11
10
75
76
77
22
N.S.P.
62
61
64
23
N.S.P.
Y02
Y01
Y01
Y03
Y04
Y04
Y10
Y13
Y14
Y15
Y15
Y17
Y18
Y18
Y19
Y20
Y20
Y11
Y09
Y12
Y05
Y03
Y06
Y07
Y07
Y08
Y87
This is a basic exploded view.
- 3 -
Page 5
PARTS LIST
PRODUCT SAFETY NOTICE
EACH PRECAUTION IN THIS MANUAL SHOULD BE FOLLOWED DURING SERVICING. COMPONENTS IDENTIFIED WITH THE
!!
IEC SYMBOL
PERFORMANCE CAN BE OF SPECIAL SIGNIFICANCE. WHEN REPLACING A COMPONENT IDENTIFIED BY
REPLACEMENT PARTS DESIGNATED, OR PARTS WITH THE SAME RATINGS OF RESISTANCE, WATTAGE OR VOLTAGE THAT
ARE DESIGNATED IN THE PARTS LIST IN THIS MANUAL. LEAKAGE-CURRENT OR RESISTANCE MEASUREMENTS MUST BE
MADE TO DETERMINE THAT EXPOSED PARTS ARE ACCEPTABLY INSULATED FROM THE SUPPLY CIRCUIT BEFORE
RETURNING THE PRODUCT TO THE CUSTOMER.
CAUTION :Regular type resistors and capacitors are not listed. To know those values, refer to the schematic diagram.
N.S.P :Not available as service parts.
!
IN THE PARTS LIST AND THE SCHEMATIC DIAGRAM DESIGNATED COMPONENTS IN WHICH SAFETY AND
!!
!
, USE ONLY THE
Regular type resistors are less than 1/4 W carbon type and 0 ohm chip resistors.
Regular type capacitors are less than 50 V and less than 1000 µF type of Ceramic type and Electrical type.
1SLCOO2SLCISTAI-SLCO output current adjustment resistor connection pin.
3EFMINI-RF signal input pin.
4RFAO-RF monitor pin.
5RFVDD--RF power supply pin.
6RFVSS--RF ground pin. Must be connected to 0V.
7 FIN1AI-A+C signal input pin.
8 FIN2AI-B+D signal input pin.
9TIN1AI-E signal input pin.
10 TIN2AIF signal input pin.
11 VREFAO RFVDD/2 VREF voltage output pin.
12 REFIAI-Reference voltage seting pin.
13 FEAOZHIFE signal monitor pin.
14 TECAO-TE signal LPF capacitor connection pin.
15 TEAOZHITE signal monitor pin.
16 RFMONAOZHIRF internal signal monitor pin.
17 JITTCA-Jitter detection capasitor connection pin.
18 ADAVDD--Servo A/D, D/A supply pin.
19 ADAVSS--Servo A/D, D/A ground pin. Must be connected to 0V.
20 TDOAO ADAVDD/2 Tracking control output pin. D/A output.
21 FDOAO ADAVDD/2 Focus control output pin. D/A output.
22 SPDOAO ADAVDD/2 Spindle control output pin. D/A output.
23 SPDOAO ADAVDD/2 Thread control output pin. D/A output.
24 GPDACAO ADAVDD/2 Servo D/A general-purpose output pin.
25 CONT4I/O Input mode
26 CONT5I/O Input mode
27 SBCK/CONT6 I/O Input mode
28 SBCK/FGI-
29 DEFECTOLDefect pin.
30 V / *POH
31 FSEQOL
32 MONI 1OLInternalsignal monitor pin 1.
33 MONI 2OLInternalsignal monitor pin 2.
34 MONI 3OLInternalsignal monitor pin 3.
35 MONI 4OLInternalsignal monitor pin 4.
36 MONI 5OLInternalsignal monitor pin 5.
37 (3.3V)VSS--
Subcode read clock input pin / FG signal input pin /
external emphasis setting pin.
Set to command pin function. Must be connected to 0V.
Rough servo / phase control automatic switching monitor
output pin.
"H" for rough servo and "L" for phase servo.
Synchronization signal detection output pin.
Outputs a high level when the synchronization signal
detected
from the EFM signal and the internally generated
synchronization
signal agree.
Digital ground pin. Must be connected to 0V.
Function description
Controlled by commands
from the microprocessor.
Any of these that are unused
must be either set up as input
pin ports and connected to 0V,
or set up as output pin ports
and left open.
CONT1
CONT2
CONT3
VSS
VDD5V
*RES
*WRQ
DO
CLCEDI
PDO1
DRF
DATA
59
DATACK
58
LRSY
57
ASDFIN
56
ASDACK
55
ASLRCK
54
16MOUT
53
EFLG
52
C2F
51
XVSS
50
FSX/16MIN
49
XIN
48
XOUT
47
XVDD
46
RVDD
45
RCHO
44
RVSS
43
LVSS
42
LCHO
41
LVDD
VDD
V / *P
FSEQ
MONI 1
MONI 2
MONI 3
MONI 4
DEFECT
SBCK/FG
Pin
Pin Name
No.
38 VDD--Digital power supply pin.
39 DOUTOLDigital OUT output pin.
40 TESTILTest input pin. Must be connected to 0V.
41 LVDD-42 LCHOAO LVDD/2L channel output pin.
43 LVSS--L channel ground pin. Must be connected to 0V.
44 RVSS-45 RCHOAO LVDD/2R channel output pin.
46 RVDD--R channel power supply pin.
47 XVDD-48 XOUTO OscillatorConnections for a 33.8688MHz or 16.9344MHz
49 XINI Oscillatorcrystal oscillator pin.
50 FSX/16MIN I/O Input mode
51 XVSS--Crystal oscillatorCrystal oscillator ground pin. Must be connected to 0V.
52 C2FOHC2 flag output pin.
53 EFLGOLC1, C2 error correction monitor pin.
54 16MOUTO CLK output 16.9344MHz output pin.
55 ASLRCKI
56 ASDACKIBit clock input pin. (Must be connected to 0V when unused)
57 ASDFINI
58 LRSYOL
59 DATACKOLBit clock output pin.
60 DATAOLL/R channel data output pin.
61 CEI62 CLI-Data transfer clock input pin.
63 DII-Data input pin.
64 DOO(H)Data output pin. (Nch open drain output)
65 *WRQOHInterruption signal output pin.
66 *RESI67 DRFOLFocus ON detect pin.
68 VDD5V--Microprocessor interface power supply pin.
69 VSS--Digital ground pin. Must be connected to 0V.
70 CONT3I/O Input mode General-purpose output pin 3. Controlled by commands from the microprocessor.
71 CONT2I/O Input mode General-purpose output pin 2. Must be set as an input pin and connected to 0V
72 CONT1I/O Input mode General-purpose output pin 1. or set as an output pin and left open when unused.
73 PDO1O
74 PDO2O Input modePhase comparison output pin 2 to control built-in VCO.
75 VVSS--Built-in VCO GND pin. Must always be connected to 0V.
76 PCKISTAI-Resistor connection pin to set current for PD01 and 02 outputs.
77 VVDD--Built-in VCO power supply pin.
78 FRAI-Resistor connection pin to set the frequency range of built-in VCO.
79 LDSAI-Laser power detection signal input pin.
80 LDDAO-Laser power detection signal output pin.
Note) The same potential must be supplied to all power supply pins, i. e. , RFVDD, VVDD, ADAVDD, VDD, LVDD,
RVDD AND XVDD. Pins operated from the microprocessor interface power supply (VDD5V) pin :
CE(61 pin), CL(62pin), DI(63 pin), DO(64 pin), *WRQ(65 pin), RES(66 pin), DRF(67 pin), CONT1(72 pin),
CONT2(71 pin), CONT3(70 pin)
CAS output(For lower byte, L-active)
when use EDO-DRAM.
Clock output for DRAM when use SDRAM.
CAS output(For upper byte, L-active)
when use EDO-DRAM.
CAS output for SDRAM.(L-active)
OE output(L-active) when use EDO-DRAM.
CS output (L-active) when use SDRAM.
68 DVDD6-Digital power supply pin for I/O.
69 VSS-GND earth terminal.
70 WOKI
71 CNTOKO
72 OVFO
73 CMDOUTOCommand serial data output. (Nch open drain output pin)
74 CMDINICommand serial data input.
75 CLICommand serial clock input.
76 CEICommand enable input.(H-active)
77 INTBO
78 RESBISystem reset (L-active)
79 DATAINICD serial data input.
80 DATACKICD bit clock input.
O
Power
supply
Memory
IF
Power
supply
MP3
Stream
Input /
output
CD
monitor
Power
supply
Anti
shock
/MP3
input
&
output
Micon
I/F
CD I/F
When EDO-DRAM use. MP3 data request flag
output.(H-active)
/ DRAM data request flag input(CD ROM : H-active)
When SDRAM use CKE output(L-active).
When EDO-DRAM use. MP3 data transfer clock input.
/ DRAM data transfer clock output.
When SDRAM use DQML output(L-active).
When EDO-DRAM use. MP3 data serial input
/ DRAM data serial output.
When SDRAM use DQMH output(L-active).
MP3 flame synchronized signal(H-active)
/ Complete detection flag of data connecting
point request(CD-DA : H-active)
When EDO-DRAM use. CRC check (CDROM data / CDDA
subcode data) Result output(H-active)
/ DRAM data output enable flag(H-active)
When SDRAM use ADRS13 output.
DRAM light permission input(CD-DA : H-active)
DRAM data request flag input(Only when EDO-DRAM used.)
Complete detection flag of data connecting point request
(CD-DA : H-active) SYNC error monitor flag (MP3 : H-active)
DRAM data serial output(Only when EDO-DRAM used.)
DRAM light interrupt flag(CD-DA : H-active)
Emphasis output flag (MP3 : H-active)
DRAM data transfer clock output.
(Only when EDO-DRAM used.)
Interrupt signal output (L-active)
DRAM light interrupt flag(CD-DA : H-active)
ADBCK
ADDATA
- 9 -
Page 11
IC BLOCK DIAGRAM & DESCRIPTION
IC103 M12L16161A-7TG (Synchronous DRAM)
I/O ControlOutput Buffer
CLK
ADD
Address Register
LCKE
LRAS
CLK
CLK
CS
CKE
A0~A10/AP
BA
RAS
CAS
WE
L(U)DQM
Bank select
Refresh Counter
Row Buffer
LRAS
LCBR
Timing Register
CKE
PINNAME
CSRASCASWEL(U)DQM
System Clock
Chip Enable
Clock Enable
Address
Bank Select Address
Row Address Strobe
Column Address Strobe
Write Enable
Data Input / Output Mask
Data Input Register
Row Decoder
Col. Buffer
Latency & Burst Length
Programming Register
LCASLWELCBR
Active on the positive going edge to sample all inputs.
Disables or enables device operation by masking or enabling all inputs except CLK,CKE
and L(U)DQM.
Makes system clock to freeze operation from the next clock cycle.
CKE should be enabled at least one cycle prior to new command.
Disable input buffers for power down in standby.
Row / column addresses are multiplexed on the same pins.
Row address : RA0~RA10, column address : CA0~CA7
Selects bank to be activated during row address latch time.
Selects bank for read/write during column address latch time.
Latches row addresses on the positive going edge of the CLK with RAS low.
Enables row access & precharge.
Latches column addresses on the positive going edge of the CLK with CAS low.
Enables column access.
Enables write operation and row precharge.
Latches data in starting from CAS, WE active.
Makes data output Hi-Z tSHZ after the clock and masks the output.
Blocks data input when L(U)DQM active.
RESET Connect to condenser
of dalay time setting
CH3, Input terminal(Gain setting)
CH3, Input terminal(Gain setting)
CH3, Output terminal(+)
CH3, Output terminal(-)
(Do not use)
(Do not use)
CH4, Output terminal(-)
CH4, Output terminal(+)
CH4, Input terminal(Gain setting)
CH4, Input terminal(Gain setting)
Standard applied voltage terminal
Power supply
(VCC1, short-circuit 1pin)
Page 12
IC BLOCK DIAGRAM & DESCRIPTION
IC104 LA6548NH-E (CD Driver)
REG_B
REG_C
VIN2
VG2
VO2+
VO2-
(NC)
(NC)
VO1-
VO1+
VG1
VIN1
MUTE
VCC1
14
External PNP transistor, Base connect
13
External PNP transistor, Collector connect
12
+
11
11k11k
-
15.4k15.4k
Level shift
3.3VREG
Level shift
RESET
+
-
15
RESET
16
CD
17
VIN3
19
VG3
10
19
VO3+
9
20
VO3-
8
21
(NC)
FR
+
FR
-
GNDGND
7
22
(NC)
6
5
Level shift
Level shift
VO4-
24
VO4+
23
4
25
VG4
+
+
3
2
11k
(Output ON/OFF)
MUTE
15.4k
15.4k
-
11k
+
VIN4
27
VREF
26
1
-
28
VCC2
IC231 LA1844ML (Home Audio Tuner IC)
2423222120191817161514
ALC
BUFF
LEVEL
DET
FM
IF
1
AM
OSC
S-CURVE
FM
DET
23456789101112
AM
MIX
REG
AM/FM
IF
BUFF
AM
RF.AMP
AGC
AM
IF
COMP
TUNING
GND
DET
DRIVE
AM
P-DET
VCO
304kHz
DECODER
ANTI-BIRDIE
STEREO
SW
FF
38k
VCC
FF
19k
2
PILOT
CANCEL
FF
19k
13
PILOT
DET
- 11 -
Page 13
IC BLOCK DIAGRAM & DESCRIPTION
IC241 LC72121M-D (Pll Synthesizer)
2
Vssx
XIN
XOUT
FMIN
17
1
24
1/2
REFERENCE
DIVIDER
SWALLOW COUNTER
1/16, 1/17 4bits
PHASE DETECTOR
CHARGE PUMP
UNLOCK
DETECTOR
19
20
22
21
PD
AIN
AOUT
Vssa
16
AMIN
CE
3
DI
CL
DO
V
Vssd
4
5
6
DD
18
15
CCB
I / F
POWER
ON
RESET
IC440 AN7348K (Play/REC Pre Amplifier)
L-PB AMP
R-PB AMP
L-PB NF
L-PB EO
21222324
12bits PROGRAMMABLE
DIVIDER
DATA SHIFT REGISTER LATCH
9
8
7
BO1BO2 BO3 BO4
L-PB
1011
AMP OUT
ALC
20
14
IO2
IO1
L-REC IN
1819
UNIVERSAL
COUNTER
L-REC OUT
17
16
ALC
P
15
R
13
HI/LO
IFIN
CRO/NOR
VCC
1314
A/Rec
B
A/Rec
1
L-PB AMP
B
2
R-PB AMP
PB Amp(L)
PB Amp(R)
3
R-PB NF
Mute
Mute
4
R-PB EO
ALC
Logic
A/B
5
R-PB OUT
- 12 -
6
AB SW
Amp(R)
7
R-REC IN
Rec
Amp(L)
Rec
Logic
Rec/PB
8
9
R-REC OUT
P
R
Nor/Cro
& Hi/Lo
Logic
R
P
101211
A/B SW
REC/PB SW
Ripple
Rejection
GND
FILTER
Page 14
IC BLOCK DIAGRAM & DESCRIPTION
/
IC251 LC72723M (RDS Demodulation LSI)
VREFFLOUTCIN
Vdda
Vssa
MPXIN
TEST
REFERENCE
VOLTAGE
57kHz
ANTIALIASING
FILTER
TEST
RDS-ID/ READY
RDCL
RDDA
RST
MODE
(SCF)
Vddd
BPF
Vssd
1611521431341251161079
VREF
MPXIN
Vdda
Vssa
CIN
FLOUT
TEST
XIN
8
XOUT
+
-
PLL
(57kHz)
CLOCK
RECOVERY
(1187.5Hz)
VREF
SMOOTHING
FILTER
CLK(4.332MHz)
OSC
DATA
DECODER
RAM
(128bit)
RDS-ID
DETECT
XINXOUT
PIN NO. PIN NAME I/ODescription
1VREFO Reference Voltage Output (Vdda/2)
2MPXINIBase Band (Maltiplex) Signal Input
5FLOUTO Sub Careea Output (Filter Output)
6CINI Sub Careea Input (Comparator Input)
3Vdda- Analog System Power Supply (+5V)
4Vssa- Analog System Ground
8XOUTO Crystal Oscillator Output (4.332MHz)
9XINCrystal Oscillator Input (External Reference Signal Input)
signal. When there is no Zero Cross Signal after
setting data until a timer is completed, data is set
compulsorily.
Chip EnableTerminal
Data is written in an internal latch in time for set to "L"
from "H", and each Analog Switch operates.Data
transmission is set to Enable on "H" level.
1
Serial Data foe Control and Clock Input Terminal
30
Te st Terminal of Electronic Volume.
Maintain a Vss potential.
*8 Bit Input/Output Port
*It's possible to specify Input/Output of 4 Bit.
*Pull-up Resistor 4 Bitwise. It's possible to ON/OFF.
I/O
*HOLD Release Input
*Port 0 Interrupt Input
*8 Bit Input/Output Port
*It's possible to specify Input/Output of 1Bit.
*Pull-up Resistor 1Bitwise. It's possible to ON/OFF.
*Terminal Functions
P10 : SI00 Data Output
P11 : SI00 Data Input/Bass Input and Output
Each precaution in this manual should be followed during servicing. Components identified with the IEC symbol
diagram designated components in which safety and performance can be of special significance. When replacing a component identified by
the replacement parts designated, or parts with the same ratings of resistance, wattage or voltage that are designated in the parts list in this manual. Leakagecurrent or resistance measurements must be made to determine that exposed parts are acceptably insulated from the supply circuit before returning the product
to the customer.
and mark in the parts list and the schematic
!!
!
!!
!
and , use only
- 23 -- 22 -
Page 22
WIRING DIAGRAM (FRONT & CD)
R1340
C1308
R1305
C1305
R1307
C1415
C1505
C1314
R1319
C1324
R1328
C1315
C1334
R1330
R6123
C6230
C6231
R1310
CAN
R1312
C1320
C1403
R1434
R1433
C1509
R1317
C1309
C1332
R1327
R1356
R1410
C1419
C1407
R1401
C6150
R6175
C6012
C6021
R6112
C1336
J6382
CN146
J6023
CN145
J6381
JW200
C1325
C1323
R1308
TO TU
C1314
C1314
R1314
J6380
C1312
R1315
FR
C1315
C1315
J6022
R1302
C1348 C1347
R1348
J6021
CN111
R1303
AUX_L
AUX_GND
AUX_R
R1317
R1317
C1309
C1309
R1361
R1328
R1328
C1324
C1324
J6378
TP4
J6377
T+
F+
GND
C
E
VREF
C1308
C1308
C1326
R1318
R1319
R1319
C1313
R1316
C1316
R1340
R1340
J6379
R1347
FT-
PD
VR
LD
F
R1346
B
A
D
COM
C1307
J6376
C1311
R1503
CAN
C1310
R1320
C1327
C1328
R1311
J6020
R1343
R1341
J6373
C1301
R1301
J6374
J6375
J6019
J6018
R1331
C1317
R1344
R1342
J6368
J6371
J6369
J6370
CAN
C1508
TF
CD P.W. BOARD
R1321
R1322
TP9
J6372
R1323
CAN
CAN
CAN
IC101
TP7
C1321
C1322
R1310
R1310
TP2
FE
J6363
R1309
J6016
J6364
J6362
C1306
J6365
L1301
J6361
C1509
C1509
C1511
IC104
J6017
TP6
JW101
CAN
TP1
VC
C1305
C1305
R1304
Q1301
R1505
J6366
J6367
CAN
R1511
C1330
C1331
X1451
TP5
C1320
C1320
CAN
CAN
R1305
R1305
J6359
J6360
R1508
J6015
C1333
C1319
R1312
R1312
C1302
E
J6358
R1509
CAN
PR151
C1510
J6013
C1329
C1721
R1330
R1330
L1303
C1334
C1334
C1318
TP3
TE
REM
TP8
J6014
400mA
R1502
R1325
C1722
C1332
C1332
C1335
C1701
J6355
J6356
J6357
C1501
C1506
Q1501
J6354
R1345
R1327
R1327
J6352
C1801
J6351
R1802
C1703
R1803
C1803
R1703
C1502
C1401
J6349
C1504
E
J6353
J6350
J6220
R1404
R1403
R1702
C1402
E
Q1401
J6011
C1507
C1505
C1505
L1501
J6012
J6347
J6348
C1403
C1403
C1404
C1414
R1401
R1401
J6342
J6344
L1401
J6010
C1406
C1405
R1405
J6346
R1402
J6345
L1302
R1324
R1406
C1413
J6009
J6343
J6219
SP+
J6341
CN112
J6337
R1409
R1408
R1407
J6338
IC102
J6339
J6340
IC103
C1416
LIMIT
SL-
SL+
SP-
R1351
J6336
C1418
C1407
C1407
R1332
R1436
R1437
C1415
C1415
GND
R1307
R1307
J6335
J6008
R1415
R1414
R1411
R1326
C1420
R1412
C1417
JW100
C1410
C1412
J6334
J6007
TO BUTTON TOP
CN610
C6150
C6250
C6150
R1352
J6330
J6326
R1353
R1358
C1419
C1419
R1410
R1410
J6210
J6211
J6212
R1355
R1360
R1357
R1356
R1356
R1359
C1411R1438
J6327
R1440
DA3300_CDF_PWB
J6331
R1433
R1433
R1434
R1434
R1435
R1439
J6328
T002A 94V-0
J6332
J6333
J6213
J6214
J6215
J6216
J6217
J6218
TO AMP
J6329
CN122
D-GND
A-GND
+8.5V
CD-R
J6316
J6209
J6317
J6324
J6322
J6323
J6325
J6318
J6319
J6321
J6320
1AD4B10D2741B
C6020
C6021
C6021
R6115
Q6108
CAN
+8.5V
D1501
D1502
TU-R
CD-L
TU-L
TU-G
C6451
CN606
D6960
+12V
FRONT P.W. BOARD
TO AMP
+5.6V
J6310
R6175
R6175
J6208
R6275
L6010
D6110
D6010
C6010
C6012
C6012
J6204
J6313
J6308
R6123
R6123
X6102
J6312
C6210
R6111
R6112
R6112
E
J6314
CN604
J6311
J6309
R6009
J6205
J6206
J6207
R6966
E
R6403
E
R6406
R6400
Q6410
J6315
GND
C6452
Q6961
Q6960
RECORDING
LID_SW
REC_MUTE
V_CHECK
BEAT
GND
P_CON
CN601
C6221
D6111
C6110
C6113
C6230
C6230
C6231
C6231
X6101
R6965
R6402
D6406
R6401
M-MUTE
TU-CLK
VF-CE
TU_DI
J6006
R6225
D6113
C6115
R6116
J6203
C6111
C6112
IC601
R6121
R6120
R6118
R6119
J6307
E
Q6963
E
Q6962
TO TAPE
CN605
REEL
PH1
GND
TO TU
+5.6V
+12V
J6303
J6306
Q6107
R6222
J6004
J6304
CN611
J6005
PLUNGER
MOTOR
REC SW
INI SW
TU_DI
TU-CLK
TU-DO
TU-D-G
TU-CE
TU-GND
TU-R
TU-L
CN602
J6003
J6300
J6302
R6114
D6201
R6221
R6226
J6002
Q6201
J6201
J6202
J6305
C6118
C6011
C6013
J6200
J6301
J6001
PACK SW
REC SW
NC
LID_SW
NC
CN612
TO BUTTON FRONT
1
J6000
510152025303540
LCD60
TO SENSOR
This is a basic wiring diagram.
- 25 -- 24 -
Page 23
SCHEMATIC DIAGRAM (TUNER)
Q2310
KTC3193
CN201
CN202
C2100
1000P
D2104
1SS133
D2152
1SS133
Q2451
KRA107M
D2151
8.5
0
D2103
1SS133
1SS133
FM+B
U2101
GNDGND
12345678
R2103
27
R2140
Q2140
KTC3199
0
0
R2100
0
3.3K
R2141
10K
3.3K
R2102
C2140
1000P
10K
R2454
10K
10;50
150
R2101
C2102
IF+BOSCVTAGCANT
0.01
C2101
000
R2107
100
R2114
000
R2108
C2170
5P
C2117
100P
XF221
C2115
820K
R2148
1000P
R2201
0
10K
R2151
C2116
0.47;50
D2153
27K
R2149
R2204
470K
2.3
0
Q2201
KTC3193
R2202
0
C2151
0.047
SVC342
33
R2205
C2152
560P
9.2
0
1.6
0
CT252
R2203
C2203
6P
C2141
R2131
330
0.01
56K
XF222
L2151
MWANT
15P
C2154
L2153
MWOSC
R2111
1,1/8W
R2112
1,1/8W
0.1
C2325
1000P
C2323
R2310
15K
10K
T2002
XF233
R2305
10K
C2304
0.047
22;16
C2303
2.1
123456789101112
3.3K
FM IF AM MIXAM IFREGGNDSDST FM DET VDD MUTE FM/AM MONO
Each precaution in this manual should be followed during servicing. Components identified with the IEC symbol
and mark in the parts list and the schematic diagram designated components in which safety and
!!
!
performance can be of special significance. When replacing a component identified by
the replacement parts designated, or parts with the same ratings of resistance, wattage or voltage that are
designated in the parts list in this manual. Leakage-current or resistance measurements must be made to
determine that exposed parts are acceptably insulated from the supply circuit before returning the product to
the customer.
!!
!
and , use only
+12V
+12V
TU_R
TU_L
TU_LCH
TU_RCH
TU_GND
CD_R
CD_L
A_GND
CD_LCH
CD_RCH
+8.5V
+8.5V
987654321
CN444
D_GND
D_CLK
TU_DO
TU_DO
TU_CLK
MUTE
VF_CE
VF_CE
P_CON
MAIN_MUTE
BEAT
V_CHK
NC
V_CHECK
987654321
GND
BEAT
REC_MUTE
REC
+5.6V
121110
+5.6V
CN446
RECORDING
CN413
R4100
4.7K
100K
R4101
D4106
1SS133
Q4100
KTC3198
SUB POWER SUPPLY
RY401
10
Q4101
KTD863
R4102
0.01
C4107
D4105
MTZJ6.2B
C4106
R4103
47;25
2.2K
C4105
- 31 -- 30 -
C4101
10.2V
C4102
1000/16
0.01;F
0.01;F
D4101
MPG06G
D4102
MPG06G
D4104
MPG06G
D4103
MPG06G
C4103
C4108
0.01
FU401
T500mA L 250V
L4591
CN401CN402
CN403
CN404
CN410
BL
230V/50Hz
BW
PT401
4
0.01;F
C4104
73
0.01;F
1
This is a basic schematic diagram.
Page 26
WIRING DIAGRAM (AMPLIFIER)
C4804
R4606
R4603
R4551
C4553
R4550
R4700
C4700
C4803
C4800
R4800
C4808
C4708
R4803
R4827
R4828
R4829
R4804
R4704
R4501
R4741
R4841
C4706
C4705
C4806
R4805
R4802
R4725
R4731
R4728
R4729
R4727
R4502
R4503
C4995
C4990
C4920
R4920
C4286
R4826
C4904
Q4600
PR420
4000mA
CN428
+12V
J4397
R4605
Q4601
R4601
R4600
C
B
L4602
CN442
PR495
800mA
R4990
R4991
E
Q4993
D4991
Q4990
Q4602
E
L4603
L4604
E
C4605
C4601
L4601
L4600
C4609
E
R4606
R4606
R4608
E
Q4603
C4600
R4607
R4604
IC443
C4604
R4603
R4603
J4411
C4603
JW
OUTIN
IC446
D4995
C4283
D4283
C4282
D4282
C4280
D4280
C4281
D4281
C4284
D4284
PR496
1250mA
R4994
C4991
C4990
C4990
+8.5
E
R4993
R4992
D4992
E
Q4992
J4021
E
R4967
Q4991
C4606
J4002
C4602
+5.6V
D4997
C4993
C4996
C4995
C4995
E
C4608
J4001
R4602
D4996
D4993
J4013
C4503
Q4994
C4807
C4607
C4707
R4804
R4804
C4803
C4803
R4803
R4803
R4703
C4703
CN440
J4405
J4006
E
C4997
C4994
DD
Q4320
J4010
C4984
C4502
J4222
C4505
R4502
R4502
R4840
C4832
C4841 R4500
IC442
C4808
C4808
C4708
C4708
C4804
C4804
R4704
R4704
C4704
R4552
J4005
R4553
R4223
R4324
Q4321
R4321
E
R4322
JW
D4994
J4422
J4423
D4998
C4840
C4732
R4841
R4841
C4801
R4801
J4007
C4286
C4286
R4501
R4501
R4741
R4741
C4800
R4800
R4800
C4800
1
24
C4705
C4705
J4003
J4004
R4701
J4008
D4320
R4320
C4950
J4018
R4740
C4740
C4741
C4802
R4802
R4802
C4805
R4702
C4700
C4700
R4700
R4700
C4701
D4321
C4320
E
Q4502
R4503
R4503
C4500
J4426
E
Q4800
C4556
C4806
R4805
C4806
R4805
C4555
IC440
20
C4550
R4705
C4706
C4706
R4550
R4550
E
Q4700
C4702
+8.5V
+12V
J4413
J4414
C4992
R4504
Q4501
C4742
R4743
R4745
C4743
R4551
R4551
10
12
C4554
13
C4553
C4553
C4551
C4552
C4953
J4218
J4412
J4219
J4220
J4421
J4420
E
R4781
CN455
J4396
+5.6V
J4221
J4398
J4000
J4401
R4963
J4408
J4409
J4410
J4419
C4842
R4845
C4843
L4606
J4407
J4217
JW400
C4501
J4417
L4605
C4560
R4560
J4216
TU_DO
TU_CLK
VF_CE
CN446
MAIN_MUTE
P_CON
NC
V_CHECK
BEAT
REC_MUTE
GND
RECORDING
+5.6V
R4962
D_GND
+8.5V
CD_RCH
CN444
A_GND
CD_LCH
TU_RCH
TU_GND
TU_LCH
+12V
JW401
J4017
R4843
R4881
J4223
C4903
J4416
R4720
R4510
C4999
J4400
R4831
R4826
R4826
R4820
R4825
J4415
R4725
R4725
C4901
1AD4B10D2741A
T002A 94V-0
J4399
C4823
R4822
R4828
R4828
C4826
R4920
R4920
R4732
C4920
C4920
C4721
C4725
R4727
R4727
C4751
R4751
CN441
C4904
C4904
C4902
R4829
R4823
R4829
C4833
R4832
C4827
C4828
C4923
R4923
C4922
C4504
C4722
R4728
R4728
R4722
J4014
J4015
J4016
R4750
C4750
J4403
J4404
J4406
R4922
J4009
J4418
J4011
R4729
R4729
R4723
R4851
C4851
J4023
J4019
C4821
C4820
C4733
R4726
J4012
C4720
Q4503
J4424
J4425
J4427
R4821
R4827
R4827
C4825
IC441
C4728
C4727
C4726
R4731
R4731
R4721
C4998
C4822
J4402
R4921
C4921
C4723
R4850
C4850
J4020
J4022
This is a basic wiring diagram.
CN457
Nov. / '04BB Printed in Japan
SANYO Electric Co., Ltd.
Osaka, Japan
- 33 -- 32 -
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