Sanyo 42XR56DZ Schematic

FILE NO.

SERVICE MANUA

LCD TV

L

LCD-42XR56DZ

PRODUCT CODE No.

PRODUCT CODE No.
1 682 346 41

REFERENCE No.:SM0915057

CONTENTS

Safety precautions………………………………………………………………………..…

Alignment instructions …………………………….…….…………………………………

Method of software upgrading……………………………………………………………..

Working principle analysis of the unit……………………………….………….………….

Block diagram…………………………………..………………………………….…………

IC block diagram and instruction…………………………………………………………..……

Wiring diagram …………………………………………………………………………….

Troubleshooting guide ………………………………………………………………..……

Schematic diagram…………………………………………………………………………

APPENDIX-A: Main assembly list

APPENDIX-B: Exploded View

3

5

11

15

18

19

23

24

27

Attention: This service manual is only for service personnel to take reference with. Before

servicing please read the following points carefully.

Safety precautions

1. Instructions

Be sure to switch off the power supply before replacing or welding any components or
inserting/plugging in connection wire Anti static measures to be taken (throughout the entire
production process!):
a) Do not touch here and there by hand at will;
b) Be sure to use anti static electric iron;
c) It’s a must for the welder to wear anti static gloves.
Please refer to the detailed list before replacing components that have special safety requirements.
Do not change the specs and type at will.

2. Points for attention in servicing of LCD

2.1 Screens are different from one model to another and therefore not interchangeable. Be sure to
use the screen of the original model for replacement.

2.2 The operation voltage of LCD screen is 700-825V. Be sure to take proper measures in
protecting yourself and the machine when testing the system in the course of normal operation or
right after the power is switched off. Please do not touch the circuit or the metal part of the module
that is in operation mode. Relevant operation is possible only one minute after the power is
switched off.

2.3 Do not use any adapter that is not identical with the TV set. Otherwise it will cause fire or
damage to the set.

2.4 Never operate the set or do any installation work in bad environment such as wet bathroom,
laundry, kitchen, or nearby fire source, heating equipment and devices or exposure to sunlight etc.
Otherwise bad effect will result.

2.5 If any foreign substance such as water, liquid, metal slices or other matters happens to fall into
the module, be sure to cut the power off immediately and do not move anything on the module lest it
should cause fire or electric shock due to contact with the high voltage or short circuit.

2.6 Should there be smoke, abnormal smell or sound from the module, please shut the power off at
once. Likewise, if the screen is not working after the power is on or in the course of operation, the
power must be cut off immediately and no more operation is allowed under the same condition.

2.7 Do not pull out or plug in the connection wire when the module is in operation or just after the
power is off because in this case relatively high voltage still remains in the capacitor of the driving
circuit. Please wait at least one minute before the pulling out or plugging in the connection wire.

2.8 When operating or installing LCD please don’t subject the LCD components to bending, twisting
or extrusion, collision lest mishap should result.

2.9 As most of the circuitry in LCD TV set is composed of CMOS integrated circuits, it’s necessary
to pay attention to anti statics. Before servicing LCD TV make sure to take anti static measure and
ensure full grounding for all the parts that have to be grounded.

2.10 There are lots of connection wires between parts behind the LCD screen. When servicing or
moving the set please take care not to touch or scratch them. Once they are damaged the screen

would be unable to work and no way to get it repaired.
If the connection wires, connections or components fixed by the thermotropic glue need to
disengage when service, please soak the thermotropic glue into the alcohol and then pull them out
in case of dagmage.

2.11 Special care must be taken in transporting or handling it. Exquisite shock vibration may lead to
breakage of screen glass or damage to driving circuit. Therefore it must be packed in a strong case
before the transportation or handling.

2.12 For the storage make sure to put it in a place where the environment can be controlled so as to
prevent the temperature and humidity from exceeding the limits as specified in the manual. For
prolonged storage, it is necessary to house it in an anti-moisture bag and put them altogether in one
place. The ambient conditions are tabulated as follows:

o

Temperature Scope for operation

5

~ +35

C

Scope for storage -15~ +45 oC

Humidity Scope for operation 20% ~ 80%

Scope for storage <= 80%

2.13 Display of a fixed picture for a long time may result in appearance of picture residue on the
screen, as commonly called “ghost shadow”. The extent of the residual picture varies with the
maker of LCD screen. This phenomenon doesn’t represent failure. This “ghost shadow” may remain
in the picture for a period of time (several minutes). But when operating it please avoid displaying
still picture in high brightness for a long time.

3. Points for attention during installation

3.1 The front panel of LCD screen is of glass. When installing it please make sure to put it in place.

3.2 For service or installation it’s necessary to use specified screw lest it should damage the screen.

3.3 Be sure to take anti dust measures. Any foreign substance that happens to fall down between
the screen and the glass will affect the receiving and viewing effect

3.4 When dismantling or mounting the protective partition plate that is used for anti vibration and
insulation please take care to keep it in intactness so as to avoid hidden trouble.

3.5 Be sure to protect the cabinet from damage or scratch during service, dismantling or mounting.

Alignment instructions

Test equipment

PM5518 (video signal generator)
VG-848 (VGA, YPbPr signal generator)
VG-849 (HDMI digital video signal generator)
CA210 (color analyzer)

1 Alignment flow

1.1 Voltage of power supply test

According to the wiring diagram “9232KE5601JL”, connect power board, digital board, IR board

correctly; then power on and press key “standby” .

a) Test voltage of socket X801 each pin in turn listed as Table 1.

Tabl e 1 Voltage of X801 each pin

X801 Pin1 2 3 4

Voltage

8.55 V～9.45 V

0

4.85 V～5.35 V

0

11.4 V～12.6 V

5、6 7 、8

0

9 10 11

4.85 V～5.35 V

b) Test voltage of socket XV03 each pin in turn listed as Table 2.

Tabl e 2 Voltage of XV03 each pin

XV03

Voltage

Pin1、2 3、4、5

23.8 V～25.2 V

0

>2.5

0

V

1.2 Adjustment flow chart as Fig.1

Check if DDC、、HDCP KEY and FLASH

have been burned.

combination adjustment for general

assembly

white balance adjustment

Connect to central signal source, check if

TV functions are normal -omitted channel,

analog parameters control, etc; check if

output of earphone and speaker are

normal.

Input AV/SVIDEO/SCART signal，check if

functions of every channel are normal.

Input high-definition component signal

(mode), check if every YPbPr function is

normal.

Check accessories and packing.

setup before leaving factory

Input HDMI signal,check if the display is normal;

check if every function is normal –analog

parameter control, horizontal/vertical center, etc.

Input VGA signal，check if the display is normal;

check if every function is normal -analog

parameter control, horizontal/vertical center, etc.

Fig.1 Adjustment flow chart

2 Alignment instruction

2.1 Unit adjustment

2.1.1 According to the wiring diagram “9232KE5601JL”, connect power board, digital board,

SCART interface board, IR board, key board and side AV board correctly; then power on,

check if the display is normal.

2.1.2 Using method of factory menu

a) First press key “SOURCE”，then press number key “2、5、8、0” in turn to enter into initial

factory menu;

b) Press keys “CH+” and “CH-” can move cursor to each page of initial factory menu, then press

key “OK” can enter into adjustment menu of each page;

c) Press keys “CH+” and “CH-” can move cursor upwards and downwards within one adjustment

page;

d) Move cursor to one adjustment item, then press keys “VOL-” and “VOL+” can adjust it;

e) Press key “MENU” can exit adjustment menu of one page to its superior factory menu;

f) Press key “EXIT” can exit factory menu at any time;

g) Press key “OK” can enter into inferior factory menu;

h) Factory menu item “ADC Calibrate” is used to correct ADC of VGA and Component

channel;

i) Factory menu item “W/B ADJUST” is used to adjust white balance;

j) Factory menu item “POWER MODE” is used to set power-on mode, “Standby” means the

set will be in standby state after power-on; “MEM” means the set will be in the state before

the last power-off; “ForceOn” means the set will be working automatically after power-on,

this mode is also used for factory-machine-aging; default setting should be “Standby” mode

unless specified by customer requirement;

k) Factory menu item “ISP MODE” is used to upgrade unit software from VGA port when the

item is set as “ON” and the set is connected to ISP adjustment equipment; DDC function of

VGA port will be recovered when the item is set as “OFF”; the value of the item can not be

kept in the memory, that is to say the item is reset as “OFF” after power-on again;

l) Factory menu item “RESET ALL” is used to reset factory menu data and user menu data;

after execute the item, the set will be started up again and the startup guided picture will be

displayed;

m) Factory menu item “FACTORY CHANNEL PRESET” is used to preset factory programs

data; it is necessary to connect to central signal source for DTV searching programs. Now

digital frequency of central signal CH28(529.5 MHz) and CH33(564.5 MHz) are distributed

to Australia programs. Primary preset programs would not be modified along with the

changing of central signals, so please select item DTV in menu Channel to manual search

digital programs, the process will spend about 15s;

n) Factory menu item “CUSTOM CHANNEL PRESET” : first delete all DTV/ATV programs for

factory adjustment, then preset ATV channel data according to customer order requirements;

please execute the item to clear out all programs for factory adjustment before leaving

factory;

o) Factory menu item “MST Debug” :default setting “OFF” is used for engineering models

whose RS232 functions can measure up to design specifications; setting “ON” is convenient

for debugging by developing tools; the value of the item can not be kept in the memory, that

is to say the item is reset as “OFF” after power-on again;

p) Factory menu item “BACKLIGHT” is used to adjust backlight brightness, adjust the item and

test voltage of X802-2# (PWM) to measure up to the maximum PWM voltage in panel

specification;

q) Factory menu item “SSC ADJUST” is used to adjust expended functions of frequency

content, the software having been preset according to model need not be adjusted again;

r) Factory menu item “AUDIO Curve” is used to adjust audio curve; without special customer

requirements, the software having been preset according to model need not be adjusted

again;

If the software has been upgraded or EEPROM has data already, please execute item

“RESET ALL” before adjustment for the first time.

2.1.3 ADC calibration

ADC calibration of VGA channel

a) Switch to VGA channel;
b) Press key “SOURCE”, then press number keys “2、5、8、0” to enter into initial factory menu;

c) Move cursor to item “ADC ADJUST” and press key “OK” to enter into interior factory menu;
d) Input VGA signal (VG-848 Timing:856(1024×768/60 Hz)，Pattern 920 Gray 8 step(H)),

move cursor to item “MODE”，press keys “▲” and “▼” to select item “RGB”, then move

cursor to item “AUTO ADC” and press key “OK” to begin adjustment automatically until

adjustment completion.

ADC calibration of YPbPr channel

a) Switch to YPbPr channel;
b) Press key “SOURCE”，then press number keys “2、5、8、0” to enter into initial factory menu;

c) Move cursor to item “ADC ADJUST” and press key “OK” to enter into interior factory menu;
d) Input YPbPr signal (VG848 Timing 972（1080i）,Pattern 918 SMPTE Color Bar), move

cursor to item “MODE”，press keys “▲” and “▼” to select item “YPbPr（HD）”, then move

cursor to item “AUTO ADC” and press key “ENTER” to begin adjustment automatically, a

prompt “success” displayed under “AUTO ADC” means auto-adjustment completed

successfully;

e) Input YPbPr signal (VG848 Timing 978（483P）,Pattern 918 SMPTE Color Bar), move

cursor to item “MODE”，press keys “▲” and “▼” to select item “YPbPr（SD）”, then move

cursor to item “AUTO ADC” and press key “ENTER” to begin adjustment automatically, a

prompt “success” displayed under “AUTO ADC” means auto-adjustment completed

successfully;

2.2 White balance adjustment

Unless specified by customer, default COOL color temperature is

12000K, chromaticity

coordinates is （ 272 、278 ） ; default Normal color temperature is 9300K, chromaticity
coordinates is（285、293）; default Warm color temperature is 6500K, chromaticity coordinates
is （313、329）.

2.3 White balance adjustment processes

The set should be working above 30 minutes before white balance adjustment for it would be in

a stabler state. Use white balance apparatus CA-210 and switch to its BBY channel.

a) Switch to HDMI channel；
b) Press key “SOURCE”, then press number keys “2、5、8、0” in turn to enter into initial factory

menu;

c) Move to item “W/B ADJUST” and press key “OK” to enter into interior factory menu;
d) Input DVI/HDMI signal （VG-848 Timing: 856(1024×768/60 Hz)，Pattern:921 16 step

Gray）, move cursor to item “MODE”, press keys “▲” and “▼” to select item “HDMI1” or

other HDMI channels, then move cursor to item “TEMPERTURE”, press keys “▲” and “▼”

to select item “COOL”;

e) Adjust items “R GAIN、G GAIN、B GAIN” to set chromaticity coordinates of the 14

is （272、278）;

f) Adjust item “R Offset、G Offset、B Offset” to set chromaticity coordinates of the 4

th

（272、278）;

g) During adjustment , make sure that color temperature of bright step is (X=272±10 Y=278±10)

and color temperature of dark step is (X=272±10 Y=278±10);

h) Then move cursor to item “COPY ALL” to copy white balance data to the other channels

except DTV channel;

i) Check if color temperature of HDMI NORMAL and WARM meet requirements as below:

bright step: allowable error is ±10, dark step: allowable error is ±10;

otherwise adjust items “R_GAIN /B_GAIN/R_OFF/B_OFF” to meet requirements and then

save data;

th

step

step is

j) Switch to other channels ATV, AV，COMPONENT and D-SUB , check if color temperature of

COOL，NORMAL and WARM meet requirements; otherwise adjust them respectively with

16 step Gray signal and the same adjustment method as HDMI channel’s; exit menu “W/B

ADJUST” after adjustment and the data would be saved automatically;

k) DTV channel adjustment: switch to DTV channel, input 16 step Gray signal, enter into

factory menu, then begin adjustment followed by steps “e, f, g”;

l) Adjustment rules for reference as below:

adjust B gun: adjust B gun value downwards , then coordinates of X、Y will rise;
adjust B gun value upwards , then coordinates of X、Y will descent;

adjust R gun will effect the coordinate of X , and effect the value of Lv a little:

adjust R gun value upwards , then coordinate of X will rise;

adjust R gun value downwards , then coordinate of X will descent;

adjust G gun will effect the coordinate of Y , and effect the value of Lv a lot:

adjust G gun value upwards , then coordinate of Y will rise;

adjust G gun value downwards , then coordinate of Y will descent;

note: default color temperature for SANYO customer is Normal; change to picture mode

Dynamic, adjust chromaticity coordinates of color temperature Normal and Cool;

only adjust chromaticity coordinates of color temperature Cool for other customers when

picture mode is Dynamic.

3 Performance check

3.1 TV functions

Connect RF port to central signal source, first enter into menu

CHANNEL, then search

programs automatically, check if there is any omitted program, check if the output of speakers is

normal, check if the picture is normal.

3.2 AV/S-Video port

Input AV/S-Video signal respectively, check if the picture, the sound and other functions are

normal;

3.3 SCART port

Input signal to SCART port, check if the picture, the sound and other functions are normal;

Switch to TV channel, check if the picture, the sound and other functions of SCART OUT

channel are normal;

3.4 YPbPr/YCbCr port

Input YUV signal from signal generator VG-848 with YUV formats as Tabl e 4 respectively, check

if the display and the sound are normal under the circumstances of power-on/off, switching

channel, switching signal format, etc.

Table 4 YUV receiving signal formats

Horizontal

No. Definition

1 720×480 15.734 60 13.5 480i (NTSC)

2 720×480 15.734 59.94 13.5 480i (NTSC)

3 720×576 15.625 50 13.5 576i (PAL)

frequency

（kHz）

Vertical frequenvy

（Hz）

Dot-pulse

frequency

（MHz）

Remark

4 720×480 31.469 60 27

5 720×480 31.469 59.94 27

6 720×576 31.25 50 27 576p (PAL PROG)

7 1280×720 45 59.94 74.18 720p (59p)

8 1280×720 45 60 74.25 720p (60p)

9 1280×720 37.5 50 74.25 720p (50p)

10 1920×1080 33.75 59.94 74.25 1080i (59i)

11 1920×1080 33.75 60 74.25 1080i (60i)

12 1920×1080 28.125 50 74.25 1080i (50i)

13 1920×1080 67.5 59.94 148.35 1080p (59p)

14 1920×1080 67.5 60 148.5 1080p (60p)

15 1920×1080 56.25 50 148.5 1080p (50p)

16 1920×1080 - 23.94/24 - -

17 1920×1080 - 25 - -

18 1920×1080 - 29.97/30 - -

480p (NTSC

PROG)

480p (NTSC

PROG)

3.5 VGA port

Input VGA signal from signal generator VG-848 with VGA formats as Tab le 5 respectively, check

if the display and the sound are normal; if there is any deviation of line or field, enter into main

menu, select and execute items “Picture->Screen->Auto Adjusting” in turn to correct them

automatically.

Table 5 VGA receiving signal formats

Horizontal

No. Definition

1 640×480 31.469 59.94 25.175 IBM

2 720×400 31.469 70.086 28.322 IBM

3 640×480 37.861 72.809 31.5 VESA

4 640×480 37.5 75 31.5 VESA

5 800×600 35.156 56.25 36 VESA

6 800×600 37.879 60.317 40 VESA

7 800×600 48.077 72.188 50 VESA

8 800×600 46.875 75 49.5 VESA

9 1024×768 48.363 60.004 65 VESA

10 1024×768 56.476 70.069 75 VESA

11 1024×768 60.023 75.029 78.75 VESA

12 1152×864 67.5 75 108 VESA

13 1280×960 60 60 108 VESA

14 1280×1024 63.98 60.02 108 VESA

15 1280×1024 80 75 135 SXGA

16 1440×900 - 60 - -

17 1680×1050 - 60 - -

18 1360×768 47.7 60 85.5 -

frequency

（kHz）

Vertical

frequenvy

（Hz）

Dot-pulse

frequency

（MHz）

Remark

3.6 HDMI port

Input HDMI signal from signal generator VG-849 with the formats as Table 4 and Table 5
respectively, check if the display and the sound（32 KHz、44.1 KHz、48 KHz）are normal under

the circumstances of power-on/off, switching channel, switching signal format, etc.

3.7 Other functions check

a) Check if the functions are normal —timing turn-on/off 、turn-off of sleeping time 、

picture/sound mode、OSD、stereo and digital audio interface, etc.;

b) Check if audio only digital programs (RADIO) are normal;

c) For UK models, check if MHEG function of digital programs are normal;
d) Check if common interface（CI：Common Interface）is normal;

e) For New Zealand models, check if function of logic channel number (LCN) is normal, check

if function of Over Air Download（OAD）is normal;

f) For France, UK and Italy models, check if function of logic channel number (LCN) is

normal.

4 User menu setup before leaving factory

Enter into page “LOCK” of user menu, select submenu item “Restore Factory Default” to preset

items before leaving factory as below:

a) Clear out all programs information;

b) Clear out information of parental control (VCHIP);

c) Default setup of user analog data;

d) Set Menu Language as English;

e) Set Power on MODE as Off.

5 Instruction of factory software burning as Table 6

Table 6 Instruction of factory software burning

Instruction of

No. Part No. Part type

N111 5276405001 MX25L6405DMI-12G FLASH Yes

N108 5272404002 AT24C04 HDMI KEY Yes

NA04 5272402002 AT24C02 HDMI EDID Yes

NA05 5272402002 AT24C02 HDMI EDID Yes

NA06 5272402002 AT24C02

N106 5272402002 AT24C02 VGA EDID Yes

software

function

HDMI EDID

(supporting

the3rd HDMI)

Burned

before

SMT

Yes

Note 1: Write-protect setup method

Enter into burning interface of

program ALL-100, select item “Config”, press item “config

Setting”, set item “Protect” as “All Protect”; be sure to select item “Config” before burning

software, and write-protect must be re-set after burning program ALL-100 startup every time.

Burning method

burned with program

ALL100, write-protect setup,

refer to Note 1 in detail

burned with program ALL100

burned with program ALL100

burned with program ALL100

burned with program ALL100

burned with program ALL100

Note 2: Burning and upgrading software method with burning tool ISP

1） Main board upgrading: connect 4-core line of burning tool ISP to Debug port（location No. X807）

of main board;

Unit upgrading: connect both VGA ports between burning tool ISP and main board, then enter

into factory menu and set item “ISP Mode” as “ON”;

2） Use on-line burning tool of Mstar, enter into menu “Device”, select item “WP Pin pull to high

during ISP” as Fig. 2; for the normal erasing process, make sure hardware write-protect of Flash

is canceled;

Fig. 2 Write-protect setup

3) Select menu “Connect”, a dialog “Device Type is MX25L64” will be displayed as Fig. 3 , that is

to say connecting is successful;

Fig. 3 Device MX25L64 successful connection

If failing to connecting, select the first menu “Device” and select item “MX25L64” manually, then

press key “Connect”.

4) Press key “Read”，select burning file (for example MERGE.bin) as Fig. 4.

Fig. 4 Burning file

5) Select menu “Auto”, then select items “All chip”, “program” and other configuration as Fig. 5

Fig. 5 Burning Configuration

6) Press key “Run” as Fig. 4 to begin burning software, there are two steps for the process: Erase

and Program

normal burning steps are as follows:

the first step “Erasing…， Flash Status: 03” will be lasting for a moment, otherwise skipping over
means unsuccessful erasing; please confirm process （2） and then burn software again;

the following step “Programming…，Flash Status:00” will be done until a prompt “Pass” is

displayed.

7) A prompt “Pass” will be displayed beside the key “Run” for successful burning as Fig. 6

Fig. 6 A prompt “Pass” beside the key “Run” for successful burning

8) Need not exit ISP burning interface and only repeat the process 3）and 5）to go on burning

software for other sets.

Note 3: On-line burning and upgrading method from USB port

1） Be sure to format a U disk as FAT32;

2） Copy program file to the U disk with the name “Merge.bin”;

3） Power on, be sure to switch to ATV or DTV channel and not to display OSD interface; insert the U

disk into a USB port, then USB upgrading process will begin automatically;

4） Upgrading processes:

A、Reading data from the U disk:

A prompt “Searching USB” is displayed and an indicating light of U disk is twinkling;

B、Burning Flash:

A prompt “Updating! Please don’t power off!!!” is displayed and an indicating bar is showing

upgrading schedule; the set will be in Standby mode after the burning process completed;

5） Start up the set again, enter into factory menu to verify software version and time parameters;

then execute item “RESET ALL” to complete the whole burning process.

*** Method of burning from USB could not be sure to be suitable for all kinds of U disks, so please try

other U disks if necessary.

Working principle analysis of the unit

1、 PAL/SECAM signal flow
PAL/SECAM signal from antenna is inputted into TUNER FQD1116 which is

an analog-digital-integrative model, the analog RF signal is demodulated by the
TUNER, then CVBS signal and

outputted. TUNER FQD1116 is controlled by main chip MSD209（with embedded

CPU) through I2C bus.

TV CVBS signal is inputted into main chip MSD209 directly to be processed

by modules “VIDEO DECODER、DEINTERLACE and SCALER”, then LVDS
signal is outputted to drive LCD panel.

SIF audio signal is inputted into main chip MSD209 directly and processed
by modules of demodulation, pre-amplification, acoustic effect processing and
volume control, then the audio signal are inputted into left and right sound tracks
of earphone amplifier BH3547F to be amplified and then are divided to two
signals, one is outputted to earphone jack, the other is inputted into

power amplifier R2A15112 to be amplified and then be outputted to speakers.
2、 DVB-T signal flow

DVB-T signal from antenna is inputted into TUNER FQD1116 to be tuned,

RF amplified, IF amplified and SAW FILTER inside, then IF signal is outputted to
demodulating chip CE6353 to be demodulated and then be inputted into main
chip MSD209 with format of standard serial or parallel TS stream for demultiplexing
and decoding.

Video route: de
and then digital video signal is outputted; in the end LVDS signal is outputted to
drive LCD panel after a series of digital processes and OSD addition within main
chip MSD209.

Audio route: demultiplexed audio signal is decoded into Dolby AC-3
signal or MPEG multi-sound-track digital audio signal by inner decoder of main
chip MSD209, then one is outputted through SPDIF directly; after the process of
“sub-transform and DAC”, the other is outputted as analog audio signal
audio signal is inputted into the rear part of main chip MSD209 for acoustic effect
processing and volume control, then inputted into left and right sound tracks of
earphone amplifier BH3547F respectively to be amplified, now the audio signal is
divided into two, one is outputted to earphone jack directly, the other is inputted into

class D audio power amplifier R2A15112 to be amplified and then outputted to speakers.
3、 AV signal flow

After processed by impedance matching, AV video signal is inputted into
main chip MSD209 directly and processed by modules of “VIDEO DECODER、
DEINTERLACE and SCALER”, then LVDS signal is outputted to drive LCD
panel.

AV audio signal is processed by circuits of “voltage divided, impedance
matching and
effect processing and volume control, then inputted into left and right sound tracks of
earphone amplifier BH3547F respectively to be

multiplexed video signal is decoded by main chip MSD209

AC coupling”, then inputted into main chip MSD209 directlyfor acoustic

SIF(sound intermediate frequency) signal are

class D audio

, the analog

amplified, now the audio signal is divided into two, one is outputted to earphone
jack directly, the other is inputted into
to be amplified and then outputted to speakers.
4、 PC/YPbPr signal flow

After processed by impedance matching, PC/YPbPr video signal is inputted
into main chip MSD209 to be processed by modules of “A/D transform, digital
video processing and OSD addition”, then LVDS signal is outputted to drive LCD
panel.

PC/YPbPr audio signal is processed by circuits of “voltage divided,
impedance matching and
for acoustic effect processing and volume control, afterwards the audio signal is
inputted into left and right sound tracks of earphone amplifier BH3547F directly to be
amplified, now the audio signal is divided into two, one is outputted to earphone jack
directly, the other is inputted into class D audio power amplifier R2A15112 to be
amplified and then outputted to speakers.

5、 HDMI signal flow

HDMI video signal is inputted into main chip MSD209 to be processed by

modules of “digital video processing and OSD addition”, then LVDS signal is
outputted to drive LCD panel.
HDMI audio signal is decoded into Dolby AC-3 signal or MPEG multi-sound­track digital audio signal by inner decoder of main chip MSD209, then one is
outputted through SPDIF directly; after the process of “sub-transform and DAC”,
the other is outputted as analog audio signal
the rear part of main chip MSD209 for acoustic effect processing and volume control,
then inputted into left and right sound tracks of earphone amplifier BH3547F
respectively to be amplified, now the audio signal is divided into two, one is outputted
to earphone jack directly, the other is inputted into class D audio power amplifier

R2A15112 to be amplified and then outputted to speakers.

6、 Brief instruction on unit functions

MPEG-2 MP@HL、H.264 Main and High profile up to Leve4.0 Decoding
MPEG、

3D comb filter
Wide-range power supply、low consumed power in standby mode（≤1W）
Class D audio power amplifier with HI-FI acoustic effect output
High quality transformation from interleaved scanning to progressive scanning

Realizing integrative functions really

- build integration

- integrative TUNER（integrating analog with digital）

- integrative searching-program function

- integrative OSD interface

Main parts of the unit：

42 inch LCD panel（1920X1080）

Dolby Digital（AC-3）、AAC Digital Audio Decoding

AC coupling”, then inputted into main chip MSD209 directly

class D audio power amplifier R2A15112

, the analog audio signal is inputted into

Main chip：MStar MSD209FG-LF
Demodulating chip：Intel CE6353
TUNER：NXP FQD1116ME/IV
DDR：SAMSUNG K4T51163QC-HCF7

Two groups of Video input and RCA L/R input
　 One group of S-VIDEO input
　 Two groups of HDMI input
　 One group of VGA input
　 One group of audio input for VGA and DVI（Mini Phone Jack）
　 One group of YPBPR input and RCA L/R input
　 One group of RF
　 One group of RS232（Mini Phone Jack）
　 One group of audio output（Mini Phone Jack）
　 One group of Video output and RCA L/R output
　 One group of SPDIF（coaxial）output
　 One group of USB（for upgrading）

Class D audio power amplifier：RENESAS R2A15112

FLASH ：MX25L6405DMI-12G

External ports of the unit:

Block diagram

IC block diagram and instruction

1、 Main chip MSD209FG-LF:

GENERAL DESCRIPTION

The MSD209FG is a highly integrated controller IC for LCD/PDP DTV applications with

resolutions up to full-HD (1920 x 1080). It is configured with an integrated triple-ADC/PLL,

a multi-standard TV video and audio decoder, a motion adaptive video de-interlacer, a

scaling engine, the MStarACE-3 color engine, an advanced 2D graphics engine, a

transport processor, a high-definition (HD) MPEG video decoder, a 24-bit DSP for MPEG

audio decoding, a DVI/HDCP/HDMI receiver, and a peripheral control unit providing a

variety of HDTV control functions.

For digital TV application, the MSD209FG comprises an MPEG-2 transport processor with

advanced section filtering capability, an MPEG-2 (MP@HL profile) video decoder, an

MPEG layer I and II digital audio decoder with analog audio outputs that are designed to

support existing and future DVB-T programs while handling conditional access.

Furthermore, it is also possible to decode MPEG-4, JPEG, MP3 formats from external

sources such as USB interfaces.

For analog TV, the MSD209FG includes NTSC/PAL/SECAM multi-standard video

decoder comprising a 3-D motion adaptive comb filter and time-based correction, and a

NICAM/A2 audio decoder to support worldwide television standards. The MSD209FG is

also configured with a VBI processor to decode digital information such as Close Caption /

V-chip / teletext / WSS / CGMS-A / VPS. In addition, the MStar advanced LCD TV

processor enhances video quality, motion adaptive de-interlacer, picture quality

adjustment units, and MStarACE-3 color engine.

By integrating peripherals including two USB 2.0 host controllers, UARTs, IR, SPI, I2C,

and PWM, the MSD209FG fulfills all requirements in advanced DTV sets. To further

reduce system costs, the MSD209FG also integrates intelligent power management

control capability for green-mode requirements and spread-spectrum support for EMI

management.

The register information provided in the Register Description section is related to analog

function of the MSD209FG. For details on the digital function, please refer to the

Application Programming Interface (API) Guide.

MSD209FG Features：

Analog RGB Compliant Input Ports　
Three analog ports support up to 1080P
Supports PC RGB input up to SXGA@75Hz
Supports HDTV RGB/YPbPr/YCbCr
Supports Composite Sync and SOG (Sync-on-Green) separator
Automatic color calibration

VIF Input Support　
Multi-standard analog TV receiver applications
Digital low IF architecture

Stepped-gain PGA with 25 dB tuning range and 1 dB tuning resolution
Maximum IF gain of 37 dB
Programmable TOP to accommodate different tuner gain to optimize noise and linearity

performance

DVI/HDCP/HDMI Compliant Input Port　
Three DVI/HDCP/HDMI input ports support up to 225MHz @ 1080P 60Hz with 12-bit

deep-color resolution

Single link on-chip DVI 1.0 compliant receiver
High-bandwidth Digital Content Protection (HDCP) 1.1 compliant receiver
High Definition Multimedia Interface (HDMI) 1.3 compliant receiver with CEC (Consumer

Electronics Control) support

Long-cable tolerant robust receiving

High　 -Performance Scaling Engine
Fully Programmable shrink/zoom capabilities
Nonlinear video scaling supports various

modes including Panorama

Auto　 -Configuration/Auto-Detection
Auto input signal format and mode detection
Auto-tuning function including phasing, positioning, offset, gain, and jitter detection
Sync Detection for H/V Sync

Video Processing & Conversion　
3-D motion adaptive video de-interlacers with edge-oriented adaptive algorithm for

smooth low-angle edges

Automatic 3:2 pull-down & 2:2 pull-down detection and recovery
MStar 3rd Generation Advanced Color Engine (MStarACE-3) automatic picture

enhancement gives:

Brilliant and fresh color
Intensified contrast and details
Vivid skin tone
Sharp edge
Enhanced depth of field perception
Accurate and independent color control
sRGB compliance allows end-user to experience the same colors as viewed on CRTs and

other displays

10-bit internal data processing
Programmable 12-bit RGB gamma CLUT
3-D video noise reduction
MPEG artifact removal including de-blocking and mosquito noise reduction
Frame rate conversion
MFC (Motion Frame Conversion) supports:
Judder-free motion video
Output frame rate 50/60/100/120 f/sec
Up to 60Hz full HD or 120Hz HD panels

Output Interface　

Supports up to 10-bit dual LVDS full-HD (1920 x 1080) panel interface
Supports 2 data output formats: Thine & TI data mappings
Compatible with TIA/EIA
With 6/8 bits optional dithered output
Spread spectrum output frequency for EMI suppression

CVBS Video Output　

Supports two CVBS bypass output ports

2D Graphics Engine　
Point draw, line draw, rectangle draw/fill and text draw
BitBlt and stretch BitBlt
Raster Operation (ROP)

Miscellaneous　
DRAM controller to support up to 32-bit DDR2 interface
Supports Common Interface for conditional access
SPI bus for external flash
Two ports of USB 2.0 host controller with the flexibility for connecting external storage

devices

375-ball LFBGA package
Operating at 1.26V (core), 1.9V (DDR2), and 3.3V (I/O and analog)

2、 Digital demodulating chip CE6353

The chip comprises 8MHz bandwidth SAW and supports demodulation of 6MHz,

7MHz and 8MHz, 2K/8K carrier and supports both serial and parallel TS stream

output.

3、 Audio power amplifier RENESAS R2A15112

　　R2A15112FP is a Digital Power Amplifier IC developed for TV.

　 R2A15112FP has a maximum power of 15W(typ) × 2ch.

(VD = 24V,THD = 1%, SE) at a 4 Ω load.

　 It is possible to replace a conventional analog amplifier

with a digital amplifier easily.

●Maximum power out put (No external heat sink)
　　　　 (note) These apply when the thermal pad is soldered to

　　　 　the printed-circuit board directly.

Recommended Power Condition

SE operation mode :15Wx2ch(VD=24V,4Ω load,THD+N:1%）　
BTL operation mode:30Wx1ch(VD=21V,8Ω load,THD+N:10%）

●Highly efficient, low noise, and low distortion

●Popless

●Built-in protection - Overcurrent, overheat, and undervoltage

●Built-in Mute and Standby function

●The gain can be changed to four settings by two terminals.

　●Power supply voltage : 11V to 25V

　●Speaker Impedance : from 4 to 8Ω

GAIN1 GAIN2

HB1

L

R

IN1

IN2

CBIAS

ROSC

CLOCK

MUTEL

STBYL

SE/BTL

Selector

Oscillator

Under Voltage

Detection

A

A

Control

PROT

Logic

PWM

Gen.

PWM

Gen.

Over Current

Detection

Over Temp.

Detection

GND

10V

5V

VD1

OUT1
VS1

HB2

VD2

OUT2
VS2

DVDD

AVCC

VREF

4、 Tuner：FQD1116ME/IV

The FQD1116 belongs to the new family of highly-featured hybrid frontends, which are

designed to meet a wide range of RF applications. The FQD1116 combines the functions

of a DVB-T digital tuner and a multi-standard TV IF demodulation unit for both positive and

negative modulated TV systems. The unit includes a 7 MHz digital SAW filter with an IF

AGC amplifier for connection to the DVB-T channel decoder. The FQD1116 is intended

for CCIR L/L’ (France), B/G, I and D/K systems and DVB-T broadcast.

The frontends have a built-in digital (I2C) PLL tuning system. A DC-DC converter circuit is

built into the FQD1116 to synthesize the tuning voltage required, thus making the frontend

a true 5V device.

♪

♪

♪

♪

WIRING DIAGRAM

PANEL

BACKLIGHT

POWER SWITCH

POWER BOARD

SPEAKER

KEY BOARD

DATA BOARD

IR BOARD

Troubleshooting guide LC-32KE56

1．Panel is dark.

Power on main

power supply, check

if the red indicator

light in STANDBY

mode is bright ?

Red

Check if the voltage

of X801-9# (STB)

on main board is

inputted 5V ?

Check if STANDBY

Ye s

circuits on power

board are normal ?

No

No

No

Yes

Press key “POWER” of

remote control or the unit
to power on，check what

color of indicator light is?

Blue

Check if the voltage of
X802-3＃ on main board

is high level ?

Check if backlight circuits

on power board and

backlight board are

normal ?

Yes

Check if circuits about

backlight control on

main board are normal?

Check if the voltage of
X801-11＃on main board

is high level?

Check if power board

assembly is normal ?

2．Backlight is normal, but there is no picture

Check if operations

of remote control or

Yes Yes

keys on the unit are

normal ?

No

No Yes

TV

有

No

No

Change another

main board

Enter into factory menu ，

initialize EEPROM, then

power off and power on

again, check if there is

picture ?

Adjust main board again

Check if OSD menu is

displayed normally

after pressing key

“menu”?

Check if there

is no picture of

all channels ?

Yes

3．There is picture but no sound.

Yes Yes Yes

No No No

Check 24V power supply

circuits on power board and

power supply circuits from

Yes

XV03 to NV02 on main board

are normal ?

No

No sound

Check if the voltage

of NV02-4/5/32/32#

is 24V ?

Check if circuits from

NS01-126/148# to

NV02-10/27# are

normal?

Check if the voltage

of NV02-10/27# is

high level ?

Check if the

voltage of

NS01-F16/H16#

is low level?

Check if

there is

sound from

earphones?

Touch CV04

and CV05

with probe,

check if there

is sound from

earphones?

Check if circuits

about earphone

amplifier are

normal ?

Change

another

NV02

Check if

audio

output

circuits

of main

chip are

normal?

Change

another

NS01

XM01

VCC118VPP1

MDI0(A18)48MDI1(A19)49MDI2(A20)50MDI3(A21)

VCC252VPP253MDI4(A22)54MDI5(A23)55MDI6(A24)56MDI7(A25)

PCMCIA-0070210PA8C

17

47

51

+VCC_CARD

10p

CJ36

TS_MDI[2]

TS_MDI[0]

TS_MDI[1]

TS_MDI[1]

TS_MDI[0]

GND-D

TS_MDI[3]

TS_MDI[2]

E

NS01

MSD209FG

MCLK(A15)

MVAL(A16)16IREQ7CE1

CD1

VS1

MISTRT(A17)

20

19

36

43

46

CI_VS1#

TS_MDI[7]

TS_MISTRT

TS_MIVAL

TS_MDI[5]

TS_MDI[4]

TS_MDI[6]

TS_MICLK

PC_C_DETECT1#

TS_MICLK

TS_MIVAL

TS_MISTRT

TS_MDI[6]

TS_MDI[4]

TS_MDI[3]

TS_MDI[5]

TS_MDI[7]

+VCC_CARD

TS_MOCLK

TS_MOVAL

TS_MOSTRT

TS_MDO[0]

TS_MDO[1]

TS_MDO[2]

TS_MIVAL

TS_MICLK

TS_MDI[0]

TS_MISTRT

RM01

RM05

RM04

33

33

33

TS_PCLK

TS_PVAL

TS_PD[1]

TS_PSTRT

TS_PD[0]

N18

P18

L17

M17

Y7

W5

V6

V4

TS1_DO/GPIO40

TS1_VLD/GPIO41

TS0_CLK/GPIO39

TS0_SYNC/GPIO38

TS0_D0/GPIO29U5TS0_D1/GPIO30R7TS0_D3/GPIO32

TS0_VLD/GPIO37

TS1_CLK/GPIO43

TS1_SYNC/GPIO42

TS1

PCMCIA/CI

WAIT

REG

59

61

PC_REG#

CI_CE1#

CI_WAIT#

CI_IREQ#

RM38
10K

RM28
10K

RM27
10K

RM26
10K

TS_MDO[3]

TS_MDO[4]

TS_MDO[5]

RM02

33

33

TS_PD[3]

TS_PD[2]

TS_PD[4]

TS_PD[5]

U6

R8

T7

TS0_D2/GPIO31

TS0_D4/GPIO33

TS0_D5/GPIO34

TS0

WE

OE

IORD45IOWR

RESET

9

15

44

58

CI_WE#

PC_RST

CI_OE#

CI_IORD#

CI_IOWR#

CI_OE#

CI_IORD#

CI_WE#

CI_IOWR#

TS_MDO[6]

TS_MDO[7]

CI_OE#

CI_IORD#

CI_IOWR#

RM03

RM25

100

TS_PD[6]

TS_PD[7]

T8

U18

T18

TS0_D6/GPIO35V5TS0_D7/GPIO36

PCM_IORD_N/CI_RD/GPIO87

PCM_IOWR_N/CI_WR/GPIO88

D4

D2

4D55

2D33

30D031D132

CI_DATA[4]

CI_DATA[0]

CI_DATA[2]

CI_DATA[1]

CI_DATA[5]

CI_DATA[3]

CI_VS1#

PC_C_DETECT1#

PC_C_DETECT2#

RM30 10K

RM32 10K

RM31 10K

CI_VS1#

+3.3AVDD

+VCC_CARD

CI_WE#

CI_CE#

PC_REG#

PC_RST

CI_IREQ#

CI_WAIT#

RM20100

RM17

RM18

RM19

RM13

0

100

100

100

V18

V17

U17

T17

R17

R18

P17

PCM_OE_N/GPIO89

PCM_WE_N/GPIO90

PCM_CE_N/CI_CS/GPIO92

PCM_REG_N/CI_CLK/GPIO91

PCM_IRQA_N/CI_INT/GPIO93

PCM_WAIT_N/CI_WACK/GPIO94

D6

D7

A0

6

CI_ADDR[0]

CI_ADDR[1]

CI_DATA[7]

CI_DATA[6]

IOIS

INPACK

PC_RST

CI_WAIT#

CI_IREQ#

RM35 10K

RM33 1K

RM34 1K

RM36 10K

RM37 10K

CI_CD#

CI_ADDR[0]

CI_ADDR[1]

RM24

PCM_A[1]

PCM_A[0]

N17

V13

U13

PCM_CD_N/GPIO96

PCM_RESET/GPIO95

PCM_A0/CI_A0/GPIO63

A7

A8

22

12

23A624A525A427A228A126A329

CI_ADDR[5]

CI_ADDR[4]

CI_ADDR[3]

CI_ADDR[2]

CI_ADDR[8]

CI_ADDR[6]

CI_ADDR[7]

RM39

10K

RM29

10K

+VCC_CARD

CI_ADDR[2]

CI_ADDR[3]

CI_ADDR[4]

CI_ADDR[5]

CI_ADDR[6]

CI_ADDR[7]

CI_ADDR[8]

33

33

RM23

PCM_A[3]

PCM_A[6]

PCM_A[8]

PCM_A[7]

PCM_A[4]

PCM_A[5]

PCM_A[2]

T13

R13

V12

U12

T12

R12

U11

PCM_A1/CI_A1/GPIO64

PCM_A2/CI_A2/GPIO65

PCM_A3/CI_A3/GPIO66

PCM_A4/CI_A4/GPIO67

PCM_A5/CI_A5/GPIO68

PCM_A6/CI_A6/GPIO69

PCM_A7/CI_A7/GPIO70

PCM_A8/CI_A8/GPIO71

A9

A10

A11

MD0(D8)65MD1(D9)66MD2(D10)

8

11

10

64

TS_MDO[1]

TS_MDO[0]

CI_ADDR[9]

CI_ADDR[11]

CI_ADDR[10]

PC_REG#

CI_CE1#

CI_CE2#

RM41

RM40

0

0

CI_CE#

CI_ADDR[9]

CI_ADDR[10]

CI_ADDR[11]

CI_ADDR[12]

CI_ADDR[13]

CI_ADDR[14]

33

33

RM15

RM16

PCM_A[9]

PCM_A[10]

PCM_A[11]

PCM_A[12]

PCM_A[14]

PCM_A[13]

V9

T11

T10

U10

V8

V7

PCM_A9/CI_A9/GPIO72

PCM_A10/CI_A10/GPIO73

PCM_A11/CI_A11/GPIO74

PCM_A12/CI_A12/GPIO75

PCM_A13/CI_A13/GPIO76

PCM_A14/CI_A14/GPIO77

MD3(D11)38MD4(D12)39MD5(D13)40MD6(D14)41MD7(D15)42CE2

VS2/MCLKO

37

57

62

TS_MOVAL

TS_MOCLK

TS_MDO[2]

TS_MDO[4]

TS_MDO[5]

TS_MDO[3]

TS_MDO[7]

TS_MDO[6]

CI_DATA[0]

CI_DATA[1]

CI_DATA[2]

CI_DATA[3]

CI_DATA[4]

CI_DATA[5]

CI_DATA[6]

CI_DATA[7]

33

RM22

PCM_D[7]

PCM_D[1]

PCM_D[4]

PCM_D[0]

PCM_D[2]

PCM_D[3]

PCM_D[6]

PCM_D[5]

R11

R10

P9

R9

T9

U9

U8

U7

PCM_D0/CI_D0/GPIO79

PCM_D1/CI_D1/GPIO80

PCM_D2/CI_D2/GPIO81

PCM_D3/CI_D3/GPIO82

PCM_D4/CI_D4/GPIO83

PCM_D5/CI_D5/GPIO84

PCM_D6/CI_D6/GPIO85

IOIS_16

INPACK

MOVAL(SPKR)63MOSTRT(STSCHG)

CD2

33

60

67

IOIS

INPACK

CI_CE2#

TS_MOSTRT

PC_C_DETECT2#

CI_CD#

0

RM14

NM01

CI_DECT

SN74LVC1G32DCKR

+3.3AVDD

+3.3AVDD

RM21

33

PCM_D7/CI_D7/GPIO86

A12

A13

A14

21

13

14

CI_ADDR[14]

CI_ADDR[12]

CI_ADDR[13]

PC_C_DETECT2#

PC_C_DETECT1#

1A2B3

Vcc

4Y5

100n
CM01

1

GND

GND

GND-D

GND135GND2

34

1u

11

X1.0

CM04

+VCC_CARD

14

VPPD115VPPD0

LM01

RM09

STPB2012-201PT

4.7K
+3.3AVDD

100

RM12

007:B3

CI_VS1#

007:B4

CARD_3.3VEN

13

12

AVCC_13

LM02

+5V

+3.3AVDD

100n

10V

CM03

220u

10

11

AVPP

AVCC_11

AVCC_12

STPB2012-201PT

RM08

4.7K

RM11

GND-D

9

100

CARD_OC

12V

007:B3

1

9232KE5601DL

100n

GND-D

CM08

100n
CM07

100n
CM06

100n
CM05

TITLE: DWG NO.

TUNER+IF+PCMCIA

GND-D

XOCECO

REV.

XIAMEN OVERSEAS CHINESE

Sheet to

DRAWN BY

APPROVED BY

ELECTRONIC CO., LTD.

007:B3

+3.3AVDD

CARD_SHDN#

100

RM42

RM43

4.7K

GND3

68

GND-D

16

GND-D

SHDN

NM02

TPS2211AIDBR

VCCD02VCCD133.3V_343.3V_455V_565V_67GND8OC

1

CM02

GND-D

+3.3AVDD

RM07

4.7K

RM06

4.7K

RM10

4.7K

CARD_5VEN

007:B4

TS_MOVAL

TS_MDO[3]

TS_MDO[2]

TS_MDO[5]

TS_MDO[4]

TS_MDO[7]

TS_MDO[6]

TS_MDI[7]

TS_MDI[5]

TS_MDI[4]

TS_MDI[6]

TS_MDI[3]

TS_MDI[2]

TS_MDI[6]

TS_MDI[4]

TS_MDI[5]

TS_MDI[3]

TS_MDI[2]

TS_MDI[1]

+5V

L106

22uH

+5V_TUNER1

AS_IF ADDRESS

0 86/87

5V 84/85

SELECTION

ADDRESS

FDQ1116ME/IV

TUNER1

TS_MOCLK

TS_MOSTRT

TS_MIVAL

TS_MICLK

TS_MICLK

TS_MIVAL

TS_MDI[7]

10V

C104

100uF

10K

R103

CVBS

24

AS_IF

23

NC

22

2ndIF/Low_DIF2

21

2ndIF/Low_DIF1

20

+5V_IF

19

Wout

18

DIF2

17

DIF1

16

IF_AGC

15

REF

14

SDA

13

SCL

12

As

11

NC10

10

GND9

9

VT

8

VP(TUN)

7

GND6

6

RF_AGC

5

NC4

4

GND3

3

Ant_Pwr

2

RF

1

33

TS_MISTRT

TS_MISTRT

+5V_TUNER2

RST_6353

CJ10

15p

CJ08

15p

Vss
Vss
Vss
Vss
Vss
Vss
Vss
Vss
Vss
Vss
Vss

OSCMODE

XTI

XTO

002:D4

10K

10K

RJ28

GND-D

60
55
46
40
38
25
20

14
8
3
1

RJ09

0

27

23

24

RJ08

GND-D

RJ29

CJ09
100n

GND-D

GND-D

CJ07
33p

GJ01

20.48MHz

GND-D

CJ06
33p

2.2M
GND-D

+1.8V_ADE+1.8V_DE

LJ03

+1.8V_DE +1.8V_CORE+1.8V_DE +1.8V_PDE

LJ01 LJ02

+3.3V_DE

CJ18
100n

CJ16
100n

CJ13

4.7u

GND-D

CJ25
100n

CJ23
100n

CJ21
100n

CJ19
100n

CJ17
100n

CJ15
100n

CJ12

4.7u

GND-D

CJ14
100n

CJ11

2.2u

GND-D

CJ27
100n

CJ26
100n

CJ24
100n

CJ22
100n

CJ20
100n

GND-D

007:C3

007:C3

SCL

SDA

TS_MIVAL

TS_MDI[5]

TS_MDI[4]

TS_MDI[7]

TS_MISTRT

TS_MDI[6]

TS_MDI[2]

TS_MDI[1]

TS_MICLK

TS_MDI[0]

SADD0
SADD1
SADD2
SADD3
SADD4

SMTEST

63

MICLK

VIN31VIN

30

GND-A

CJ05

22p

CJ02

100n

RJ31

220

TS_MICLK

TS_MDI[0]

TS_MDI[1]

33

RJ15

33

RJ24

49

61

MDO050MDO151MDO252MDO353MDO4

MOCLK

+1.8V_ADE+5V

+3.3V_DE

TV_FAT_IFN

TS_MDI[3]

TS_MDI[2]

TS_MDI[4]

TS_MDI[3]

AGC2/GPP2

AGC1

41

42

28

1K

TS_MDI[5]

TS_MDI[6]

RJ25 33

56

MDO557MDO658MDO7

AVdd

AGnd

29

32

RJ07

10K

RJ05

TV_IF_AGC

TS_MIVAL

TS_MDI[7]

RJ16

33

48

MOVAL

NJ01

Vdd3334RFLEV

AGnd

33

1K

RJ06

CJ03

22n

TS_MISTRT

RJ17

33

47

MOSTRT

CE6353

+1.8V_PDE

+3.3V_DE

RJ20

4.7K

62

11

BKERR

STATUS

PLL1TEST

PLLVdd22PLLGnd

21

26

GND-A

GND-A

GND-A

+3.3V_DE

+3.3V_DE

100

100

RJ27

RJ26

GND-D

RJ22

RJ21

RJ23

0

8.2K

4.7K

9

4

5

6

10

IRQ

CLK1

DATA1

RESET

SLEEP

GPP3

CLK2/GPP036DATA2/GPP1

43

35

GND-D

RJ04

4.7K

RJ03

4.7K

RJ02

RJ01

100

100

TUNER_SCL

TUNER_SDA

003:D4

GND-D

10K

RJ11

10K

RJ10

GND-D

+1.8V_CORE

+3.3V_DE

CJ01

100n

RJ30

220

TV_FAT_IFP

GND-D

10p

CJ35

GND-D

0

RJ12

18
17
16
15
12

44

CVdd

64

CVdd

59

CVdd

39

CVdd

37

CVdd

19

CVdd

7

Vdd

54

Vdd

45

Vdd

13

Vdd

2

CJ04

22p

CJ34
56p

39nH

LJ05

330nH

CVBS_TUNER

R108

120

GND-A

002:D3

002:D3

TV_SIFM

10K

R101

C217
100n

C216

2.2u

GND-A

MOPLL I2C

L101

STBL2012-501

TV_SIFP

R105 330

330

R279

GND-A

10K

R102

SELECTION

ADDRESS

L102

STBL2012-501

R106 330

10p

C219

330

R280

L103

STBL2012-501

GND-A

GND-A

10K

R104

GND-A

GND-A

C215
100n

C214

2.2u

TUNER_SCL

TV_FAT_IFP

TUNER_SDA

TV_IF_AGC

R107 0

SGMI2012-2R2KT

SGMI2012-2R2KT

L107

L108

AS ADDRESS

0-0.5V C0/C1

1-1.5V/OPEN C2/C3

2-3V C4/C5

4.5-5V C6/C7

GND-D

GND-A

TV_FAT_IFN

C101

10n

+5V

L104

+5V_TUNER2

GND-A

22uH

+3.3V_DE

10V

C102

100uF

GND-A

TS_MDO[1]

TS_MDO[0]

RM4433RM4533RM4733RM4633RM4933RM4833RM5033RM5133RM5333RM5233RM54

TS_MDI[0]

TS_MDI[1]

TS_MDI[0]

IF PART I2C

ABCDEFGH

1

2

3

4

5

6

X107

AV3-14WKD

AV1

2R_OUT2L-OUT

2R_IN

75

R273

External_CVBS

003:C4

External_CVBS

10K

R167

+3.3VDD

RXD_UPDATE

007:F2

33

R160

VCC-VGA

+5V

VGA_VSYNC

003:C3

VGA_HSYNC

003:C3

R141 33

R140 33

GND-D

GND-D

AV_L_IN

R168

470

R164

R15533

R15433

D101

MMBD1204

N106

24LC21A/SN

AV_L_IN

Z107

10MHz

10K

R184

AV_LIN

AV_R_IN

ISP_EN

200

470

R165

V103

BC847AW

R150

R149

R145

C120

8

VCC

NC12NC23NC34VSS

1

Z108

4.7K

4.7K

4.7K

100n

7

GND-D

@pinCo

AV_R_IN

10MHz

10K

R185

AV_RIN

TXD_UPDATE

33

R169

VCLK

007:F2

C160

C159

V105

BC847AW

V104

BC847AW

5

GND-D

GND-D

R183

12K

47p

R182

12K

47p

0

R146

SDA6SCL

1234567

X108

TJC10-12A

Z112

10MHz

Z111

10MHz

10K

R197

R198

GND-D

GND-D

SC1_LIN

VCLK: 0=READ ONLY

GND-D

10K

SC1_RIN

TV_OUTL

GND-D

R192

12K

R187

12K

TV_OUTR

B

NS01

MSD209FG

GND-D

Z109

R199

10MHz

10K

SC2_LIN

SCART

8

Z113

10MHz

10K

R200

SC2_RIN

001:C2

TV_SIFP

C144

100n

Y2

AUDIO

9

TV_SIFM

C145

100n

W2

SIF_INP

101112

GND-D

TV_OUT

003:F4

AV_OUTR

AV_OUTL

GND-D

R193

12K

R188

12K

GND-D

AV_RIN

AV_LIN

001:C2

C1392.2u

C137 2.2u

P6

P5

SIF_INM

LINE_IN_0LT3LINE_IN_4LT5LINE_IN_5L

SC1_LIN

SC2_RIN

SC2_LIN

C1402.2u

C1312.2u

C127 2.2u

R4

R3

Y3

LINE_IN_1R

LINE_IN_1L

LINE_IN_0R

VGA_LIN

SC1_RIN

VGA_RIN

C1412.2u

C1332.2u

C1322.2u

R5

Y4

R6

LINE_IN_3L

LINE_IN_2R

LINE_IN_2L

YUV_RIN

YUV_LIN

C1432.2u

C1422.2u

LINE_IN_3RT4LINE_IN_4R

AV2_LIN

AV2_RIN

C1342.2u

C1352.2u

T6

008:C5

PRIM_AUD_OUT_R

R163 100

W4

LINE_IN_5R

AV2

1

345

2

X109

TJC10-06A

Z114

10MHz

Z110

10MHz

10K

10K

R201

R202

AV2_RIN

AV2_LIN

008:C4

PRIM_AUD_OUT_L

SC1_LOUT

SC2_ROUT

SC1_ROUT

SC2_LOUT

C154

C153

2.2u

2.2u

C152

C151

2.2u

2.2u

100

R162

100

100

R158

R159

100

100

R151

R152

V3

U4

Y6

W3

Y5

F15

LINE_OUT_2R

LINE_OUT_1L

LINE_OUT_2L

SPDIF_IN/GPIO47

LINE_OUT_0R(DACO_R)

LINE_OUT_1R(DACO_S)

LINE_OUT_0L(DACO_L)

6

R204

75

GND-D

AV2_VIN

R194

12K

R189

12K

GND-D

C150

2.2n

GND-D

13K

R173

C148

2.2n

GND-D

13K

R171

C147

2.2n

GND-D

13K

R170

C146

2.2n

GND-D

13K

R166

C138

2.2n

GND-D

13K

R161

C129

2.2n

GND-D

13K

R156

E14

G16

H16

G15

SPDIF_OUT/GPIO48

I2S_IN_WS/GPIO44

I2S_IN_SD/GPIO46

I2S_IN_BCK/GPIO45

GND-D

L109

+9V

+5V

008:C1

008:C3

001:D5

MUTE_AMP

RST_6353

SPI_CZ2

STANDBY_AMP

ISP_EN

R15333

E11

E10

E16

F16

E12

I2S_OUT_SD/GPIO52

I2S_OUT_WS/GPIO49

I2S_OUT_MCK/GPIO50

I2S_OUT_BCK/GPIO51

I2S_OUT_MUTE/LHSYNC2/GPIO13

C113

100n
C107

4.7u

16V

BG2012D151T

V2

N5

AUVRMN4AUVRPU3AUVAG

AU_COM(VIM0)

R172

4.7K
R115

10K

SPDIF_OUT

11

AV_OUTL

Z104

10MHz

R139
100K

C115

GND-D

1n

C109

2.2u

R116

47

GND-D

V101

MMBT3904

GND-D

8.2K

47K

R112

R111

10K

R109

SC2_LOUT

R178

120

R175 200

C149

100n

C136

100n

C125

4.7u

C124

1u

X106

HJR-03A-OR

GND-D

C130

10u

C128
100n

GND-D

+3.3VDD

L111

L113

BG2012D151T

+9V

SGMI2012M1R0KT

GND-D

TV_OUTL

Z115

10MHz

R203
100K

C164

GND-D

1n

C163

100n

C162

C161

2.2u

4.7u

16V

4.7K
R195

008:C3

MUTE_AMP

10K

R269

GND-D

47K

R190

R186

V107

10K

SC1_LOUT

MMBT3904

R196

47

8.2K
R191

L112

BG2012D151T

+9V

L110

+9V

GND-D

C157

100n
C155

4.7u

16V

4.7K
R179

C123

BG2012D151T

TITLE: DWG NO.

TV_OUTR

Z106

10MHz

R181
100K

C158

1n

C156

2.2u

GND-D

V106

MMBT3904

47K
R176

10K

R174

SC1_ROUT

AV_OUTR

Z105

10MHz

1n

100n

C122

C121

2.2u

4.7u

16V

GND-D

V102

MMBT3904

4.7K
R147

47K

R143

10K

R142

SC2_ROUT

X1.0

9232KE5601DL

REV.

AUDIO IN/OUT

GND-D

R180

47

GND-D

8.2K
R177

R157
100K

C126

GND-D

R148

47

GND-D

8.2K
R144

2

XOCECO

XIAMEN OVERSEAS CHINESE

ELECTRONIC CO., LTD.

Sheet to

DRAWN BY

APPROVED BY

VGA_LIN

VGA_RIN

47p

C119

R137

12K

47p

C114

R121

12K

10K

10K

R113

R114

456

GND-D

ABCDEFGH

GRL

X105

JY-3541L-01-030

N103

PESD5V0L5UY

123

C106

100n

GND-D

22K

R138

22K

R126

GND-D

VCC-VGA

X104

HC1038-15F-3.08

R274 0

1

003:C3

Z102

Z103

470MHz

470MHz

Z101

470MHz

Z117

470MHz

R277 0

R276 0

R275 0

Z116

470MHz

1

2

3

4

5

9

1015

14

6

7

8

11

12

13

2

R278 0

GND-D VGA_R_IN

75

R127

GND-D

75

R122

75

R119

N101

PESD5V0L5UY

456

123

GND-D

3

003:C3

VGA_G_IN

003:C3

VGA_B_IN

N105

345
1

PESD5V0L4UG

C118

100n

2

AV_R_IN

YUV_LIN

YUV_RIN

GND-D

47p

C116

R124

12K

GND-D

10K

10K

R118

R117

R

L

R

W

C117

47p

R125

12K

AV205-1

GND-D

GND-D

HJK-3.5-401

X103

X101

External_YIN

003:C4

R134 0

007:D4

007:D3

232_TXD

232_RXD

L

R

G

4

External_CIN

003:C4

R136 0

S

AV_L_IN

75

R135

GND-D

75

R123

C108

100n

123

N104

456

PESD5V0L5UY

GND-D

G

G

Y

C

G

GND-D

Y_INPUT

003:C3

Pb_INPUT

003:C3

Pr_INPUT

003:C3

75

R128

C110

GND-D

R130 0

R129 0

100p

@pinCo

G

5

R13175R132

C111

GND-D

R133 0

100p

@pinCo

B

75

C112
100p

345
1

R

GND-D

N102

2

@pinCo

PESD5V0L4UG

C105

100n

X102

AV3-14WD

6

GND-D

+3.3VDD

+3.3VDD

N107

24C512

FLASH_WP#

33K

R268
R267
100K

1AO2A13A24

100n

GND-D

C201

10K

R244

33

R238

11

X1.0

22p

GND-D

C212

GND-D

9

10

15

16

SCLK

N112

EN25B64

HOLD

1

2

GND

SDA6SCL7WP8Vcc

GND-D

R241

100

SPI_CK

SPI_CZ2

SPI_DI

+3.3VDD

15

16

SCLK

N111

EN25B64

HOLD

2

1

+3.3VDD

33

R258

SPI_DO

SPI_CZ1

+3.3VDD +3.3VDD

GND-D

N108

24C04

353.24512-00

+3.3VDD

C213
100n

5

R240

100

11

GND

NC1112NC1213NC1314NC14

GND-D

GND-D

11

GND

SDA6SCL7WP8Vcc

5

W/ACC

9

10

GND

NC1112NC1213NC1314NC14

W/ACC

GND-D

353.24040-10

0

R243

100

R249

SI/SIO0

Vcc3NC34NC45NC56NC67S8SO/SIO1

C210
100n

22p

GND-D

C211

SI/SIO0

Vcc3NC34NC45NC56NC67S8SO/SIO1

C209
100n

R257

10K

R255

10K

1AO2A13A24

100n

GND-D

C202

R242

100

GND-D

WP: H=READ ONLY

GND-D

123456789

X110

TJC10-13A

C205
100n

GND-D

L114

BG2012D151T

+9V

SCART1_CVBS

TV_CVBS

0

R252

SCART1_R

0

R256

75

R254

SCART1_G

TV_CVBS#

0

R281

SCART1_B

GND-D

C206
100n

C204

100uF

SCART

SCART2_Y/CVBS

TV_OUT

0

R253

C208

100uF

GND-D

V112

BC847AW

R247

4.7K

10V

C203

100uF

R265

8.2K

SCART2_C

002:H3

10V

C207

100uF

220

R251

R248

4.7K

10V

SCRTR2_FS

SC2_FS

007:B3

SC2_FS

SC2_VOUT

10V

101112

0

R261

GND-D

SCART1_FS

R266

8.2K

SC1_FS

007:B3

R262

SC1_FS

13

0

SC1_FB

GND-D

R264

2.2K

R263

2.2K

75

R260

GND-D

75

R259

9232KE5601DL

TITLE: DWG NO.

3

XOCECO

REV.

Sheet to

VIDEO IN/OUT

DRAWN BY

XIAMEN OVERSEAS CHINESE

ELECTRONIC CO., LTD.

APPROVED BY

+3.3VDD

A

NS01

006:B4

CEC

47K

RA24

0

RA23

CEC_PM

E3

W7

PM_CEC

MSD209FG

006:D4

HDMI-2_RX1-

HDMI-2_RX1+

HDMI-2_RX0-

HDMI-2_RX0+

HDMI-2_RXC-

HDMI-2_RXC+

HDMI_CEC

C1

RXCP1C2RXCN1D1RX0P1D2RX0N1E1RX1P1E2RX1N1F1RX2P1F2RX2N1

CEC/UART_RX1

007:B2

EEP_W_EN

SCL_HDMI-2

SDA_HDMI-2

HDMI-2_RX2-

HDMI-2_RX2+

E4

DDCDB_DAE6DDCDB_CKE5HOTPLUGB

SCL

SDA

HOTPLUG_HDMI-2_OUT

HDMI-1_RX1+

HDMI-1_RX0+

HDMI-1_RX0-

HDMI-1_RXC+

HDMI-1_RXC-

G1

J2

J1

RXCP0G2RXCN0H1RX0P0H2RX0N0

RX1P0

TO: PAGE6

SDA_HDMI-1

HDMI-1_RX2+

HDMI-1_RX1-

HDMI-1_RX2-

F6

K2

K1

RX2N0

RX2P0

RX1N0

HDMI

HDMI-3_RXC-

HDMI-3_RXC+

SCL_HDMI-1

HOTPLUG_HDMI-1_OUT

G3

W8

Y8

F4

RXCN2

RXCP2

DDCDA_CK

DDCDA_DA

HOTPLUGA

HDMI-3_RX0-

HDMI-3_RX0+

HDMI-3_RX1+

Y10

W9

Y9

RX1P2

RX0N2

RX0P2

SCL

SDA

HDMI-3_RX2+

HDMI-3_RX1-

W10

W11

Y11

RX1N2

RX2P2

SCL_HDMI-3

HOTPLUG_HDMI-3_OUT

SDA_HDMI-3

HDMI-3_RX2-

R206

R14

T14

N15

RX2N2

DDCDC_CK

DDCDC_DA

HOTPLUGC

390

F5

AVDD_DM

1%

REXT

L7

M7

HSYNC0

R233

470

C1881n

J5

VSYNC0

Pb_INPUT

002:B5

R22347R225

47

C19047n

C18947n

N1

N2

BIN0P

SOGIN0

R224

Y_INPUT

47

C19147n

M2

BIN0M

002:B5

R226

47

C19247n

M1

GIN0P

Pr_INPUT

R227

47

C19347n

L2

RIN0P

GIN0M

002:B5

R228

47

C19447n

L1

RIN0M

002:C1

VGA_HSYNC

GND-D

G8

G7

HSYNC1

002:C1

VGA_B_IN 002:B2

VGA_VSYNC

R229

10

470

C1691n

C17047n

H3

H4

BIN1P

SOGIN1

VSYNC1

002:B2

002:B2

VGA_R_IN

VGA_G_IN

R208

R20910R207

10

C17147n

C17247n

H6

H5

RIN1P

GIN1P

RGB

SC1_FB

K6

R230

470

C1731n

L5

VSYNC2

SCART1_B

SCART1_G

R211

R210

10

10

C17547n

C17447n

L4

L3

BIN2P

SOGIN2

SCART1_R

R212

10

C17647n

100n

C166

L6

RIN2P

GIN2P

C196

C195

100n

100n

G4

VCLPG5REFPG6REFM

C197100n

SCART2_C

002:B4

SCART2_Y/CVBS

External_YIN

R215

R213

R216

R214

GND-D

10

10

10

10

C17947n

C18047n

C17847n

C17747n

J4

J3

C0(CVBS6P)

Y0(CVBS4P)K3Y1(CVBS5P)K4C1(CVBS7P)

Share VCOM0

S-Video

001:D2

CVBS_TUNER

SCART1_CVBS

002:B5

AV2_VIN

External_CVBS

002:G1

External_CIN

R219

R21810R220

R217

10

10

C18347n

C18247n

C18147n

M4

CVBS1PP1CVBS2PM3CVBS3P

CVBS_IN

10

C18447n

R1

R221

10

C18547n

P2

VCOM1

TV_CVBS

GND-D

CVBS0P

TV_CVBS#

R222

10

C18647n

R2

Y1

VCOM0

CVBS0

R27010R271

10

VIFPW1VIFMN3VR12M6VR27M5TAGC

VIF

C200

100n

GND-D

2.2u
C199

470

+5V

R234

33K

C198

R231

10u

25V
C187

100n

C167

GND-D

10u

25V
C165

100n

1%

K5

T1

N16

M16

IOUTX

VREXT

CVBS_OUT2

CVBS_OUT1

CVBS_OUT

R237

MMBT3906LT1

V109

V108

MMBT3904

C218
100p

GND-D

75

R272
R205
820

GND-D

SC2_VOUT

75

390

R236

2.2u

C168

120

R235

GND-D

15K

R232

ABCDEFGH

1

2

3

4

5

6

B-MDATA14

B-MDATA15

B-MDATA14

B-MDATA15

B-MDATA13

B1

D9

B9

DQ14

DQ15

NS03

HYB18TC512160BF-2.5

BA0

BA1

L2

L3

B-BA1

B-BA0

B-MDATA13

B-MDATA12

B-MDATA11

B-MDATA12

D1

D3

DQ13

DQ12

A12P2A7P3A9

R2

P7

B-MADR12

B-MDATA11

B-MDATA9

B-MDATA10

B-MDATA9

B-MDATA10

C2

D7

DQ9

DQ10

DQ11

A10/AP

A11

B-MADR9

B-MADR10

B-MADR11

B-MDATA8

B-MDATA7

B-MDATA7

B-MDATA8

F9

C8

DQ7

DQ8

P8A8M2

B-MADR8

B-MADR7

B-MDATA5

B-MDATA6

B-MDATA5

B-MDATA6

H9

F1

DQ5

DQ6

A6

A5

N7

N3

B-MADR6

B-MADR5

B-MDATA3

B-MDATA4

B-MDATA4

B-MDATA3

H1

H3

DQ4

DQ3

A4

A3

N8

N2

B-MADR4

B-MADR3

B-MDATA2

B-MDATA1

B-MDATA2

M7A2M3

B-MADR2

B-MDATA1

B-MDATA0

B-MDATA0

G8

DQ0G2DQ1H7DQ2

A1

A0

M8

B-MADR1

B-MADR0

DDR2_1V8

CK

J8CKK2

K8

RS41

B_CLK-

CS28

150

B_CLK+

100n

GND-D

CKE

B-CKE

GND-D

L8

CS

100n

CS27

100n
CS26

100n
CS25

100n

CS24

100n

CS23

100n

CS22

100n
CS21

10u

CS20

G7

GND-D

G9

VDDQ9G3VDDQ8G1VDDQ7E9VDDQ6C9VDDQ5C7VDDQ4C3VDDQ3C1VDDQ2A9VDDQ1

K3

VDDQ10

WE

B-WEZ

RAS

K7

B-RASZ

L7

CAS

RS35 56

B-CASZ

R1

VDD5M9VDD4J9VDD3E1VDD2A1VDD1

LDMB3UDM

F3

B_LDQM

J1

VDDL

56

RS36

B_UDQM

J7

K9

VSSDL

ODT

B-ODT

LDQSF7LDQS

E8

56

RS38 56

RS37

B_LDQSP

B_LDQSM

B7

56

56

RS40

RS39

B_UDQSP

DDR2_1V8

UDQS

B_UDQSM

1%1%

11

X1.0

4

9232KE5601DL

DDR2 MEMORY

TITLE: DWG NO.

VSSQ10

NC#A2J2VREFA8UDQS

A2

GND-D

P9

B_CLK+

B_CLK-

VSS5N1VSS4J3VSS3E3VSS2A3VSS1

22

RS46

NC#R3

NC#R7

NC#R8

NC#E2

NC#L1

R3

R7

R8

E2

L1

B_MCLK

B_MCLKZ

H8

H2

VSSQ9F8VSSQ8F2VSSQ7E7VSSQ6D8VSSQ5D2VSSQ4B8VSSQ3B2VSSQ2A7VSSQ1

B-MVREF

100n
CS19

2.2u
CS18

1K

1K

GND-D

RS34

RS33

RS47

B-MADR12

B-MADR7

B-MADR2

B-MADR3

B-MADR5

B-MADR4

B-MADR0

B-MADR9

56

RS49

B_MADR9

B_MADR7

B_MADR12

B_MADR5

B_MADR0

B_MADR2

B_MADR4

B-MADR6

56

RS50

B_MADR6

B-MADR8

RS5256

RS5156

B_MADR8

B-CKE

B-WEZ

B-MADR11

RS5456

RS5356

B_CKE

B_MADR11

B_WEZ

RS5556

B-ODT

RS56

56

B_ODT

B-CASZ

RS57

56

B_CASZ

B_RASZ

B-BA0

B-RASZ

RS5856

B_BA0

B-BA1

RS59

56

B_BA1

RS60

56

B-BA2

B_BA2

B-MDATA11

56

RS42

B_MDATA11

B-MDATA9

B-MDATA12

B-MDATA14

B_MDATA9

B_MDATA14

B_MDATA12

B-MDATA1

B-MDATA3

B-MDATA4

56

RS43

B_MDATA1

B_MDATA4

B_MDATA3

B-MDATA6

B-MDATA15

B-MDATA8

56

B_MDATA6

B_MDATA8

B_MDATA15

B-MDATA10

B-MDATA13

RS44

B_MDATA13

B_MDATA10

B-MDATA2

B-MDATA7

B-MDATA0

B_MDATA2

B_MDATA7

B_MDATA0

B-MDATA5

56

RS45

B_MDATA5

B-MADR1

B-MADR10

RS48

22

56

B_MADR10

B_MADR1

B_MADR3

XOCECO

REV.

XIAMEN OVERSEAS CHINESE

Sheet to

DRAWN BY

APPROVED BY

ELECTRONIC CO., LTD.

A-MDATA14

A-MDATA13

A-MDATA15

A-MDATA14

A-MDATA15

A-MDATA13

B1

D9

B9

DQ14

DQ15

NS02

HYB18TC512160BF-2.5

BA0

BA1

L2

L3

A-BA0

A-BA1

DDR2_1V8

A-MDATA12

A-MDATA12

A-MDATA11

D1

D3

DQ13

DQ12

A12P2A7P3A9

R2

P7

A-MADR12

1%
1K

RS02

A-MDATA9

A-MDATA11

A-MDATA10

A-MDATA9

A-MDATA10

C2

D7

DQ9

DQ10

DQ11

A10/AP

A11

A-MADR10

A-MADR11

A-MADR9

1%

A-MDATA8

A-MDATA7

A-MDATA7

A-MDATA8

F9

C8

DQ7

DQ8

P8A8M2

A-MADR8

A-MADR7

10u

CS04

100n
CS02

1n

CS01

1K

RS01

A-MDATA6

A-MDATA5

A-MDATA5

A-MDATA6

H9

F1

DQ5

DQ6

A6

A5

N7

N3

A-MADR6

A-MADR5

A-MDATA4

A-MDATA3

A-MDATA3

A-MDATA4

H1

H3

DQ4

DQ3

A4

A3

N8

N2

A-MADR3

A-MADR4

A-MDATA2

A-MDATA1

A-MDATA2

M7A2M3

A-MADR2

GND-D

A-MDATA1

A-MDATA0

A-MDATA0

G8

DQ0G2DQ1H7DQ2

A1

A0

M8

A-MADR0

A-MADR1

DDR2_1V8

CK

J8CKK2

K8

150

RS13

A_CLK-

CS17

A_CLK+

100n

CKE

A-CKE

GND-D

L8

CS15

CS14

CS13
CS12
100n
CS11

100n

CS10

10u
CS09

CS

100n
CS16
100n

100n

100n

100n

G7

GND-D

G9

VDDQ9G3VDDQ8G1VDDQ7E9VDDQ6C9VDDQ5C7VDDQ4C3VDDQ3C1VDDQ2A9VDDQ1

K3

VDDQ10

WE

A-WEZ

RAS

K7

A-RASZ

CAS

L7

A-CASZ

R1

J1

VDD5M9VDD4J9VDD3E1VDD2A1VDD1

LDMB3UDM

F3

56

RS0756RS08

A_LDQM

A_UDQM

VDDL

J7

K9

A-ODT

VSSDL

ODT

F7

LDQS

56

RS09

A_LDQSP

LDQS

E8

56

RS10

B7

56

56

RS12

RS11

A_LDQSM

A_UDQSP

DDR2_1V8

UDQS

A_UDQSM

H2

A-MVREF

1K

RS05

VSSQ9F8VSSQ8F2VSSQ7E7VSSQ6D8VSSQ5D2VSSQ4B8VSSQ3B2VSSQ2A7VSSQ1

1% 1%

H8

VSSQ10

NC#A2J2VREFA8UDQS

A2

100n
CS08

2.2u
CS07

1K

RS06

GND-D

A_CLK+

A_CLK-

P9

A-MADR1

A-MADR5

A-MADR10

A-MADR9

A-MADR12

A-MADR3

A-MADR7

A-MADR0

A-MADR2

A-MADR6

A-MADR4

A-MADR8

A-MADR11

A-WEZ

A-CKE

A-ODT

A-CASZ

A-RASZ

A-BA0

A-BA1

A-BA2

A-MDATA11

A-MDATA12

A-MDATA9

A-MDATA14

A-MDATA3

A-MDATA1

A-MDATA4

A-MDATA15

A-MDATA6

A-MDATA8

A-MDATA7

A-MDATA13

A-MDATA10

A-MDATA2

A-MDATA0

A-MDATA5

VSS5N1VSS4J3VSS3E3VSS2A3VSS1

RS19

RS18

RS20

56

22

22

NC#R3

NC#R7

NC#R8

NC#E2

NC#L1

R3

R7

R8

E2

L1

A_MCLKZ

A_MCLK

A_MADR10

A_MADR1

A_MADR5

56

RS21

A_MADR9

A_MADR12

A_MADR7

A_MADR0

A_MADR3

A_MADR2

A_MADR4

RS22

56

A_MADR6

RS2356RS2456RS2556RS26

A_MADR8

56

A_WEZ

A_CKE

A_MADR11

RS27

56

RS28

56

A_ODT

RS29

56

A_CASZ

A_RASZ

RS30

56

A_BA0

RS31

56

RS32

56

A_BA1

56

RS14

A_BA2

A_MDATA9

A_MDATA12

A_MDATA11

56

RS15

A_MDATA4

A_MDATA3

A_MDATA14

A_MDATA6

A_MDATA1

A_MDATA15

56

RS16

A_MDATA8

A_MDATA10

A_MDATA0

A_MDATA7

A_MDATA13

56

RS17

A_MDATA5

A_MDATA2

A-BA2 B-BA2

GND-D

10u

CS06

100n

CS05
1%
1K

1n

DDR2_1V8

RS04

GND-D

CS03

1K

RS03

1%

A_LDQSM

A_LDQSP

A_BA0

A_CKE

A_ODT

A_WEZ

A_BA2

A_BA1

A_RASZ

F14

D11

D3

D9

D10

B4

A4

DDR2_A-BA2

SDR_AD9/DDR2_A-CKE

SDR_AD8/DDR2_A-WEZ

SDR_AD11/DDR2_A-BA0

SDR_AD10/DDR2_A-BA1

SDR_AD0/DDR2_A-RASZ

A_CASZ

A_MADR5

A_MADR4

A_MADR1

A_MADR2

A_MADR0

A_MADR3

C3

A15

B3

A13

A3

B14

SDR_AD2/DDR2_ADR0

A-ODT/DDR2_A-ADR3

SDR_AD1/DDR2_A-CASZ

SDR_AD3/DDR2_A-ADR2

SDR_AD4/DDR2_A-ADR4

SDR_BA0/DDR2_A-ADR5

SDR_AD12/DDR2_A-ADR1

A_MADR7

A_MADR6

A_MADR8

D6

B13

D5

SDR_AD5/DDR2_A-ADR6

SDR_AD6/DDR2_A-ADR8

SDR_CASN/DDR2_A-ADR7

2

A_MCLK

A_MCLKZ

A5

B5

E13

C4

C

A-CKO/DDR2_MCLKZ

A-CKON/DDR2_MCLK

NS01

MSD209FG

ABCDEFGH

SDR_CKE/DDR2_A-ODT

A-MVREF/DDR2_A-MVREF

DDR/SDR

1

A_MADR9

A_MADR10

A_MADR12

A_MADR11

D4

C14

A14

C13

A9

B9

SDR_BA1/DDR2_A-AD10

SDR_WEN/DDR2_A-ADR9

SDR_AD7/DDR2_A-ADR11

SDR_RASN/DDR2_A-ADR12

A-UDQSN/DDR2_A-LDQS0M

A_LDQM

A_MDATA1

A_MDATA2

A_MDATA0

B6

A12

A6

B12

C9

A-DQM0/DDR2_A-DQM0

SDR_DQ2/DDR2_A-DQ0

SDR_DQ1/DDR2_A-DQ2

SDR_DQ13/DDR2_A-DQ1

A-UDQSP/DDR2_A-LDQS0P

A_UDQSM

A_MDATA3

A_MDATA5

A_MDATA6

A_MDATA7

A_MDATA4

C12

C5

C11

C6

B8

C8

SDR_DQ0/DDR2_A-DQ5

SDR_DQ12/DDR_A-DQ6

SDR_DQ3/DDR2_A-DQ7

SDR_DQ14/DDR2_A-DQ3

SDR_DQ15/DDR2_A-DQ4

A-LDQSM/DDR2_A-UDQS1M

A_UDQSP

A_UDQM

A_MDATA9

A_MDATA14

A_MDATA10

A_MDATA11

A_MDATA12

A_MDATA8

A_MDATA13

A10

C7

C10

B7

B11

A11

A7

B10

A_DQM1/DDR2_A-DQM1

SDR_DQ6/DDR2_A-DQ8

SDR_DQ9/DDR2_A-DQ9

SDR_DQ5/DDR2_A-DQ10

SDR_DQ4/DDR2_A-DQ13

SDR_DQ8/DDR2_A-DQ15

SDR_DQ11/DDR2_A-DQ11

SDR_DQ10/DDR2_A-DQ12

A-LDQSP/DDR2_A-UDQS1P

3

A_MDATA15

A8

SDR_DQ7/DDR2_A-DQ15

B_MCLK

B_MCLKZ

A18

A19

E15

C17

B-VREF

B-CKE/DDR2_B-ODT

B-CK/DDR2_B-MCLKZ

B-CKN/DDR2_B-MCLK

B_CKE

E17

J18

D17

J19

K17

DDR2_B-BA2

B-A9/DDR2_B-BA1

B-A8/DDR2_B-CKE

B-A7/DDR2_B-WEZ

B-A10/DDR2_B-BA0

B_RASZ

B_CASZ

B_MADR2

B_MADR0

B_MADR1

B_MADR3

B17

A17

C16

F17

D16

G17

B-A0/DDR2_B-CASZ

B-A1/DDR2_B-ADR0

B-A2/DDR2_B-ADR2

B-ODT/DDR2_B-RASZ

B-A11/DDR2_B-ADR1

B-CASZ/DDR2_B-ADR3

B_MADR6

B_MADR5

B_MADR4

B_MADR7

B_MADR8

A16

B16

H17

D15

J17

B-A5/DDR2_B-ADR8

B-A3/DDR2_B-ADR4

B-A4/DDR2_B-ADR6

B-BA1/DDR2_B-ADR5

B-RASZ/DDR2_B-ADR7

4

B_BA0

B_ODT

B_WEZ

B_BA2

B_BA1

B_LDQSM

B_MADR9

B_MADR12

B_MADR10

B_MADR11

K19

J20

C15

K20

E18

B-BA0/DDR2_B-ADR9

B-A6/DDR2_B-ADR11

B-A12/DDR2_B-ADR10

B-WEZ/DDR2_B-ADR12

B_LDQM

B_LDQSP

B_MDATA3

B_MDATA2

B_MDATA0

B_MDATA1

E19

E20

B19

H18

B18

H19

B-DQM0/DDR2_B-DQM0

SDR_DQ18/DDR2_B-DQ0

SDR_DQ29/DDR2_B-DQ1

SDR_DQ17/DDR2_B-DQ2

SDR_DQ30/DDR2_B-DQ3

B-UDQSP/DDR2_B-LDQS0P

B-UDQSM/DDR2_B-LDQS0M

B_UDQSM

B_MDATA4

B_MDATA6

B_MDATA5

B_MDATA7

H20

A20

G20

B20

D19

D20

SDR_DQ31/DDR2_B-DQ4

SDR_DQ16/DDR2_B-DQ5

SDR_DQ28/DDR2_B-DQ6

SDR_DQ19/DDR2_B-DQ7

B-LDQSM/DDR2_B-UDQS1M

B_UDQM

B_UDQSP

B_MDATA11

B_MDATA9

B_MDATA13

B_MDATA12

B_MDATA10

B_MDATA8

F18

C20

F20

C19

G19

G18

C18

F19

B-DQM1/DDR2_B-DQM1

SDR_DQ22/DDR2_B-DQ8

SDR_DQ25/DDR2_B-DQ9

SDR_DQ21/DDR2_B-DQ10

SDR_DQ27/DDR2_B-DQ11

SDR_DQ26/DDR2_B-DQ12

SDR_DQ20/DDR2_B-DQ13

B-LDQSP/DDR2_B-UDQS1P

5

B_MDATA15

B_MDATA14

D18

SDR_DQ24/DDR2_B-DQ14

SDR_DQ23/DDR2_B-DQ15

6

11

X1.0

9232KE5601DL

5

REV.

Sheet to

XOCECO

XIAMEN OVERSEAS CHINESE

ELECTRONIC CO., LTD.

GND-D

AVDD_VIF

AVDD_OTG

AVDD_AUSDM

GND-D

AVDD_LPLL

+3.3V_PS121

L822

STPB2012-201PT

C880

1n

C878

100n

C874

2.2u

C870

100n

C862

2.2u

C857

100n

C852

2.2u

C847

100n

C844

2.2u

+1.8V_DE

NJ03

AS1117-1V8

+3.3V_DE

LJ04

STPB2012-201PT

+3.3AVDD

NJ02

AS1117-3V3

+5V

AVDD_MPLL

L803

STPB2012-201PT

+3.3VDD

N801

5271117010

L1117DG-2.5

+5V_STB

GND-D

GND-D

GND-D

GND-D

CJ33

100uF

10V

CJ32
100n

IN OUT

CJ31

100uF

10V

CJ30
100n

CJ29

100uF

10V

CJ28
100n

IN OUT

VDDP

L804

STPB2012-201PT

C809

10V
C808
100n

IN OUT

10V

AVDD_MEMPLL

L805

STPB2012-201PT

100uF

C805
100n

C803
100uF

GND-D

GND-D

TITLE: DWG NO.

POWER

DRAWN BY

APPROVED BY

DDR2_1V8

G14

G13

G12

G11

AVDD_DDR_1.8V

AVDD_DDR_1.8V

AVDD_DDR_1.8V

AVDD_DDR_1.8V

GND

GND

GND

M10

M11

M12

N804

MP1410-C019

AVDDL_DVI

H14

G10

AVDD_DDR_1.8V

AVDDL_DVI_1.2V

GNDW6GND

M13

GND-D

C406

100n

7EN8

N/C

1BS2IN3SW4

10n

C823

L809

STPB3216-380PT

+12V

+5V

C899

100n

D

G

S

R803

47K

VDDC

V802

SI2315BDS

R804

47K

V801

H9

H10

VDDC_1.2V

VDDC_1.2V

GND-D

10K

R822

5FB6

COMP

C817

C811

100n

BC847AW

10K

R801

J15

K15

VDDC_1.2V

C831

4.7n

GND

C820
100n

25V

470u

R805

10M

L15

VDDC_1.2V

VDDC_1.2V

C839
100p

C835

1.5n

GND-D

1u

AVDD_DM

P13

M15

N10

N11

P10

VDDC_1.2V

VDDC_1.2V

VDDC_1.2V

VDDC_1.2V

AVDD_DM_3.3V

+5V_USB

+5V_PANEL

L814

L815

STPB3216-380PT

R824

C833

15K

GND-D

1%

33.2K

33K

R820

21

L811

SLF10145T-470M1R4-PF

GND-D

GND-D

FOR PDP ONLY

GND-D

R802
200K

C804

(DVI)

STPB3216-380PT

C837
100n

10V

470u

GND-D

B240-13-F

GND-D

D803

VDDC

N803

+5V

5V_USB0

AO4803A

L806

+5V_USB

C879

100n

C875

100n

C871

100n

C866

100n

C861

100n

C856

100n

C850

100n

1u

C845

0

R873

C829

100n

1S22G23S14

R816

R811

STPB3216-380PT

GND-D

AVDDL_DVI

C855

L823

STPB2012-201PT

5V_USB1

GND-D

5

D1_56D1_67D2_78D2_8

G1

47K

47K

C896

100n

C895

2.2u

AVDD_MEMPLL

C867

100n

C863

100n

C858

100n

100n

C853

100n

GND-D

C841

4.7u

DDR2_1V8

AVDD_ADC

L816

L824

STPB2012-201PT

STPB2012-201PT

+3.3VDD

+3.3AVDD

C830

100n

GND-D

C825

C826

100n

100n

R815

R817

R812

7.5K

4.7K

BC847AW

V805

1u

C815

1K

R814

USB0_SW

007:B4

R810

7.5K

4.7K
V804

BC847AW

1u

C813

1K

R809

007:B4

USB1_SW

GND-D

GND-D

GND-D

GND-D

VDDP

AVDD_MPLL

AVDD_DM

L817

C876

100n

C872

100n

C868

100n

C865

100n

C860

4.7u

C851

1n

C846

100n

C842

2.2u

AVDD_LPLL

L818

STPB2012-201PT

STPB2012-201PT

DDR2_1V8

L813

STPB3216-310

N802

AP1117-ADJ

M

2W

4.7

R813

L807

STPB3216-310

+5V

+5V_STB 3.3VDDR

GND-D

OUT

IN

GND-D

1%

909

R818

ADJ

L808

AVDD_DM

AVDD_ADC

AVDD_AUSDM

AVDD_VIF

L819

L820

STPB2012-201PT

C828

100n

C827

100uF

10V

C818

220uF

10V

C816
100n

2.2u

C814

STPB3216-310

C877

100n

C873

2.2u

C864

100n

C859

100n

C854

100n

C849

100n

C843

4.7u

AVDD_OTG

L821

STPB2012-201PT

STPB2012-201PT

1%

402

GND-D

R819

AVDD_ADC

H7

J6

J7

P12

VDDP_3.3V

AVDD_ADC_3.3V

AVDD_ADC_3.3V

AVDD_ADC_3.3V

GND

GNDJ9GND

GND

GND

D12

D13

J10

J11

VDDC

C840
100p

C836

1.5n

R825

15K

GND-D

1%

220

R821

2

L812

1

SLF7032T-100M1R4-PF

GND-D

GND-D

+9V

N810

KA78090R

+12V

GND-D

0

L802

34

AVDD_LPLL

K7

K18

AVDD_ADC_3.3V

AVDD_LPLL_3.3V

GND

GNDK9GND

J12

J13

C838
100n

C834

10V

D804

C898

C897

OUT

GND

IN

C869

C848

0

R872

C3B-A0619

21

VDDP

N8

N12

P11

F

VDDP_3.3V

VDDP_3.3V

VDDP_3.3V

NS01

MSD209FG

GNDD7GNDD8GND

B15

C832

4.7n

GND-D

C405

100n

10K

R823

5FB6

7EN8

N/C

10K

R876

N805

D801

+12V

COMP

MP1410-C019

C824

B140-13-F

+9V

+5V

0

R869

+9V

GND

1BS2IN3SW4

10n

C822

10u

C821
100n

16V

220uF

C819

L810

BG2012D151T

D802

B140-13-F

+5V_STB

25V

C812

220u

82n

C810

220u

10V

C881

10V

C807

470u

+5V

C806

100n

R8700R871

21

L801

C3B-A0619

34

123456789

X801

TJC3-11A

GND-D

N7

D14

AVDD_MPLL_3.3V

GND

GND

GND

K10

K11

K12

K13

1000u

GND-D

B240-13-F

GND-D

25V

220u

100n

GND-DGND-D

GND-D

25V

220u

100n

+3.3VDD

+5V_STB

GND-D

+5V_STB

C802

C801

100n

AVDD_AUSDM

AVDD_MEMPLL

P7

P8

AVDD_AUSDM

ADD_VIF_3.3V

AVDD_MEMPLL_3.3V

GNDL9GND

GND

GND

GND

GND

L10

L11

L12

L13

007:C3

PWR_ON/OFF

R808

4.7K

10K

R807

R806

4.7K

V803

BC847AW

220u

10V

10

11

F8

AVDD_OTG

GND

L19

L20

R877

GND-D

+5V_STB

GND-D

GNDM9GND

10K

AVDD_OTG

AVDD_VIF

AVDD_MPLL

ABCDEFGH

1

2

3

4

5

6

9232KE5601DL

HDMI

TITLE: DWG NO.

11

X1.0

6

XOCECO

REV.

XIAMEN OVERSEAS CHINESE

Sheet to

DRAWN BY

APPROVED BY

ELECTRONIC CO., LTD.

100n

CA03

WP: H=READ ONLY

MMBD1204

DA03

+5V

5V_HDMI-3_IN

NA06

24C02N-10SI27

10K

RA11

10K

RA06

10K

RA04

GND

SDA6SCL7WP8Vcc

5

PESD5V0L4UG

2

NA03

+3.3V_PS121

+3.3VDD

5V_HDMI-2_IN

003:B1

CEC

003:B2

HOTPLUG_HDMI-2_OUT

10K

RA21

10K

RA18

1K

RA15

VA02

BC847AW

HOTPLUG_HDMI-2

CA02

DA02

5V_HDMI-2_IN

100n

MMBD1204

NA05

+5V

+3.3VDD

1K

5V_HDMI-3_IN

GND

24C02N-10SI27

SDA6SCL7WP8Vcc

5

10K

RA09

10K

RA05

10K

RA02

NA02

003:B3

HOTPLUG_HDMI-3_OUT

10K

RA22

10K

RA19

RA16

VA03

BC847AW

HOTPLUG_HDMI-3

PESD5V0L4UG

2

SCL_HDMI-2

SDA_HDMI-2

1AO2A13A24

0

RA10

1

3

4

5

19

177

18

16512158

14

HDMI-2_RXC+

HDMI-2_RXC-

11

9

10136

HDMI-2_RX1-

HDMI-2_RX0+

HDMI-2_RX0-

HDMI-2_RX2-

HDMI-2_RX1+

3

2

4

HDMI-2_RX2+

1

XA02

HDMI-FIX

003:B2

HOTPLUG_HDMI-1_OUT

10K

RA20

+3.3VDD

10K

RA17

1K

RA14

VA01

BC847AW

5V_HDMI-1_IN

HOTPLUG_HDMI-1

003:B1

1AO2A13A24

RA12

HDMI-3_RXC-

HDMI-3_RX0+

HDMI-3_RXC+

HDMI-3_RX0-

SCL_HDMI-3

SDA_HDMI-3

0

1

3

4

5

151511

13139

17

19

11

17

19

20

14

18

16

12

20

14

18

16

12

9

10

10

HDMI-3_RX1+

HDMI-3_RX1-

5

7

5

7

6

8

6

8

HDMI-3_RX2-

HDMI-3_RX2+

1

3

1

3

4

2

4

2

XA03

112-DR20G_2.0X2.0

100n

CA01

NA04

WP: H=READ ONLY

DA01

MMBD1204

+5V

5V_HDMI-1_IN

GND

24C02N-10SI27

SDA6SCL7WP8Vcc

5

10K

RA07

10K

RA03

10K

RA01

NA01

PESD5V0L4UG

2

SCL_HDMI-1

SDA_HDMI-1

1AO2A13A24

0

RA08

1

3

4

5

19

177

18

16512158

RA13

HDMI_CEC

100

14

HDMI-1_RXC-

HDMI-1_RXC+

11

9

10136

HDMI-1_RX1-

HDMI-1_RX0+

HDMI-1_RX0-

HDMI-1_RX1+

HDMI-1_RX2-

HDMI-1_RX2+

1

3

2

4

XA01

HDMI-FIX

HOTPLUG_HDMI-3

ABCDEFGH

1

2

HOTPLUG_HDMI-1

3

HOTPLUG_HDMI-2

4

5

6

PANEL_POWER

X401

1

1

2

PHB-2x20-2.0

2

11

001:D5

001:D5

SDA

SCL

R423

R422

R420

33

LVDS_SDA

17

18

LVDS_IO1

LVDS_SCL

19

19

20

20

33

R417

LVDS_IO2

21

22

23

21

22

24

R405 33

TXOUT0E-

TXOUT0E+

10K

R421

10K

252527

23

24

TXOUT1E-

TXOUT1E+

26

282826

R406 33

TXOUT2E-

TXOUT2E+

GND-D

29

27

29

30

30

R407 33

TXCLKOUTE-

TXCLKOUTE+

TXOUT3E-

31

31

32

32

TXOUT3E+

TXOUT4E-

33

33

34

34

TXOUT4E+

1

GND-D

@2.36X14B

X402

GND-D

35

37

39

35

37

39

36

38

40

36

38

40

10K

+5V

PANEL_ON/OFF

10K

R418

R416

100

GND-D

5

7

3

5

3

4

6

4

6

8

R402 33

TXOUT0O-

TXOUT0O+

7

8

10

TXOUT1O-

TXOUT1O+

9

10

12

R403 33

TXOUT2O-

TXOUT2O+

13139

14

12

14

33

R404

TXCLKOUTO-

TXCLKOUTO+

TXOUT3O-

15

151111

16

16

TXOUT40-

TXOUT3O+

17

18

TXOUT4O+

PANEL_POWER

N401

AO4803A

1S22G23

L402

L401

STPB3216-380PT

FOR THE 12V POWER PANEL

5

D1_56D1_67D2_78D2_8

S1

G1

4

47K

R414

1u

C402

+3.3VDD

STPB3216-380PT

GND-D

C404

100n

C403

100n

TITLE: DWG NO.

BC847AW

V402

R415

4.7K

10K

R412

?

R411

4.7K

R410

0

R409

R401

GND-D

R413

7.5K

1u

C401

BC847AW

V401

4.7K

R408

1K

X1.0

9232KE5601DL

7

REV.

Sheet to

MISC+LVDS

DRAWN BY

XOCECO

XIAMEN OVERSEAS CHINESE

ELECTRONIC CO., LTD.

APPROVED BY

+12V

TXOUT1E+

Y20

R7_RXO0-

TXOUT0E+

TXOUT1E-

W20

V19

G0_RXE1+

G1_RXE1-

TXOUT4O+

TXOUT0E-

V20

U19

G2_RXE0+

G3_RXE0-

LVDS

+5V_PANEL

TXOUT3O+

TXOUT40-

U20

T19

G4_RXO4+

G5_RXO4-

TXOUT3O-

T20

G6_RXO3+

G6_RXO3-

TXOUT4E-

TXOUT4E+

Y16

W16

B0_RXE4+

TXOUT3E-

TXOUT3E+

W17

Y17

B1_RXE4-

B2_RXE3+

TXOUT2E+

TXCLKOUTE-

TXCLKOUTE+

W18

Y18

W19

B4_RXEC+

B5_RXEC-

B3_RXE3-

TXOUT2E-

Y19

B6_RXE2+

B7_RXE2-

DEBUG PORT

1

3

4

2

X807

4.7K

R866

R863

4.7K

+5V_STB

USB INTEFACE

1

345

2

X806

RXD_UPDATE

TXD_UPDATE

GND-D

GND-D

SPI_CZ1

W14

SPI_CZ1

Y13

R856

33

UART_RX

SPI_DI

SPI_CK

W13

Y14

SPI_CK1

SPI_DI1

SPI

SPI_DO

SPI_DO1

R857

33

UART_TX

003:D2

IR_SYNC

EEP_W_EN

V10

M18

IRIN

IRIN2/GPIO9

C891

IR

FU801

SMD1206P075TF

5V_USB0

GND-D

DP0

DM0

DP1

DM1

USB0_OC

+3.3VDD

FU802

5V_USB1

100K
R854

D

NS01

MSD209FG

47K

R852

SMD1206P075TF

GND-D

USB1_OC

10K

R875

F7

C887

1u

Vcc

RESET

TESTPIN

GND-D

U14

HWreset

100K

GND-D

R855

GND-D

N807

LM810M3-3.08

GND

RESET

1n

20p

C884

USB1_OC

R83133

V11

L18

INT2/GPIO10

INT/PM_CTRL/GPIO4

Reset

GND-D

C886

C885

1M

V1

20p
G801

12MHz

R840

XTAL_2IU1XTAL_2O

47K

R850

ABCDEFGH

002:E2

TXD_UPDATE

RXD_UPDATE

002:D1

GND-D

+3.3VDD

R861 33

C894

15

N809

100n

MAX3232CSE

C1+2V+3C1-4C2+5C2-6V-7T2OUT8R2IN

1

C889

DM1

DM0

DP1

DP0

R83533R83633R837

R834

33

33

A1

E8

E7

B1

USB2.0-P0_DPA2USB2.0-P0_DM

USB2.0-P1_DPB2USB2.0-P1_DM

USB2.0-P1_CID

USB2.0-P1_VBUS

USB2.0

100n

13

14

GND16Vcc

R1IN

T1OUT

100n

+3.3VDD

+3.3VDD

CARD_SHDN#

P14

P15

T2

U2

UART_RX2/GPIO147

UART_RX(DDCA_CLK)

UART_TX(DDCA_DAT)

UART

10

12

T2IN11T1IN

R1OUT

C890

100n

001:D5

001:D5

SCL

SDA

1K

R847

4.7K
R845

4.7K

005:D4

R844

R84233R84133

USB0_SW

USB0_OC

Y15

W15

F3

N6

UART_TX2/GPIO148

TCON_EXT0/GPIO16

I2C_SDA(DDCR_DAT)

I2C_SCL(DDCR_CLK)

I2C

R865

0

R864

0

9

R2OUT

C892

100n

C888

2

N808

005:B2

BLK_ON

PANEL_ON/OFF

PWR_ON/OFF

R843

0

KEY

P3

P4

W12

Y12

SAR0/GPIO126

GPIO_A1/GPIO144

GPIO_A2/GPIO145

GPIO_A3/GPIO146

GPIO

GND-D

100n

5

4

3

1

R846

+3.3VDD

003:H2

003:G4

CI_VS1#

CARD_OC

FLASH_WP#

SC2_FS

U15

V15

V14

V16

SAR3/GPIO129

SAR4/GPIO149

SAR1/GPIO127

SAR2/GPIO128

SAR

100

R858

GND-D

002:A4

008:C5

MUTE_PH

LED1

1K

003:G5

SC1_FS

T16

R16

P16

PWM1/GPIO6

PWM0/GPIO5

SAR5/GPIO150

100

002:A4

232_RXD

ADJ_PWM

008:G5

PH_DECT

CARD_5VEN

U16

T15

PWM2/GPIO7

PWM3/GPIO8

PWM4/GPIO160

PWM

R859

232_TXD

R832

1K

005:C4

CARD_3.3VEN

USB1_SW

R15

E9

PWM5/GPIO161

LVSYNC2/GPIO14

GND-D

TXCLKOUTO-

TXCLKOUTO+

R19

R20

R0_RXOC+

R1_RXOC-

TXOUT1O+

TXOUT2O-

TXOUT2O+

P19

P20

R2_RXO2+

R3_RXO2-

TXOUT1O-

N19

N20

R4_RXO1+

TXOUT0O-

TXOUT0O+

M19

M20

R5_RXO1-

R6_RXO0+

PANEL_ON/OFF

+3.3AVDD

+5V

KEY

C893
100n

GND-D

100

R862

R860

4.7K

+3.3VDD

GND-D

2

1

X805

IR_SYNC

+3.3VDD

+5V_STB

0

D805

LL4148

4

ADJ_PWM

R867

10K

R838

4.7K

0

R839

1K

R833

V807

BC847AW

100

R828

4.7u
C883

R827

0

LED1

4.7K
R853

4.7K

R851

330
R849

R848

2

3

+5V

GND-D

+5V

GND-D

GND-D

V808

BC847AW

GND-D

1

X803

BLK_ON

R868

10K

R830

4.7K

R829

10K

3

GND-D

V806

BC847AW

100n
C882

R826
20K

GND-D

2

1

X802

1

2

3

4

5

6

9232KE5601DL

AUDIO AMP

TITLE: DWG NO.

118

X1.0

XOCECO

REV.

XIAMEN OVERSEAS CHINESE

Sheet to

ELECTRONIC CO., LTD.

1

2

3

TJC3-04A

35V

1000u

CV25

470n

22uH

A7503AY-150M

44

HB1

NV02

CV28

1000u

LV03

A7503AY-150M

CV24

41

42

DVDD43NC43

R2A15112FP

4

GND-S

35V

470n

CV26

10u

40

HB2

NC40

XV02

CV27

LV02

CV22

100n

45

46

48

NC45

NC48

VS1_4647VS1_47

OUT1_1

1

OUT1_2

2

NC3

3

VD1_4

4

VD1_5

5

VV03

2.2K

CV14

CV06

RV10

BC847AW

RV08

RV07

DV01

1u

100n

6.8K

10K

2.2K

LL4148

NC6

6

NC7

GND49

7

8

9

10

11

12

GND-D

DV03

CD4148WP

RV04

4.7K

NC8

NC9

STBYL

GAIN1

IN1

VV02

BC857AW

DV02

GND-S

CBIAS14ROSC15AVCC16GND1617NC1718NC1819NC1920NC2021NC2122CLOCK23VREF24PROT

13

10u

CV11

33K

RV11

10u

CV07

16V

CV02

470u

GND-D

LL4148

+24V-AMP

0

RV13

GND-D

DV04

LL4148

10K

RV09

0

GND-D

RV06

CV01

100n

+5V

+9V

RV03

0

RV02

12345

XV03

TJC3-05A

LV06

LSDL-035

35V

CV30

1000u

CV29

100n

+24V-AMP

100K

RV16

CV23

100n

37

38

NC37

VS2_3839VS2_39

OUT2_36

36

OUT2_35

35

NC34

34

VD2_33

33

VD2_32

32

NC31

31

NC30

30

NC29

29

NC28

28

MUTEL

27

GAIN2

26

IN2

25

CV15

GND-D

1u

CV12

10u

CV09

+5V

GND-S

HEADPHONE

1

345

100u

BH3547F

6

GND-D

4.7K
R874

002:D4

PH_DECT

AMP_R

16V

GND

4

IN1

3

MUTE

2

OUT1

1

1u

CV05

GND-D

100

RV12

2

XV01

+3.3AVDD

GND-S

GND-S

0

RV15

GND-D

+24V-AMP

0

RV14

1u

CV03

100n

RV05

4.7K
VV01

BC847AW

10K

RV01

GND-D

GND-D

+24V-AMP

CV19

100n

GND-S

CV18

100n

CV17

100n

CV16

100n

+5V

1u

CV04

AMP_L

16V

CV21

CV20

100uF

IN2

5

BIAS

47uF

6

OUT2

7

16V

GND-D

CV13

VCC

8

CV10
100n

NV01

CV08

100uF

10V

LV01

GND-D

DRAWN BY

APPROVED BY

002:D4

STANDBY_AMP

AMP_L

AMP_R

002:D4

MUTE_AMP

002:F3

PRIM_AUD_OUT_L

002:F3

PRIM_AUD_OUT_R

002:D4

MUTE_PH

ABCDEFGH

1

2

3

4

5

6

Power Board

XB04

TJC10-12A

1

3456789

2

AUDIO

101112

XB06

TJC10-13A

1

3456789

2

VIDEO

101112

1110

X1.0

13

9232KE5601DL

XOCECO

REV.

XIAMEN OVERSEAS CHINESE

Sheet to

ELECTRONIC CO., LTD.

RB04

CVBS_IN_L

CVBS_IN_R

47K

47K

RB03

47K

RB02

47K

RB01

NC

CVBS_OUT_L

CVBS_OUT_R

RB05

CVBS_IN

75

INTERFACE BOARD

TITLE: DWG NO.

CVBS_OUT

FOR NEW ZEALAND

CB01

CVBS_OUT_R

NB01

PESD5V0L5UY

@pinCo

R

100n

1234

DRAWN BY

5

6

XB08

AV3-14WKD

APPROVED BY

AV3-14WKD

Y

CVBS_OUT

@pinCo

CVBS_OUT_L

@pinCo

W

CB02

100n

XB03

UBA-100/W

CKX3-3.5-1K

GG

1

34

2

USBA-N

UBSA-P

123

XB01

TJC10-05A

NB02

PESD5V0L5UY

4

5

1

345

2

XB02

6

XB05

RL

CVBS_IN

1234

5

6

@pinCo

Y

CVBS_IN_R

CVBS_IN_L

@pinCo

W

XB07

@pinCo

R

N205

PESD5V0L5UY

100n

5

C202

1234

6

L201

STBL2012-501

1

RL

L202

STBL2012-501

X205

HP-DECT

CKX3-3.5-1K

GG

1

X207

UBA-100/W

2

USBA-N

34

UBSA-P

TV_OUT

CVBS_SC1

X202

TJC10-12A

1

3456789

2

47K

R207

47K

R208

SC1_R

SC1_L

N201

PESD5V0L5UY

1234

5

6

47K

R209

TV_OUT_R

TV_OUT_L

R_SC1

FB_SC1

G_SC1

B_SC1

VIDEO

47K

R210

SC2_L

SW_SC1

R211

SC2_R

SC1_R

MAIN

1

3456789

101112

47K

47K

R212

47K

R213

47K

R214

TV_OUT

SC_OUT_R

SC_OUT_L

SC1_L

C200

0.1u

1234

N202

5

6

X203

TJC10-13A

TV_OUT_L

TV_OUT_R

PESD5V0L5UY

75

R201

CVBS_SC1

2

C_SC2

R202

R_SC1

V_OUT_SC2

75

G_SC1

R203

Y_SC2

75

B_SC1

101112

13

75

R205

75

R206

75

R204

RGB/CVBS

TV/AV/169/43

FOR EUROPE

Y_SC2

C_SC2

5

SW_SC2

1234

6

FB_SC2

V_OUT_SC2

FB_SC2

N200

PESD5V0L5UY

SW_SC1

SW_SC2

FB_SC1

SC2_L

C201

SC2_R

SC_OUT_R

SC_OUT_L

0.1u

1234

N203

PESD5V0L5UY

5

6

1R_OUT31L_OUT5GND-D71B_IN9GND-D111G_IN13GND-D151RED_IN

@pinCo12@pinCo14GND-D161RGB_SW17GND-D191TV_OUT18GND-D201TV_IN21GND-D

123

4

2

345

1

X204

ABCDEFGH

TJC10-06A

1

6

X206

TJC10-05A

2

5

SCART1 (CVBS+RGB)IN/TVOUT

3

1R_IN4GND-D61L_IN81FUN_SEL

1

2

10

X200

HJ-2105F

4

@pinCo12@pinCo14GND-D16@pinCo17GND-D192VEDIO_OUT18@pinCo202Y_IN21GND-D

10

SCART2 (CVBS+YC)IN/MONITOROUT

5

2R_OUT32L-OUT5GND-D7@pinCo9GND-D11@pinCo13GND-D152C_IN

2R_IN4GND-D62L_IN82FUN_SEL

1

X201

2

HJ-2105F

6

X1.0

S907

X901

POWER

1

569KE01690DL

11 11

REV.

Sheet of

XOCECO

XIAMEN OVERSEAS CHINESE

ELECTRONIC CO., LTD.

IR, KEY

KEY

TITLE: DWG NO.

CH+

S901

10K

R901

CH-

DRAWN BY

APPROVED BY

SOURCE

MENU

S904

S905

S906

1K

1K

R906

2

R905

1.5K

R904

VOL+

S903

2.4K
R903

VOL-

S902

4.3K
R902

N911

GND

Vout

HRM538BB5117

Vout

R913

X911

Vcc

47

Vstb

D911

HFT503MPBR-1

RB

100n

C911

22u

16V

C912

510

R914

V911

BC847AW

3K

240

R912

R911

GND

+5V

2

3

1

4

IR

ABCDEF

1

2

3

4

APPENDIX-A: Main assembly 9242KE5610

NAME NO. MAIN COMPONENT AND IT'S NO.

Data processing
board

IR board

Key board

Power board

Remote control

Panel

NS01
NS02 NS03

6KE0026910

6HC0040910

6HE0130510

6FN0132010

6010J01701 RC-J17-0A

52034283304 T420HW02 V4

NJ01
TUNER1
NV02

MSD209FG (5270209001)
K4T51163QG-HCF7(5275116301)
CE6353 (5276353001)
FQD1116ME/I V (5524000029)
R2A15112FP (5271511201)

APPENDIX-B: Exploded view (LC-42KE56)

PART LIST OF EXPLODED VIEW LC-42KE56

NO. DESCRIPTION

1 Front cabinet
2 Panel pressing block
3 Side AV bracket
4 Power switch
5 Decorative ring
6 Light-guided glass
7 Light-guided column
8 IR assembly

9 Display panel
10 Panel fixed bracket assembly
11 Power board assembly
12 Power socket
13 Interface baffle
14 Back cabinet
15 Pedestal base
16 Speaker
17 Decorative bar
18 Key board
19 Digital board
20 Interface connecting board

Note: design and specifications are subject to change without notice.

-

PART LIST------------------------------------------------------------------------------------------------

LCD-42XR56DZ ver 1.0

NO. PART NO. DESCRIPTION QTY. REMARK

1 5Q42560010 Front cabinet 1

2 58A0072400 Panel pressing block 10

3 58B0C37410 Side AV bracket 1

4 5293000042 Power switch 1

5 5730281010 Decorative ring 1

6 5710156010 Light-guided glass 1

7 5700306010 Light-guided column 1

8 6HC0040910 IR assembly 1

9 5203428304 Display panel 1 T420HW02 V4
10 6153139000 Panel fixed bracket assembly 1
11 6FN0132010 Power board assembly 1
12 5282000004 Power socket 1
13 5810I64200 Interface baffle 1
14 5H240WH020 Back cabinet 1
15 6151150020 Pedestal base 1
16 5501206002 Speaker 2
17 573L245010 Decorative bar 1
18 6HE0130510 Key board 1
19 6KE0026910 Digital board 1
20 6KE0012460 Interface connecting board 1

·Only the parts in above list are used for repaired.

·Other parts except the above parts can't be supplied.

Assembly list of panel

Components No. Panel model
logic board 55.42T04.C06 XI60Z0000604 42T420HW02 V400
back light board 19.24T04.003 XI60Z0000605 42T420HW02 V400

Note: specifications are subject to change without notice.

Assemble and attach the pedestal base

Safety Precautions:

1.Please read these instructions thoroughly prior to attempting this installation.

2.Be sure to handle this product very carefully when attempting assembly. If you are unsure of your capability, or the use of tools

necessary to complete this activity, refer to a professional installer or service personnel. The manufacturer is not responsible for any

damages or injuries that occur due to mishandling or improper assembly/installation.

3.When using a table or bench as an aid to assembly, be sure to put a soft cushion or covering to prevent accidental scratching or

damage to the unit's finish.

4.The speaker is not intended to support the weight of this display. Do not move or handle this product from the speaker; which can

cause damage to the display not covered under the manufacturer's warranty.

Attachment parts:

1. Stand (1 piece)

2. M5 Screw (5 pieces)

Install the stand:

1.Place carefully the display on its front side, using a soft cloth,

blanket or cushion to protect its finish from scratching. Aiming the
fixating holes of the stand to the protruding holes on the display
base bracket, attach the stand to the display base bracket.

Display base bracket

Protruding holes

Protruding & holesFixating

! NOTE：

1.Appearance of this product in illustrations may differ from your actual product, and is for comparative purposes only.

2.Design and specifications are subject to change without notice.

Fixating holes

2. Using the supplied M5 screws (5 pieces) to tighten securely.

M5 screws (5 pieces)

WALL MOUNTING INSTRUCTIONS

Safety Precautions:

1. Be sure to ask an authorized service personnel to carry out setup.

2. Thoroughly read this instruction before setup and follow the steps below precisely.

3.The wall to be mounted should be made from solid materials. Only use accessories supplied by the manufacturer.

4.Very carefully handle the unit during setup. We are not liable for any damage or injury caused by mishandling or improper installation.

5.Be sure to place the unit on a stable and soft platform which is strong enough to support the unit.

6.Do not uplift the speaker when moving the display. The appearance of the unit may different from the actual ones.

7.Design and specifications are subject to change without notice.

8. Retain these instructions for future reference.

Note: All the wall mounting parts are

optional and may be unavailable in

your model.

Below we will show you how to mount the

Display on the wall using our company’s

wall mounting components.

Take out these

parts from the

box

Combination Screw

Fig.1

1. There are three options of wall mounting

ho lder wi th diff erent speci ficat io ns

:200200,200400,200600. Please check your

wall mounting holder for its specification.

Wall Mounting Holder

Wall Mounting Connector

Expansion Bolt

Wood Screw

Wall mou nting f ix-ho le cent er

X

8

200 27

Rea r wall mo untin g hole ce nter

Fig.2

2. Due to the wall mounting fix-groove leaning to the

right side, the whole unit will lean to right side after

installation, please carefully measure the position of

the holes you want to drill, refer to the parameters

on Fig.2 when drilling the holes.

Note: The "X" in Fig.2 represents a data. It may be

200mm or 400mm or 600mm.

(Unit:mm)

Wall

Fig.3a

3a. Screw 4pcs expansion bolts to fix the

wall mounting holder on the wall.

Wall

Fig.3b

3b. If your wall is a wooden structure, please

fix the wall mounting holder on the wall

with 16pcs wood screws.

Fig.4

4. Use the 4pcs combination screws to fix

the wall mounting connector to the rear

of the display unit.(Caution:the direction

of the connectors should be strictly

confirm to the diagram illustrated above).

Fig.5

5. Put the back of the display unit close to the wall

mounting holder, insert the four wall mounting

connectors into the four calabash-shaped holes on

the wall mounting holder. (Fig.5)

Fig.6

6. Let the display unit slowly slide down to

the end of the calabash-shaped hole.

(Fig.6)

8. If you want to dismount the unit do the above steps in reverse order.

7. Push rightwards carefully until the wall

mounting connectors fully slide into the

right fix-grooves and be sure the mounting

is secure.

Fig.7

April/2009