sandisk SDSM-128-101-01 User guide

SmartMedia™ 128MByte

Product Manual

®

CORPORATE HEADQUARTERS

140 Caspian Court

Sunnyvale, CA 94089 408-542-0500

FAX: 408-542-0503

URL: http://www.sandisk.com

SanDisk® Corporation general policy does not recommend the use of its products in life support applications where in a failure or malfunction of the product may directly threaten life or injury. Per SanDisk Terms and Conditions of Sale, the user of SanDisk products in life support applications assumes all risk of such use and indemnifies SanDisk against all damages.

The information in this manual is subject to change without notice.

SanDisk Corporation shall not be liable for technical or editorial errors or omissions contained herein; nor for incidental or consequential damages resulting from the furnishing, performance, or use of this material.

All parts of the SanDisk documentation are protected by copyright law and all rights are reserved. This documentation may not, in whole or in part, be copied, photocopied, reproduced, translated, or reduced to any electronic medium or machine readable form without prior consent, in writing, from SanDisk Corporation.

SanDisk and the SanDisk logo are registered trademarks of SanDisk Corporation. SmartMedia is a trademark of Toshiba Corporation.

Product names mentioned herein are for identification purposes only and may be trademarks and/or registered trademarks of their respective companies.

© 2001 SanDisk Corporation. All rights reserved.

SanDisk products are covered or licensed under one or more of the following U.S. Patent Nos. 5,070,032; 5,095,344; 5,168,465; 5,172,338; 5,198,380; 5,200,959; 5,268,318; 5,268,870; 5,272,669; 5,418,752; 5,602,987. Other U.S. and foreign patents awarded and pending.

Lit. No. 80-36-00174 Rev. 1.2 8/01

Printed in U.S.A.

Revision History

Revision 1—initial release.

Revision 1.1—several minor edits throughout document.

Revision 1.2—several minor edits throughout document.

2

SmartMedia 128MByte Product Manual Rev. 1.2 © 2001 SANDISK CORPORATION

SmartMedia 128MByte Product Manual

Table of Contents

1.0

Description......................................................................................................................

5

 

1.1

Features...........................................................................................................................................

5

2.0

Timing Diagrams ...........................................................................................................

11

3.0

Pin Functions ..................................................................................................................

26

 

3.1

Pin Descriptions.............................................................................................................................

26

 

3.2

Schematic Cell Layout and Address Assignment .....................................................................

27

 

3.3

Operation Mode: Logic and Command Tables .........................................................................

28

4.0

Device Operation ...........................................................................................................

30

 

4.1

Read Mode (1) ................................................................................................................................

30

 

4.2

Read Mode (2) ................................................................................................................................

31

 

4.3

Read Mode (3) ................................................................................................................................

32

 

4.4

Sequential Read (1) (2) (3).............................................................................................................

32

 

4.5

Status Read .....................................................................................................................................

33

 

4.6

Auto Page Program .......................................................................................................................

34

 

4.7

Auto Block Erase............................................................................................................................

35

 

4.8

Multi Block Program .....................................................................................................................

36

 

 

4.8.1 Internal Addressing in Relation with the Districts .........................................................

37

 

 

4.8.2 Address Input Restriction for the Multi Block Program Operation.............................

38

 

 

4.8.3 Operating Restriction During the Multi Block Program Operation.............................

38

 

4.9

Status Read Operation ..................................................................................................................

38

 

4.10

Multi District Block Erase.............................................................................................................

39

 

 

4.10.1 Internal Addressing in Relation with the Districts.........................................................

39

 

 

4.10.2 Address Input Restriction for the Multi District Block Erase Operation ....................

40

 

4.11

Reset.................................................................................................................................................

40

 

4.12

ID Read............................................................................................................................................

42

5.0

Application Notes and Comments..............................................................................

43

 

5.1

Prohibition of Unspecified Commands ......................................................................................

43

 

5.2

Restriction of Commands While in Busy State..........................................................................

43

 

5.3

Pointer Control for 00H, 01H and 50H .......................................................................................

43

 

5.4

Acceptable Commands After Serial Input Command 80H .....................................................

44

 

5.5

Status Read During a Read Operation........................................................................................

45

 

5.6

Auto-Programming Failure..........................................................................................................

45

 

5.7

Addressing for Program Operation ............................................................................................

45

 

 

 

 

 

 

 

 

 

 

 

5.8

R/B: Termination for the Ready/Busy Pin (R/B).................................................................

46

 

5.9

Status After Power-on...................................................................................................................

46

 

5.10

Power-on/off Sequence ................................................................................................................

 

46

 

 

 

 

 

 

 

5.11

Note Regarding the WP

Signal .................................................................................................

47

 

5.12

When Five Address Cycles are Input..........................................................................................

48

 

5.13 Several Programming

 

Cycles on the Same Page (Partial Page Program)..............................

49

 

5.14

Note Regarding the

RE

...................................................................................................Signal

49

 

5.15

Invalid Blocks (Bad Blocks) ..........................................................................................................

50

 

5.16

Failure Phenomena for Program and Erase Operations...........................................................

52

 

5.17

Chattering of Connector ...............................................................................................................

52

SmartMedia 128MByte Product Manual Rev. 1.2 © 2001 SANDISK CORPORATION

3

SmartMedia 128MByte Product Manual

Table of Contents (continued)

6.0

Handling Precautions....................................................................................................

53

7.0

Package Dimensions......................................................................................................

54

 

7.1 SmartMedia Card Dimensions.....................................................................................................

54

Ordering Information and Technical Support.......................................................................

55

Ordering Information................................................................................................................

57

 

SmartMedia Card .....................................................................................................................................

57

Technical Support Services.......................................................................................................

58

 

Direct SanDisk Technical Support .........................................................................................................

58

 

SanDisk Worldwide Web Site.................................................................................................................

58

SanDisk Sales Offices................................................................................................................

59

Limited Warranty.......................................................................................................................

63

4

SmartMedia 128MByte Product Manual Rev. 1.2 © 2001 SANDISK CORPORATION

SmartMedia 128MByte Product Manual

1.0 Description

The SanDisk SmartMedia Card is a 3.3-V 1-Gbit (1,107,296,256) NAND Electrically Erasable and Programmable Read-Only Memory (NAND E2PROM) device, organized as 528 bytes X 32 pages X 8192 blocks. This device has a 528-byte static register which allows program and read data to be transferred between the register and the memory cell array in 528-byte increments. The Erase operation is implemented in a single block unit (16 Kbytes + 512 bytes: 528 bytes X 32 pages).

The SanDisk SmartMedia Card is a serial-type memory device which uses the I/O pins for both address and data input and output as well as for command inputs. The Erase and Program operations are automatically executed making the device ideal for applications such as solid-state file storage, voice recording, image storage for digital cameras and other systems which require high-density non-volatile memory data storage.

1.1Features

• Organization

 

 

-

Memory cell array

528

× 128K × 8 x 2

-

Data Register

528

× 8

-

Page size

528 bytes

-

Block size

(16K + 512) bytes

Modes

-Read, Reset, Auto Page Program

-Auto Block Erase, Status Read

-Multi Block Program, Multi Block Erase

Mode Control

-Serial Input/Output

-Command control

Complies with the SmartMediaTM Electrical Specification and Data Format Specification issued by SSFDC Forum (SmartMedia Card).

Power Supply—VCC = 2.7 V to 3.6 V

Program/Erase Cycles — 1E5 cycles (with ECC)

Access time

- Cell array to register

25 µs max

-

Serial Read Cycle

50 ns min

• Operating current

 

- Read (50 ns cycle)

10 mA typ.

-

Program (avg.)

10 mA typ.

-

Erase (avg.)

10 mA typ.

-

Standby

100 µA max

Package

-SDSM-128-101-01: SmartMedia Card (Weight: 1.8g typical)

SmartMedia 128MByte Product Manual Rev. 1.2 © 2001 SANDISK CORPORATION

5

SmartMedia 128MByte Product Manual

 

1

 

 

 

2

 

 

3

4

 

 

 

5

 

6

 

7

8

9

10

11

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Vss

 

CLE

ALE

WE

 

WP

 

I/O1

I/O2

I/O3

I/O4

Vss

Vss

 

 

 

 

 

 

 

PIN NAMES

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

I/O1 to 8

I/O Port

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Chip Enable

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Write Enable

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

WE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Read Enable

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

RE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CLE

Command Latch Enable

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ALE

Address Latch Enable

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Write Protect

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

WP

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R/B

Ready/Busy

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

GND

Ground Input

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LVD

Low Voltage Detect

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VCC

Power Supply

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VSS

Ground

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

22

 

21

 

20

 

19

 

 

 

18

17

 

16

15

14

13

12

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VCC

CE

 

RE

 

R/B

 

 

 

GND

 

LVD

I/O8

I/O7

I/O6

I/O5

VCC

 

 

 

 

 

 

 

 

Figure 1-1 1024 Mbit SmartMedia Card Pin Assignments (Top View)

Figure 1-2 Block Diagram

6

SmartMedia 128MByte Product Manual Rev. 1.2 © 2001 SANDISK CORPORATION

SmartMedia 128MByte Product Manual

Table 1-1 Absolute Maximum Ratings

Symbol

Item

Value

Unit

VCC

Power Supply Voltage

−0.6 to

4.6

V

VIN

Input Voltage

−0.6 to

4.6

V

VI/O

Input /Output Voltage

-0.6 V to VCC + 0.3 V

V

(≤4.6 V)

 

 

 

PD

Power Dissipation

0.3

 

W

TSTG

Storage Temperature

−20 to

65

°C

TOPR

Operating Temperature

0 to 55

°C

Table 1-2 Capacitance *(Ta = 25°C, f = 1 MHz)

Symbol

Parameter

Condition

Min.

Max.

Unit

CIN

Input

VIN = 0 V

 

20

pF

COUT

Output

VOUT = 0 V

 

20

pF

* This parameter is periodically sampled and is not tested for every device.

Table 1-3 Valid Blocks (1)

Symbol

Parameter

Min.

Typ.

Max.

Unit

NVB

Number of Valid Blocks

8032 (2)

-

8192

Blocks

Notes: (1) The SmartMedia Card occasionally contains unusable blocks. Refer to section 5.15 toward the end of this document.

(2) SSFDC Forum Spec. : 1002 MIN per Zone (each 16 k Bytes).

Table 1-4 Recommended DC Operating Conditions

Symbol

Parameter

Min.

Typ.

Max.

Unit

VCC

Power Supply Voltage

2.7

3.3

3.6

V

VIH

High Level Input Voltage

2.0

 

VCC + 0.3

V

VIL

Low Level Input Voltage

-0.3*

 

0.8

V

* −2 V (pulse width ≤ 20 ns)

SmartMedia 128MByte Product Manual Rev. 1.2 © 2001 SANDISK CORPORATION

7

SmartMedia 128MByte Product Manual

Table 1-5 DC Characteristics

(Ta = 0 to 70° C, VCC = 2.7 V to 3.6 V)

Symbol

Parameter

 

 

 

Condition

Min.

Typ.

Max.

Unit

IIL

Input Leakage Current

 

VIN = 0 V to VCC

 

 

±10

µA

ILO

Output Leakage Current

VOUT = 0.4 V to VCC

 

 

±10

µA

 

 

 

Operating Current

 

 

 

= VIL, IOUT = 0 mA,

 

 

 

 

ICCO1

 

CE

 

 

10

30

mA

(Serial Read)

 

 

 

tcycle = 50 ns

 

 

 

 

 

 

 

 

 

 

ICCO3

Operating Current

 

 

tcycle = 50 ns

 

10

30

mA

(Command Input)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ICCO4

Operating Current

 

 

tcycle = 50 ns

 

10

30

mA

(Data Input)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ICCO5

Operating Current

 

 

tcycle = 50 ns

 

10

30

mA

(Address Input)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ICCO7

Programming Current

 

 

 

 

 

 

 

10

30

mA

ICCO8

Erasing Current

 

 

 

 

 

 

 

10

30

mA

ICCS1

Standby Current

 

 

 

 

 

 

= VIH

 

 

1

mA

 

 

 

 

 

CE

ICCS2

Standby Current

 

 

 

 

= VCC − 0.2 V

 

 

100

µA

 

 

CE

VOH

High Level Output Voltage

 

IOH = −400 µA

2.4

 

 

V

VOL

Low Level Output Voltage

 

 

IOL = 2.1 mA

 

 

0.4

V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

8

 

mA

IOL (R/B)

Output current of R/B

pin

 

 

 

VOL = 0.4 V

8

SmartMedia 128MByte Product Manual Rev. 1.2 © 2001 SANDISK CORPORATION

SmartMedia 128MByte Product Manual

Table 1-6 AC Characteristics and Recommended Operating Conditions

(Ta = 0 to 70°C, VCC = 2.7 V to 3.6 V)

Symbol

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Parameter

Min.

 

Max.

Unit

Notes

tCLS

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CLE Setup Time

0

 

 

ns

 

tCLH

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CLE Hold Time

10

 

 

ns

 

tCS

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Setup Time

0

 

 

ns

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CE

 

 

 

 

 

 

tCH

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Hold Time

10

 

 

ns

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CE

 

 

tWP

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Write Pulse Width

25

 

 

ns

 

tALS

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ALE Setup Time

0

 

 

ns

 

tALH

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ALE Hold Time

10

 

 

ns

 

tDS

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Data Setup Time

20

 

 

ns

 

tDH

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Data Hold Time

10

 

 

ns

 

tWC

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Write Cycle Time

50

 

 

ns

 

tWH

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

High Hold Time

15

 

 

ns

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

WE

 

 

tWW

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

High to

 

 

 

 

 

 

Low

100

 

 

ns

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

WP

 

 

WE

 

 

tRR

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Ready to

 

 

 

 

 

Falling Edge

20

 

 

ns

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

RE

 

 

tRP

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Read Pulse Width

35

 

 

ns

 

tRC

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Read Cycle Time

50

 

 

ns

 

tREA

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Access Time (Serial Data Access)

 

35

 

 

ns

 

 

 

 

 

 

 

 

RE

 

 

 

 

 

tCEH

 

 

 

 

 

 

High Time for Last Address in Serial Read Cycle

100

 

 

ns

(1)

 

 

 

 

CE

tREAID

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Access Time (ID Read)

 

35

 

 

ns

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

RE

 

 

 

tOH

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Data Output Hold Time

10

 

 

ns

 

tRHZ

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

High to Output High Impedance

 

30

 

 

ns

 

 

 

 

 

 

 

 

 

 

RE

 

 

tCHZ

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

High to Output High Impedance

 

20

 

 

ns

 

 

 

 

 

 

 

 

 

CE

 

 

tREH

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

High Hold Time

15

 

 

ns

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

RE

 

 

tIR

 

 

 

 

 

 

Output High Impedance to

 

 

Rising Edge

0

 

 

ns

 

 

 

 

 

 

 

RE

 

tRSTO

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Access Time (Status Read)

 

35

 

 

ns

 

 

 

 

 

 

 

 

 

 

 

 

 

RE

 

 

 

tCSTO

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Access Time (Status Read)

 

45

 

 

ns

 

 

 

 

 

 

 

 

 

 

 

 

CE

 

 

tRHW

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0

 

 

ns

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

RE

 

High to

WE

Low

 

tWHC

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

High to

 

 

 

 

 

Low

30

 

 

ns

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

WE

 

CE

 

tWHR

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

High to

 

 

Low

30

 

 

ns

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

WE

RE

 

tAR1

 

 

 

 

 

 

 

 

 

 

 

ALE Low to

 

 

 

 

Low (ID Read)

100

 

 

ns

 

 

 

 

 

 

 

 

 

 

 

 

RE

 

tCR

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

100

 

 

ns

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CE

Low to

RE

Low (ID Read)

 

tR

 

 

 

 

 

 

Memory Cell Array to Starting Address

 

25

 

 

µs

 

tWB

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

High to Busy

 

200

 

 

ns

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

WE

 

 

tAR2

 

 

 

 

 

 

 

 

 

ALE Low to

 

 

 

 

 

 

Low (Read Cycle)

50

 

 

ns

 

 

 

 

 

 

 

 

 

 

RE

 

tRB

 

 

 

 

 

Last Clock Rising Edge to Busy (in Sequential Read)

 

200

 

 

ns

 

 

 

RE

 

tCRY

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1 +

 

 

µs

(2)

CE High to Ready (When interrupted by CE in Read Mode)

 

 

 

 

 

 

tr (R/B)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tRST

 

 

 

 

 

 

Device Reset Time (Read/Program/Erase)

 

6/10/500

µs

 

Note: (1) Sequential Read is terminated when tCEH is greater than or equal to 100 ns. If the RE to CE delay is less than 30ns, R/B signal stays Ready.

(2) CE High to Ready time depends on the pull-up resistor tied to the R/B pin. (Refer to section 5.8.)

SmartMedia 128MByte Product Manual Rev. 1.2 © 2001 SANDISK CORPORATION

9

SmartMedia 128MByte Product Manual

 

 

 

 

 

Table 1-7

AC Test Conditions

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Parameter

 

 

 

 

 

 

 

 

Conditions

 

 

 

 

 

 

 

 

 

Input level

 

 

 

 

 

 

 

 

2.4 V, 0.4 V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Input pulse rise and fall time

 

 

 

 

 

 

 

 

3ns

 

 

 

 

 

 

 

 

Input comparison level

 

 

 

 

 

 

 

 

1.5 V, 1.5 V

 

 

 

 

 

 

 

Output data comparison level

 

 

 

 

 

 

 

 

1.5 V, 1.5 V

 

 

 

 

 

 

 

 

 

Output load

 

 

 

 

 

 

 

CL (100 pF) + 1 TTL

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tCEH > 100 ns

 

*

 

 

 

* : VIH or VIL

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

RE

 

 

 

 

 

 

 

A

 

A : 0 to 30_ns

Busy signal is not output.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

525

526

527

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R/B

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Busy

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Figure 1-3

 

 

 

 

 

 

 

 

 

 

Table 1-8 Programming and Erasing Characteristics

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

(Ta = 0 to 70°C, VCC = 2.7 V to 3.6 V)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Symbol

 

 

Parameter

 

Min.

 

Typ.

 

Max.

 

 

Unit

Notes

 

 

 

 

tPROG

 

 

Average Programming Time

 

 

 

 

 

 

200

 

1000

 

 

 

µs

 

 

 

 

 

tDBSY

 

Dummy Busy Time for Multi Block

 

 

 

 

 

 

2

 

10

 

 

 

µs

 

 

 

 

 

 

 

Programming

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tMBPBSY

 

Multi Block Program Busy Time

 

 

 

 

 

 

200

 

1000

 

 

 

µs

 

 

 

 

 

 

N

 

Number of Programming Cycles on

 

 

 

 

 

 

 

 

3

 

 

 

 

 

(1)

 

 

 

 

 

 

 

Same Page

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tBERASE

 

 

Block Erasing Time

 

 

 

 

 

 

2

 

10

 

 

 

ms

 

Notes: (1) Refer to section 5.13.

10

SmartMedia 128MByte Product Manual Rev. 1.2 © 2001 SANDISK CORPORATION

SmartMedia 128MByte Product Manual

2.0 Timing Diagrams

Figure 2-1 Latch Timing Diagram for Command/Address/Data

Figure 2-2 Command Input Cycle Timing Diagram

SmartMedia 128MByte Product Manual Rev. 1.2 © 2001 SANDISK CORPORATION

11

SmartMedia 128MByte Product Manual

 

 

 

 

tCLS

 

 

 

 

 

 

 

CLE

 

 

 

 

 

 

 

tCS

tWC

 

tWC

 

 

tWC

 

CE

 

 

 

 

 

 

 

 

tWP

tWH

tWP

tWH

tWP

tWH

tWP

WE

 

 

 

 

 

 

 

tALS

 

 

 

 

 

 

tALH

ALE

 

 

 

 

tDS tDH

 

 

 

 

tDS tDH

 

 

 

 

tDS tDH

 

 

 

 

tDS tDH

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

I/O1 to

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

A0 to 7

 

 

 

 

 

 

A9 to 16

 

 

 

 

 

A17 to 24

 

 

 

 

 

A25 to 26

 

 

I/O8

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

: VIH or VIL

Figure 2-3 Address Input Cycle Timing Diagram

Figure 2-4 Data Input Cycle Timing Diagram

12

SmartMedia 128MByte Product Manual Rev. 1.2 © 2001 SANDISK CORPORATION

SmartMedia 128MByte Product Manual

Figure 2-5 Serial Read Cycle Timing Diagram

Figure 2-6 Status Read Cycle Timing Diagram

SmartMedia 128MByte Product Manual Rev. 1.2 © 2001 SANDISK CORPORATION

13

SmartMedia 128MByte Product Manual

CLE

tCLS

tCLH

 

 

tCEH

 

tCS

tCH

 

 

CE

 

 

 

 

 

tWC

tCRY

WE

tALH tALS

 

 

tALH

tAR

 

 

 

 

 

 

 

 

 

 

 

ALE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tR

tRR

tRC

 

 

 

RE

 

 

 

 

tWB

 

 

 

¥¥¥¥

 

tDS tDH

tDS tDH

tDS tDH

tDS tDH

tDS tDH

 

 

 

 

 

 

 

 

 

 

I/O1

00H

A0

A9

A17

A25

DOUT

DOUT

DOUT

¥¥¥¥¥

DOUT

to I/O8

 

to 7

to 16

to 24

to 26

N

N+1

N+2

 

527

 

 

Column address

 

 

 

 

 

 

tRB

 

 

N

 

 

 

 

 

 

 

 

RY/BY

 

 

 

 

 

 

 

 

 

 

: Read operation using 00H command N:0-255

 

: VIH or VIL

Figure 2-7 Read Cycle (1) Timing Diagram

CLE

tCLS

tCLH

 

 

 

 

 

 

 

 

tCS

tCH

 

 

 

CE

 

 

 

 

 

 

 

 

tWC

 

 

WE

 

tALH tALS

tALH

tAR

tCHZ

 

 

ALE

 

 

 

 

 

 

 

 

 

 

 

 

 

tR

tRR

tRC

 

RE

 

 

 

 

tWB

 

 

 

tDS tDH

tDS tDH

tDS tDH

tDS tDH

tDS tDH

 

 

tRHZ

 

tREA

 

I/O1

 

 

 

 

 

 

tOH

00H

A0

A9

A17

A25

DOUT

DOUT

DOUT

to I/O8

 

to 7

to 16

to 24

to 26

N

N+1

N+2

 

 

Column address

 

 

 

 

 

 

 

N

 

 

 

 

 

 

RY/BY

 

 

 

 

 

 

 

 

***: Read operation using 00H command N:0-255

Figure 2-8 Read Cycle (1) Timing Diagram: When Interrupted by CE

14

SmartMedia 128MByte Product Manual Rev. 1.2 © 2001 SANDISK CORPORATION

SmartMedia 128MByte Product Manual

CLE

tCLS

tCLH

 

tCS tCH

CE

 

 

 

 

 

 

 

 

 

WE

tALH

tALS

 

tALH

tAR2

 

 

 

 

 

 

 

 

ALE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tR

tRR

tRC

 

 

RE

tDS tDH

tDS tDH

 

 

tWB

 

 

 

 

 

 

 

 

 

 

tREA

 

 

 

 

 

 

 

 

 

 

I/O1

01H

A0 to

A9 to

A17 to

A25 to

 

DOUT

DOUT

DOUT

to I/O8

7

16

24

26

 

 

 

256 + Ν

256 + N + 1

 

 

 

Column address

 

 

 

527

 

 

 

 

 

 

 

 

 

 

N

 

 

 

 

 

 

 

RY/BY

 

 

 

 

 

 

 

 

 

 

: Read operation using 01H command N:0-255

 

 

 

 

: VIH or VIL

Figure 2-9 Read Cycle (2) Timing Diagram

CLE

tCLS

tCLH

 

tCS tCH

CE

 

 

 

 

 

 

 

 

 

WE

tALH

tALS

 

tALH

tAR2

 

 

 

 

 

 

 

 

ALE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tR

tRR

tRC

 

 

RE

tDS tDH

tDS tDH

 

 

tWB

 

 

 

 

 

 

 

 

 

 

tREA

 

 

 

 

 

 

 

 

 

 

I/O1

50H

A0 to

A9 to

A17 to

A25 to

 

DOUT

DOUT

DOUT

to I/O8

7

16

24

26

 

 

 

512 + Ν

512 + N + 1

 

 

 

Column address

 

 

 

527

 

 

 

 

 

 

 

 

 

 

N

 

 

 

 

 

 

 

RY/BY

 

 

 

 

 

 

 

 

 

 

: Read operation using 50H command N:0-15

 

 

 

 

: VIH or VIL

Figure 2-10 Read Cycle (3) Timing Diagram

SmartMedia 128MByte Product Manual Rev. 1.2 © 2001 SANDISK CORPORATION

15

SmartMedia 128MByte Product Manual

CLE

 

 

 

 

 

 

 

 

 

 

 

 

 

CE

 

 

 

 

 

 

 

 

 

 

 

 

 

WE

 

 

 

 

 

 

 

 

 

 

 

 

 

ALE

 

 

 

 

 

 

 

 

 

 

 

 

 

RE

 

 

 

 

 

 

 

 

 

 

 

 

 

I/O1

00H

A0 to

A9 to

A17 to

A25 to

N

N+1

N+2

527

0

1

2

527

to I/O8

7

16

24

26

 

Column

 

Page

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

address

 

address

tR

 

 

 

tR

 

 

 

 

 

 

N

 

M

 

 

 

 

 

 

 

 

 

R/B

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Page M

 

 

 

Page M + 1

 

 

 

 

 

 

 

 

 

access

 

 

 

access

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

: VIH or VIL

Figure 2-11 Sequential Read (1) Timing Diagram

CLE

 

 

 

 

 

 

 

 

 

 

 

 

 

CE

 

 

 

 

 

 

 

 

 

 

 

 

 

WE

 

 

 

 

 

 

 

 

 

 

 

 

 

ALE

 

 

 

 

 

 

 

 

 

 

 

 

 

RE

 

 

 

 

 

 

 

 

 

 

 

 

 

I/O1

01H

A0 to

A9 to

A17 to

A25 to

 

 

 

527

0

1

2

527

to I/O8

7

16

24

26

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Page

 

 

 

 

 

 

 

 

 

 

 

Column

 

 

256+

256+

256+

 

 

 

 

 

 

 

address

 

address

tR

tR

 

 

 

 

 

 

 

M

N

N+1

N+2

 

 

 

 

 

 

N

 

 

 

 

 

 

 

 

 

 

R/B

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Page M

 

 

 

Page M + 1

 

 

 

 

 

 

 

 

 

access

 

 

 

access

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

: VIH or VIL

Figure 2-12 Sequential Read (2) Timing Diagram

16

SmartMedia 128MByte Product Manual Rev. 1.2 © 2001 SANDISK CORPORATION

sandisk SDSM-128-101-01 User guide

SmartMedia 128MByte Product Manual

CLE

CE

WE

ALE

RE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

I/O1

50H

A0 to

A9 to

A17 to

 

A25 to

 

 

 

527

 

 

527

to I/O8

7

16

24

 

26

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Page

 

 

 

 

 

 

 

 

 

 

 

 

Column

 

 

 

512+

512+

512+

512

513

514

 

 

 

 

address

 

address

tR

tR

 

 

 

 

 

 

 

M

 

N

N+1

N+2

 

 

 

 

 

 

N

 

 

 

 

 

 

 

 

 

 

R/B

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Page M

 

 

 

Page M + 1

 

 

 

 

 

 

 

 

 

 

access

 

 

 

access

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

: VIH or VIL

 

 

 

Figure 2-13 Sequential Read (3) Timing Diagram

 

 

 

 

 

 

tCLS

 

 

 

 

 

 

 

 

 

 

 

CLE

tCLS

tCLH

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tCS

 

 

 

 

 

 

 

 

 

 

 

CE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tCH

 

 

 

 

 

 

 

 

 

 

 

 

WE

 

tALH

 

 

 

 

tALH

 

 

 

 

 

 

 

 

 

tALS

 

 

 

tALS

 

 

 

tProg

 

 

 

 

 

 

 

 

 

 

 

tWB

 

 

 

ALE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

RE

tDS tDH

tDS tDH

 

 

 

tDS

 

 

 

 

tDS

 

 

 

 

 

 

 

tDH

 

 

 

 

tDH

 

I/O1

80H

A0 to

A9 to

A17 to A25 to

 

 

 

10H

70H

Status

to I/O8

7

16

24

26

 

 

 

output

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DIN0

DIN1

DIN527

 

 

 

R/B

 

 

 

 

 

 

 

 

 

 

 

 

 

 

: Do not input data while data is being output. : VIH or VIL

Figure 2-14 Auto-Program Operation Timing Diagram

SmartMedia 128MByte Product Manual Rev. 1.2 © 2001 SANDISK CORPORATION

17

SmartMedia 128MByte Product Manual

CLE

tCLS

 

 

 

 

tCS

 

tCLH

 

 

tCLS

 

 

 

CE

 

 

 

WE

 

 

 

 

 

 

tALS

ALE

 

 

 

RE

 

 

 

 

 

tDS tDH

 

I/O1

 

60H

A9 to

to 8

 

A16

 

 

R/B

 

Auto Block

 

 

 

Erase Setup

 

 

command

tALH

 

 

 

 

tWB

 

tBERASE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

A17 to

A25 to

D0H

70H

Status

A24

A26

output

 

 

Erase Start

Busy

Status Read

command

 

command

Figure 2-15 Auto Block Erase Timing Diagram

18

SmartMedia 128MByte Product Manual Rev. 1.2 © 2001 SANDISK CORPORATION

SmartMedia 128MByte Product Manual

tCLS

CLE

tCLS

tCLH

 

 

 

 

 

 

 

 

tCS

 

CE

 

 

 

 

 

tCS

tCH

 

 

WE

 

tALH

 

 

 

 

tALS

 

ALE

 

 

 

 

RE

 

 

 

 

 

tDS tDH

tDS tDH

 

I/O1

 

80H

A0 to

A9 to

to I/O8

 

A7

A16

 

 

R/B

 

 

 

 

1

tALH

tDBSY

tALS

tWB

 

tDS

 

 

 

 

 

tDH

 

 

 

 

A17 to

A25 to

 

11H

80H

A0 to

A24

A26

 

A7

 

 

 

 

DIN0

DIN1

DIN527

 

 

: VIH or VIL

Auto Program (Dummy)

Max 3 Times Repeat

Last District Input

2

31 Times Repeat

(Page 0 to 30 Programming in Multi Block)

Max 4 Blocks Programming

Figure 2-16 Multi Block Programming Timing

SmartMedia 128MByte Product Manual Rev. 1.2 © 2001 SANDISK CORPORATION

19

SmartMedia 128MByte Product Manual

 

 

 

 

 

 

tCLS

 

 

 

 

 

 

CLE

tCLS

tCLH

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tCS

 

 

 

 

 

 

CE

 

 

 

 

 

 

 

 

 

 

 

tCH

 

 

 

 

 

 

 

WE

 

tALH

 

 

 

tALH

 

 

 

 

 

tALS

 

 

tALS

 

tMBPBSY

 

 

 

 

 

 

 

 

ALE

 

 

 

 

 

 

 

 

 

RE

 

 

 

 

 

tDS

 

 

 

 

tDS tDH

 

 

 

tDH

 

 

 

I/O1

 

80H

A0 to

A9 to

A17 to A25 to

15H

80H

A0 to

to I/O8

 

7

16

24

26

A7

 

 

 

 

DIN0 DIN1 DIN527

R/B

 

 

 

: VIH or VIL

 

 

 

 

 

 

 

 

 

Auto Program

 

 

 

 

 

 

 

 

 

Max 3

 

 

 

: Do not input data while data is being output.

(multi block program)

 

 

 

 

 

 

 

 

 

 

Times

 

 

 

 

 

 

 

 

 

 

Repeat

 

 

 

Last District Input

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2

 

 

 

 

 

 

3

Max 3

 

 

 

 

31 Times Repeat

 

 

 

 

 

Times

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Repeat

 

 

 

 

(Page 0 to 30 Programming in Multi Block)

 

 

 

 

Max 4 Blocks Programming

 

 

 

 

 

 

Figure 2-16 Multi Block Programming Timing (continued)

20

SmartMedia 128MByte Product Manual Rev. 1.2 © 2001 SANDISK CORPORATION

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