SanDisk SDSDB-16, SDSDJ-32, SDSDJ-64, SDSDJ-128, SDSDJ-256 Product Manual

SanDisk SD Card

Product Manual

Version 2.2

Document No. 80-13-00169

November 2004

Corporate Headquarters • 140 Caspian Court • Sunnyvale, CA 94089

SanDisk Corporation

Phone [phone] • Fax [phone]

www.sandisk.com

Revision 2.2 SanDisk SD Card Product Manual

®

SanDisk

Corporation general policy does not recommend the use of its products in life support applications where in a failure
or malfunction of the product may directly threaten life or injury. Per SanDisk Terms and Conditions of Sale, the user of SanDisk
products in life support applications assumes all risk of such use and indemnifies SanDisk against all damages. See “Disclaimer
of Liability.”

This document is for information use only and is subject to change without prior notice. SanDisk Corporation assumes no
responsibility for any errors that may appear in this document, nor for incidental or consequential damages resulting from the
furnishing, performance or use of this material. No part of this document may be reproduced, transmitted, transcribed, stored in
a retrievable manner or translated into any language or computer language, in any form or by any means, electronic,
mechanical, magnetic, optical, chemical, manual or otherwise, without the prior written consent of an officer of SanDisk
Corporation.

All parts of the SanDisk documentation are protected by copyright law and all rights are reserved.

SanDisk and the SanDisk logo are registered trademarks of SanDisk Corporation. CompactFlash is a U.S. registered trademark
of SanDisk Corporation.

Product names mentioned herein are for identification purposes only and may be trademarks and/or registered trademarks of
their respective companies.

© 2004 SanDisk Corporation. All rights reserved.

SanDisk products are covered or licensed under one or more of the following U.S. Patent Nos. 5,070,032; 5,095,344; 5,168,465;
5,172,338; 5,198,380; 5,200,959; 5,268,318; 5,268,870; 5,272,669; 5,418,752; 5,602,987. Other U.S. and foreign patents
awarded and pending.

Lit. No. 80-13-00169 Rev. 2.2 119/04 Printed in U.S.A.

Revision History
June 2001 Revision 1.0—initial release; Product Rev. n/a
Nov 2001 Revision 1.1—minor editorial and technical changes; Product Rev. n/a
June 2002 Revision 1.2—minor editorial and technical changes; Product Rev. n/a
July 2002 Revision 1.3—minor editorial and technical changes; Product Rev. n/a
Nov 2002 Revision 1.4—minor editorial change; Product Rev. n/a
Mar 2003 Revision 1.5—changed power requirements in Section 2.3, Table 2.3; updated addresses in Appendix A;

adjusted footers and front matter; Product Rev. n/a

Aug 2003 Revision 1.6—added 512- and 1024-Mb capacities; updated Limited Warranty appendix; added Disclaimer

of Liability appendix; Product Rev. n/a
Sept 2003 Revision 1.7—minor revisions; added appnote as Appendix A; Product Rev. n/a
Nov 2003 Revision 1.8—changed VDD r/w values in Section 2 and Table 3-10; Product Rev. n/a
Dec 2003 Revision 1.9—changed VDD r/w values in Table 3-10; Product Rev. n/a
Jan 2004 Revision 2.0—changed value in Section 2.4 and 1.5.10.6; Product Rev. n/a
Apr 2004 Revision 2.1—added two additional part numbers; Product Rev.# 55
Oct/Nov 2004 Revision 2.2—added new performance info; command 6; added 2GB capacity; revised Hong Kong address;

moved application note to App E; updated all sections to reflect SD Phys Spec v1.10 info; Product Rev.# 57

© 2004 SanDisk Corporation i

Revision 2.2 SanDisk SD Card Product Manual

TABLE OF CONTENTS

1. Introduction...................................................................................................1-1

1.1 General Description................................................................................1-1

1.2 Features...................................................................................................1-2

1.3 SD Card Standard...................................................................................1-2

1.4 Functional Description............................................................................1-3

1.5 Independent Flash Technology ...............................................................1-3

1.6 Defect and Error Management................................................................1-3

1.7 Copyright Protection...............................................................................1-4

1.8 Endurance...............................................................................................1-4

1.9 Wear Leveling......................................................................................... 1-4

1.10 Automatic Sleep Mode ..........................................................................1-4

1.11 Hot Insertion..........................................................................................1-5

1.12 SD Card—SD Bus Mode.......................................................................1-5

1.13 SPI Mode...............................................................................................1-9

2. Product Specifications...................................................................................2-1

2.1 Overview ................................................................................................2-1

2.2 System Environmental Specifications ....................................................2-1

2.3 Reliability and Durability .......................................................................2-1

2.4 Typical Card Power Requirements .........................................................2-2

2.5 System Performance...............................................................................2-2

2.6 System Reliability and Maintenance ......................................................2-2

2.7 Physical Specifications ...........................................................................2-3

2.8 Capacity Specifications ..........................................................................2-5

3. SD Card Interface Description ...................................................................... 3-1

3.1 General Description of Pins and Registers ............................................. 3-1

3.2 SD Bus Topology.................................................................................... 3-3

3.3 SPI Bus Topology ................................................................................... 3-5

3.4 Electrical Interface..................................................................................3-6

3.5 SD Card Registers ................................................................................3-11

3.6 Data Interchange Format and Card Sizes..............................................3-23

4. SD Card Protocol Description.......................................................................4-1

4.1 SD Bus Protocol ..................................................................................... 4-1

4.2 Functional Description............................................................................4-4

4.3 Card Identification Mode........................................................................4-4

4.4 Data Transfer Mode................................................................................4-7

4.5 Clock Control .......................................................................................4-26

4.6 Cyclic Redundancy Codes....................................................................4-27

4.7 Error Conditions ................................................................................... 4-28

4.8 Commands............................................................................................ 4-29

4.9 Card State Transition ............................................................................4-37

4.10 Timing Diagrams ................................................................................. 4-41

4.11 Data Read.............................................................................................4-42

4.12 Data Write............................................................................................ 4-43

4.13 Timing Values......................................................................................4-45

5. SPI Protocol ..................................................................................................5-1

5.1 SPI Bus Protocol.....................................................................................5-1

5.2 Mode Selection.......................................................................................5-1

5.3 Bus Transfer Protection ..........................................................................5-2

5.4 Data Read ...............................................................................................5-2

© 2004 SanDisk Corporation ii

Revision 2.2 SanDisk SD Card Product Manual

5.5 Data Write...............................................................................................5-3

5.6 Erase and Write Protect Management.....................................................5-4

5.7 Read CID/CSD Registers .......................................................................5-5

5.8 Reset Sequence.......................................................................................5-5

5.9 Clock Control .........................................................................................5-5

5.10 Error Conditions .................................................................................... 5-6

5.11 Memory Array Partitioning....................................................................5-7

5.12 Card Lock/Unlock .................................................................................5-7

5.13 Application-specific Commands............................................................5-7

5.14 Copyright Protection Commands...........................................................5-7

5.15 Switch Function Command ...................................................................5-7

5.16 High-speed Mode (25MB/sec interface speed)......................................5-7

5.17 SPI Command Set..................................................................................5-8

5.18 Responses ............................................................................................5-12

5.19 Data Tokens .........................................................................................5-14

5.20 Data Error Token .................................................................................5-15

5.21 Clearing Status Bits .............................................................................5-15

5.22 Card Registers......................................................................................5-17

5.23 SPI Bus Timing Diagrams ................................................................... 5-17

5.24 Timing Values......................................................................................5-19

5.25 SPI Electrical Interface........................................................................5-20

5.26 SPI Bus Operating Conditions.............................................................5-20

5.27 Bus Timing ..........................................................................................5-20

Appendix A Ordering Information...............................................................A-1

Appendix B SanDisk Worldwide Sales Offices........................................... B-1

Appendix C Limited Warranty..................................................................... C-1

Appendix D Disclaimer of Liability............................................................D-1

Appendix E Application Note...................................................................... E-1

© 2004 SanDisk Corporation iii

Chapter 1 – Introduction
Revision 2.2 SanDisk SD Card Product Manual

1 Introduction

1.1 General Description

The SanDisk Secure Digital (SD) Card is a flash-based memory card specifically designed
to meet the security, capacity, performance and environmental requirements inherent in
next generation mobile phones and consumer electronic devices. The SanDisk SD Card
includes a copyright protection mechanism that complies with the security of the SDMI
standard, and is faster and capable of higher memory capacity. The SD Card security
system uses mutual authentication and a “new cipher algorithm” to protect against illegal
usage of the card content. Unsecured access to the user‘s own content is also available. The
physical form factor: pin assignment and data transfer protocol, with some additions, are
forward compatible with the SD Card.

SanDisk SD Card communication is based on an advanced nine-pin interface (clock,
command, 4xData and 3xPower lines) designed to operate in a low voltage range. The
communication protocol is defined as part of this specification. The SD Card host interface
supports regular MultiMediaCard operation as well. In other words, MultiMediaCard
forward compatibility was kept. The main difference between the SD Card and
MultiMediaCard is the initialization process. Matsushita Electric Company (MEI), Toshiba
Corporation, and SanDisk Corporation defined the SD Card Specification originally.
Currently, the Secure Digital Association (SDA) controls the specifications. The SanDisk
SD Card was designed to be compatible with the SD Card Physical Specification.

The SD Card Interface allows for easy integration into any design, regardless of
microprocessor used. For compatibility with existing controllers, the SanDisk SD Card
offers, in addition to the SD Card Interface, an alternate communication protocol based on
the SPI standard.

Currently, the SanDisk SD Card provides up to 1024 million bytes of memory using flash
memory chips, which were designed especially for use in mass storage applications. In
addition to the mass storage specific flash memory chip, the SD Card includes an on-card
intelligent controller which manages interface protocols, security algorithms for copyright
protection, data storage and retrieval, as well as Error Correction Code (ECC) algorithms,
defect handling and diagnostics, power management and clock control.

Figure 1-1 SanDisk SD Card Block Diagram

SD Bus/SPI Bus

Interface

SanDisk

Single Chip

Controller

Data In/Out

Control

Flash

Modules

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SanDisk SD Card

Chapter 1 – Introduction
Revision 2.2 SanDisk SD Card Product Manual

1.2 Features

SanDisk SD Card features include:

►Up to 2-GB of data storage

►SD-protocol compatible

►Supports SPI mode

► Targeted for portable and stationary applications for secured (copyrights protected) and

unsecured data storage

►Voltage range

Basic communication (CMD0, CMD15, CMD55, ACMD41): 2.0 to 3.6V

Other commands and memory access: 2.7 to 3.6V

Variable clock rate 0-25 MHz (default), 0-50MHz (high-speed)

►

►Data transfer rate

Up to 50 MB/sec data transfer rate (using 4 parallel data lines)

Maximum data rate with up to 10 cards

►Correction of memory-field errors

►Copyrights Protection mechanism

Complies with highest security of SDMI standard

►Password-protection (specific models only)

►Write Protect using mechanical switch

►Built-in write protection features (permanent and temporary)

►Card detection (Insertion/Removal)

►Application-specific commands

►Comfortable erase mechanism

1.3 SD Card Standard

SanDisk SD cards are fully compatible with the SD Card Physical Layer System
Specification, Version 1.10. This specification is available from the SD Card Association.

SD Association

719 San Benito St., Suite C
Hollister, CA 95023 USA
Phone: [phone]
FAX: [phone]
E-mail: [e-mail]
URL: http://www.sdcard.org

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Revision 2.2 SanDisk SD Card Product Manual

1.4 Functional Description

SanDisk SD cards contain a high-level, intelligent subsystem as shown in Figure 1-1. This
intelligent (microprocessor) subsystem provides many capabilities not found in other types
of memory cards. These capabilities include:

• Host independence from details of erasing and programming flash memory

• Sophisticated system for managing defects (analogous to systems found in magnetic

disk drives)

• Sophisticated system for error recovery including a powerful error correction code

(ECC)

• Power management for low-power operation

1.5 Independent Flash Technology

The 512-byte sector size of the SanDisk SD Card is the same as that in an IDE magnetic
disk drive. To write or read a sector (or multiple sectors), the host computer software
simply issues a read or write command to the SD Card. This command contains the
address. The host software then waits for the command to complete. The host software
does not get involved in the details of how the flash memory is erased, programmed or
read. This is extremely important as flash devices are expected to get increasingly complex
in the future. Because the SD Card uses an intelligent on-board controller, the host system
software will not require changing as new flash memory evolves. In other words, systems
that support the SD Card today will be able to access future SD cards built with new flash
technology without having to update or change host software.

1.6 Defect and Error Management

SanDisk SD cards contain a sophisticated defect-and-error management system. This
system is analogous to the systems found in magnetic disk drives and in many cases offers
enhancements. For instance, disk drives do not typically perform a read after write to
confirm the data is written correctly because of the performance penalty that would be
incurred. SD cards do a read after write under margin conditions to verify that the data is
written correctly. In the rare case that a bit is found to be defective, SD cards replace this
bad bit with a spare bit within the sector header. If necessary, SD cards will even replace
the entire sector with a spare sector. This is completely transparent to the host and does not
consume any user data space.

The SD Card’s soft error rate specification is much better than the magnetic disk drive
specification. In the extremely rare case a read error does occur, SD cards have innovative
algorithms to recover the data. This is similar to using retries on a disk drive but is much
more sophisticated. The last line of defense is to employ a powerful ECC to correct the
data. If ECC is used to recover data, defective bits are replaced with spare bits to ensure
they do not cause any future problems. These defect and error management systems
coupled with the solid-state construction give SD cards unparalleled reliability.

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Revision 2.2 SanDisk SD Card Product Manual

1.7 Copyright Protection

A detailed description of the Copyright Protection mechanism and related security SD Card
commands can be found in the SD Security Specification from the SD Association. All SD
Card security-related commands operate in the data transfer mode.

As defined in the SDMI specification, data content saved in the card is already encrypted
and passes transparently to and from the card. No operation is done on the data and there is
no restriction to read the data at any time. Associated with every data packet (e.g., a song)
that is saved in the unprotected memory, there is special data that is saved in a protected
memory area for any access (Read, Write or Erase command) to or from the data in the
protected area.

For an authentication procedure is done between the card and the connected device, either
the LCM (PC for example) or the PD (portable device, such as SD player). After the
authentication process passes, the card is ready to accept or give data from/to the connected
device. While the card is in the secured mode of operation (after the authentication
succeeded) the argument and the associated data that is sent to the card or read from the
card are encrypted. At the end of the Read, Write or Erase operation, the card gets out
automatically of its secured mode.

1.8 Endurance

SanDisk SD cards have an endurance specification for each sector of 100,000 writes typical
(reading a logical sector is unlimited). This far exceeds what is typically required in almost
all SD Card applications. Therefore, extremely heavy use of the card in cellular phones,
personal communicators, pagers and voice recorders will use only a fraction of the total
endurance over the device’s lifetime. For instance—it would take over 10 years to wear out
an area on an SD Card based on a file of any size (from 512 bytes to maximum capacity)
being rewritten 3 times per hour, 8 hours a day, 365 days per year.

With typical applications, the endurance limit is not of any practical concern to the vast
majority of users.

1.9 Wear Leveling

Wear leveling is an intrinsic part of the erase pooling functionality of the SD Card, using
NAND memory. The Wear Level command is supported as a NOP operation to maintain
backward compatibility with existing software utilities.

1.10 Automatic Sleep Mode

A unique feature of the SanDisk SD Card is automatic entrance and exit from sleep mode.
Upon completion of an operation, the card enters the sleep mode to conserve power if no
further commands are received in less than five milliseconds (ms). The host does not have
to take any action for this to occur. However, in order to achieve the lowest sleep current,
the host needs to shut down its clock to the card. In most systems, the SD card is in sleep
mode except when the host is accessing it, thus conserving power.

When the host is ready to access the card in sleep mode, any command issued to it will
cause it to exit sleep, and respond.

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Revision 2.2 SanDisk SD Card Product Manual

1.11 Hot Insertion

Support for hot insertion will be required on the host but will be supported through the
connector. Connector manufacturers will provide connectors that have power-pins long
enough to be powered before contact is made with the other pins. This approach is similar
to that used in PCMCIA and MMCA devices to allow for hot insertion.

1.12 SD Card—SD Bus Mode

The following sections provide valuable information on the SD Card in SD Bus mode.

1.12.1 SD Card Standard Compliance

The SD Card is fully compliant with SD Card Physical Layer Standard Specification v1.10.
The structure of the Card Specific Data (CSD) register is compliant with CSD Structure

1.0.

1.12.2 Negotiating Operating Conditions

The SD Card supports the operation condition verification sequence defined in the SD Card
standard specifications. Should the SD Card host define an operating voltage range, which
is not supported by the SD Card it will put itself in an inactive state and ignore any bus
communication. The only way to get the card out of the inactive state is by powering it
down and up again.

In Addition the host can explicitly send the card to the inactive state by using the
GO_INACTIVE_STATE command.

1.12.3 Card Acquisition and Identification

The SD Card bus is a single master (SD Card host application) and a multi-slaves (cards)
bus. The Clock and Power lines are common to all cards on the bus. During the
identification process, the host accesses each card separately through its own command
lines. The SD Card’s CID Register is pre-programmed with a unique card identification
number, which is used during the identification procedure.

In addition, the SD Card host can read the card’s CID Register using the READ_CID
command. The CID Register is programmed during the SD Card testing and formatting
procedure, on the manufacturing floor. The SD Card host can only read, and not write, this
register.

An internal pull-up resistor on the DAT3 line may be used for card detection
(insertion/removal). The resistor can be disconnected during data transfer (using
ACMD42). Additional practical card detection methods can be found in SD Physical
Specification’s application notes given by the SDA.

1.12.4 Card Status

The card status is separated into the following two fields:

• Card Status is stored in a 32-bit status register that is sent as a data field in the card

response to host commands. The Status Register provides information about the card’s
current state and completion codes for the last host command. The card status can be
explicitly read (polled) with the SEND_STATUS command.

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• SD Status is stored in 512 bits that are sent as a single data block after it was requested

by the host using the SD_STATUS (ACMD13) command. SD_STATUS contains
extended status bits that relate to BUS_WIDTH, security related bits and future
specific applications.

1.12.5 Memory Array Partitioning

The basic unit of data transfer to/from the SanDisk SD Card is one byte. All data transfer
operations that require a block size always define block lengths as integer multiples of
bytes. Some special functions need other partition granularity. Figure 1-2 shows the
Memory Array Partitioning.

For block-oriented commands, the following definition is used:

• Block—A unit related to block-oriented read and write commands. Its size is the

number of bytes that are transferred when one block command is sent by the host. The
size of a block is either programmable or fixed; information about allowed block sizes
and the programmability is stored in the CSD Register.

The granularity of the erasable units is, in general, not the same as for the block-oriented
commands:

• Sector—A unit related to the erase commands. Its size is the number of blocks that are

erased in one portion. The size of a sector is fixed for each device. The information
about the sector size (in blocks) is stored in the CSD Register.

For devices that include write protection, the following definition is used:

• WP Group—A minimal unit that may have individual write protection. Its size is the

number of groups to be write protected by one bit. The size of a WP group is fixed for
each device. The information about the size is stored in the CSD Register.

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Revision 2.2 SanDisk SD Card Product Manual

Figure 1-2 Memory Array Partitioning

SanDisk SD Memory Card

WP Group 0

Bloc

Bloc

Bloc

Sector 1

Sector 2

Sector 3

Sector n

WP Group 1

WP Group 2

k 0

k 1

Bloc

k 2

k n

Table 1-1 Memory Array Structures Summary

Part No. Block

(Bytes)

SDSDH-2048 512 4,011,520 40,448 3,971,072

SDSDJ-2048 512 4,011,520 40,448 3,971,072

SDSDX3-1024 512 2,004,480 20,480 1,984,000

SDSDH-1024 512 2,004,480 20,480 1,984,000

SDSDJ-1024 512 2,004,480 20,480 1,984,000

SDSDH-512 512 1,001,216 10,240 990,976

SDSDJ-512 512 1,001,216 10,240 990,976

SDSDH-256 512 499,456 5,376 494,080

SDSDJ-256 512 499,456 5,376 494,080

SDSDJ-128 512 248,640 2,624 246,016

SDSDJ-64 512 123,232 1,376 121,856

1

All measurements are in units per card.

2

The part of the card that relates to the secured copyright management and has separate DOS partitioning

including sectors and blocks. The card write-protection mechanism does not affect this area.

Protected Area (Copyright Protection)

Data Area +

Size

Protected size

(Blocks)

Sector 1

Sector n

Bloc

Bloc

Bloc

k 0

k 1

1

Bloc

k 2

k n

Protected Area2 size

(Blocks)

User Area

(Blocks0

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Revision 2.2 SanDisk SD Card Product Manual

Part No. Block

Size

(Bytes)

SDSDJ-32 512 60,512 736 59,776

SDSDB-16 512 29,152 352 28,800

1.12.6 Read/Write Operations

The SD Card supports two read/write modes as shown in Figure 1-3 and defined in Table
1-2.

Figure 1-3 Data Transfer Formats

Single Block Mode

Memory
Sectors

Memory
Sectors

Memory
Sectors

Start Address

(Read)

Memory

Sectors

Start Address

Data Area +

Protected size

(Blocks)

Memory
Sectors

Memory

Sectors

Start Address

(Write)

Multiple Block Mode

Memory

Sectors

Memory
Sectors

Write

Protected Area2 size

(Blocks)

Misalignment Error

Memory

Sectors

Start Address

(Read/Write)

Memory
Sectors

Stop Start

Memory

Sectors

Memory

Sectors

Read

User Area

(Blocks0

Memory

Sectors

Memory

Sectors

Stop

Table 1-2 Mode Definitions

Mode Description

Single Block In this mode the host reads or writes one data block in a pre-specified length. The

data block transmission is protected with 16-bit CRC that is generated by the
sending unit and checked by the receiving unit.

The block length for read operations is limited by the device sector size (512 bytes)
but can be as small as a single byte. Misalignment is not allowed. Every data block
must be contained in a single physical sector.

The block length for write operations must be identical to the sector size and the
start address aligned to a sector boundary.

Multiple Block This mode is similar to the single block mode, except for the host can read/write

multiple data blocks (all have the same length) that are stored or retrieved from
contiguous memory addresses starting at the address specified in the command.
The operation is terminated with a stop transmission command.

Misalignment and block length restrictions apply to multiple blocks and are identical
to the single block read/write operations.

1.12.7 Data Transfer Rate

The SD Card can be operated using either a single data line (DAT0) or four data lines
(DAT0-DAT3) for data transfer. The maximum data transfer rate for a single data line is 50­Mb per second, and 200-Mb (25 MB) per second using four data lines.

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1.12.8 Data Protection in the Flash Card

Every sector is protected with an error correction code (ECC). The ECC is generated (in
the memory card) when the sectors are written and validated when the data is read. If
defects are found, the data is corrected prior to transmission to the host.

1.12.9 Write Protection

Two-card level write-protection options are available: permanent and temporary. Both can
be set using the PROGRAM_CSD command (refer to CSD Programming). The permanent
write-protect bit, once set, cannot be cleared. This feature is implemented in the SD Card
controller firmware and not with a physical OTP cell.

Use the Write Protect (WP) Switch located on the card’s side edge to prevent the host from
writing to or erasing data on the card. The WP switch does not have any influence on the
internal Permanent or Temporary WP bits in the CSD Register.

1.12.10 Copy Bit

The copy bit can be used to mark an SD Card content as an original or a copy. The copy
bit of the card is programmed as a copy when testing and formatting are performed during
manufacturing. When set, the copy bit in the CSD Register is a copy and cannot be cleared.

The card is available with the copy-bit set or cleared. If the bit is set, it indicates that the
card is a master. This feature is implemented in the card’s controller firmware and not with
a physical OTP cell.

1.12.11 CSD Register

All SD Card configuration information is stored in the CSD Register. The MSB bytes of
the register contain manufacturer data and the two least significant bytes contain the host­controlled data: the card copy/write protection, and the user file format.

The host can read the CSD Register and alter the host-controlled data bytes using the
SEND_CSD and PROGRAM_CSD commands.

1.13 SPI Mode

The SPI mode is a secondary communication protocol for SD cards. This mode is a subset
of the SD Protocol, designed to communicate with an SPI channel, commonly found in
Motorola and other vendors’ microcontrollers.

Table 1-3 SPI Mode

Function Description

Negotiating Operating Conditions The operating condition negotiation function of the SD Card bus

Card Acquisition and Identification The host must know the number of cards currently connected on

is supported differently in SPI mode by using the READ_OCR
(CMD58) command. The host works within the valid voltage
range (2.7 to 3.6 v) of the card or put the card in inactive state
by sending a GO_INACTIVE command to the card.

the bus. Specific card selection is done via the CS signal
(CD/DAT3). The internal pull-up resistor on the CD/DAT3 line
may be used for card detection (insertion/removal). Additional
practical card detection methods can be found in SD Physical
Specification’s Application Notes given by the SDA.

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Revision 2.2 SanDisk SD Card Product Manual

Function Description

Card Status In SPI mode, only 16 bits containing errors relevant to SPI mode

Memory Array Partitioning Memory partitioning in SPI mode is equivalent to SD mode. All

Read/Write Operations In SPI mode, single and multiple block data transfers are

Data Transfer Rate Same as in SD mode.

Data Protection in the SD Card Same as in SD mode.

Erase Same as in SD mode.

Write Protection Same as in SD mode.

Copyright Protection Same as in SD mode.

can be read out of the 32-bit Status Register. The SD_STATUS
can be read using ACMD13, the same as in SD mode.

read and write commands are byte addressable.

supported.

© 2004 SanDisk Corporation 1-10 12/08/04

Chapter 2 – Product Specifications
Revision 2.2 SanDisk SD Card Product Manual

2 Product Specifications

2.1 Overview

In this section, all values are defined at an ambient temperature and nominal supply voltage
unless otherwise stated.

2.2 System Environmental Specifications

Table 2-1 defines the environmental specifications for the SanDisk SD Card.

Table 2-1 Environmental Specification Summary

Operating -25° C to 85° C Temperature

Non-operating -40° C to 85° C

Operating 25% to 95%, non condensing Humidity

Non-operating 25% to 95%, non condensing

ESD Protection

Contact Pads +/- 4kV, Human body model

according to ANSI EOS/ESD-S5.1­1998

Non Contact Pad Area +/- 8kV (coupling plane discharge)

+/- 15kV (air discharge)
Human body model per IEC61000­4-2.

2.3 Reliability and Durability

Table 2-2 Reliability and Durability Specifications

Durability 10,000 mating cycles

Bending 10N

Tor que 0.15N.m or ±2.5 deg.

Drop Test 1.5m free fall

UV Light Exposure UV: 254nm, 15Ws/cm2 according to ISO 7816-1

Visual Inspection/Shape and Form No warpage; no mold skin; complete form; no

Minimum Moving Force of WP Switch 40 gf (ensures that the WP switch will not slide while it

WP Switch Cycles Minimum 1,000 Cycles @ slide force 0.4N to 5N

cavities; surface smoothness ≤ -0.1 mm/cm2 within
contour; no cracks; no pollution (oil, dust, etc.)

is inserted in the connector).

© 2004 SanDisk Corporation 2-1 12/08/04

Chapter 2 – Product Specifications
Revision 2.2 SanDisk SD Card Product Manual

2.4 Typical Card Power Requirements

Table 2-3 Card Power Requirements (Ta=25°C@3.0V)

VDD (ripple: max, 60mV peak-to-peak) 2.7 V – 3.6 V

Value Measurement Average

Sleep 250 uA Max

Read 65 mA Max

Write 75 mA Max

2.5 System Performance

All performance values for the SD Card in Table 2-4 are under the following conditions:

• Voltage range 2.7 V to 3.6 V

• Temperature -25° C to 85° C

• Independent of the SD Card clock frequency

Table 2-4 System Performance

Timing Typical Maximum

Block Read Access Time

Block Write Access Time

CMD1 to Ready after
Power-up

Sleep to Ready 1 ms 2 ms

0.5 ms 100 ms

0.5 ms 250 ms

50 ms 500 ms

2.6 System Reliability and Maintenance

Table 2-5 Reliability and Maintenance Specifications

MTBF >1,000,000 hours

Preventative Maintenance None

Data Reliability <1 non-recoverable error in 1014 bits read

Endurance 100,000 write and erase cycles (typical)

© 2004 SanDisk Corporation 2-2 12/08/04

Chapter 2 – Product Specifications
Revision 2.2 SanDisk SD Card Product Manual

2.7 Physical Specifications

Refer to Table 2-6 and Figure 2-1 for SD card’s physical specifications and dimensions.

Table 2-6 SD Memory Card Physical Specification Summary

Specification SD Card

Weight 2.0 g. maximum

Length 32 mm ± 0.1 mm

Width 24 mm ± 0.1 mm

Thickness 2.1 mm ± 0.15 mm (in substrate area only, 2.25 mm maximum)

Figure 2-1 SD Memory Card Dimensions (Bottom View)

© 2004 SanDisk Corporation 2-3 12/08/04

Chapter 2 – Product Specifications
Revision 2.2 SanDisk SD Card Product Manual

Figure 2-2 SD Memory Card Dimensions

© 2004 SanDisk Corporation 2-4 12/08/04

Chapter 2 – Product Specifications
Revision 2.2 SanDisk SD Card Product Manual

Figure 2-3 SD Memory Card Dimensions (Top View)

2.8 Capacity Specifications

Table 2-7 shows the specific capacity for the various models.

Table 2-7 Model Capacity Summary

Model No. Capacity

SDSDB-16 16 MB

SDSDJ-32 32 MB

SDSDJ-64 64 MB

SDSDJ-128 128 MB

SDSDJ-256 256 MB

SDSDH-256 256 MB

SDSDJ-512 512 MB

SDSDH-512 512 MB

© 2004 SanDisk Corporation 2-5 12/08/04

Chapter 2 – Product Specifications
Revision 2.2 SanDisk SD Card Product Manual

Model No. Capacity

SDSDJ-1024 1024 MB

SDSDH-1024 1024 MB

SDSDX3-1024 1024 MB

SDSDJ-2048 2048 MB

SDSDH-2048 2048 MB

© 2004 SanDisk Corporation 2-6 12/08/04

Chapter 3 – SD Card Interface Description
Revision 2.2 SD Card Product Manual

3 SD Card Interface Description

3.1 General Description of Pins and Registers

The SanDisk SD Card has nine exposed contacts on one side as shown in Figure 3-1. The
host is connected to the card using a dedicated 9-pin connector.

Table 3-1 SD Card Pad Assignment

Pin No. Name Type1 Description

SD Mode

1 CD/DAT32 I/O3, PP Card detect/Data line [Bit 3]

2 CMD I/O, PP Command/Response

3 V

4 VDD S Supply voltage

5 CLK I Clock

S Supply voltage ground

SS1

6 V

S Supply voltage ground

SS2

7 DAT0 I/O, PP Data line [Bit 0]

8 DAT1 I/O, PP Data line [Bit 1]

9 DAT2 I/O, PP Data line [Bit 2]

SPI Mode

1 CS I Chip Select (active low)

2 DataIn I Host-to-card Commands and Data

3 V

S Supply voltage ground

SS1

4 VDD S Supply voltage

5 CLK I Clock

6 V

S Supply voltage ground

SS2

7 DataOut O Card-to-host Data and Status

8 RSV4 --- Reserved

9 RSV5 --- Reserved

1

Type Key: S=power supply; I=input; O=output using push-pull drivers; PP=I/O using push-pull drivers

2

The extended DAT lines (DAT1-DAT3) are input on power up. They start to operate as DAT lines after the
SET_BUS_WIDTH command. It is the responsibility of the host designer to connect external pullup resistors to
all data lines even if only DAT0 is to be used. Otherwise, non-expected high current consumption may occur due
to the floating inputs of DAT1 & DAT2 (in case they are not used).

3

After power up, this line is input with 50Kohm(+/-20Kohm) pull-up (can be used for card detection or SPI mode
selection). The pull-up may be disconnected by the user, during regular data transfer, with
SET_CLR_CARD_DETECT (ACMD42) command.

4

The ‘RSV’ pins are floating inputs. It is the responsibility of the host designer to connect external pullup resistors
to those lines. Otherwise non-expected high current consumption may occur due to the floating inputs.

5

Ibid.

© 2004 SanDisk Corporation 3-1 12/08/04

Chapter 3 – SD Card Interface Description
Revision 2.2 SD Card Product Manual

Each card has a set of information registers (refer to Table 3-3). Detailed descriptions are
provided in Section 3.5.

Table 3-2 SD Card Registers

Name Width Description

CID 128 Card identification number: individual card number for identification.

RCA6 16 Relative card address: local system address of a card, dynamically

CSD 128 Card specific data: information about the card operation conditions.

SCR 64 SD Configuration Register: information about the SD Card’s special

OCR 32 Operation Condition Register

suggested by the card and approved by the host during initialization.

features capabilities.

The host may reset the cards by switching the power supply off and on again. The card has
its own power-on detection circuitry that puts the card into an idle state after the power-on.
The GO_IDLE (CMD0) command can also reset the card.

Figure 3-1 SD Card Architecture

© 2004 SanDisk Corporation 3-2 12/08/04

6

The RCA Register is not available in SPI mode.

Chapter 3 – SD Card Interface Description

g

HOST

Revision 2.2 SD Card Product Manual

3.2 SD Bus Topology

The SD Memory Card bus has six communication lines and three supply lines.

• CMD

• DAT0-3

• CLK

• VDD

• VSS[1:2]

The description of each signal is contained in Table 3-3.

Table 3-3 MMC Bus Signal Descriptions

Name Description

CMD Command is a bi-directional signal. Host and card drivers are operating in push-

DAT0-3 Data lines are bi-directional signals. Host and card drivers are operating in push-

CLK Clock is a host to card signal. CLK operates in push-pull mode.

VDD Power supply line for all cards.

VSS [1:2] Two

pull mode.

pull mode.

round lines.

Figure 3-2 shows the bus topology of several cards with one host in SD Bus mode.

Figure 3-2 SD Card System Bus Topology

CLK

Vdd
Vss

D0-3(A),
CMD(A)

D0-3(B),
CMD(B)

D0-3(C)
CMD(C)

D0-D3, CMD

D0-D3, CMD

D0, CS, CMD

CLK

Vdd
Vss

CLK

Vdd
Vss

CLK

Vdd
Vss

SD Memory

Card (A)

SD Memory

Card (B)

MultiMediaCard

(C)

D1&D2 Not

Connected

© 2004 SanDisk Corporation 3-3 12/08/04

Chapter 3 – SD Card Interface Description
Revision 2.2 SD Card Product Manual

During the initialization process, commands are sent to each card individually, allowing the
application to detect the cards and assign logical addresses to the physical slots. Data is
always sent to each card individually. However, to simplify the handling of the card stack,
after initialization, all commands may be sent concurrently to all cards. Addressing
information is provided in the command packet.

The SD bus allows dynamic configuration of the number of data lines. After power-up, by
default, the SD Card will use only DAT0 for data transfer. After initialization, the host can
change the bus width (number of active data lines). This feature allows and easy trade off
between hardware cost and system performance.

Figure 3-3 Bus Circuitry Diagram

SD

Memory

Card

Host

R

DAT

and R

are pull-up resistors protecting the CMD and DAT line against bus floating

CMD

when no card is inserted or all card drivers are in a hi-impedance mode.

R

is used for the Write Protect Switch. See Section 5.4.2 for the component values and

WP

conditions.

3.2.1 Hot Insertion and Removal

Hot insertion and removal are allowed; inserting or removing the SD Card to or from the
bus will not damage the card. This also applies when the power is up.

• The inserted card will be properly reset when CLK carries a clock frequency (f

• Data transfer failures induced by removal/insertion should be detected by the bus

master using the CRC codes that suffix every bus transaction.

R

DAT

R

C1C

CMD

R

DAT0-3

2 C

WP

Write Protect

CMD

3

1 2 3 4 5 6 7 8

9

Vss

SD Memory

Card

CLK

).

pp

3.2.2 Power Protection

Cards can be inserted or removed to and from the bus without damage, however if one of
the supply pins (V
line to supply the card.

Data transfer operations are protected by CRC codes; therefore, the SD bus master can
detect any bit changes induced by card insertion and removal. Also, the inserted card must
be properly reset when CLK carries a clock frequency f

If the hot insertion feature is implemented in the host, the host must withstand a shortcut
between V

© 2004 SanDisk Corporation 3-4 12/08/04

DD

or VSS) is not connected properly, the current is drawn through a data

DD

and VSS without damage.

.

PP

Chapter 3 – SD Card Interface Description
Revision 2.2 SD Card Product Manual

3.3 SPI Bus Topology

The SD Card SPI Interface is compatible with SPI hosts available on the market. Similar to
any other SPI device, the SD Card SPI channel consists of the following four signals:

• CS—Host-to-card Chip Select signal

• CLK—Host-to-card Clock signal

• DataIn—Host-to-card Data signal

• DataOut—Card-to-host Data signal

Another SPI common characteristic implemented in the SD Card are byte transfers. All
data tokens are multiples of 8-bit bytes and always byte-aligned to the CS signal. The SPI
standard defines the physical link only and not the complete data transfer protocol. In SPI
bus mode, the SD Card uses a subset of the SD Card protocol and command set.

The SD Card identification and addressing algorithms are replaced by the hardware CS
signal. A card (slave) is selected for every command by asserting the CS signal (active
low). Refer to Figure 3-2.

The CS signal must be continuously active for the duration of the SPI transaction
(command, response and data). The only exception is card-programming time. At this time
the host can de-assert the CS signal without affecting the programming process.

The bi-directional CMD and DAT lines are replaced by unidirectional dataIn and dataOut
signals. This eliminates the ability to execute commands while data is being read or written
which prevents sequential multi read/write operations. The Stop Transmission command
can be sent during data read. In the multi block write operation a Stop Transmission token
is sent as the first byte of the data block.

Figure 3-4 SD Card Bus System

CS

Power Supply

SPI Bus Master

SPI Bus (CLK, DataIn, DataOut)

SPI Card SPI Card

CS

© 2004 SanDisk Corporation 3-5 12/08/04

Chapter 3 – SD Card Interface Description
Revision 2.2 SD Card Product Manual

3.3.1 Power Protection

Same as in SD Card Bus Mode.

3.4 Electrical Interface

The following sections provide valuable information about the electrical interface.

3.4.1 Power Up

The power-up of the SD Card bus is handled locally, in each SD Card and in the bus
master.

Figure 3-5 Power-up Diagram

Supply Voltage

V

max

DD

Bus master supply voltage

V

min

DD

Power-up

Time

Supply Ramp-up

Initialization delay:

the max. of 1 ms,

74 clock cycles

and supply ramp-

Time

Initialization

Sequence

up time

Valid voltage

range for

commands CMD0,

15, 55, and

ACMD41

Timeout value for initialization process = 1 second

ACMD

N

CC

41

ACMD

41

Optional repetitions of ACMD1 until no

cards respond with busy bit set

Logic working level

Valid voltage

range for all

other commands

and memory

access

N

ACMD

CC

41

time

N

CC

CMD2

After power up, including hot insertion (i.e., inserting a card when the bus is operating) the
SD Card enters the idle state. During this state the SD Card ignores all bus transactions
until ACMD41 is received (ACMD command type shall always precede with CMD55).

ACMD41 is a special synchronization command used to negotiate the operation voltage
range and to poll the cards until they are out of their power-up sequence. Besides the
operation voltage profile of the cards, the response to ACMD41 contains a busy flag,
indicating that the card is still working on its power-up procedure and is not ready for
identification. This bit informs the host that the card is not ready. The host has to wait (and
continue to poll the cards, each one on his turn) until this bit is cleared. The maximum
period of power up procedure of single card shall not exceed one second.

Getting individual cards, and the entire SD Card system, out of idle state is up to the
responsibility of the bus master. Since the power up time and the supply ramp up time
depend on application parameters such as the maximum number of SD Card s, the bus
length and the power supply unit, the host must ensure that the power is built up to the
operating level (the same level which will be specified in ACMD41) before ACMD41 is
transmitted.

© 2004 SanDisk Corporation 3-6 12/08/04

Chapter 3 – SD Card Interface Description
Revision 2.2 SD Card Product Manual

After power up, the host starts the clock and sends the initializing sequence on the CMD
line. This sequence is a contiguous stream of logical ‘1’s. The sequence length is the
maximum of 1msec, 74 clocks or the supply-ramp-up-time; the additional 10 clocks (over
the 64 clocks after what the card should be ready for communication) is provided to
eliminate power-up synchronization problems.

Every bus master shall have the capability to implement ACMD41 and CMD1. CMD1 will
be used to ask MultiMediaCards to send their operation conditions. In any case the
ACMD41 or the CMD1 shall be send separately to each card accessing it through its own
CMD line.

3.4.2 Bus Operating Conditions

SPI Mode bus operating conditions are identical to SD Card mode bus operating
conditions. Table 3-4 lists the power supply voltages. The CS (chip select) signal timing is
identical to the input signal timing (see Figure 3-8).

Table 3-4 Bus Operating Conditions Summary

Parameter Symbol Min Max Unit Remark

General

Peak voltage on all lines --- -0.3 VDD + 0.3 V

All Inputs

Input Leakage Current --- -10 10 uA

All Outputs

Output Leakage Current --- -10 10 uA

Power Supply Voltage7

Supply Voltage VDD 2.0 3.6 V CMD0, 15, 55,

V

Supply voltage differentials

, V

SS1

SS2

)

(V

Power-up Time --- --- 250 mS From 0 V to VDD min.

2.7 3.6 V Except CMD0, 15, 55,

DD

--- -0.3 0.3 V

ACMD41 commands

ACMD41 commands

3.4.3 Bus Signal Line Load

The total capacitance, C
capacitance (C
card connected to this line:

C

= C

L

HOST

Where N is the number of connected cards. Requiring the sum of the host and bus
capacitances not to exceed 30 pF for up to 10 cards, and 40 pF for up to 30 cards, the
values in Table 3-4 must not be exceeded.

© 2004 SanDisk Corporation 3-7 12/08/04

7

The current consumption of any card during the power-up procedure must not exceed 10 mA.

, of the clock line in the SD Card bus is the sum of the bus-master

L

), the bus capacitance (C

HOST

+ C

+ N*C

BUS

CARD

) itself and the capacitance (C

BUS

CARD

) of each

Chapter 3 – SD Card Interface Description
Revision 2.2 SD Card Product Manual

Table 3-5 Host and Bus Capacities8

Parameter Symbol Min. Max. Unit Remark

Pull-up resistance R

R

CMD,

DAT

10 100 kΩ Prevents bus floating

Bus signal line capacitance CL --- 250 pF fPP < 5 MHz, 21 cards

Bus signal line capacitance C

Signal card capacitance C

--- 100 pF

L

--- 10 pF

CARD

f

< 20 MHz, 7 cards

PP

Max. signal line inductance --- --- 16 nH fPP <20 MHz

Pull-up resistance inside card (pin 1) R

10 90 kΩ May be used for card

DAT3

detection

3.4.4 Bus Signal Levels

All signal levels are related to the supply voltage because the bus can have a variable
supply voltage (see Figure 3-6).

Figure 3-6 Bus Signal Levels

V

V

DD

Input
High

Level

V

OH

V

IH

Input

Low

Level

3.4.5 Open-drain Mode Bus Signal Level

To meet the requirements of the JEDEC specification JESD8-1A, the card input and output
voltages are within the specified ranges in Table 3-6 for any V
range.

Table 3-6 Input/Output Voltage

Parameter Symbol Min. Max. Unit Conditions

Output high voltage VOH 0.75*VDD --- V IOH = -100 uA@ VDD (minimum)

Output low voltage VOL --- 0.125*VDD V IOL = 100 uA@ VDD (minimum)

Output

High

Level

Undefined

V

L

Output

V

OL

V

SS

t

Low

Level

of the allowed voltage

DD

Input high voltage VIH 0.625*VDD V

Input low voltage VIL V

8

The total capacitance of CMD and DAT lines will consist of C
connected separately to the SD Card host.

© 2004 SanDisk Corporation 3-8 12/08/04

+0.3 V ---

DD

-0.3 0.25*VDD V ---

SS

, C

HOST

, and one C

BUS

only because they are

CARD

Chapter 3 – SD Card Interface Description
Revision 2.2 SD Card Product Manual

3.4.6 Bus Timing (default)

Default dataIn/dataOut timing is illustrated in Figure 3-7; bus timing parameter values are
shown in Table 3-7.

Figure 3-7 Data In/Out Referenced to Clock Timing (default)

Table 3-7 Bus Timing Parameter Values (default)

Parameter Symbol Min Max Unit Remark

Clock (CLK) – all values referred to min. VIH and max. VIL

Clock Freq. Data Transfer Mode fPP 0 25 MHz CL < 100 pF (7 cards)

Clock Freq. Identification Mode9 fOD 010/100 400 kHz CL < 250 pF (21 cards)

Clock Low Time tWL 10 --- ns CL < 100 pF (7 cards)

Clock High Time tWH 10 --- ns CL < 100 pF (7 cards)

Clock Rise Time t

Clock Fall Time t

Clock Low Time tWL 50 --- ns CL < 250 pF (21 cards)

Clock High Time tWH 50 --- ns CL < 250 pF (21 cards)

Clock Rise Time t

Clock Fall Time t

Inputs CMD, DAT – referenced to CLK

Input setup time t

Input hold time t

Outputs CMD, DAT – referenced to CLK

--- 10 ns CL < 100 pF (10 cards)

TLH

--- 10 ns CL < 100 pF (7 cards)

THL

--- 50 ns CL < 250 pF (21 cards)

TLH

--- 50 ns CL < 250 pF (21 cards)

THL

5 --- ns CL < 25 pF (1 card)

ISU

IH

5 --- ns CL < 25 pF (1 card)

9

Low frequency required for MMC compatibility.

10

0 Hz stops clock—given min. freq. range is for cases in which a continuous clock is required.

© 2004 SanDisk Corporation 3-9 12/08/04

Chapter 3 – SD Card Interface Description
Revision 2.2 SD Card Product Manual

Parameter Symbol Min Max Unit Remark

Clock (CLK) – all values referred to min. VIH and max. VIL

Output delay time during Data

t

Transfer mode

Output delay time during

t

ODLY

Identification mode

3.4.7 Bus Timing (high-speed mode)

High-speed mode dataIn/dataOut timing is illustrated in Figure 3-8; bus timing parameter
values are shown in Table 3-8.

Figure 3-8 Data In/Out Referenced to Clock Timing (high-speed)

0 14 ns CL < 25 pF (1 card)

OSU

0 50 ns CL < 25 pF (1 card)

Table 3-8 Bus Timing Parameter Values (high-speed)

Parameter Symbol Min Max Unit Remark

Clock (CLK) – all values referred to min. VIH and max. VIL

Clock Freq. Data Transfer Mode fPP 0 50 MHz

Clock Low Time tWL 7 --- ns

Clock High Time tWH 7 --- ns

Clock Rise Time t

Clock Fall Time t

Inputs CMD, DAT – referenced to CLK

Input setup time t

Input hold time t

Outputs CMD, DAT – referenced to CLK

Output delay time during Data
Transfer mode

© 2004 SanDisk Corporation 3-10 12/08/04

--- 3 ns

TLH

--- 3 ns

THL

6 --- ns

ISU

2 --- ns

--- 14 ns

t

ODLY

IH