Samsung ssh70n10a Datasheet

Page 1
Advanced Power MOSFET
SSH70N10A
FEATURES
Avalanche Rugged Technology Rugged Gate Oxide Technology Lower Input Capacitance Improved Gate Charge Extended Safe Operating Area
Ο
C
175 Operating Temperature Lower Leakage Current : 10 A (Max.) @ VDS = 100V Lower R
: 0.018 (Typ.)
DS(ON)
Ω
µ
Absolute Maximum Ratings
Symbol
V
DSS
I
D
I
DM
V
GS
E
AS
I
AR
E
AR
dv/dt
P
D
T
, T
J
STG
T
L
Drain-to-Source Voltage Continuous Drain Current (TC=25 ) Continuous Drain Current (T
Continuous Drain Current (TC=100 ) Drain Current-Pulsed Gate-to-Source Voltage Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt
Peak Diode Recovery dv/dt Total Power Dissipation (TC=25 ) Linear Derating Factor Operating Junction and Storage Temperature Range Maximum Lead Temp. for Soldering Purposes, 1/8” from case for 5-seconds
Characteristic Value UnitsSymbol
Ο
C
Ο
C
Ο
C
BVBV R
DSS
DS(on)
= 100 V
= 0.023
Ω
ID = 70 A
TO-3P
1
2
3
1.Gate 2. Drain 3. Source
100
70
49.2
1
O
2
O
1
O
1
O
3O3
280
+
_
20
1633
70 30
6.5
300
2.0
- 55 to +175
300
V A A
V
mJ
A
mJ
V/ns
W
W/
Ο
C
Ο
C
Thermal Resistance
R
JC
θ
R
CS
θ
R
θ
JA
Characteristic Max. UnitsSymbol Typ.
Junction-to-Case
Case-to-Sink
Junction-to-Ambient
--
0.24
--
0.5
--
40
Ο
C
/W
Page 2
SSH70N10A
N-CHANNEL
POWER MOSFET
Electrical Characteristics (T
CharacteristicSymbol Max. UnitsTyp.Min. Test Condition
BV BV/ TJ
∆ ∆
V
R
DSS
GS(th)
I
GSS
I
DSS
DS(on)
g
fs
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
Q
Q
gs
Q
gd
Drain-Source Breakdown Voltage Breakdown Voltage Temp. Coeff. Gate Threshold Voltage Gate-Source Leakage , Forward Gate-Source Leakage , Reverse
Drain-to-Source Leakage Current
Static Drain-Source On-State Resistance Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge
g
Gate-Source Charge Gate-Drain(“miller”) Charge
Ο
=25 unless otherwise specified)
C
C
VGS=0V,ID=250 A
100
--
2.0
--
--
--
--
--
0.12
--
--
--
--
--
-100
--
--
4.0
100
10
100
V
Ο
ID=250 A See Fig 7
V/
C
VDS=5V,ID=250 A
V
VGS=20V
nA
VGS=-20V VDS=100V
µ
A
VDS=80V,TC=150
Ω
--
--
0.023
--
53.51
--
3750
--
--
--
--
--
--
--
--
--
850 375
22 24
112
84
151
31 66
--
4870
980 430
60
60 240 180 195
--
--
VGS=10V,ID=35A
Ω
VDS=40V,ID=35A VGS=0V,VDS=25V,f =1MHz
pF
See Fig 5
VDD=50V,ID=70A, RG=5.3
ns
See Fig 13
VDS=80V,VGS=10V,
nC
ID=70A
See Fig 6 & Fig 12
µ
µ
µ
Ο
C
4
O
4
O
Ω
4
5
O
O
4
5
O
O
Source-Drain Diode Ratings and Characteristics
CharacteristicSymbol Max. UnitsTyp.Min. Test Condition
I
I
SM
V
t
Q
Notes ;
Repetitive Rating : Pulse Width Limited by Maximum Junction Temperature
1
O
2
L=0.5mH, IAS=70A, VDD=25V, RG=27 , Starting TJ =25
O
3
ISD 70A, di/dt 530A/ s, VDD BV
O
Pulse Test : Pulse Width = 250 s, Duty Cycle 2%
4
O
Essentially Independent of Operating Temperature
5
O
Continuous Source Current
S
Pulsed-Source Current Diode Forward Voltage
SD
Reverse Recovery Time
rr
Reverse Recovery Charge
rr
_
µ
_
<
<
_
<
DSS
µ
1
O
4
O
Ω
, Starting TJ =25
_
<
--
--
70
--
--
280
--
--
1.6
--
143
--
--
0.72
o
C
o
C
--
Integral reverse pn-diode
A
in the MOSFET
V
ns
µ
C
Ο
C
TJ=25 ,IS=70A,VGS=0V
Ο
C
TJ=25 ,IF=70A diF/dt=100A/ s
µ
O
4
Page 3
N-CHANNEL
POWER MOSFET
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
V
GS
Top : 1 5 V 1 0 V
2
10
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V Bottom : 4.5 V
SSH70N10A
2
10
175 oC
1
10
, Drain Current [A]
D
I
0
10
-1
10
@ Notes :
1. 250 µs Pulse Test
2. TC = 25 oC
0
10
VDS , Drain-Source Voltage [V]
0.03
VGS = 10 V
]
0.02
Ω
, [
DS(on)
R
0.01
VGS = 20 V
Drain-Source On-Resistance
0.00 0 50 100 150 200 250 300
ID , Drain Current [A]
8000
6000
C
iss
C
= Cgs+ Cgd ( Cds= shorted )
iss
C
= Cds+ C
oss
gd
C
= C
rss
gd
1
10
@ Note : TJ = 25 oC
1
10
25 oC
, Drain Current [A]
D
I
0
10
2 4 6 8 10
- 55 oC
@ Notes :
1. VGS = 0 V
2. VDS = 40 V
3. 250 µs Pulse Test
VGS , Gate-Source Voltage [V]
Fig 4. Source-Drain Diode Forward VoltageFig 3. On-Resistance vs. Drain Current
2
10
1
10
, Reverse Drain Current [A]
175 oC
DR
I
25 oC
0
10
0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6
@ Notes :
1. VGS = 0 V
2. 250 µs Pulse Test
VSD , Source-Drain Voltage [V]
Fig 6. Gate Charge vs. Gate-Source VoltageFig 5. Capacitance vs. Drain-Source Voltage
10
VDS = 20 V
VDS = 50 V
VDS = 80 V
4000
Capacitance [pF]
2000
C
oss
C
rss
0
0
10
VDS , Drain-Source Voltage [V]
@ Notes :
1. VGS = 0 V
2. f = 1 MHz
1
10
5
, Gate-Source Voltage [V]
GS
V
0
0 20 40 60 80 100 120 140 160
@ Notes : ID =70.0 A
QG , Total Gate Charge [nC]
Page 4
SSH70N10A
Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature
1.2
1.1
3.0
2.5
2.0
POWER MOSFET
N-CHANNEL
1.0
, (Normalized)
DSS
BV
0.9
Drain-Source Breakdown Voltage
0.8
-75 -50 -25 0 25 50 75 100 125 150 175 200
@ Notes :
1. VGS = 0 V
2. ID = 250 µA
TJ , Junction Temperature [oC]
3
10
2
10
1
10
, Drain Current [A]
D
I
0
10
-1
10
0
10
Operation in This Area is Limited by R
DS(on)
@ Notes :
1. TC = 25 oC
2. TJ = 175 oC
3. Single Pulse
1
10
1 ms
10 ms
DC
VDS , Drain-Source Voltage [V]
100 µs
1.5
, (Normalized)
1.0
DS(on)
R
0.5
Drain-Source On-Resistance
0.0
-75 -50 -25 0 25 50 75 100 125 150 175 200
@ Notes :
1. VGS = 10 V
2. ID = 35.0 A
TJ , Junction Temperature [oC]
Fig 10. Max. Drain Current vs. Case TemperatureFig 9. Max. Safe Operating Area
80
10 µs
2
10
60
40
, Drain Current [A]
D
20
I
0
25 50 75 100 125 150 175
Tc , Case Temperature [oC]
0
10
D=0.5
0.2
-1
10
0.1
0.05
0.02
0.01
-2
(t) , Thermal Response
10
JC
θ
Z
-5
10
single pulse
-4
10
t1 , Square Wave Pulse Duration [sec]
Fig 11. Thermal Response
@ Notes :
1. Z
2. Duty Factor, D=t1/t
3. TJM-TC=PDM*Z
P
DM
-3
10
-2
10
10
(t)=0.5 oC/W Max.
JC
θ
t
1
t
2
-1
10
2
(t)
JC
θ
0
1
10
Page 5
N-CHANNEL
POWER MOSFET
SSH70N10A
Fig 12. Gate Charge Test Circuit & Waveform
10V
“ Current Regulator ”
200nF12V
3mA
Current Sampling (IG)
V
V
in
R
G
50K
out
Ω
V
GS
Resistor
V
Same Type
GS
as DUT
300nF
V
10V
DS
Q
gs
DUT
R
1
Fig 13. Resistive Switching Test Circuit & Waveforms
DUT
R
2
Current Sampling (ID)
Resistor
R
L
V
DD
( 0.5 rated V
V
out
90%
)
DS
10%
V
in
t
d(on)tr
Q
g
Q
gd
Charge
t
d(off)
t
t
on
f
t
off
Vary tp to obtain required peak I
10V
Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms
BV
L
DUT
L
BV
I
D
C
V
DD
DSS
I
AS
V
DD
V
DS
D
R
G
t
p
E
= LL I
AS
1
---­2
AS
ID (t)
t
2
p
DSS
-------------------­BV
-- V
DSS
DD
Time
V
(t)
DS
Page 6
SSH70N10A
Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms
N-CHANNEL
POWER MOSFET
V
V
GS
( Driver )
DUT
+
V
DS
--
I
S
V
GS
GS
Driver
R
G
D =
Same Type
as DUT
• dv/dt controlled by “RG”
• IS controlled by Duty Factor “D”
Gate Pulse Width
-------------------------­Gate Pulse Period
L
V
DD
10V
I
S
( DUT )
V
DS
( DUT )
IFM , Body Diode Forward Current
I
RM
Body Diode Reverse Current
Body Diode Recovery dv/dt
V
f
Body Diode
Forward Voltage Drop
di/dt
V
DD
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