Samsung ssh10n80a Datasheet

Page 1
Advanced Power MOSFET
SSH10N80A
FEATURES
Avalanche Rugged Technology Rugged Gate Oxide Technology Lower Input Capacitance Improved Gate Charge Extended Safe Operating Area Lower Leakage Current : 25 µA (Max.) @ VDS = 700V Low R
: 1.552 Ω (Typ.)
DS(ON)
Absolute Maximum Ratings
Characteristic Value UnitsSymbol
Drain-to-Source Voltage Continuous Drain Current (TC=25 Continuous Drain Current (TC=100
Ο
C )
Ο
C)
Drain Current-Pulsed Gate-to-Source Voltage Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Total Power Dissipation (TC=25
Ο
C)
Linear Derating Factor Operating Junction and Storage Temperature Range Maximum Lead Temp. for Soldering Purposes, 1/8“ from case for 5-seconds
T
V
DSS
I
I
DM
V E
I
AR
E
dv/dt
P
, T
J
T
D
GS
AS
AR
D
STG
L
BV R
DSS
DS(on)
= 800 V
ID = 10 A
TO-3P
1
2
3
1.Gate 2. Drain 3. Source
800
10
6.3 40
+
_
30
533
10 28
2.0
280
2.22
- 55 to +150
300
= 0.95 Ω
V A A
V
mJ
A
mJ
V/ns
W
W/
Ο
C
Ο
C
Thermal Resistance
R
θ
JC
R
θ
CS
R
θ
JA
Characteristic Max. UnitsSymbol Typ.
Junction-to-Case
Case-to-Sink
Junction-to-Ambient
--
0.24
--
0.45
--
40
Ο
C/W
Page 2
SSF10N80A
N-CHANNEL
POWER MOSFET
Electrical Characteristics (T
CharacteristicSymbol Max. UnitsTyp.Min. Test Condition
BV ∆BV/∆TJ V
R
DSS
GS(th)
I
GSS
I
DSS
DS(on)
g
fs
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
Q
Q
gs
Q
gd
Drain-Source Breakdown Voltage Breakdown Voltage Temp. Coeff. Gate Threshold Voltage Gate-Source Leakage , Forward Gate-Source Leakage , Reverse
Drain-to-Source Leakage Current
Static Drain-Source On-State Resistance Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge
g
Gate-Source Charge Gate-Drain(“Miller”) Charge
Ο
=25
C unless otherwise specified)
C
800
--
--
--
1.02
--
2.0
--
3.5
--
--
100
--
--
-100
--
--
25
--
--
250
--
--
0.95
--
--
2700
--
--
--
--
--
--
--
--
--
6.6
260 110
29 58
152
48
125
19.2
55.4
--
3500
300 130
70 125 315 105 165
--
--
VGS=0V,ID=250 µA
V
Ο
ID=250 µA See Fig 7
V/
C
VDS=5V,ID=250 µA
V
VGS=30V
nA
VGS=-30V VDS=700V
µA
VDS=560V,TC=125
VGS=10V,ID=3A
Ω
VDS=50V,ID=3A VGS=0V,VDS=25V,f =1MHz
pF
See Fig 5
VDD=350V,ID=6A, RG=11.5Ω
ns
See Fig 13
VDS=560V,VGS=10V,
nC
ID=6A
See Fig 6 & Fig 12
Ο
C
*
Source-Drain Diode Ratings and Characteristics
CharacteristicSymbol Max. UnitsTyp.Min. Test Condition
I
I
SM
V
t
Q
Notes ;
¨ç Repetitive Rating : Pulse Width Limited by Maximum Junction Temperature ¨è L=23mH, IAS=6.5A, VDD=50V, RG=27Ω, Starting TJ =25 ΟC ¨é ISD 6A, di/dt 200A/µs, VDD BV ¨ê Pulse Test : Pulse Width = 250µs, Duty Cycle 2% ¨ë Essentially Independent of Operating Temperature
Continuous Source Current
S
Pulsed-Source Current Diode Forward Voltage
SD
Reverse Recovery Time
rr
Reverse Recovery Charge
rr
_
<
_
<
, Starting TJ =25 ΟC
_
<
DSS
--
--
6.5
--
--
--
--
--
620
--
10.17
_
<
40
1.4
--
--
A V
ns
µC
Integral reverse pn-diode in the MOSFET
Ο
TJ=25
C,I
=6A,VGS=0V
S
Ο
TJ=25
C,I
=6A
F
diF/dt=100A/µs
Page 3
N-CHANNEL
Ω
POWER MOSFET
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
V
GS
Top : 1 5 V 1 0 V
8.0 V
1
10
7.0 V
6.0 V
5.5 V
5.0 V Bottom : 4.5 V
SSH10N80A
1
10
150 oC
0
10
, Drain Current [A]
D
I
-1
10
-1
10
@ Notes :
1. 250 µs Pulse Test
2. TC = 25 oC
0
10
VDS , Drain-Source Voltage [V]
2.0
1.5
VGS = 10 V
]
, [
1.0
DS(on)
R
0.5
VGS = 20 V
Drain-Source On-Resistance
@ Note : TJ = 25 oC
0.0 0 10 20 30 40 50
ID , Drain Current [A]
4000
3000
C
iss
C
= Cgs+ Cgd ( Cds= shorted )
iss
C
= Cds+ C
oss
gd
C
= C
rss
gd
0
10
, Drain Current [A] I
1
10
25 oC
D
- 55 oC
-1
10
2 4 6 8 10
@ Notes :
1. VGS = 0 V
2. VDS = 50 V
3. 250 µs Pulse Test
VGS , Gate-Source Voltage [V]
Fig 4. Source-Drain Diode Forward VoltageFig 3. On-Resistance vs. Drain Current
1
10
0
10
, Reverse Drain Current [A]
DR
I
10
150 oC
-1
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
25 oC
@ Notes :
1. VGS = 0 V
2. 250 µs Pulse Test
VSD , Source-Drain Voltage [V]
Fig 6. Gate Charge vs. Gate-Source VoltageFig 5. Capacitance vs. Drain-Source Voltage
10
VDS = 160 V
VDS = 400 V
VDS = 640 V
2000
5
Capacitance [pF]
1000
C
oss
C
rss
0
0
10
VDS , Drain-Source Voltage [V]
@ Notes :
1. VGS = 0 V
2. f = 1 MHz
1
10
, Gate-Source Voltage [V]
GS
V
0
0 20 40 60 80 100 120 140
@ Notes : ID = 10.0 A
QG , Total Gate Charge [nC]
Page 4
SSH10N80A
θ
Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature
1.2
1.1
3.0
2.5
2.0
POWER MOSFET
N-CHANNEL
1.0
, (Normalized)
DSS
BV
0.9
Drain-Source Breakdown Voltage
0.8
-75 -50 -25 0 25 50 75 100 125 150 175
@ Notes :
1. VGS = 0 V
2. ID = 250 µA
TJ , Junction Temperature [oC]
2
10
1
10
0
, Drain Current [A]
10
D
I
-1
10
Operation in This Area is Limited by R
@ Notes :
1. TC = 25 oC
2. TJ = 150 oC
3. Single Pulse
1
10
DS(on)
100 µs
1 ms
10 ms
DC
2
10
VDS , Drain-Source Voltage [V]
10 µs
10
1.5
, (Normalized)
1.0
DS(on)
R
0.5
Drain-Source On-Resistance
0.0
-75 -50 -25 0 25 50 75 100 125 150 175
@ Notes :
1. VGS = 10 V
2. ID = 5.0 A
TJ , Junction Temperature [oC]
Fig 10. Max. Drain Current vs. Case TemperatureFig 9. Max. Safe Operating Area
12
9
6
, Drain Current [A]
D
3
I
3
0
25 50 75 100 125 150
Tc , Case Temperature [oC]
0
10
D=0.5
-1
0.2
10
0.1
0.05
0.02
-2
0.01
10
(t) , Thermal Response
JC
Z
-5
10
-4
10
Fig 11. Thermal Response
single pulse
-3
10
@ Notes :
1. Z
2. Duty Factor, D=t1/t
3. TJM-TC=PDM*Z
-2
10
(t)=0.45 oC/W Max.
θJC
P
DM
t
1
-1
10
2
(t)
θJC
t
2
0
10
1
10
t1 , Square Wave Pulse Duration [sec]
Page 5
N-CHANNEL
POWER MOSFET
SSH10N80A
Fig 12. Gate Charge Test Circuit & Waveform
10V
* Current Regulator *
50K¥Ø
200nF12V
3mA
Current Sampling (IG)
V
V
in
R
G
V
out
V
Same Type
GS
as DUT
300nF
V
GS
10V
DS
Q
DUT
R
1
Resistor
Fig 13. Resistive Switching Test Circuit & Waveforms
DUT
R
2
Current Sampling (ID)
Resistor
R
L
V
DD
( 0.5 rated V
V
out
90%
)
DS
10%
V
in
gs
t
d(on)tr
Q
g
Q
gd
Charge
t
d(off)
t
t
on
f
t
off
Vary tp to obtain required peak I
10V
Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms
BV
L
DUT
L
BV
I
D
C
V
DD
DSS
I
AS
V
DD
V
DS
D
R
G
t
p
E
= LL I
AS
1
---­2
AS
ID (t)
t
2
p
DSS
-------------------­BV
-- V
DSS
DD
Time
V
(t)
DS
Page 6
SSH10N80A
Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms
N-CHANNEL
POWER MOSFET
V
V
GS
( Driver )
DUT
+
V
DS
--
I
S
V
GS
GS
Driver
R
G
D =
Same Type
as DUT
• dv/dt controlled by “RG•
• IS controlled by Duty Factor “D”
Gate Pulse Width
-------------------------­Gate Pulse Period
L
V
DD
10V
I
S
( DUT )
V
DS
( DUT )
IFM , Body Diode Forward Current
I
RM
Body Diode Reverse Current
Body Diode Recovery dv/dt
V
f
Body Diode
Forward Voltage Drop
di/dt
V
DD
Loading...