5.3 SERVO SYSTEM
................................................................................................................................31
5.4 R
EAD AND WRITE OPERATIONS
......................................................................................................31
5.4.1 The Read
Channel...........................................................................................................31
5.4.2 The Write
Channel ..........................................................................................................32
5.5 F
IRMWARE FEATURES
.....................................................................................................................32
5.5.1 Read Caching
.................................................................................................................32
5.5.2 Write
Caching .................................................................................................................33
5.5.3 Defect Management
........................................................................................................34
5.5.4 Automatic Defect Allocation
...........................................................................................34
5.5.5
SMART............................................................................................................................34
5.5.6 APM
...............................................................................................................................34
CHAPTER 6 SATA II INTERFACE
.................................................................................................35
6.1 INTRODUCTION
................................................................................................................................35
6.1.1 SATA Terminol ogy.... ..... .... .......... ..... .... ..... ....... ....... .... ..... ..... ......... ..... ..... ..... ..... ....... ...35
6.2 P
HYSICAL INTERFACE
.....................................................................................................................37
6.3 S
IGNAL SUMMARY
...........................................................................................................................37
6.3.1 Signal
Descriptions.........................................................................................................37
6.3.2 I/O Register - Address
....................................................................................................38
6.3.3 Control Block Regi
ster Descriptions
..............................................................................38
6.3.3.1 Alternate Status Register (ex. 3F6h) .......................................................................................... 38
6.3.3.2 Device Control Register (ex. 3F6h)............................................................................................ 39
6.3.4 Command Block Register Descriptions
..........................................................................39
6.3.4.1 Data Register (Ex. 1F0h)............................................................................................................ 39
6.3
.4.2 Features Register and Feature Extended Register (Ex. 1F1h) .................................................... 39
6.3.4.3 Sector Number Register and Sector Number Extended Register (Ex. 1F3h) .............................. 39
6.3.4.4 Error Register (Ex. 1F1h) ........................................................................................................... 39
6.3.4.5 Sector Count Register and Sector Count Extended Register (Ex. 1F2h) .................................... 40
6.3.4.6 Cylinder High Register and Cylinder High Extended Register (Ex. 1F5h) ................................ 40
6.3.4.7 Cylinder Low Reg
ister and Cylinder Low Extended Register (Ex. 1F4h) .................................. 40
6.3.4.8 Command Register (Ex. 1F7h)................................................................................................... 40
6.3.4.9 Device Register (Ex. 1F6h) ........................................................................................................ 40
6.3.4.10 Status Register (Ex. 1F7h) ......................................................................................................... 41
CHAPTER 7 SATA II FEATURE
SET .............................................................................................42
7.1 DEVICE ACTIVITY SIGNAL
..............................................................................................................42
7.2 S
TAGGERED SPIN-UP DISABLE CONTROL
.......................................................................................42
7.3 A
UTO-ACTIVATE IN DMA SETUP FIS
............................................................................................42
7.4 N
ATIVE COMMAND QUEUING (NCQ)
.............................................................................................42
7.5 P
HY. EVENT COUNTERS
..................................................................................................................43
7.6 S
OFTWARE SETTINGS PRESERVATION
............................................................................................44
7.7 SATA P
OWER MANAGEMENT
.........................................................................................................44
CHAPTER 8 ATA COMMAND DESCRIPTIONS
..........................................................................45
8.1 COMMAND
T
ABLE
............................................................................................................................45
8.2 C
OMMAND DESCRIPTIONS
...............................................................................................................47
8.2.1 Check Power Mode
(E5h)...............................................................................................47
8.2.2 Download Micro Code
(92h) ..........................................................................................47
8.2.3 Device Configuration Overlay
(B1h) ..............................................................................47
8.2.4 Execute Device Diagnostics
(90h) ..................................................................................49
8.2.5 Flush Cache (E7h, EAh:
extended).................................................................................49
8.2.6 For
mat Track (50h)
........................................................................................................49
8.2.7 Identify Device (ECh)
.....................................................................................................49
8.2.8 Idle
(E3h) ........................................................................................................................55
8.2.9 Idle Immediate (E1h)
......................................................................................................55
8.2.10 Initialize Device Parameters
(91h) .................................................................................56
8.2.11 NOP
(00h).......................................................................................................................56
8.2.12 Read Buffer
(E4h) ...........................................................................................................56
8.2.13 Read DMA (C8h,
25h:extended).....................................................................................56