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Block Diagrams
8.
margaid kcolB FR 026M-HGS
VCC_TXVCO
TX Loop
Filter
TXOP_HI
xT SCP/SCD
PFD
/2
TXOP_LO
eludoM xT
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xr MSG
xr SCD
xr SCP
C
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1
S
B
N
2
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E
S
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B
X
L
T
V
C
P
A
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xT MSG
VCC_FE
RX850
RX850B
RX900
RX900B
KNABWAS
RX1800
0JL0CQM
RX1800B
RX1900
RX1900B
LNA Gain
Reduction
RX LO
Generator
TX_LO2
TX LO
TX_LO1
Generator
SDATA
SCLK
SEN
Serial
Interface
VDD
TX_LO1
Band
Control
DC Offset
Correction
DC Offset
Correction
Frac-N Synth
supply
LO VCO
Supply
LDO
Reg 2
TX circuits
LDO
Reg 3
VCC_
VBAT VLDO3 VLDO2 VLDO1
TXVCO
AD654 8
General
Supply
LDO
Reg 1
/4
TX_LO2
Xtal Osc
+ Tuning
Supply
Ref
I
IB
VCC_BBI
VCC_BBQ
Q
QB
VAFC
REFINB
REFIN
REF_OP
VCC_REF
TXIB
RXIB
TXQ
TXQB
RXQ
RXQB
AFC
CLK
REF_OP
TXI
RXI
golanA
dnabesaB
B221XA
8-1
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Block Diagrams
ma
gaiDkcolBdnabesaB026M-HGS
CSO
zHM62
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& rekaepS
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RENUT MF
3074IS
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ABB
CSP
DigRF INTERFACE
DSP-CONTROLLED
SERIAL INTERFACE
UNIT (DSIU)
SIGNAL CONVERSION
UNIT (SCU)
AUTOMATIC
FREQUENCY
CORRECTION (AFC)
ciM
AUDIO UNIT
PSC
FI MIS
ARM-CONTROLLED
SERIAL INTERFACE UNIT
(ASIU)
POWER RAMPING
CONTROL (PRC)
DSP-INTERRUPT
GENERATION UNIT
(DIGU)
POWER MANAGEMENT
REAL-TIME CLOCK
(RTC)
CSO
zHK867.23
DDBBBB((DDXX112222AAHH))
PSD
FRgiD
IDS
CUISD
emarF
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LTCO
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rellortnoC
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1PSS
SK61 PSD
rossecorp
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metsysbus PA
2PSS
MISU
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htooteulB
elbahctiwS
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CMM/DS
S-IMDT7MRA
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GTO BSU
rellortnoc
drac DS
BSU
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dap yeK
yromeM
D_DCL
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LLCCDD
D_NAC
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CCaammeerraa
8-2
SAMSUNG Proprietary-Contents may change without notice
This Document can not be used without Samsung's authorization