This Service Manual is a property of Samsung Electronics Co.,Ltd.
Any unauthorized use of Manual can be punished under applicable
International and/or domestic law.
ⓒ
Samsung Electronics Co.,Ltd. September. 2005
Printed in Korea.
Code No.: GH68-08500A
BASIC.
1. Specification
1-1. GSM General Specification
GSM850
phase1
Freq.
Band[MHz]
Uplink/Downlin
k
ARFCN range128~2511~124
Tx/Rx spacing45MHz45MHz45MHz95MHz80MHz
Mod. Bit rate/
Bit Period
Time Slot
Period/Frame
Period
Modulation0.3GMSK0.3GMSK0.3GMSK0.3GMSK0.3GMSK
MS Power33dBm~13dBm33dBm~13dBm33dBm~5dBm30dBm~0dBm 30dBm~0dBm
To convert Electromagnetic Field Wave to Acoustic Wave and then pass the specific frequency band.
- GSM850 FILTER (L113,C133,C134,C135)→For filtering the frequency band between 869 ~ 894 MHz.
- GSM900 FILTER (L106,C122,C123,C124)→For filtering the frequency band between 925 ~ 960 MHz.
- DCS FILTER (L108,L109,C129,C130)→For filtering the frequency band 1805 and 1880 MHz.
- PCS FILTER (L110,L111,C131,C132)→For filtering the frequency band 1930 and 1990 MHz.
LL
H
- VC-TCXO (U102)
To generate the 26MHz reference clock to drive the logic and RF.
After additional process, the reference clock applies to the U100 Rx IQ demodulator and Tx IQ modulator.
The oscillator for RX IQ demodulator and Tx modulator are controlled by serial data to select channel and use fast lock
mode for GPRS high class operation.
- TRANSCEIVER (U100)
This chip fully integrated GSM GPRS quad-band transceiver with transmit baluns, loop filters and most of the passive
component in it.
And also fully integrated fractional N RF synthesizer with AFC control possibility, RF VCO with integrated supply
regulator. semi integrated reference oscillator with integrated supply regulator.
RF Receiver front-end amplifies the GSM850, E-GSM900, DCS1800 and PCS1900 aerial signal, convert the chosen
channel down to a low IF of 100kHz.
In IF section, further amplifies the wanted channel output level to the desired value and rejects DC.
2-1-2. TX PART
The transmitter is fully differential using a direct up conversion architecture. It consists of a signal side band
power up mixer. Gain is controlled by 6 dB via 3-wire serial bus programing. The fully integrated VCO and power
mixer achieve LO suppression, quadrature phase error, quadrature amplitude balance and low noise floor specification.
Output matching/balun components drive a standard 50 ohms single ended load.
2-1
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Circuit Description
2-2. Baseband Circuit description of SGH-D600
2-2-1. PCF50603 (U400)
- Power Management
Eight low-dropout regulators designed specifically for GSM applications power the terminal and help ensure optimal
system performance and long battery life. A programmable boost converter provides support for 1.8V, 3.0V SIMs,
while a self-resetting, electronically fused switch supplies power to external accessories. Ancillary support functions,
such as RTC module and High Voltage Charge pump, Clock generator, aid in reducing both board area and system
complexity.
I2C BUS serial interface provides access to control and configuration registers. This interface gives a microprocessor
full control of the PCF50603 and enables system designers to maximize both standby and talk times.
Supervisory functions. including a reset generator, an input voltage monitor, and a temperature sensor, support reliable
system design. These functions work together to ensure proper system behavior during start-up or in the event of a
fault condition(low microprocessor voltage, insufficient battery energy, or excessive die temperature).
- Clock Generator
The Clock Generator (CG) generates all clocks for internal and external usage. The 32.768 kHz crystal oscillator
provides an accurate low clock frequency for the PCF50603 and other circuitry.
2-2-2. LCD
LCD is consisted of main LCD(color 262K TFT LCD).
Chip select signals in the U301, LCD_MAIN_CS, can enable LCD. BACKLIGHT signal enables white LED of main LCD.
16-bit data lines(LD(0)~LD(15)) transfers data and commands to LCD. Data and commands use "RS" signal. If this signal
is high, Inputs to LCD are commands. If it is low, Inputs to LCD are data. The signal which informs the input or output
state to LCD, is required. But this system is not necessary this signal. So "L_WRB" signal is used to write data or
commands to LCD. Power signals for LCD are "VDD_IO_HIGH".
2-2-3. Key
This is consisted of key interface pins KEY_ROW(0:4) and KEY_COL(0:4) in PCF5212EL1. These signals compose the
matrix. Result of matrix informs the key status to key interface in the PCF5212EL1. Power on/off key is seperated from
the matrix. So power on/off signal is connected with PCF50603 to enable PCF50603. Key LED is consisted of six white
LEDsforsubkeyandtwelvewhiteLEDsformainkey. White LED for sub key use the VBAT voltage.
"SLIDER_KEY_ON" signal enables Transistor for sub key backlight.
Main key LED use the 3.3V LDO for a supply voltage. KEY_LED_ON signal enables eight white LED.
"FLIP" informs the status of slide (open or closed) to the PCF5213EL1. This uses the hall effect IC, EM-1681
A magnet under LCD enables EM-1681.
2-2
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Circuit Description
2-2-4. EMI ESD Filter
This system uses the EMI ESD filter, U500 to protect noise from IF CONNECTOR part.
2-2-5. IF connetor
It is 18-pin connector. They are designed to use VBAT, V_EXT_CHARGE, USB_D+, +VBUS, USB_D-, TXD1, RXD1,
AUX_ON, EXT1, EXT2, HFK_SPK, HFK_MIC and GND. They connected to power supply IC, microprocessor and signal
processor IC.
2-2-6. Battery Charge Management
A complete constant-current/constant-voltage linear charger for single cell lithium-ion batteries.
If TA connected to phone, "V_EXT_CHARGE" enable charger IC and supply current to battery.
When fault condition caused, "CHG_ON" signal level change low to high and charger IC stop charging process.
2-2-7. Audio
HFR_P and HFR_N from PCF5212El1 are connected to the main speaker via analog switches. MIC_P and MIC_N
are connected to the main MIC as well. EAR1 is the source of External Speaker. AK4642 is 16-bit stereo audio CODEC
with a built-in microphone - Amplifier and Headphone - Amplifier.
I2S signals from CL8522S5 are decoded with audio analog signals. SAPA1D2-24ELP amplify these signals and deliver to
stereo speakers.
2-2-8. Memory
This system uses Samsung's memory, KBH10PD00M-D414. The KBH10PD00M is a Multi Chip Package Memory which
combines 256Mbit Synchronous Burst Multi Bank NOR Flash Memory and two 1Gbit OneNAND Flash and
256Mbit Synchronous Burst UtRAM.
It has 16 bit data line, HD[1~16] which is connected to PCF5212 and CL8522S5, also has 24 bit address lines,
HA[1~24]. There are 3 chip select signals, CS0n_FLASH, CS4n_NAND, and CS1n_RAM.
In the Wrting process, WEn is fallen to low and it enables writing process to operate. During reading process,
OEn is fallen to low and it enables reading process to operate. Each chip select signals in the PCF5212 choose
different memories.
2-3
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Circuit Description
2-2-9. PCF5212EL1
The PCF5212EL1 is mainly composed of embeded DSP and ARM core. The DSP subsystem includes the Saturn
DSP core with embedded RAM and ROM, and a set of peripherals. It has 24kx16 bits PRAM, 104k*16 bits,
32k*16 XYRAM and 63k*16 XYROM in the DSP.
The ARM946E-S consists of an ARM9E-S processor core, 8 kbyte instruction cache and 8 kbyte data cache,
tghtly-coupled ITCM(Instruction Tightly Coupled Memory) and DTCM(Data Tightly Coupled Memory) memories, a
memory protection unit, and an AMBA(Advanced Microcontroller Bus Architecture) AHB(Advanced
High-performance Bus) bus interface with a write buffer.
HD(0:15), data lines and HA(0:23), address lines are connected to KBJ10KB00M (memory), MV319DNQ (image dsp)
and YMU765 (melody IC). It has 64 kbyte SC RAM (0.5 Mbit) and 32 kbyte SC program ROM for bootstrap
loader in the ARM core.
HD(0:15), data lines and HA(0:23), address lines are connected to memory and YMU765 to communicate.
MV319DNQ(Camera DSP Chip) controls the communication between ARM core and DSP core.
OEn, WEn control the access of memory. KROW, and KCOL recognize the key string input status.
It has J-TAG control pins (TDI/TDO/TCK) for ARM and DSP core. J-SEL signal controls different access to ARM
and DSP core.
ADC(Analog to Digital Convertor) receives the condition of temperature, battery type and battery voltage.
2-2-10. TCO-5888T (26MHz)
This system uses the 26MHz TCXO, TCO-5871U, Toyocom. AFC control signal form PCF5212 controls
frequency from 26MHz x-tal. It generates the clock frequency. This clock is connected to PCF5212, YMU765 and
UAA3587.
2-2-11. Multimedia Chip (CL8522S5)
CL8522S5 is the hardware based MPEG4 CODEC is available to capture the video signal of up to CIF Resolution
(352X288, at 30FPS). CL8522S5 directly transmits and previews the RGB Data to the LCD graphic memory by
processing the sensor output data. It can save the raw RGB data up to 1600x1200 into its image buffer and allows the
host processor to download with scalable sized compressed data.
2-4
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3. Exploded View and Parts List
3-1. Exploded View
QFR01
QMW01
QFU01
QKP02
QAU01
QMO01
QLC01
QCR32
QME02
QCR32
QKP01
QCR12
QCA02
QME01
QVK01
QMP01
QCA01
QSP02
QSP01
QAN06
QAN05
QAN02
QFL01
QCR26
QSC11
QHI01
QPC01
QVO01
QRF01
3-1
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Exploded view and Part List
DescriptionSec Code
BAG PE;LDPE,T0.05,W80,L180,TRP,-,-6902-000634
CBF INTERFACE-AV CABLE;SGH-D600,10 pGH39-00410A
CBF INTERFACE-DATA LINK CABLE;SGH-D6GH39-00423A
ADAPTOR-SGHD500 BLK;TAD137EBE,SGH-D5GH44-00954A
S/W CD-SAMSUNG PC STUDIO;SGH-D600,SGGH46-00167A
UNIT-EAR PHONE(BLK);SGH-D600,AEP421SGH59-02335A
LABEL(P)-WATER SOAK;COMM,NORGE,100G,GH68-02026A
MANUAL-WEEE CARD;COMM,SEC,ENGLISH,UNGH68-07013A
LABEL(R)-MAIN(EU);SGH-D600,EU,POLYESGH68-07243A
MANUAL-USER;SGH-D600,XEF,FRENCH,FRANGH68-07562A
BOX(P)-SLIPCASE(EU);SGH-D600,SC300+SGH69-03033A
CUSHION-CASE(1-2);SGH-D600,PULP,T0.8GH69-03036A
BOX(P)-UNIT(EU);SGH-D600,SC300g+S120GH69-03175A
ICT-BATT LOCKER SPRING;SGH-D600,STS3GH70-00611A
PMO-BATTERY LOCKER;SGH-D600,PC(K2261GH72-22498A
MPR-TAPE BOHO MAIN WIN A;SCH-X850,3MGH74-06456A
MPR-BOHO VINYL IF;SCH-X699,3M 4187C,GH74-11062A
MPR-BOHO VINYL S/U (R);SGH-D500,STAGH74-13284A
MPR-MAIN CON INSULATION;SGH-D600,SP6GH74-15311A
MPR-MAIN PBA DOWN L IN;SGH-D600,SP65GH74-15312A
MPR-MAIN PBA DOWN R IN;SGH-D600,SP65GH74-15313A
MPR-MAIN PBA UP L IN;SGH-D600,SP65,8GH74-15314A
MPR-MAIN PBA UP R IN;SGH-D600,SP65,9GH74-15315A
MPR-TAPE B TO B CON IN;SGH-D600,SP65GH74-15317A
MPR-TAPE B TO B CON EMI;SGH-D600,DTFGH74-15318A
MPR-SUB CON INSLATION;SGH-D600,SP65,GH74-15319A
MPR-TAPE SUB CON EMI;SGH-D600,DTF-10GH74-15320A
MPR-TAPE BASE BTB LA;SGH-D600,TAST49GH74-16479A
MPR-BOHO VINYL MAIN WIN;SGH-D600,ST5GH74-16880A
MPR-BOHO VINYL R/W LENS;SGH-D600,ST5GH74-16881A
MPR-B TO B CON SIDE EMI;SGH-D600,DTFGH74-16883A
MPR-TAPE IF HOLDER;SCH-V740,FABRIC TGH74-17165A
MPR-TAPE BASE BTB;SGH-D600,TASA 4962GH74-18234A
AS-INTENNA FRONT GASKET;SGH-D600,-,GGH81-02279A
AS-INTENNA REAR GASKET;SGH-D600,-,GAGH81-02280A
3-3
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Exploded view and Part List
3-3. Test Jig (GH80-01909A)
3-3-2. Test Cable
(GH39-00337C)
3-3-3. Serial Cable
3-3-1. RF Test Cable
(GH39-00283A)
3-3-4. Power Supply Cable
3-3-5. DATA CABLE
(GH39-00423A]
3-3-6. TA
3-3-7. TV-OUT Cable
(GH44-00954A)
3-4
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