Samsung Scala2-R Schematic

A

B

C

D

E

1 1

QCLA4,5

2 2

Eureka 14" & 15"

LA-8862P SchematicREV 0.2

3 3

4 4

A

Intel Processor(Ivy Bridge / Sandy Bridge) PCH(Panther Point)

2011-11-24 Rev 0.2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/01/31 2012/12/31

C

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

B

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A8862

4019IV

148Tuesday, March 27, 2012

E

B

of

A

B

C

D

E

Intel CPU Ivy Bridge Sandy Bridge

1 1

eDP Conn.

page 13

rPGA-989

37.5mm*37.5mm

page 5,6,7,8,9,10

Memory BUS(DDRIII)

Dual Channel

1.5V DDRIII 1066/1333/1600 MT/s

200pin DDRIII-SO-DIMM X2

BANK 0, 1, 2, 3

page 11,12

CRT

page 14

FDI X8

2.7GT/s

LVDS Conn.

page 13

2 2

EC SMBus

HDMI-CEC

page 15

HDMI Conn.

page 15

Intel PCH Panther Point

RJ45

page 40

RTL8105E-VD 10/100M RTL8111F-VB 1G

PCIe port 1

page 31

Cardreader RTS5229

PCIe port4

3 3

page 29

SPI ROM (4MB + 2MB)

page 16

PCIe Gen1 1x

1.5V 5GT/s

PCIe Gen1 1x

1.5V 5GT/s

Debug Port

page 36

FCBGA-989

25mm*25mm

page 16,17,18,19,20,21,22,23,24

LPC BUS

3.3V 33 MHz

ENE KB930/KB9012

page 35

DMI X4

5GT/s

HD Audio

3.3V 24MHz

USB30 4x

5V 5GT/s

USB20 4x

5V 480MHz

USB20 3x

5V 480MHz

USB20 3x

5V 480MHz

PCIe Gen1 1x

1.5V 5GT/s

SATA Gen3 port 1

5V 6GHz(600MB/s)

SATA Gen3 port 0

SATA port 2

5V 3GHz(300MB/s)

PCIe Gen2 2x

1.5V 5GT/s

HDA Codec

ALC280

page 33

USB Right

USB20 port 2,3 USB30 port 3,4 USB30 port 1,2

page 25

USB Left

USB20 port 0,1

page 30

FingerPrinter Int. Camera

USB port 8

page 29

PCIeMini Card WiMax

USB port 9

page 27 page 27

USB port 11

page 13

PCIeMini Card

3G/TV#1 TV#2

PCIeMini Card WLAN

5V 6GHz(600MB/s)

SATA ODD

PCIe port 2

page 27

SATA port 2

page 23

mSATA

SATA HDD

USB3.0 Right-side UPD720202

PCIe port5

page 31

USB port 12 USB port 10

SATA port 1

page 27

SATA port 0

page 23

B-CAS

page 26

USB3.0 Left-side UPD720202

PCIe port6

page 32

SIM

page 27

RTC CKT.

page 16

DC/DC Interface CKT.

page 38

4 4

Power Circuit DC/DC

page 39,40,41,42,43, 44,45,46,47,48,49

Power On/Off CKT.

page 37

A

Finger Printer/B

page 26

Power/B

page 37

Touch Pad

page 37

B

Int.KBD

page 36

EC ROM (128KB)

page 36

CIR

page 35

G-Sensor

page 36

EC SMBus

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

C

SPK Conn

Compal Secret Data

Deciphered Date

page 34

JPIO (HP & MIC)

D

page 34

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A8862

4019IV

248Tuesday, March 27, 2012

E

of

B

5

B+

Ipeak=10.63A, Imax=7.44A, Iocp min=12.3A

SUSP#

SY8033BDBC

D D

N-CHANNEL

SI4800

TPS51125

SY8036

C C

VCCPPWRGD

SY8037

LNB EN

APW7137

Ipeak=5A, Imax=3.5A, Iocp min=6.2A

B B

N-CHANNEL

SI4800

SUSP

4

SYSON

Ipeak=6A, Imax=4.2A, Iocp min=8A

Ipeak=6A, Imax=4.A, Iocp min=8

Imax=0.3A, Iocp min=0.8A

BCPWON

P-CHANNEL

AO-3413

KB_LED

P-CHANNEL

AO-3413

+5VS

LDO

G9191

ODD_EN#

P-CHANNEL

AO-3413

N-CHANNEL FDS6676AS

0.75VR_EN#

G2992

WOL_EN

P-CHANNEL

AO-3413

P-CHANNEL

AO-3415

SUSP

UMA_ENVDD

3

DESIGN CURRENT 0.1A DESIGN CURRENT 0.1A

DESIGN CURRENT 11A

DESIGN CURRENT 1.8A

DESIGN CURRENT 6.5A

DESIGN CURRENT 0.1A

DESIGN CURRENT 0.4A

DESIGN CURRENT 0.3A

DESIGN CURRENT 1.6A

DESIGN CURRENT 13.5A

DESIGN CURRENT 5A

DESIGN CURRENT 1.5A

DESIGN CURRENT 1A

DESIGN CURRENT 6A

DESIGN CURRENT 0.3A

DESIGN CURRENT 7.5A

DESIGN CURRENT 0.1A

DESIGN CURRENT 6A

DESIGN CURRENT 2A

+3VL +5VL

+5VALW

+1.8VS

+5VS

+5VS_L_BCAS

+5VS_LED

+3VS_HDP

+5VS_ODD

+1.5V

+1.5V_CPU

+1.5VS

+0.75VS

+VCCSA

+16VS

+3VALW

+3V_LAN

+3VS

+LCD_VDD

2

1

FELICA_PWR

P-CHANNEL

VR_ON

AO-3413

NCP6132A

SUSP#

TPS51212

A A

Ipeak=14A, Imax=9.8A, Iocp min=16.92A

DESIGN CURRENT 0.1A

DESIGN CURRENT 94A

DESIGN CURRENT 50A

DESIGN CURRENT 15A

+FLICA_VCC

+CPU_CORE +GFX_CORE

+1.05VS_VCCP

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/03 2012/12/31

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Power Tree

QFKAA

0.3

of

348Tuesday, March 27, 2012

of

348Tuesday, March 27, 2012

of

348Tuesday, March 27, 2012

1

A

B

C

D

E

Voltage Rails

1 1

power plane

State

S0

S1

2 2

S3

S5 S4/AC

S5 S4/ Battery only

S5 S4/AC & Battery don't exist

( O MEANS ON X MEANS OFF )

+RTCVCC

O O O O O O

B+

O O O O O

X

+5VL +3VL

O O O O O

X

+5VALW +3VALW +VSB

O O O O

X X

+1.5V

+5VS +3VS +1.8VS +1.5VS +1.05VS +0.75VS +CPU_CORE +VGA_CORE +GFX_CORE +VTT +VRAM_1.5VS +3VS_DGPU +1.05VS_DGPU

OO OO

O

X XX X

X XX

BTO Option Table

Function

description

explain

BTO

Function

description

explain

BTO

HDMI

HDMI@

SPI ROM

WIN8

WIN8@

Digital MIC

Green CLK

GCLK@

Camera & Mic

CAM@

NOGCLK

NOGCLK@

Analog MIC

AMIC@

USB 3.0

Internal

IUSB30@

TPM

SLB 9635

TPM9635@ TPM9655@

Sleep & Charge

SLB 9655

10/100M Giga

8105ELDO@ 8111FVB@

MINI PCI-E SLOT

Half Card

WIMAX

WIMAX@

LAN

PCH SM Bus Address

HEX

A0 H

D2 H

0001 0110 bSmart Battery

Address

1010 0000 b 1010 0100 bA4 H 1101 0010 b

EC SM Bus2 Address

PowerPower

+3VS +3VS +3VS +3VS Light Sensor

Device

NVIDIA GPUHDMI-CEC 34 H 0011 0100 b 1001 1010 b G-Sensor

96 H 9A H 40 H 52 H

1001 0110 bPCH

0100 0000 b 0101 0010 b

SIGNAL

STATE

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

G3 LOW LOWLOW

SLP_S3#

SLP_S4# SLP_S5#

HIGH HIGHHIGH

LOW

LOW LOW

HIGH HIGHHIGH

HIGH

LOW LOWLOW

HIGH

Power

+3VS

3 3

+3VS +3VS +3VS +3VS +3VS Clock Generator

Device

DDR SO-DIMM 0 DDR SO-DIMM 1 Clock Generator New Card WLAN/WIMAX

3G+3VS

EC SM Bus1 Address

Device Address Address

+3VL +3VL

4 4

+3VL Cap. Sensor Virtual I2C

HEX HEX

16 H

HEXDevice AddressPower

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

Notes List

QFKAA

448Tuesday, March 27, 2012

E

0.3

of

5

@

PM_DRAM_PWRGD_R

CC631000P_0402_50V7K

12

@

12

D D

+1.05VS_VCCP

C C

+3VALW_PCH

PM_PWROK18,31 DRAMPWROK18

B B

RC44 62_0402_5%RC44 62_0402_5%

RC45 10K_0402_5%RC45 10K_0402_5%

RC11 200_0402_5%RC11 200_0402_5%

12

@

12

@

12

@

12

Please place near JCPU

12

10K_0402_5%

RC13

+3VS

1 2

RC12 0_0402_5%@RC12 0_0402_5%@

CC621000P_0402_50V7K

CC701000P_0402_50V7K

CC711000P_0402_50V7K

CC661000P_0402_50V7K

DRAMPWROK

12

RC181 0_0402_5%@RC181 0_0402_5%@

H_PWRGOOD_R

H_PROCHOT#

H_PWRGOOD

H_PM_SYNC

BUF_CPU_RST#

+3VALW_PCH

1

B

2

A

1 2

SUSP9,34

H_PECI

12

0.1U_0402_10V7K

0.1U_0402_10V7K CC33

CC33

UC1

5

74AHC1G09GW_TSSOP5

P

PM_SYS_PWRGD_BUF

4

O

G

3

SUSP

+1.5V_CPU

12

RC25

RC25 39_0402_5%

39_0402_5% @

@

13

D

QC2

QC2 2N7002_SOT23

2N7002_SOT23

2

G

@

S

H_SNB_IVB#11,21

H_PROCHOT#31

H_THERMTRIP#21

H_PM_SYNC18

H_PWRGOOD21

12

H_PECI31

RC14

RC14 200_0402_5%

200_0402_5%

4

T1 PADT1 PAD

T2 PADT2 PAD

1 2

RC58 130_0402_5%RC58 130_0402_5%

BUF_CPU_RST#

RC159

RC187

H_SNB_IVB#

TP_SKTOCC#

H_CATERR#

H_PECI

H_PROCHOT#_R

56_0402_5%

H_THERMTRIP#

H_PM_SYNC

H_PWRGOOD_R

0_0402_5%

PM_DRAM_PWRGD_RPM_SYS_PWRGD_BUF

JCPUB

C26

PROC_SELECT#

AN34

SKTOCC#

AL33

CATERR#

AN33

PECI

AL32

PROCHOT#

AN32

THERMTRIP#

AM34

PM_SYNC

AP33

UNCOREPWRGOOD

V8

SM_DRAMPWROK

AR33

RESET#

TYCO_2013620-2_IVY BRIDGE

@

3

BCLK

BCLK#

MISCTHERMALPWR MANAGEMENT

DPLL_REF_CLK

DPLL_REF_CLK#

CLOCKS

SM_DRAMRST#

SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2]

DDR3

MISC

DDR3

MISC

PRDY#

PREQ#

TCK TMS

TRST#

TDI

TDO

DBR#

BPM#[0] BPM#[1]

JTAG & BPM

BPM#[2] BPM#[3] BPM#[4] BPM#[5] BPM#[6] BPM#[7]

100 MHz

CLK_CPU_DMI

A28

CLK_CPU_DMI#

A27

120 MHz

CLK_CPU_EDP

A16

CLK_CPU_EDP#

A15

H_DRAMRST#

R8

SM_RCOMP_0

AK1 A5 A4

AP29 AP27

AR26 AR27 AP30

AR28 AP26

AL35

AT28 AR29 AR30 AT30 AP32 AR31 AT31 AR32

RC56 140_0402_1%RC56 140_0402_1%

SM_RCOMP_1

RC59 25.5_0402_1%RC59 25.5_0402_1%

SM_RCOMP_2

RC61 200_0402_1%RC61 200_0402_1%

XDP_TCK_R XDP_TMS_R XDP_TRST#_R

XDP_TDI_R XDP_TDO_R

T4PAD T4PAD T5PAD T5PAD

RC55 51_0402_5%RC55 51_0402_5%

T6PAD T6PAD T7PAD T7PAD

Layout request for test point

2

CLK_CPU_DMI 17 CLK_CPU_DMI# 17

H_DRAMRST# 7

12 12 12

12

Stuff RC157 and RC158 if do not support eDP

CLK_CPU_EDP# CLK_CPU_EDP

DDR3 Compensation Signals Layout Note:Place these resistors near Processor

H_DRAMRST#

by ESD requestion and place near CPU

1

1 2

RC157 1K_0402_5%RC157 1K_0402_5%

1 2

RC158 1K_0402_5%RC158 1K_0402_5%

@

1 2

CC34 180P_0402_50V8J

+1.05VS_VCCP

FAN Control Circuit

Buffered Reset to CPU

+3VS

0.1U_0402_10V7K

1

CC36

PLT_RST# 20,26,27,28,31,32

UC2

PLT_RST#

A A

UC2

1

OE#

2

IN

3

GND

74AHC1G125GW_SOT353-5

VCC

OUT

2

5

4

5

+1.05VS_VCCP

12

RC38

RC38 75_0402_5%

75_0402_5%

RC35

43_0402_1%

BUFO_CPU_RST# BUF_CPU_RST#

43_0402_1%

1 2

12

RC40

RC40 0_0402_5%

0_0402_5% @

@

EN_DFAN131

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/03 2012/12/31

Compal Secret Data

Deciphered Date

+5VS

1A

C13

10U_0805_6.3V6M

U1

1

EN

2

+FAN2

10mil

2

3 4

12

C17

10U_0805_6.3V6M

VIN VOUT VSET

APL5607KI-TRG_SO8

8

GND

7

GND

6

GND

5

GND

Title

Size Document Number Rev

Custom

Date: Sheet

+FAN2

@

2

12

C15

C15 1000P_0402_50V7K

1000P_0402_50V7K

1

Compal Electronics, Inc.

Sandy Bridge_JTAG/XDP/FAN

QFKAA

1 2 3

4 5

ACES_85204-0300N

R24 10K_0402_5%R24 10K_0402_5%

FAN_SPEED1

1

C14

0.01U_0402_25V7K

0.01U_0402_25V7K @

@

2

1

JFAN

1 2 3

GND GND

@JFAN

@

12

+3VS

FAN_SPEED1 31

0.3

548Tuesday, March 27, 2012

0.3

of

5

4

3

2

1

+1.05VS_VCCP

JCPUA

D D

DMI_PTX_CRX_N018 DMI_PTX_CRX_N118

C C

eDP_COMP signals should be shorted near balls and routed with typical impedance <25m ohm

B B

+1.05VS_VCCP +1.05VS_VCCP

DMI_PTX_CRX_N218 DMI_PTX_CRX_N318

DMI_PTX_CRX_P018 DMI_PTX_CRX_P118 DMI_PTX_CRX_P218 DMI_PTX_CRX_P318

DMI_CTX_PRX_N018 DMI_CTX_PRX_N118 DMI_CTX_PRX_N218 DMI_CTX_PRX_N318

DMI_CTX_PRX_P018 DMI_CTX_PRX_P118 DMI_CTX_PRX_P218 DMI_CTX_PRX_P318

FDI_CTX_PRX_N018 FDI_CTX_PRX_N118 FDI_CTX_PRX_N218 FDI_CTX_PRX_N318 FDI_CTX_PRX_N418 FDI_CTX_PRX_N518 FDI_CTX_PRX_N618 FDI_CTX_PRX_N718

FDI_CTX_PRX_P018 FDI_CTX_PRX_P118 FDI_CTX_PRX_P218 FDI_CTX_PRX_P318 FDI_CTX_PRX_P418 FDI_CTX_PRX_P518 FDI_CTX_PRX_P618 FDI_CTX_PRX_P718

FDI_FSYNC018 FDI_FSYNC118

FDI_INT18 FDI_LSYNC018

FDI_LSYNC118

RC2 24.9_0402_1%RC2 24.9_0402_1%

1 2 1 2

RC3 10K_0402_5%RC3 10K_0402_5%

DMI_PTX_CRX_N0 DMI_PTX_CRX_N1 DMI_PTX_CRX_N2 DMI_PTX_CRX_N3

DMI_PTX_CRX_P0 DMI_PTX_CRX_P1 DMI_PTX_CRX_P2 DMI_PTX_CRX_P3

DMI_CTX_PRX_N0 DMI_CTX_PRX_N1 DMI_CTX_PRX_N2 DMI_CTX_PRX_N3

DMI_CTX_PRX_P0 DMI_CTX_PRX_P1 DMI_CTX_PRX_P2 DMI_CTX_PRX_P3

FDI_CTX_PRX_N0 FDI_CTX_PRX_N1 FDI_CTX_PRX_N2 FDI_CTX_PRX_N3 FDI_CTX_PRX_N4 FDI_CTX_PRX_N5 FDI_CTX_PRX_N6 FDI_CTX_PRX_N7

FDI_CTX_PRX_P0 FDI_CTX_PRX_P1 FDI_CTX_PRX_P2 FDI_CTX_PRX_P3 FDI_CTX_PRX_P4 FDI_CTX_PRX_P5 FDI_CTX_PRX_P6 FDI_CTX_PRX_P7

FDI_FSYNC0 FDI_FSYNC1

FDI_INT FDI_LSYNC0

FDI_LSYNC1

EDP_COMP H_EDP_HPD#

Reserve RC3 for HW Review demand

JCPUA

B27

DMI_RX#[0]

B25

DMI_RX#[1]

A25

DMI_RX#[2]

B24

DMI_RX#[3]

B28

DMI_RX[0]

B26

DMI_RX[1]

A24

DMI_RX[2]

B23

DMI_RX[3]

G21

DMI_TX#[0]

E22

DMI_TX#[1]

F21

DMI_TX#[2]

D21

DMI_TX#[3]

G22

DMI_TX[0]

D22

DMI_TX[1]

F20

DMI_TX[2]

C21

DMI_TX[3]

A21

FDI0_TX#[0]

H19

FDI0_TX#[1]

E19

FDI0_TX#[2]

F18

FDI0_TX#[3]

B21

FDI1_TX#[0]

C20

FDI1_TX#[1]

D18

FDI1_TX#[2]

E17

FDI1_TX#[3]

A22

FDI0_TX[0]

G19

FDI0_TX[1]

E20

FDI0_TX[2]

G18

FDI0_TX[3]

B20

FDI1_TX[0]

C19

FDI1_TX[1]

D19

FDI1_TX[2]

F17

FDI1_TX[3]

J18

FDI0_FSYNC

J17

FDI1_FSYNC

H20

FDI_INT

J19

FDI0_LSYNC

H17

FDI1_LSYNC

A18

eDP_COMPIO

A17

eDP_ICOMPO

B16

eDP_HPD#

C15

eDP_AUX

D15

eDP_AUX#

C17

eDP_TX[0]

F16

eDP_TX[1]

C16

eDP_TX[2]

G15

eDP_TX[3]

C18

eDP_TX#[0]

E16

eDP_TX#[1]

D16

eDP_TX#[2]

F15

eDP_TX#[3]

TYCO_2013620-2_IVY BRIDGE

@

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

PEG_RX#[0] PEG_RX#[1] PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6]

DMI

Intel(R) FDI

eDP

PEG_RX#[7] PEG_RX#[8]

PEG_RX#[9] PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15]

PEG_RX[10]

PEG_RX[11]

PEG_RX[12]

PEG_RX[13]

PEG_RX[14]

PEG_RX[15]

PEG_TX#[0]

PEG_TX#[1]

PEG_TX#[2]

PEG_TX#[3]

PEG_TX#[4]

PEG_TX#[5]

PEG_TX#[6]

PEG_TX#[7]

PEG_TX#[8]

PEG_TX#[9] PEG_TX#[10] PEG_TX#[11] PEG_TX#[12]

PCI EXPRESS* - GRAPHICS

PEG_TX#[13] PEG_TX#[14] PEG_TX#[15]

PEG_TX[10]

PEG_TX[11]

PEG_TX[12]

PEG_TX[13]

PEG_TX[14]

PEG_TX[15]

PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8] PEG_RX[9]

PEG_TX[0] PEG_TX[1] PEG_TX[2] PEG_TX[3] PEG_TX[4] PEG_TX[5] PEG_TX[6] PEG_TX[7] PEG_TX[8] PEG_TX[9]

J22 J21 H22

K33 M35 L34 J35 J32 H34 H31 G33 G30 F35 E34 E32 D33 D31 B33 C32

J33 L35 K34 H35 H32 G34 G31 F33 F30 E35 E33 F32 D34 E31 C33 B32

M29 M32 M31 L32 L29 K31 K28 J30 J28 H29 G27 E29 F27 D28 F26 E25

M28 M33 M30 L31 L28 K30 K27 J29 J27 H28 G28 E28 F28 D27 E26 D25

PEG_COMP

RC1

24.9_0402_1%

PEG_ICOMPI and RCOMPO signals should be shorted and routed with - max length = 500 mils - typical

12

impedance = 43 m ohm (4 mils) PEG_ICOMPO signals should be routed with max length = 500 mils

- typical impedance = 14.5 m ohm (12 mils)

A A

5

4

Security Classification

2010/09/03 2012/12/31

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

3

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

Sandy Bridge_DMI/PEG/FDI

QFKAA

648Tuesday, March 27, 2012

1

of

0.3

5

JCPUC

AP11

AN11

AL12 AM12 AM11

AL11

AP12 AN12

AJ14 AH14

AL15

AK15

AL14

AK14

AJ15 AH15

AE10

AF10

F10 G10

N10

M10

AG6 AG5 AK6 AK5 AH5 AH6 AJ5 AJ6 AJ8 AK8 AJ9 AK9 AH8 AH9 AL9 AL8

AE8 AD9 AF9

C5 D5 D3 D2 D6 C6 C2 C3

F8

G9

F9

F7 G8 G7

K4

K5

K1

K2 M8

N8

N7 M9

N9 M7

V6

J1 J5 J4 J2

JCPUC

SA_DQ[0] SA_DQ[1] SA_DQ[2] SA_DQ[3] SA_DQ[4] SA_DQ[5] SA_DQ[6] SA_DQ[7] SA_DQ[8] SA_DQ[9] SA_DQ[10] SA_DQ[11] SA_DQ[12] SA_DQ[13] SA_DQ[14] SA_DQ[15] SA_DQ[16] SA_DQ[17] SA_DQ[18] SA_DQ[19] SA_DQ[20] SA_DQ[21] SA_DQ[22] SA_DQ[23] SA_DQ[24] SA_DQ[25] SA_DQ[26] SA_DQ[27] SA_DQ[28] SA_DQ[29] SA_DQ[30] SA_DQ[31] SA_DQ[32] SA_DQ[33] SA_DQ[34] SA_DQ[35] SA_DQ[36] SA_DQ[37] SA_DQ[38] SA_DQ[39] SA_DQ[40] SA_DQ[41] SA_DQ[42] SA_DQ[43] SA_DQ[44] SA_DQ[45] SA_DQ[46] SA_DQ[47] SA_DQ[48] SA_DQ[49] SA_DQ[50] SA_DQ[51] SA_DQ[52] SA_DQ[53] SA_DQ[54] SA_DQ[55] SA_DQ[56] SA_DQ[57] SA_DQ[58] SA_DQ[59] SA_DQ[60] SA_DQ[61] SA_DQ[62] SA_DQ[63]

SA_BS[0] SA_BS[1] SA_BS[2]

SA_CAS# SA_RAS# SA_WE#

DDR SYSTEM MEMORY A

DDR_A_D[0..63]11

DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3

D D

C C

B B

DDR_A_BS011 DDR_A_BS111 DDR_A_BS211

DDR_A_CAS#11 DDR_A_RAS#11

DDR_A_WE#11

DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63

DDR_A_BS0 DDR_A_BS1 DDR_A_BS2

DDR_A_CAS# DDR_A_RAS# DDR_A_WE#

SA_CLK[0]

SA_CLK#[0]

SA_CKE[0]

SA_CLK[1]

SA_CLK#[1]

SA_CKE[1]

RSVD_TP[1] RSVD_TP[2] RSVD_TP[3]

RSVD_TP[4] RSVD_TP[5] RSVD_TP[6]

SA_CS#[0]

SA_CS#[1] RSVD_TP[7] RSVD_TP[8]

SA_ODT[0] SA_ODT[1]

RSVD_TP[9]

RSVD_TP[10]

SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7]

SA_DQS[0] SA_DQS[1] SA_DQS[2] SA_DQS[3] SA_DQS[4] SA_DQS[5] SA_DQS[6] SA_DQS[7]

SA_MA[0] SA_MA[1] SA_MA[2] SA_MA[3] SA_MA[4] SA_MA[5] SA_MA[6] SA_MA[7] SA_MA[8]

SA_MA[9] SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15]

4

DDR_B_D[0..63]12

DDRA_CLK0

AB6

DDRA_CLK0#

AA6

DDRA_CKE0

V9

DDRA_CLK1 DDRB_CLK1

AA5

DDRA_CLK1# DDRB_CLK1#

AB5

DDRA_CKE1 DDRB_CKE1

V10

AB4 AA4 W9

AB3 AA3 W10

DDRA_SCS0# DDRB_SCS0#

AK3

DDRA_SCS1#

AL3 AG1 AH1

DDRA_ODT0 DDRB_ODT0

AH3

DDRA_ODT1

AG3 AG2 AH2

DDR_A_DQS#0

C4

DDR_A_DQS#1

G6

DDR_A_DQS#2

J3

DDR_A_DQS#3

M6

DDR_A_DQS#4

AL6

DDR_A_DQS#5

AM8

DDR_A_DQS#6

AR12

DDR_A_DQS#7

AM15

DDR_A_DQS0

D4

DDR_A_DQS1

F6

DDR_A_DQS2

K3

DDR_A_DQS3

N6

DDR_A_DQS4

AL5

DDR_A_DQS5

AM9

DDR_A_DQS6

AR11

DDR_A_DQS7

AM14

DDR_A_MA0

AD10

DDR_A_MA1

W1

DDR_A_MA2

W2

DDR_A_MA3

W7

DDR_A_MA4

V3

DDR_A_MA5

V2

DDR_A_MA6

W3

DDR_A_MA7

W6

DDR_A_MA8

V1

DDR_A_MA9

W5

DDR_A_MA10

AD8

DDR_A_MA11

V4

DDR_A_MA12

W4

DDR_A_MA13

AF8

DDR_A_MA14

V5

DDR_A_MA15

V7

DDRA_CLK0 11 DDRB_CLK0 12 DDRA_CLK0# 11 DDRA_CKE0 11 DDRB_CKE0 12

DDRA_CLK1 11 DDRA_CLK1# 11 DDRB_CLK1# 12 DDRA_CKE1 11

DDRA_SCS0# 11 DDRA_SCS1# 11 DDRB_SCS1# 12

DDRA_ODT0 11 DDRB_ODT0 12 DDRA_ODT1 11 DDRB_ODT1 12

DDR_A_DQS#[0..7] 11

DDR_A_DQS[0..7] 11

DDR_A_MA[0..15] 11

DDR_B_CAS#12 DDR_B_RAS#12

DDR_B_WE#12

3

JCPUD

DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63

DDR_B_BS012 DDR_B_BS112 DDR_B_BS212

DDR_B_BS0 DDR_B_BS1 DDR_B_BS2

DDR_B_CAS# DDR_B_RAS# DDR_B_WE#

D10

K10

AM5 AM6 AR3

AP3 AN3 AN2 AN1

AP2

AP5 AN9

AT5

AT6

AP6 AN8 AR6 AR5 AR9

AJ11

AT8

AT9

AH11

AR8

AJ12 AH12 AT11 AN14 AR14 AT14 AT12 AN15 AR15 AT15

AA9

AA7

AA10

AB8

AB9

J10

C9

A7

C8

A9

A8 D9 D8 G4

F4

F1 G1 G5

F5

F2 G2

J7

J8

K9

J9

K8

K7 M5 N4 N2 N1 M4 N5 M2 M1

R6

SB_DQ[0] SB_DQ[1] SB_DQ[2] SB_DQ[3] SB_DQ[4] SB_DQ[5] SB_DQ[6] SB_DQ[7] SB_DQ[8] SB_DQ[9] SB_DQ[10] SB_DQ[11] SB_DQ[12] SB_DQ[13] SB_DQ[14] SB_DQ[15] SB_DQ[16] SB_DQ[17] SB_DQ[18] SB_DQ[19] SB_DQ[20] SB_DQ[21] SB_DQ[22] SB_DQ[23] SB_DQ[24] SB_DQ[25] SB_DQ[26] SB_DQ[27] SB_DQ[28] SB_DQ[29] SB_DQ[30] SB_DQ[31] SB_DQ[32] SB_DQ[33] SB_DQ[34] SB_DQ[35] SB_DQ[36] SB_DQ[37] SB_DQ[38] SB_DQ[39] SB_DQ[40] SB_DQ[41] SB_DQ[42] SB_DQ[43] SB_DQ[44] SB_DQ[45] SB_DQ[46] SB_DQ[47] SB_DQ[48] SB_DQ[49] SB_DQ[50] SB_DQ[51] SB_DQ[52] SB_DQ[53] SB_DQ[54] SB_DQ[55] SB_DQ[56] SB_DQ[57] SB_DQ[58] SB_DQ[59] SB_DQ[60] SB_DQ[61] SB_DQ[62] SB_DQ[63]

SB_BS[0] SB_BS[1] SB_BS[2]

SB_CAS# SB_RAS# SB_WE#

2

SB_CLK[0]

SB_CLK#[0]

SB_CKE[0]

SB_CLK[1]

SB_CLK#[1]

SB_CKE[1]

RSVD_TP[11] RSVD_TP[12] RSVD_TP[13]

RSVD_TP[14] RSVD_TP[15] RSVD_TP[16]

SB_CS#[0]

SB_CS#[1] RSVD_TP[17] RSVD_TP[18]

SB_ODT[0]

SB_ODT[1] RSVD_TP[19] RSVD_TP[20]

SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7]

SB_DQS[0]

SB_DQS[1]

SB_DQS[2]

SB_DQS[3]

SB_DQS[4]

SB_DQS[5]

SB_DQS[6]

SB_DQS[7]

DDR SYSTEM MEMORY B

SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8]

SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15]

AE2 AD2 R9

AE1 AD1 R10

AB2 AA2 T9

AA1 AB1 T10

AD3 AE3 AD6 AE6

AE4 AD4 AD5 AE5

DDR_B_DQS#0

D7

DDR_B_DQS#1

F3

DDR_B_DQS#2

K6

DDR_B_DQS#3

N3

DDR_B_DQS#4

AN5

DDR_B_DQS#5

AP9

DDR_B_DQS#6

AK12

DDR_B_DQS#7

AP15

C7 G3 J6 M3 AN6 AP8 AK11 AP14

AA8 T7 R7 T6 T2 T4 T3 R2 T5 R3 AB7 R1 T1 AB10 R5 R4

DDRB_CLK0 DDRB_CLK0# DDRB_CKE0

DDRB_SCS1#

DDRB_ODT1

DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7

DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8

DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14 DDR_B_MA15

1

DDRB_CLK0# 12

DDRB_CLK1 12 DDRB_CKE1 12

DDRB_SCS0# 12

DDR_B_DQS#[0..7] 12

DDR_B_DQS[0..7] 12

DDR_B_MA[0..15] 12

TYCO_2013620-2_IVY BRIDGE

@

RC75

0_0402_5%

1 2

@

QC3

D

S

D

S

DDR3_DRAMRST#_RH_DRAMRST#

1 2

13

BSS138_NL_SOT23-3

G

2

1

CC37

0.047U_0402_25V6K

2

H_DRAMRST#5

RC78

4.99K_0402_1%

A A

DRAMRST_CNTRL_PCH11,17 DRAMRST_CNTRL_EC31

5

4.99K_0402_1%

DRAMRST_CNTRL

1 2

RC73 0_0402_5%RC73 0_0402_5%

1 2

RC74 0_0402_5%@RC74 0_0402_5%@

RC76

1K_0402_5%

+1.5V

12

1 2

4

RC77

RC77 1K_0402_5%

1K_0402_5%

SM_DRAMRST# 11,12

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

TYCO_2013620-2_IVY BRIDGE

@

Compal Secret Data

2010/09/03 2012/12/31

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

Sandy Bridge_DDR3

QFKAA

1

748Tuesday, March 27, 2012

of

0.3

5

4

3

2

1

+CPU_CORE

D D

AG35 AG34 AG33 AG32 AG31 AG30 AG29 AG28 AG27 AG26 AF35 AF34 AF33 AF32 AF31 AF30 AF29 AF28 AF27 AF26 AD35 AD34 AD33 AD32 AD31 AD30 AD29 AD28 AD27

C C

B B

A A

AD26 AC35 AC34 AC33 AC32 AC31 AC30 AC29 AC28 AC27 AC26 AA35 AA34 AA33 AA32 AA31 AA30 AA29 AA28 AA27 AA26

Y35 Y34 Y33 Y32 Y31 Y30 Y29 Y28 Y27 Y26 V35 V34 V33 V32 V31 V30 V29 V28 V27 V26 U35 U34 U33 U32 U31 U30 U29 U28 U27 U26 R35 R34 R33 R32 R31 R30 R29 R28 R27 R26 P35 P34 P33 P32 P31 P30 P29 P28 P27 P26

POWER

JCPUF

POWER

97A

VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 VCC18 VCC19 VCC20 VCC21 VCC22 VCC23 VCC24 VCC25 VCC26 VCC27 VCC28 VCC29 VCC30 VCC31 VCC32 VCC33 VCC34 VCC35 VCC36 VCC37 VCC38 VCC39 VCC40 VCC41 VCC42 VCC43 VCC44 VCC45 VCC46 VCC47 VCC48 VCC49 VCC50 VCC51 VCC52 VCC53 VCC54 VCC55 VCC56 VCC57 VCC58 VCC59 VCC60 VCC61 VCC62 VCC63 VCC64 VCC65 VCC66 VCC67 VCC68 VCC69 VCC70 VCC71 VCC72 VCC73 VCC74 VCC75 VCC76 VCC77 VCC78 VCC79 VCC80 VCC81 VCC82 VCC83 VCC84 VCC85 VCC86 VCC87 VCC88 VCC89 VCC90 VCC91 VCC92 VCC93 VCC94 VCC95 VCC96 VCC97 VCC98 VCC99 VCC100

TYCO_2013620-2_IVY BRIDGE

@

CORE SUPPLY

5

PEG AND DDR

VCCIO_SENSE

VSS_SENSE_VCCIO

SENSE LINES SVID

8.5A

VCCIO1 VCCIO2 VCCIO3 VCCIO4 VCCIO5 VCCIO6 VCCIO7 VCCIO8

VCCIO9 VCCIO10 VCCIO11 VCCIO12 VCCIO13 VCCIO14 VCCIO15 VCCIO16 VCCIO17 VCCIO18 VCCIO19 VCCIO20 VCCIO21 VCCIO22 VCCIO23 VCCIO24

VCCIO25 VCCIO26 VCCIO27 VCCIO28 VCCIO29 VCCIO30 VCCIO31 VCCIO32 VCCIO33 VCCIO34 VCCIO35 VCCIO36 VCCIO37 VCCIO38 VCCIO39

VCCIO40

VIDALERT#

VIDSCLK

VIDSOUT

VCC_SENSE

VSS_SENSE

+1.05VS_VCCP

AH13 AH10 AG10 AC10 Y10 U10 P10 L10 J14 J13 J12 J11 H14 H12 H11 G14 G13 G12 F14 F13 F12 F11 E14 E12

E11 D14 D13 D12 D11 C14 C13 C12 C11 B14 B12 A14 A13 A12 A11

J23

H_CPU_SVIDALRT#

AJ29

H_CPU_SVIDCLK

AJ30

H_CPU_SVIDDAT

AJ28

VCCSENSE_R

AJ35

VSSSENSE_R

AJ34

VCCIO_SENSE

B10 A10

Close to CPU

0.1U_0402_10V7K

0.1U_0402_10V7K 1 2

CC50

@

RC94 0_0402_5%RC94 0_0402_5%

1 2

RC95 0_0402_5%RC95 0_0402_5%

1 2

RC96

RC96 10_0402_1%

10_0402_1%

12

RC98

RC98 10_0402_1%

10_0402_1%

12

+1.05VS_VCCP+1.05VS_VCCP

12

RC91

RC91 130_0402_5%

130_0402_5%

1 2

RC90 43_0402_1%RC90 43_0402_1%

1 2

RC88 0_0402_5%RC88 0_0402_5%

1 2

RC92 0_0402_5%RC92 0_0402_5%

VCCIO_SENSE 39

+1.05VS_VCCP

4

0.1U_0402_10V7K

0.1U_0402_10V7K 1 2

CC49

12

@

RC89

RC89 75_0402_5%

75_0402_5%

VR_SVID_ALRT# 42 VR_SVID_CLK 42 VR_SVID_DAT 42

Pull high resistor on VR side

+CPU_CORE

RC93

Close to CPU

100_0402_1%

1 2

12

RC97

RC97 100_0402_1%

100_0402_1%

VCCSENSE 42 VSSSENSE 42

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/03 2012/12/31

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

Sandy Bridge_POWER-1

QFKAA

1

848Tuesday, March 27, 2012

of

0.3

5

+GFX_CORE

AT24

1

CC61

CC61 1U_0402_6.3V6K

1U_0402_6.3V6K

2

AT23 AT21 AT20 AT18 AT17 AR24 AR23 AR21 AR20 AR18 AR17 AP24 AP23 AP21 AP20 AP18 AP17 AN24 AN23 AN21 AN20 AN18

AN17 AM24 AM23 AM21 AM20 AM18 AM17

AL24

AL23

AL21

AL20

AL18

AL17

AK24

AK23

AK21

AK20

AK18

AK17

AJ24

AJ23

AJ21

AJ20

AJ18

AJ17

AH24

AH23

AH21

AH20

AH18

AH17

D D

C C

VCCPLL Decoupling: 1X 330U (6m ohm), 1X 10U, 2x1U

+1.8VS

RC119

10U_0805_10V6K

B B

0_0805_5%

A A

1

+

CC58

CC58 @

@

2

330U_B2_2.5VM_R15M

10U_0805_10V6K

12

0_0805_5%

+1.8VS_VCCPLL

1

CC59

CC60

2

1U_0402_6.3V6K

4

JCPUG

33A

VAXG1 VAXG2 VAXG3 VAXG4 VAXG5 VAXG6 VAXG7 VAXG8 VAXG9 VAXG10 VAXG11 VAXG12 VAXG13 VAXG14 VAXG15 VAXG16 VAXG17 VAXG18 VAXG19 VAXG20 VAXG21 VAXG22 VAXG23 VAXG24 VAXG25 VAXG26 VAXG27 VAXG28 VAXG29 VAXG30 VAXG31 VAXG32 VAXG33 VAXG34 VAXG35 VAXG36 VAXG37 VAXG38 VAXG39 VAXG40 VAXG41 VAXG42 VAXG43 VAXG44 VAXG45 VAXG46 VAXG47 VAXG48 VAXG49 VAXG50 VAXG51 VAXG52 VAXG53 VAXG54

1.5A

B6

VCCPLL1

A6

VCCPLL2

A2

VCCPLL3

TYCO_2013620-2_IVY BRIDGE

TYCO_2013620-2_IVY BRIDGE @

@

POWER

VSSAXG_SENSE

SENSE

LINES

SENSE

LINES

SA_DIMM_VREFDQ SB_DIMM_VREFDQ

VREFMISC

GRAPHICS

DDR3 -1.5V RAILS

SA RAIL

VCCSA_SENSE

1.8V RAIL

VAXG_SENSE

VCCSA_VID[0] VCCSA_VID[1]

AK35 AK34

AL1

SM_VREF

B4 D1

5A

AF7

VDDQ1

AF4

VDDQ2

AF1

VDDQ3

AC7

VDDQ4

AC4

VDDQ5

AC1

VDDQ6

Y7

VDDQ7

Y4

VDDQ8

Y1

VDDQ9

U7

VDDQ10

U4

VDDQ11

U1

VDDQ12

P7

VDDQ13

P4

VDDQ14

P1

VDDQ15

Bottom Socket Cavity

6A

M27

VCCSA1

M26

VCCSA2

L26

VCCSA3

J26

VCCSA4

J25

VCCSA5

J24

VCCSA6

H26

VCCSA7

H25

VCCSA8

H23

C22 C24

A19

VCCIO_SEL

3

VCC_AXG_SENSE

VSS_AXG_SENSE

+V_SM_VREF should have 20 mil trace width

+V_SM_VREF

+VREF_DQA_M3 +VREF_DQB_M3

10U_0805_10V6K

1

CC55

2

10U_0805_10V6K

CC40

H_VCCSA_VID0 H_VCCSA_VID1

1

CC41

2

10U_0805_10V6K

CC42

0_0402_5% @

RC120

RC120 1K_0402_0.5%

1K_0402_0.5%

1 2

1K_0402_0.5%

1 2

RC109

1

CC52

2

10U_0805_10V6K

RC109

10U_0805_10V6K

CC53

0.1U_0402_10V7K

1

CC51

CC56

2

10U_0805_10V6K

1

CC65

2

10U_0805_10V6K

1

CC57

2

+VCCSA Decoupling: 1X 330U (6m ohm), 3X 10U

+VCCSA

Co-lay for Cost Down Plan

1 2

RC189 0_0402_5%RC189 0_0402_5%

1

CC43

2

10U_0805_10V6K

Bottom Socket Edge

1 2

H_VCCSA_VID0 41 H_VCCSA_VID1 41

1

+

CC44

@

RC111

@

2

330U_D2_2VM_R6M

2

+VCCSA_SENSE 41

Please kindly check whether pull down by 10k in PWR-Side

+1.5V_CPU +1.5V

CC46 0.1U_0402_10V7KCC46 0.1U_0402_10V7K CC47 0.1U_0402_10V7KCC47 0.1U_0402_10V7K CC48 0.1U_0402_10V7KCC48 0.1U_0402_10V7K CC45 0.1U_0402_10V7KCC45 0.1U_0402_10V7K

+GFX_CORE

12

RC105

Close to CPU

10_0402_1%

RC106

1 2

10_0402_1%

+1.5V_CPU

+1.5V_CPU Decoupling: 1X 330U (6m ohm), 6X 10U

+1.5V_CPU

ESR 6mohm

1

+

CC54

@

330U_D2_2VM_R6M

2

+VCCSA_SENSE

1 2 1 2 1 2 1 2

470_0805_5%

SUSP

2N7002DW-T/R7_SOT363-6

2

VCC_AXG_SENSE 42 VSS_AXG_SENSE 42

0

1

11

Vgs=10V,Id=14.5A,Rds=6mohm

1

CC68

CC68 10U_0805_10V6K

10U_0805_10V6K

2

1 2 3

0.1U_0402_25V6

4

QC5B

RC192

5

CC69

0

1

0

2

JUMP_43X118

JUMP_43X118 QC4

QC4

1

S

2

S

3

S

4

G

FDS6676AS_SO8

1

2

PJ1

@PJ1

@

112

8

D

7

D

6

D

5

D

RUN_ON_CPU1.5VS3

12

RC194

RC194 820K_0402_5%

820K_0402_5%

+VCCSAVCCSA_VID0 VCCSA_VID1

0.90 V

0.80 V

0.75 V

0.65 V

+1.5VS+1.5V_CPU

+1.5V

C469

4.7U_0805_10V4Z

61

1

For Sandy Bridge

C464

4.7U_0805_10V4Z

4.7U_0805_10V4Z 1 2

C463

1 2

1U_0402_6.3V6K

1 2

RC193

1 2

220K_0402_5%

QC5A

SUSP

2

2N7002DW-T/R7_SOT363-6

+VSB

SUSP 5,34

5

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/03 2012/12/31

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

Sandy Bridge_POWER-2

QFKAA

1

948Tuesday, March 27, 2012

of

0.3

5

JCPUH

AT35

VSS1

AT32

VSS2

AT29

VSS3

AT27

VSS4

AT25

VSS5

AT22

VSS6

AT19

VSS7

AT16

VSS8

AT13

VSS9

AT10

VSS10

AT7

VSS11

AT4

AR25 AR22 AR19 AR16 AR13 AR10

AP34 AP31 AP28 AP25 AP22 AP19 AP16 AP13 AP10

AN30 AN27 AN25 AN22 AN19 AN16 AN13 AN10

AM29 AM25 AM22 AM19 AM16 AM13 AM10

AL34 AL31 AL28 AL25 AL22 AL19 AL16 AL13 AL10

AK33 AK30 AK27 AK25 AK22 AK19 AK16 AK13 AK10

AJ25

AT3

AR7 AR4 AR2

AP7 AP4 AP1

AN7 AN4

AM7 AM4 AM3 AM2 AM1

AK7 AK4

VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65

AL7

VSS66

AL4

VSS67

AL2

VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80

D D

C C

B B

VSS

VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS98

VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160

AJ22 AJ19 AJ16 AJ13 AJ10 AJ7 AJ4 AJ3 AJ2 AJ1 AH35 AH34 AH32 AH30 AH29 AH28 AH25 AH22 AH19 AH16 AH7 AH4 AG9 AG8 AG4 AF6 AF5 AF3 AF2 AE35 AE34 AE33 AE32 AE31 AE30 AE29 AE28 AE27 AE26 AE9 AD7 AC9 AC8 AC6 AC5 AC3 AC2 AB35 AB34 AB33 AB32 AB31 AB30 AB29 AB28 AB27 AB26 Y9 Y8 Y6 Y5 Y3 Y2 W35 W34 W33 W32 W31 W30 W29 W28 W27 W26 U9 U8 U6 U5 U3 U2

JCPUI

T35

VSS161

T34

VSS162

T33

VSS163

T32

VSS164

T31

VSS165

T30

VSS166

T29

VSS167

T28

VSS168

T27

VSS169

T26

VSS170

P9

VSS171

P8

VSS172

P6

VSS173

P5

VSS174

P3

VSS175

P2

VSS176

N35

VSS177

N34

VSS178

N33

VSS179

N32

VSS180

N31

VSS181

N30

VSS182

N29

VSS183

N28

VSS184

N27

VSS185

N26

VSS186

M34

VSS187

L33

VSS188

L30

VSS189

L27

VSS190

L9

VSS191

L8

VSS192

L6

VSS193

L5

VSS194

L4

VSS195

L3

VSS196

L2

VSS197

L1

VSS198

K35

VSS199

K32

VSS200

K29

VSS201

K26

VSS202

J34

VSS203

J31

VSS204

H33

VSS205

H30

VSS206

H27

VSS207

H24

VSS208

H21

VSS209

H18

VSS210

H15

VSS211

H13

VSS212

H10

VSS213

H9

VSS214

H8

VSS215

H7

VSS216

H6

VSS217

H5

VSS218

H4

VSS219

H3

VSS220

H2

VSS221

H1

VSS222

G35

VSS223

G32

VSS224

G29

VSS225

G26

VSS226

G23

VSS227

G20

VSS228

G17

VSS229

G11

VSS230

F34

VSS231

F31

VSS232

F29

VSS233

4

VSS

VSS234 VSS235 VSS236 VSS237 VSS238 VSS239 VSS240 VSS241 VSS242 VSS243 VSS244 VSS245 VSS246 VSS247 VSS248 VSS249 VSS250 VSS251 VSS252 VSS253 VSS254 VSS255 VSS256 VSS257 VSS258 VSS259 VSS260 VSS261 VSS262 VSS263 VSS264 VSS265 VSS266 VSS267 VSS268 VSS269 VSS270 VSS271 VSS272 VSS273 VSS274 VSS275 VSS276 VSS277 VSS278 VSS279 VSS280 VSS281 VSS282 VSS283 VSS284 VSS285

3

JCPUE

F22 F19 E30 E27 E24 E21 E18 E15 E13 E10 E9 E8 E7 E6 E5 E4 E3 E2 E1 D35 D32 D29 D26 D20 D17 C34 C31 C28 C27 C25 C23 C10 C1 B22 B19 B17 B15 B13 B11 B9 B8 B7 B5 B3 B2 A35 A32 A29 A26 A23 A20 A3

CFG4

AK28

CFG[0]

AK29

CFG[1]

AL26

CFG[2]

AL27

CFG[3]

AK26

CFG[4]

AL29

CFG[5]

AL30

CFG[6]

AM31

CFG[7]

AM32

CFG[8]

AM30

CFG[9]

AM28

CFG[10]

AM26

CFG[11]

AN28

CFG[12]

AN31

CFG[13]

AN26

CFG[14]

AM27

CFG[15]

AK31

CFG[16]

AN29

CFG[17]

AJ31

VAXG_VAL_SENSE

AH31

VSSAXG_VAL_SENSE

AJ33

VCC_VAL_SENSE

AH33

VSS_VAL_SENSE

AJ26

RSVD5

F25

RSVD8

F24

RSVD9

F23

RSVD10

D24

RSVD11

G25

RSVD12

G24

RSVD13

E23

RSVD14

D23

RSVD15

C30

RSVD16

A31

RSVD17

B30

RSVD18

B29

RSVD19

D30

RSVD20

B31

RSVD21

A30

RSVD22

C29

RSVD23

J20

RSVD24

B18

RSVD25

J15

RSVD27

TYCO_2013620-2_IVY BRIDGE

TYCO_2013620-2_IVY BRIDGE @

@

CFG

VCC_DIE_SENSE VSS_DIE_SENSE

RSVD28 RSVD29 RSVD30 RSVD31

RSVD32

RSVD33 RSVD34 RSVD35

RSVD37 RSVD38 RSVD39 RSVD40

RSVD_NCTF1 RSVD_NCTF2 RSVD_NCTF3 RSVD_NCTF4 RSVD_NCTF5

RSVD_NCTF6 RSVD_NCTF7

RESERVED

RSVD_NCTF8 RSVD_NCTF9

RSVD_NCTF10

RSVD51 RSVD52

BCLK_ITP

BCLK_ITP#

RSVD_NCTF11 RSVD_NCTF12 RSVD_NCTF13

KEY

AH27 AH26

L7 AG7 AE7 AK2

W8

AT26 AM33 AJ27

T8 J16 H16 G16

AR35 AT34 AT33 AP35 AR34

B34 A33 A34 B35 C35

AJ32 AK32

AN35 AM35

AT2 AT1 AR1

B1

2

CFG Straps for Processor

(CFG[17:0] internal pull high to VCCIO)

T3PAD T3PAD

PEG Static Lane Reversal - CFG2 is for the 16x

CFG2

CFG4

Embedded Display Port Presence Strap

CFG4

T64PAD T64PAD

PCIE Port Bifurcation Straps

11: (Default) x16 - Device 1 functions 1 and 2 disabled

*

10: x8, x8 - Device 1 function 1 enabled ; function 2

CFG[6:5]

disabled 01: Reserved - (Device 1 function 1 disabled ; function

2 enabled) 00: x8,x4,x4 - Device 1 functions 1 and 2 enabled

1

1: Normal Operation; Lane # definition matches socket pin map definition

*

0:Lane Reversed

12

RC82

RC82 1K_0402_1%

1K_0402_1% @

@

1 : Disabled; No Physical Display Port attached to Embedded Display Port

*

0 : Enabled; An external Display Port device is connected to the Embedded Display Port

TYCO_2013620-2_IVY BRIDGE

@

TYCO_2013620-2_IVY BRIDGE

@

PEG DEFER TRAINING

1: (Default) PEG Train immediately following xxRESETB de assertion

CFG7

0: PEG Wait for BIOS for training

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/03 2012/12/31

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Sandy Bridge_GND/RSVD/CFG

QFKAA

1

of

10 48Tuesday, March 27, 2012

0.3

5

+VREF_DQA

1

CD2

CD1

0.1U_0402_10V7K

0.1U_0402_10V7K 2

D D

Close to JDDRL.1

C C

B B

A A

+3VS

CD25

DDR_A_BS27

DDRA_CLK07 DDRA_CLK0#7

DDR_A_BS07

DDR_A_WE#7

DDR_A_CAS#7

DDRA_SCS1#7

1 CD26

CD26

2

2.2U_0603_6.3V4Z

DDR_A_D0 DDR_A_D1

1

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z 2

DDR_A_D2 DDR_A_D3

DDR_A_D8 DDR_A_D9

DDR_A_DQS#1 DDR_A_DQS1

DDR_A_D10 DDR_A_D11

DDR_A_D16 DDR_A_D17

DDR_A_DQS#2 DDR_A_DQS2

DDR_A_D18 DDR_A_D19

DDR_A_D24 DDR_A_D25

DDR_A_D26 DDR_A_D27

DDRA_CKE0

DDR_A_BS2 DDR_A_MA12

DDR_A_MA9 DDR_A_MA8

DDR_A_MA5 DDR_A_MA3

DDR_A_MA1 DDRA_CLK0

DDRA_CLK0# DDR_A_MA10

DDR_A_BS0 DDR_A_WE#

DDR_A_CAS# DDR_A_MA13

DDRA_SCS1#

DDR_A_D32 DDR_A_D33

DDR_A_DQS#4 DDR_A_DQS4

DDR_A_D34 DDR_A_D35

DDR_A_D40 DDR_A_D41

DDR_A_D42 DDR_A_D43

DDR_A_D48 DDR_A_D49

DDR_A_DQS#6 DDR_A_DQS6

DDR_A_D50 DDR_A_D51

DDR_A_D56 DDR_A_D57

DDR_A_D58 DDR_A_D59

RD8

1 2

10K_0402_5%

1

2

0.1U_0402_10V7K

5

+0.75VS

12

RD9

RD9 10K_0402_5%

10K_0402_5%

+1.5V

JDDR3L

1

VREF_DQ

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DM0

13

VSS

15

DQ2

17

DQ3

19

VSS

21

DQ8

23

DQ9

25

VSS

27

DQS1#

29

DQS1

31

VSS

33

DQ10

35

DQ11

37

VSS

39

DQ16

41

DQ17

43

VSS

45

DQS2#

47

DQS2

49

VSS

51

DQ18

53

DQ19

55

VSS

57

DQ24

59

DQ25

61

VSS

63

DM3

65

VSS

67

DQ26

69

DQ27

71

VSS

73

CKE0

75

VDD

77

NC

79

BA2

81

VDD

83

A12/BC#

85

A9

87

VDD

89

A8

91

A5

93

VDD

95

A3

97

A1

99

VDD

101

CK0

103

CK0#

105

VDD

107

A10/AP

109

BA0

111

VDD

113

WE#

115

CAS#

117

VDD

119

A13

121

S1#

123

VDD

125

TEST

127

VSS

129

DQ32

131

DQ33

133

VSS

135

DQS4#

137

DQS4

139

VSS

141

DQ34

143

DQ35

145

VSS

147

DQ40

149

DQ41

151

VSS

153

DM5

155

VSS

157

DQ42

159

DQ43

161

VSS

163

DQ48

165

DQ49

167

VSS

169

DQS6#

171

DQS6

173

VSS

175

DQ50

177

DQ51

179

VSS

181

DQ56

183

DQ57

185

VSS

187

DM7

189

VSS

191

DQ58

193

DQ59

195

VSS

197

SA0

199

VDDSPD

201

SA1

203

VTT

205

GND1

207

BOSS1

LCN_DAN06-K4406-0103

LCN_DAN06-K4406-0103 @

@

VSS DQ4 DQ5 VSS

DQS0#

DQS0

VSS DQ6 DQ7

VSS DQ12 DQ13

VSS

DM1

RESET#

VSS DQ14 DQ15

VSS DQ20 DQ21

VSS

DM2

VSS DQ22 DQ23

VSS DQ28 DQ29

VSS

DQS3#

DQS3

VSS DQ30 DQ31

VSS

CKE1

VDD

CK1#

VDD RAS#

VDD ODT0

VDD ODT1

VDD

VREF_CA

VSS DQ36 DQ37

VSS

DM4

VSS DQ38 DQ39

VSS DQ44 DQ45

VSS

DQS5#

DQS5

VSS DQ46 DQ47

VSS DQ52 DQ53

VSS

DM6

VSS DQ54 DQ55

VSS DQ60 DQ61

VSS

DQS7#

DQS7

VSS DQ62 DQ63

VSS

EVENT#

SDA

GND2

BOSS2

A15 A14

A11

CK1

BA1

S0#

SCL VTT

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72

74 76 78 80 82 84 86

A7

88 90

A6

92

A4

94 96

A2

98

A0

100 102 104 106 108 110 112 114 116 118 120 122

NC

124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

206 208

+1.5V

DDR_A_D4 DDR_A_D5

DDR_A_DQS#0 DDR_A_DQS0

DDR_A_D6 DDR_A_D7

DDR_A_D12 DDR_A_D13

SM_DRAMRST# DDR_A_D14

DDR_A_D15 DDR_A_D20

DDR_A_D21

DDR_A_D22 DDR_A_D23

DDR_A_D28 DDR_A_D29

DDR_A_DQS#3 DDR_A_DQS3

DDR_A_D30 DDR_A_D31

DDRA_CKE1 DDR_A_MA15

DDR_A_MA14 DDR_A_MA11

DDR_A_MA7 DDR_A_MA6

DDR_A_MA4 DDR_A_MA2

DDR_A_MA0 DDRA_CLK1

DDRA_CLK1# DDR_A_BS1

DDR_A_RAS# DDRA_SCS0#

DDRA_ODT0 DDRA_ODT1

+VREF_CAA DDR_A_D36

DDR_A_D37

DDR_A_D38 DDR_A_D39

DDR_A_D44 DDR_A_D45

DDR_A_DQS#5 DDR_A_DQS5

DDR_A_D46 DDR_A_D47

DDR_A_D52 DDR_A_D53

DDR_A_D54 DDR_A_D55

DDR_A_D60 DDR_A_D61

DDR_A_DQS#7 DDR_A_DQS7

DDR_A_D62 DDR_A_D63

PM_SMBDATA PM_SMBCLK

+0.75VS

4

DDR3 SO-DIMM A Reverse Type

SM_DRAMRST# 7,12

DDRA_CKE1 7DDRA_CKE07

DDRA_CLK1 7 DDRA_CLK1# 7

DDR_A_BS1 7 DDR_A_RAS# 7

DDRA_SCS0# 7 DDRA_ODT0 7

DDRA_ODT1 7

+VREF_CAA_DIMMA

1

CD16

CD15

close to JDDRL.126

PM_SMBDATA 12,17,26 PM_SMBCLK 12,17,26

4

0.1U_0402_10V7K

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z 2

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Intel DDR Vref M3

+VREF_DQA_M3

+VREF_DQB_M3

13

D

QC9

BSS138_NL_SOT23-3

+1.5V

12

+1.5V

2010/09/03 2012/12/31

3

QC9

S

RD6

1K_0402_1%

RD7

1K_0402_1%

Layout Note: Place near JDDRL

CD7 co-lay with CD14

+

1 2

CD14 330U_D2_2V_Y

+

@

1 2

CD7 330U_2.5V_M

CD8 10U_0603_6.3V6MCD8 10U_0603_6.3V6M

1 2

CD9 10U_0603_6.3V6MCD9 10U_0603_6.3V6M

1 2

CD10 10U_0603_6.3V6MCD10 10U_0603_6.3V6M

1 2

CD11 10U_0603_6.3V6MCD11 10U_0603_6.3V6M

1 2

CD12 10U_0603_6.3V6MCD12 10U_0603_6.3V6M

1 2

CD13 10U_0603_6.3V6MCD13 10U_0603_6.3V6M

1 2

Compal Secret Data

DDR_A_DQS[0..7] 7 DDR_A_DQS#[0..7] 7

DDR_A_D[0..63] 7 DDR_A_MA[0..15] 7

BSS138_NL_SOT23-3

2

G

+1.5V

Layout Note: Place these 4 Caps near Command and Control signals of DIMMA

Deciphered Date

2

@

12

0_0402_5%

RC115

QC7

D

S

D

S

13

G

2

RH100

10K_0402_5%

G

2

13

D

S

D

S

QC8

@

12

0_0402_5%

RC116

H_SNB_IVB# 5,21

1 2

CD50 33P_0402_50V8KCD50 33P_0402_50V8K

1 2

CD51 33P_0402_50V8KCD51 33P_0402_50V8K

1 2

CD52 33P_0402_50V8KCD52 33P_0402_50V8K

1 2

CD53 33P_0402_50V8KCD53 33P_0402_50V8K

1 2

CD54 33P_0402_50V8KCD54 33P_0402_50V8K

1 2

CD55 33P_0402_50V8KCD55 33P_0402_50V8K

+1.5V +0.75VS

CD20 0.1U_0402_10V7KCD20 0.1U_0402_10V7K

1 2

CD17 0.1U_0402_10V7KCD17 0.1U_0402_10V7K

1 2

CD18 0.1U_0402_10V7KCD18 0.1U_0402_10V7K

1 2

CD19 0.1U_0402_10V7KCD19 0.1U_0402_10V7K

1 2

2

+VREF_DQA

12

DRAMRST_CNTRL_PCH 7,17

+VREF_DQB

+VREF_DQA

Title

Size Document Number Rev

Custom

Date: Sheet

1

+1.5V

12

RD1

1K_0402_1%

12

RD2

1K_0402_1%

+1.5V

12

RD10

1K_0402_1%

+VREF_DQB

12

RD11

1K_0402_1%

Layout Note: Place near JDDRL1.203 and 204

CD56 10U_0603_6.3V6MCD56 10U_0603_6.3V6M

1 2

CD24 1U_0402_6.3V6KCD24 1U_0402_6.3V6K

12

CD21 1U_0402_6.3V6KCD21 1U_0402_6.3V6K

12

CD22 1U_0402_6.3V6KCD22 1U_0402_6.3V6K

12

CD23 1U_0402_6.3V6KCD23 1U_0402_6.3V6K

12

Compal Electronics, Inc.

DDRIII-SODIMM0

QFKAA

1

0.3

11 48Tuesday, March 27, 2012

0.3

of

A

+VREF_DQB

1

CD28

CD27

2.2U_0603_6.3V4Z

1 1

2

Close to JDDRH.1

DDRB_CKE07

2 2

3 3

4 4

+3VS

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z @

@ CD48

CD48

DDR_B_BS27

DDRB_CLK07 DDRB_CLK0#7

DDR_B_WE#7 DDR_B_CAS#7

DDRB_SCS1#7

1

2

1

CD49

2

0.1U_0402_10V7K

DDR_B_D0 DDR_B_D1

1

DDR_B_D2 DDR_B_D3

0.1U_0402_10V7K

0.1U_0402_10V7K 2

DDR_B_D8 DDR_B_D9

DDR_B_DQS#1 DDR_B_DQS1

DDR_B_D10 DDR_B_D11

DDR_B_D16 DDR_B_D17

DDR_B_DQS#2 DDR_B_DQS2

DDR_B_D18 DDR_B_D19

DDR_B_D24 DDR_B_D25

DDR_B_D26 DDR_B_D27

DDRB_CKE0

DDR_B_BS2 DDR_B_MA12

DDR_B_MA9 DDR_B_MA8

DDR_B_MA5 DDR_B_MA3

DDR_B_MA1 DDRB_CLK0

DDRB_CLK0# DDR_B_MA10

DDR_B_BS0 DDR_B_WE#

DDR_B_CAS# DDR_B_MA13

DDRB_SCS1#

DDR_B_D32 DDR_B_D33

DDR_B_DQS#4 DDR_B_DQS4

DDR_B_D34 DDR_B_D35

DDR_B_D40 DDR_B_D41

DDR_B_D42 DDR_B_D43

DDR_B_D48 DDR_B_D49

DDR_B_DQS#6 DDR_B_DQS6

DDR_B_D50 DDR_B_D55 DDR_B_D51

DDR_B_D56 DDR_B_D57

DDR_B_D58 DDR_B_D59

RD14

1 2

10K_0402_5%

RD15

1 2

10K_0402_5%

A

+0.75VS

+1.5V

JDDR3H

1

VREF_DQ

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DM0

13

VSS

15

DQ2

17

DQ3

19

VSS

21

DQ8

23

DQ9

25

VSS

27

DQS1#

29

DQS1

31

VSS

33

DQ10

35

DQ11

37

VSS

39

DQ16

41

DQ17

43

VSS

45

DQS2#

47

DQS2

49

VSS

51

DQ18

53

DQ19

55

VSS

57

DQ24

59

DQ25

61

VSS

63

DM3

65

VSS

67

DQ26

69

DQ27

71

VSS

73

CKE0

75

VDD

77

NC

79

BA2

81

VDD

83

A12/BC#

85

A9

87

VDD

89

A8

91

A5

93

VDD

95

A3

97

A1

99

VDD

101

CK0

103

CK0#

105

VDD

107

A10/AP

109

BA0

111

VDD

113

WE#

115

CAS#

117

VDD

119

A13

121

S1#

123

VDD

125

TEST VSS DQ32 DQ33 VSS DQS4# DQS4 VSS DQ34 DQ35 VSS DQ40 DQ41 VSS DM5 VSS DQ42 DQ43 VSS DQ48 DQ49 VSS DQS6# DQS6 VSS DQ50 DQ51 VSS DQ56 DQ57 VSS DM7 VSS DQ58 DQ59 VSS SA0 VDDSPD SA1 VTT

GND1 GND2

VREF_CA

127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 201 203

205 207

FOX_AS0A626-UASN-7F_204P

FOX_AS0A626-UASN-7F_204P @

@

VSS DQ4 DQ5 VSS

DQS0#

DQS0

VSS DQ6 DQ7

VSS DQ12 DQ13

VSS

DM1

RESET#

VSS DQ14 DQ15

VSS DQ20 DQ21

VSS

DM2

VSS DQ22 DQ23

VSS DQ28 DQ29

VSS

DQS3#

DQS3

VSS DQ30 DQ31

VSS

CKE1

VDD

CK1#

VDD RAS#

VDD ODT0

VDD ODT1

VDD

VSS DQ36 DQ37

VSS

DM4

VSS DQ38 DQ39

VSS DQ44 DQ45

VSS

DQS5#

DQS5

VSS DQ46 DQ47

VSS DQ52 DQ53

VSS

DM6

VSS DQ54 DQ55

VSS DQ60 DQ61

VSS

DQS7#

DQS7

VSS DQ62 DQ63

VSS

EVENT#

SDA

BOSS1 BOSS2

A15 A14

A11

CK1

BA1

S0#

SCL VTT

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72

74 76 78 80 82 84 86

A7

88 90

A6

92

A4

94 96

A2

98

A0

100 102 104 106 108 110 112 114 116 118 120 122

NC

124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

206 208

B

+1.5V

DDR_B_D4 DDR_B_D5

DDR_B_DQS#0 DDR_B_DQS0

DDR_B_D6 DDR_B_D7

DDR_B_D12 DDR_B_D13

SM_DRAMRST# DDR_B_D14

DDR_B_D15 DDR_B_D20

DDR_B_D21

DDR_B_D22 DDR_B_D23

DDR_B_D28 DDR_B_D29

DDR_B_DQS#3 DDR_B_DQS3

DDR_B_D30 DDR_B_D31

DDRB_CKE1 DDR_B_MA15

DDR_B_MA14 DDR_B_MA11

DDR_B_MA7 DDR_B_MA6

DDR_B_MA4 DDR_B_MA2

DDR_B_MA0 DDRB_CLK1

DDRB_CLK1# DDR_B_BS1

DDR_B_RAS# DDRB_SCS0#

DDRB_ODT0 DDRB_ODT1

+VREF_CAB +VREF_CAB_DIMMB DDR_B_D36

DDR_B_D37

DDR_B_D38 DDR_B_D39

DDR_B_D44 DDR_B_D45

DDR_B_DQS#5 DDR_B_DQS5

DDR_B_D46 DDR_B_D47

DDR_B_D52 DDR_B_D53

DDR_B_D54

DDR_B_D60 DDR_B_D61

DDR_B_DQS#7 DDR_B_DQS7

DDR_B_D62 DDR_B_D63

PM_SMBDATA PM_SMBCLK

+0.75VS

B

SM_DRAMRST# 7,11

DDRB_CKE1 7

DDRB_CLK1 7 DDRB_CLK1# 7

DDR_B_BS1 7 DDR_B_RAS# 7DDR_B_BS07

DDRB_SCS0# 7 DDRB_ODT0 7

DDRB_ODT1 7

CD46

Close to JDDRH.126

PM_SMBDATA 11,17,26 PM_SMBCLK 11,17,26

Reverse Type DDR3 SO-DIMM B

1

CD47

2.2U_0603_6.3V4Z

0.1U_0402_10V7K

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

DDR_B_DQS#[0..7] 7 DDR_B_DQS[0..7] 7 DDR_B_D[0..63] 7 DDR_B_MA[0..15] 7

+1.5V

12

RD12

1K_0402_1%

12

RD13

1K_0402_1%

Layout Note: Place near JDDRH

+1.5V

C

@

+

CD31 330U_B2_2.5VM_R15M

1 2

CD41 10U_0603_6.3V6MCD41 10U_0603_6.3V6M

1 2

CD36 10U_0603_6.3V6MCD36 10U_0603_6.3V6M

1 2

CD37 10U_0603_6.3V6MCD37 10U_0603_6.3V6M

1 2

CD38 10U_0603_6.3V6MCD38 10U_0603_6.3V6M

1 2

CD39 10U_0603_6.3V6MCD39 10U_0603_6.3V6M

1 2

CD40 10U_0603_6.3V6MCD40 10U_0603_6.3V6M

1 2

Compal Secret Data

2010/09/03 2012/12/31

Compal Secret Data

Deciphered Date

Layout Note: Place these 4 Caps near Command and Control signals of DIMMB

D

CD33 0.1U_0402_10V7KCD33 0.1U_0402_10V7K

1 2

CD29 0.1U_0402_10V7KCD29 0.1U_0402_10V7K

1 2

CD30 0.1U_0402_10V7KCD30 0.1U_0402_10V7K

1 2

CD32 0.1U_0402_10V7KCD32 0.1U_0402_10V7K

1 2

D

E

Layout Note: Place near JDDRH.203 and 204

+0.75VS+1.5V

CD57 10U_0603_6.3V6MCD57 10U_0603_6.3V6M

1 2

CD45 1U_0402_6.3V6KCD45 1U_0402_6.3V6K

12

CD42 1U_0402_6.3V6KCD42 1U_0402_6.3V6K

12

CD43 1U_0402_6.3V6KCD43 1U_0402_6.3V6K

12

CD44 1U_0402_6.3V6KCD44 1U_0402_6.3V6K

12

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

DDRIII-SODIMM1

QFKAA

12 48Tuesday, March 27, 2012

E

of

0.3

A

LCD_TXOUT0+19

LCD_TXOUT0-19

LCD_TXOUT1+19

LCD_TXOUT1-19

LCD_TXOUT2+19

1 1

2 2

3 3

ACES_87036-1001-CP

LCD_TXOUT2-19 LCD_TXCLK+19 LCD_TXCLK-19

LCD_EDID_CLK19 LCD_EDID_DATA19

JLVDS

31 32 33 34 35 36

STARC_107K30-000001-G2

JLVDS1

GND1 GND2 GND3 GND4 GND5 GND6

GND GND

1

2

3

4

5

6

7

8

9

10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30

1 2

R388 0_0603_5%

LCD_TZOUT0LCD_TZOUT0+ LCD_TZOUT1LCD_TZOUT1+ LCD_TZOUT2LCD_TZOUT2+ LCD_TZCLKLCD_TZCLK+

+3VS

10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30

12 11 10

10

9

8

7

6

5

4

3

2

1

@

LCD_EDID_CLK LCD_EDID_DATA

CAM@

+3VS_LVDS_CAM

USB20_N11_R USB20_P11_R

INT_MIC_CLK INT_MIC_DATA

LCD_EDID_CLK LCD_EDID_DATA

LCD_TXOUT0LCD_TXOUT0+

LCD_TXOUT1LCD_TXOUT1+

LCD_TXOUT2LCD_TXOUT2+

LCD_TXCLKLCD_TXCLK+ LED_PWM BKOFF#_R

1 2

C257 47P_0402_50V8J

LVDS cable JLVDS1.2 need to contact GND

B

LCD_TXOUT0+ LCD_TXOUT0LCD_TXOUT1+ LCD_TXOUT1-

LCD_TXOUT2+

LCD_TXOUT2LCD_TXCLK+ LCD_TXCLK-

W=20mils

1.5A

+LCD_INV

@

LVDS_SEL 17

+LCD_INV

C234

68P_0402_50V8J

LCD_TZOUT0+19

LCD_TZOUT0-19

LCD_TZOUT1+19

LCD_TZOUT1-19

LCD_TZOUT2+19 LCD_TZOUT2-19 LCD_TZCLK+19

LCD_TZCLK-19

@

For RF

1

2

@

C256 47P_0402_50V8J

1 2

CAM@

0.1U_0402_10V7K

1 2

C225

2 3

D84 AZ5125-02S.R7G_SOT23-3

@

+3VS

C248

0.1U_0402_10V7K

L2

FBMA-L11-201209-221LMA30T_0805

1

C235

0.1U_0402_25V6

2

1

INT_MIC_CLK 30

INT_MIC_DATA 30

1

C226

0.1U_0402_10V7K

2

LED_PWM

BKOFF#_R

12

B+

C

1

2

1 2

12

R131

R131 47K_0402_5%

47K_0402_5%

1 2

12

R113

R113 10K_0402_5%

10K_0402_5%

C247

LCD_TZOUT0+ LCD_TZOUT0LCD_TZOUT1+ LCD_TZOUT1-

LCD_TZOUT2+

LCD_TZOUT2LCD_TZCLK+ LCD_TZCLK-

2A

C227

4.7U_0805_10V4Z

D17 RB751V40_SC76-2D17 RB751V40_SC76-2

D15 RB751V40_SC76-2D15 RB751V40_SC76-2

12

For EMI1.5A

C269

@

0.1U_0402_25V6

1

2

1

@

2

C258

C258 47P_0402_50V8J

47P_0402_50V8J @

@

For RF

1

C489

@

2

0.1U_0402_25V6

D

+LCD_VDD

PCH_PWM 19

BKOFF# 31

B+

C490

@

0.1U_0402_25V6

1

2

0.1U_0402_25V6

UMA_ENVDD19

USB20_P11_R

USB20_N11_R

E

2N7002DW-T/R7_SOT363-6

Reserve for EMI request

1 2

R78 0_0402_5%CAM@R78 0_0402_5%CAM@ WCM-2012-900T_0805

WCM-2012-900T_0805

4

1

L55

@L55

@

1 2

R96 0_0402_5%CAM@R96 0_0402_5%CAM@

100_0805_5%

3

2

F

+LCD_VDD

R109

Q1A

12

100K_0402_5%

61

2

R112

R112 100K_0402_5%

100K_0402_5%

1 2

USB20_P11 20

USB20_N11 20

+3VALW

12

R108

3

5

Q1B

Q1B 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

4

0.047U_0402_25V7K

0.047U_0402_25V7K LCDPWR_GATE

R110

1 2

68K_0402_5%

4700P_0402_25V7K

G

+3VS

C228

C230

1

2 1

2

G

W=80mils

S

Q17

Q17 AO3413_SOT23

AO3413_SOT23

D

1 3

+LCD_VDD

1

2

H

W=80mils

C233

0.1U_0402_10V7K

4 4

A

B

C

Security Classification

2010/09/03 2012/12/31

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

2010/09/03 2012/12/31

Compal Secret Data

Deciphered Date

E

F

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

LVDS/eDP

QFKAA

G

13 48Tuesday, March 27, 2012

of

H

0.3

A

B

C

D

E

CRT CONNECTOR

1 1

CRT_R_R CRT_G_R CRT_B_R

C238

1

2

2.2P_0402_50V8C

C251

@

1 2

R189 0_0402_5%R189 0_0402_5%

1 2

R190 0_0402_5%R190 0_0402_5%

1 2

R191 0_0402_5%R191 0_0402_5%

1

2

2.2P_0402_50V8C

UMA_CRT_R19

UMA_CRT_G19

UMA_CRT_B19

R139

R138

12

150_0402_1%

R140

12

150_0402_1%

C249

@

1

C250

@

2

2.2P_0402_50V8C

1

2

2.2P_0402_50V8C

L3 NBQ100505T-800Y_0402L3 NBQ100505T-800Y_0402

1 2

L4 NBQ100505T-800Y_0402L4 NBQ100505T-800Y_0402

1 2

L5 NBQ100505T-800Y_0402L5 NBQ100505T-800Y_0402

1 2

1

C240

C239

2

2.2P_0402_50V8C

2

2.2P_0402_50V8C

C241

1

C242

2

2.2P_0402_50V8C

1

C243

2

2.2P_0402_50V8C

1

2

CRT_R_L CRT_G_L

2.2P_0402_50V8C

CRT_B_L

+5VS +CRT_VCC_R +CRT_VCC

By EMI demand

+CRT_VCC

2 2

UMA_CRT_HSYNC19

UMA_CRT_VSYNC19

1 2

C244 0.1U_0402_10V7KC244 0.1U_0402_10V7K

SN74AHCT1G125GW_SOT353-5

5

P

A2Y

G

3

1

OE#

U6

4

+CRT_VCC

1 2

C252

0.1U_0402_10V7K

SN74AHCT1G125GW_SOT353-5

R141 10K_0402_5%R141 10K_0402_5%

1

5

P

4

OE#

A2Y

G

U7

3

12

D_CRT_HSYNC

D_CRT_VSYNC

1 2

L6 10_0402_5%L6 10_0402_5%

1 2

L7 10_0402_5%L7 10_0402_5%

C245

C245 @

@

1

2

10P_0402_50V8J

If=1A

D6

2

RB491D_SOT23-3

3

+CRT_VCC

CHP3_SERDBG21

HSYNC

VSYNC

1

C246

C246 @

@

2

10P_0402_50V8J

F1

1

0.5A_8V_KMC3S050RY

CRT_R_L CRT_DDC_DAT

CRT_G_L HSYNC

CRT_B_L VSYNC

CHP3_SERDBG CRT_DDC_CLK

+CRT_VCC

CRT_G_L

CRT_DDC_CLK

40 mils

21

0.1U_0402_10V7K

T65 PADT65 PAD

D98

6

I/O4

5

VDD

4

I/O3

AZC099-04S.R7G_SOT23-6

D97

6

I/O4

1

C237

2

@

JCRT

6

11

1 7

12

2 8

G

13

G

3 9

14

4 10 15

5

SUYIN_070546FR015S251ZR

SUYIN_070546FR015S251ZR @

@

@D98

@

I/O2

GND

I/O1

@D97

@

I/O2

16 17

3

2

1

3

CRT_B_LCRT_R_L

CHP3_SERDBG

HSYNC

3 3

+CRT_VCC

+3VS

+CRT_VCC

CRT_DDC_DAT

5

VDD

4

I/O3

AZC099-04S.R7G_SOT23-6

GND

I/O1

2

VSYNC

1

2/9: Add for ESD request

R159

@

1 2

1

2

R159

4.7K_0402_5%

CRT_DDC_CLK

CRT_DDC_DAT

C283

C283 470P_0402_50V8J

470P_0402_50V8J @

@

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

CRT

QFKAA

E

of

14 48Tuesday, March 27, 2012

of

14 48Tuesday, March 27, 2012

of

14 48Tuesday, March 27, 2012

0.3

R153

4.7K_0402_5%

2

Q205A

UMA_CRT_CLK19

UMA_CRT_DATA19

1

C282

33P_0402_50V8K

4 4

A

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2

@

2010/09/03 2012/12/31

C

Q205A

5

2N7002DW-T/R7_SOT363-6

Q205B

4

2N7002DW-T/R7_SOT363-6

1

C285

C285 33P_0402_50V8K

33P_0402_50V8K

2

@

61

3

470P_0402_50V8J

Compal Secret Data

Deciphered Date

C284

5

4

3

2

1

D D

+3VS

C C

HDMI_R_CK-

HDMI_R_CK+

HDMI_R_D0-

HDMI_R_D0+

HDMI_R_D1-

HDMI_R_D1+

HDMI_R_D2-

HDMI_R_D2+

UMA_DVI_TXC+ UMA_DVI_TXCUMA_DVI_TXD0+

UMA_DVI_TXD0-

UMA_DVI_TXD1+

UMA_DVI_TXD1-

UMA_DVI_TXD2+

UMA_DVI_TXD2-

UMA_HDMI_CLK19

UMA_HDMI_DATA19

D95

@

1

2

HDMI_R_D2-

HDMI_R_D0+ HDMI_R_D0+ HDMI_R_D0- HDMI_R_D0-

4

HDMI_R_D2+

5

3

8

AZ1045-04F_DFN2510P10E-10-9

D94

@

1

2

4

4 5

3

8

AZ1045-04F_DFN2510P10E-10-9

HDMI_R_D1-HDMI_R_D1-

10

9

HDMI_R_D1+HDMI_R_D1+

9

8

HDMI_R_D2-

7

HDMI_R_D2+

65

6

HDMI_R_CK+HDMI_R_CK+

10

9

HDMI_R_CK-HDMI_R_CK-

9

8

7

65

6

3 1

BSH111_SOT23-3

+HDMI_5V_OUT

2/9: Add for ESD request

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

3 1

2

SGD

BSH111_SOT23-3

SGD

Q19

HDMI@

HDMI_R_CK+ HDMI_R_CKHDMI_R_D1HDMI_R_D1+ HDMI_R_D0+

HDMI_R_D0HDMI_R_D2-

HDMI_R_D2+

+5VS

HDMI_HPD_C

+5VS

2/9: Add for ESD request

2010/09/03 2012/12/31

CV308 0.1U_0402_10V7K HDMI@CV308 0.1U_0402_10V7K HDMI@

UMA_HDMI_TXC+19

UMA_HDMI_TXC-19 UMA_HDMI_TX0+19

UMA_HDMI_TX0-19

UMA_HDMI_TX1+19

UMA_HDMI_TX1-19

UMA_HDMI_TX2+19

UMA_HDMI_TX2-19

UMA_DVI_TXC-

B B

A A

UMA_DVI_TXC+

UMA_DVI_TXD0-

UMA_DVI_TXD0+

UMA_DVI_TXD1-

UMA_DVI_TXD1+

UMA_DVI_TXD2-

UMA_DVI_TXD2+

5

1 2

CV304 0.1U_0402_10V7K HDMI@CV304 0.1U_0402_10V7K HDMI@

1 2

CV306 0.1U_0402_10V7K HDMI@CV306 0.1U_0402_10V7K HDMI@

1 2

CV302 0.1U_0402_10V7K HDMI@CV302 0.1U_0402_10V7K HDMI@

1 2

CV303 0.1U_0402_10V7K HDMI@CV303 0.1U_0402_10V7K HDMI@

1 2

CV301 0.1U_0402_10V7K HDMI@CV301 0.1U_0402_10V7K HDMI@

1 2

CV307 0.1U_0402_10V7K HDMI@CV307 0.1U_0402_10V7K HDMI@

1 2

CV305 0.1U_0402_10V7K HDMI@CV305 0.1U_0402_10V7K HDMI@

1 2

@

1 2

R157 0_0402_5%

R157 0_0402_5% L8

HDMI@L8

HDMI@

1

4

WCM-2012HS-670T_0805

1 2

R173 0_0402_5%

1 2

R175 0_0402_5%

R175 0_0402_5% L9

3

2

WCM-2012HS-670T_0805

1 2

R180 0_0402_5%

1 2

R182 0_0402_5%

R182 0_0402_5% L10

1

4

WCM-2012HS-670T_0805

1 2

R183 0_0402_5%

1 2

R187 0_0402_5%

R187 0_0402_5% L11

3

2

WCM-2012HS-670T_0805

1 2

R188 0_0402_5%

@

HDMI@L9

HDMI@

HDMI@L10

HDMI@

HDMI@L11

HDMI@

2

3

4

1

2

3

4

1

+HDMI_5V_OUT

R184

2.2K_0402_5%

2.2K_0402_5% HDMI@

HDMI@

Q18

HDMI@

1 2

R195 680_0402_1%

HDMI@

1 2

R197 680_0402_1%

HDMI@

1 2

R198 680_0402_1%

HDMI@

1 2

R202 680_0402_1%

HDMI@

1 2

R201 680_0402_1%

HDMI@

1 2

R203 680_0402_1%

HDMI@

1 2

R205 680_0402_1%

HDMI@

1 2

R206 680_0402_1%

D96

6

I/O4

5

VDD

4

I/O3

AZC099-04S.R7G_SOT23-6

12

R185

2.2K_0402_5%

2.2K_0402_5% HDMI@

HDMI@

HDMI_SCLK

HDMI_SDATA

13

D

2

G

S

@D96

@

3

I/O2

2

GND

1

I/O1

Compal Secret Data

Deciphered Date

Q24

Q24 2N7002_SOT23-3

2N7002_SOT23-3 HDMI@

HDMI@

HDMI_SDATA

HDMI_SCLK

2

C264

0.1U_0402_10V7K

0.1U_0402_10V7K HDMI@

HDMI@

PMEG2010AEH_SOD123

2

1

HDMI@

D53

2 1

+HDMI_5V_OUT

1

5

U9

P

OE#

A2Y

G

SN74AHCT1G125GW_SOT353-5

SN74AHCT1G125GW_SOT353-5 HDMI@

HDMI@

3

HDMI_HPD

+HDMI_5V_OUT_F

1 2

1K_0402_5%

HDMI_HPD

4

0.5A_8V_KMC3S050RY

HDMI@

HDMI@ R145

R145

100K_0402_5%

HDMI@

R571

2.2K_0402_5%

F2

21

HDMI@

R186

1 2

12

+3VS

1

C259

C259 HDMI@

HDMI@

0.1U_0402_10V7K

2

HDMI_HPD_CHDMI_HPD_U

2

1

+HDMI_5V_OUT+5VS

HDMI Connector

JHDMI

+HDMI_5V_OUT

HDMI_HPD_C

HDMI_SDATA HDMI_SCLK

HDMI_R_CKHDMI_R_CK+

HDMI_R_D0-

HDMI_R_D0+

HDMI_R_D1-

HDMI_R_D1+

HDMI_R_D2-

HDMI_R_D2+

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

JHDMI

19

HP_DET

18

+5V

17

DDC/CEC_GND

16

SDA

15

SCL

14

Reserved

13

CEC

12

CK-

11 10

HDMI Conn./CEC

QFKAA

GND

CK_shield

GND

CK+

GND

9

D0-

GND

8

D0_shield

7

D0+

6

D1-

5

D1_shield

4

D1+

3

D2-

2

D2_shield

1

D2+

HONGL_13-13201904CP

HONGL_13-13201904CP @

@

1

C265

0.1U_0402_10V7K

0.1U_0402_10V7K HDMI@

HDMI@

HDMI_HPD 19

20 21 22 23

15 48Tuesday, March 27, 2012

0.3

of

5

CMOS Setting, near DDR Door

RH23

+RTCVCC

D D

RH23 20K_0402_5%

20K_0402_5%

iME Setting.

RH24

RH24 20K_0402_5%

20K_0402_5%

Integrated SUS 1.05V VRM Enable

PCH_INTVRMEN

+RTCVCC

RH12

1 2

RH33

1 2

+3VS

HDA_SDO

ME debug mode, this signal has a weak internal pull down Low = Disable (default)

*

High = Enable (flash descriptor security overide)

C C

HDA_SYNC

This signal has a weak internal pull down

*

H=>On Die PLL is supplied by 1.5V L=>On Die PLL is supplied by 1.8V Need to pull high for Huron River platform

1 2

RH36 1K_0402_5%

AZ_SYNC_HD30

@

PCH_RTCRST#

1 2

PCH_SRTCRST#

1 2

High - Enable Internal VRs (must be always pulled high)

1M_0402_5%

1M_0402_5% 330K_0402_5%

330K_0402_5%

+3VALW_PCH

SM_INTRUDER# PCH_INTVRMEN

1 2

RH54 33_0402_5%RH54 33_0402_5%

1 2

RH56 1M_0402_5%RH56 1M_0402_5%

CH4

1U_0402_6.3V6K

CH5

1U_0402_6.3V6K

PCH_SPKR

RH55 1K_0402_5%RH55 1K_0402_5%

AZ_SYNC_R

JCMOS @JCMOS @

1 2 1 2

JME @JME @

1 2 1 2

PCH_SPK High = Enabled (No Reboot) Low = Disabled (Default)

12

+5VS

G

S

BSS138_NL_SOT23-3

1 2

RH274 0_0402_5%

@ CH101

@

AZ_SYNC

2

QH1

13

D

@

AZ_BITCLK_HD

1

CH101 10P_0402_50V8J

10P_0402_50V8J

2

8/30 Change PWRME_CTRL# to HDA_SDO by PCH EDS

4

12

CH2 15P_0402_50V8J

NOGCLK@

32.768KHZ_12.5P_1TJF125DP1A000D

AZ_BITCLK_HD30

PCH_SPKR30

AZ_RST_HD#30

AZ_SDIN0_HD30

+3VALW_PCH

AZ_SDOUT_HD30

PWRME_CTRL31

PCH_RTCX1_R26

NOGCLK@

12

CH3 15P_0402_50V8J

NOGCLK@

RH26

1 2

0_0402_5%

Placement near to YH1

1 2

@

PCH_RTCX1

12

RH2

10M_0402_5%

12

NOGCLK@

YH1

RH27 33_0402_5%RH27 33_0402_5%

1 2

RH30 33_0402_5%RH30 33_0402_5%

1 2

RH272 1K_0402_5%

RH272 1K_0402_5% RH32 33_0402_5%RH32 33_0402_5%

1 2

RH25 0_0402_5%RH25 0_0402_5%

1 2

GCLK@RH26

GCLK@

PCH_RTCX1 PCH_RTCX2 PCH_RTCRST# PCH_SRTCRST# SM_INTRUDER# PCH_INTVRMEN

AZ_BITCLKAZ_BITCLK AZ_SYNC PCH_SPKR AZ_RST#AZ_RST#

AZ_SDIN0_HD

AZ_SDOUT

PCH_JTAG_TCK PCH_JTAG_TMS PCH_JTAG_TDI PCH_JTAG_TDO

PCH_SPICLK PCH_SPICS0# PCH_SPICS1#

PCH_SPIDI PCH_SPIDO

3

UH1A

A20

RTCX1

C20

RTCX2

D20

RTCRST#

G22

SRTCRST#

K22

INTRUDER#

C17

INTVRMEN

N34

HDA_BCLK

L34

HDA_SYNC

T10

SPKR

K34

HDA_RST#

E34

HDA_SDIN0

G34

HDA_SDIN1

C34

HDA_SDIN2

A34

HDA_SDIN3

A36

HDA_SDO

C36

HDA_DOCK_EN# / GPIO33

N32

HDA_DOCK_RST# / GPIO13

J3

JTAG_TCK

H7

JTAG_TMS

K5

JTAG_TDI

H1

JTAG_TDO

T3

SPI_CLK

Y14

SPI_CS0#

T1

SPI_CS1#

V4

SPI_MOSI

U3

SPI_MISO

PANTHER-POINT_FCBGA989

PANTHER-POINT_FCBGA989 PCHB0@

PCHB0@

RTCIHDA

JTAG

SPI

FWH0 / LAD0 FWH1 / LAD1 FWH2 / LAD2 FWH3 / LAD3

LPC

FWH4 / LFRAME#

LDRQ0#

LDRQ1# / GPIO23

SERIRQ

SATA0RXN SATA0RXP SATA0TXN SATA0TXP

SATA1RXN SATA1RXP

SATA 6G

SATA1TXN SATA1TXP

SATA2RXN SATA2RXP SATA2TXN SATA2TXP

SATA3RXN SATA3RXP SATA3TXN SATA3TXP

SATA4RXN SATA4RXP SATA4TXN

SATA

SATA4TXP SATA5RXN

SATA5RXP SATA5TXN SATA5TXP

SATAICOMPO

SATAICOMPI

SATA3RCOMPO

SATA3COMPI

SATA3RBIAS

SATALED# SATA0GP / GPIO21 SATA1GP / GPIO19

C38 A38 B37 C37

D36 E36

K36 V5

SATA_PRX_C_DTX_N0

AM3

SATA_PRX_C_DTX_P0

AM1

SATA_PTX_DRX_N0

AP7

SATA_PTX_DRX_P0

AP5 AM10

AM8 AP11 AP10

SATA_PRX_C_DTX_N2

AD7

SATA_PRX_C_DTX_P2

AD5 AH5

SATA_PTX_DRX_P2

AH4 AB8

AB10 AF3 AF1

SATA_PRX_C_DTX_N4

Y7

SATA_PRX_C_DTX_P4

Y5

SATA_PTX_DRX_N4

AD3

SATA_PTX_DRX_P4

AD1 Y3

Y1 AB3 AB1

Y11 Y10

AB12 AB13

RBIAS_SATA3

AH1

SATA_LED#

P3

PCH_GPIO21

V14

PCH_GPIO19

P1

LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3

LPC_FRAME#

SERIRQ

SATAICOMP

SATA3_COMP

2

LPC_AD0 28,31,32 LPC_AD1 28,31,32 LPC_AD2 28,31,32 LPC_AD3 28,31,32

LPC_FRAME# 28,31,32

SERIRQ 28,31

SATA_PRX_C_DTX_N0 25 SATA_PRX_C_DTX_P0 25 SATA_PTX_DRX_N0 25 SATA_PTX_DRX_P0 25

SATA_PRX_C_DTX_N2 25 SATA_PRX_C_DTX_P2 25 SATA_PTX_DRX_N2 25 SATA_PTX_DRX_P2 25

SATA_PRX_C_DTX_N4 25 SATA_PRX_C_DTX_P4 25 SATA_PTX_DRX_N4 25 SATA_PTX_DRX_P4 25

1 2

RH43 37.4_0402_1%RH43 37.4_0402_1%

1 2

RH48 49.9_0402_1%RH48 49.9_0402_1%

1 2

RH41 750_0402_1%RH41 750_0402_1%

SATA_LED# 33

PCH_GPIO19 20

BOOT BIOS Strap Bit 0

+1.05VS_VCC_SATA

+1.05VS_SATA3

SERIRQ

RH31 10K_0402_5%RH31 10K_0402_5%

HDD

PCH_GPIO21

14" ODD

PCH_GPIO19SATA_PTX_DRX_N2

+RTCVCC +RTCBATT

15" ODD

+RTCBATT

SATA_LED#

RH34 10K_0402_5%RH34 10K_0402_5%

RH28 10K_0402_5%RH28 10K_0402_5%

1

CH8

NOGCLK@DH1

NOGCLK@

2

DH1

0.1U_0402_10V7K

If use GCLK, please delet DH1

1 2

1

1 2

12

RB751V-40_SOD323-2

12

RH2910K_0402_5% RH2910K_0402_5% RH3520K_0402_5% RH3520K_0402_5%

12

DH7

DH7 RB751V-40_SOD323-2

RB751V-40_SOD323-2

+3VL

+3VS

+5VS

+3VS

SPI ROM for BIOS & ME (4MByte )

12

47P_0402_50V8J

CH19

@

0.1U_0402_10V7K

B B

0.1U_0402_10V7K

For RF

PCH_SPICLK PCH_SPIDI

1 2

RH66 33_0402_5%RH66 33_0402_5%

1 2

RH67 33_0402_5%RH67 33_0402_5%

CH6

1

2

PCH_SPICS0# PCH_SPI0_CLK

UH3

8

VCC

VSS

3

W

7

HOLD

1

S

6

C

5

MX25L3205DM2I-12G SO8

Q

D

4

4MB ROM P/N: SA00003K800 SA00004LI00

PCH_SPI0_DOPCH_SPI0_DI

2

1 2

RH68 33_0402_5%RH68 33_0402_5%

PCH_SPIDO

Socket: SP07000F500/SP07000H900 Please place U13 & U4 close to U2 PCH, please place RH66, RH67, RH68 near UH3 Please place RH267 near RH66, Please place RH271 near RH67, Please place RH269 near RH68.

SPI ROM for Win8 (2MByte )

UH4

PCH_SPI0_CLK

UH4

1

CS#

VCC

2

SO

HOLD#

3

WP#

SCLK

4

GND

MX25L1606EM2I-12G_SO8

WIN8@

2MB ROM P/N: SA000041N00 SA00003FO10

WIN8@

1 2

for EMI

10P_0402_50V8J

PCH_SPICS1#

RH65

10_0402_5%

+3VS

12

1

CH7

2

5

PCH_SPIDO PCH_SPI1_DO

RH269 33_0402_5%

A A

+3VS

47P_0402_50V8J

1 2

@ CH20

@

0.1U_0402_10V7K

8 7 6 5

SI

1 2

for EMI

10P_0402_50V8J

CH20

CH100

CH100 WIN8@

WIN8@

RH267 33_0402_5%

WIN8@

1 2 1 2

RH271 33_0402_5%

RH271 33_0402_5% WIN8@

WIN8@

RH69

10_0402_5%

WIN8@

CH21

WIN8@

For RF

PCH_SPICLKPCH_SPI1_CLK PCH_SPIDIPCH_SPI1_DI

PCH_SPI1_CLK

12

1

2

+3VALW_PCH +3VALW_PCH+3VALW_PCH

12

RH46

RH46 200_0402_5%

200_0402_5%

PCH_JTAG_TMS PCH_JTAG_TDO PCH_JTAG_TDI

12

RH44

RH44 100_0402_1%

100_0402_1%

1 2

RH50 51_0402_1%RH50 51_0402_1%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/03 2012/12/31

Compal Secret Data

Deciphered Date

2

12

RH45

RH45 200_0402_5%

200_0402_5%

12

RH39

RH39 100_0402_1%

100_0402_1%

PCH_JTAG_TCK

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

PCH_HDA/JTAG/SATA/SPI/LPC

QFKAA

RH38

RH38 200_0402_5%

200_0402_5%

1 2

RH40

RH40 100_0402_1%

100_0402_1%

1 2

of

16 48Tuesday, March 27, 2012

1

16 48Tuesday, March 27, 2012

0.3

5

PCIE_PRX_C_LANTX_N127

PCIE_PRX_C_LANTX_P127

LAN

WLAN

D D

PCIE_PTX_C_LANRX_N127 PCIE_PTX_C_LANRX_P127

PCIE_PRX_WLANTX_N226

PCIE_PRX_WLANTX_P226 PCIE_PTX_C_WLANRX_N226 PCIE_PTX_C_WLANRX_P226

CH13 0.1U_0402_10V7KCH13 0.1U_0402_10V7K

12

CH11 0.1U_0402_10V7KCH11 0.1U_0402_10V7K

12

CH14 0.1U_0402_10V7KCH14 0.1U_0402_10V7K

12

CH17 0.1U_0402_10V7KCH17 0.1U_0402_10V7K

12

PCIE_PRX_C_LANTX_N1 PCIE_PRX_C_LANTX_P1 PCIE_PTX_LANRX_N1 PCIE_PTX_LANRX_P1

PCIE_PRX_WLANTX_N2 PCIE_PRX_WLANTX_P2 PCIE_PTX_WLANRX_N2 PCIE_PTX_WLANRX_P2

+3VS

RH99 10K_0402_5%RH99 10K_0402_5%

1 2

RH104 10K_0402_5%RH104 10K_0402_5%

1 2

RH95 10K_0402_5%RH95 10K_0402_5%

1 2

Intel Spec: PCIECLK_RQ0# is suspend well, but we pull high to +3VS

C C

for LAN en/disable function

+3VALW_PCH

B B

RH107 10K_0402_5%RH107 10K_0402_5%

1 2

RH110 10K_0402_5%RH110 10K_0402_5%

1 2

RH112 10K_0402_5%RH112 10K_0402_5%

1 2

RH119 10K_0402_5%RH119 10K_0402_5%

1 2

RH114 10K_0402_5%RH114 10K_0402_5%

1 2

A A

PCH_GPIO20 CLKREQ_WLAN# CLKREQ_LAN#

LAN

WLAN

PCH_GPIO26

PCH_GPIO25

PCH_GPIO44

PANEL_SEL

PASSWORD_CLEAR#

CLK_LAN#27 CLK_LAN27

CLKREQ_LAN#27

CLK_WLAN#26 CLK_WLAN26

CLKREQ_WLAN#26

Please place under DDR SODIMM. 10/25

PASSWORD_CLEAR#

12

JPW@JPW

@

LVDS_SEL13

+3VALW_PCH

1 2

RH116 10K_0402_5%RH116 10K_0402_5%

LVDS_SEL

Channel

Single (Default)

CLK_LAN# CLK_LAN

CLKREQ_LAN#

CLK_WLAN# CLK_WLAN

CLKREQ_WLAN#

PCH_GPIO20

PCH_GPIO25

PCH_GPIO26

PCH_GPIO44

LVDS_SEL

PANEL_SEL

HL

LVDS_SEL

Dual

4

UH1B

BG34

PERN1

BJ34

PERP1

AV32

PETN1

AU32

PETP1

BE34

PERN2

BF34

PERP2

BB32

PETN2

AY32

PETP2

BG36

PERN3

BJ36

PERP3

AV34

PETN3

AU34

PETP3

BF36

PERN4

BE36

PERP4

AY34

PETN4

BB34

PETP4

BG37

PERN5

BH37

PERP5

AY36

PETN5

BB36

PETP5

BJ38

PERN6

BG38

PERP6

AU36

PETN6

AV36

PETP6

BG40

PERN7

BJ40

PERP7

AY40

PETN7

BB40

PETP7

BE38

PERN8

BC38

PERP8

AW38

PETN8

AY38

PETP8

Y40

CLKOUT_PCIE0N

Y39

CLKOUT_PCIE0P

J2

PCIECLKRQ0# / GPIO73

AB49

CLKOUT_PCIE1N

AB47

CLKOUT_PCIE1P

M1

PCIECLKRQ1# / GPIO18

AA48

CLKOUT_PCIE2N

AA47

CLKOUT_PCIE2P

V10

PCIECLKRQ2# / GPIO20

Y37

CLKOUT_PCIE3N

Y36

CLKOUT_PCIE3P

A8

PCIECLKRQ3# / GPIO25

Y43

CLKOUT_PCIE4N

Y45

CLKOUT_PCIE4P

L12

PCIECLKRQ4# / GPIO26

V45

CLKOUT_PCIE5N

V46

CLKOUT_PCIE5P

L14

PCIECLKRQ5# / GPIO44

AB42

CLKOUT_PEG_B_N

AB40

CLKOUT_PEG_B_P

E6

PEG_B_CLKRQ# / GPIO56

V40

CLKOUT_PCIE6N

V42

CLKOUT_PCIE6P

T13

PCIECLKRQ6# / GPIO45

V38

CLKOUT_PCIE7N

V37

CLKOUT_PCIE7P

K12

PCIECLKRQ7# / GPIO46

AK14

CLKOUT_ITPXDP_N

AK13

CLKOUT_ITPXDP_P

PANTHER-POINT_FCBGA989

PANTHER-POINT_FCBGA989 PCHB0@

PCHB0@

PANEL_SEL

PCI-E*

CLOCKS

HL

Channel LVDS

SMBALERT# / GPIO11

SMBCLK

SMBDATA

SML0ALERT# / GPIO60

SMBUSController

SML1ALERT# / PCHHOT# / GPIO74

Link

PEG_A_CLKRQ# / GPIO47

CLKIN_GND1_N CLKIN_GND1_P

FLEX CLOCKS

SML0CLK

SML0DATA

SML1CLK / GPIO58

SML1DATA / GPIO75

CL_CLK1

CL_DATA1

CL_RST1#

CLKOUT_PEG_A_N CLKOUT_PEG_A_P

CLKOUT_DMI_N CLKOUT_DMI_P

CLKOUT_DP_N

CLKOUT_DP_P

CLKIN_DMI_N CLKIN_DMI_P

CLKIN_GND1_N CLKIN_GND1_P

CLKIN_DOT_96N CLKIN_DOT_96P

CLKIN_SATA_N CLKIN_SATA_P

REFCLK14IN

CLKIN_PCILOOPBACK

XTAL25_IN

XTAL25_OUT

XCLK_RCOMP

CLKOUTFLEX0 / GPIO64 CLKOUTFLEX1 / GPIO65 CLKOUTFLEX2 / GPIO66 CLKOUTFLEX3 / GPIO67

EDP

3

PCH_SMBALERT#

E12

PCH_SMBCLK

H14

PCH_SMBDATA

C9

DRAMRST_CNTRL_PCH

A12

PCH_SMLCLK0

C8

PCH_SMLDATA0

G12

LAN_EN

C13

PCH_SMLCLK1

E14

PCH_SMLDATA1

M16

M7

Control Link only for support Intel IAMT.

T11

P10

PCH_GPIO47

M10

AB37 AB38

CLK_CPU_DMI#

AV22

CLK_CPU_DMI

AU22

AM12 AM13

PCH_CLK_DMI#

BF18

PCH_CLK_DMI

BE18

CLKIN_GND1#

BJ30

CLKIN_GND1

BG30

CLK_DOT#

G24

CLK_DOT

E24

CLK_SATA#

AK7

CLK_SATA

AK5

CLK_14M_PCH

K45

CLK_PCILOOP

H45

PCH_X1

V47

PCH_X2

V49

XCLK_RCOMP

Y47

K43 F47 H47 K49

Compal common design SW request to add DGPU_Present on this GPIO67

RH115 90.9_0402_1%RH115 90.9_0402_1%

CLK_FLEX0 CLK_FLEX1 CLK_FLEX2 DGPU_PRSNT#

1 2

T72 PADT72 PAD T74 PADT74 PAD T73 PADT73 PAD

DRAMRST_CNTRL_PCH 7,11

LAN_EN 27

CLK_CPU_DMI# 5 CLK_CPU_DMI 5

CLK_PCILOOP 20

DGPU_PRSNT#

M/B SKU UMA

HL

DIS/OPT

From Clock Gen.

+1.05VS_VCCDIFFCLKN

2

RH72 2.2K_0402_5%RH72 2.2K_0402_5%

+3VALW_PCH +3VS

12

RH70 2.2K_0402_5%RH70 2.2K_0402_5%

12

PCH_SMBDATA

PCH_SMBCLK

RH78 2.2K_0402_5%RH78 2.2K_0402_5%

12

RH74 2.2K_0402_5%RH74 2.2K_0402_5%

12

PCH_SMLDATA1

PCH_SMLCLK1

PCH_SMBALERT# DRAMRST_CNTRL_PCH LAN_EN PCH_SMLCLK0 PCH_SMLDATA0 PCH_GPIO47

PCH_CLK_DMI# PCH_CLK_DMI

CLKIN_GND1# CLKIN_GND1

CLK_DOT# CLK_DOT

CLK_SATA# CLK_SATA

CLK_14M_PCH

QH3B

3

2

QH3A

2N7002DW-T/R7_SOT363-6

6 1

2N7002DW-T/R7_SOT363-6

QH4B

3

2

QH4A

2N7002DW-T/R7_SOT363-6

6 1

2N7002DW-T/R7_SOT363-6

5

4

5

4

RH262 10K_0402_5%RH262 10K_0402_5%

1 2

RH76 1K_0402_5%RH76 1K_0402_5%

1 2

RH75 10K_0402_5%RH75 10K_0402_5%

1 2

RH73 2.2K_0402_5%RH73 2.2K_0402_5% RH77 2.2K_0402_5%RH77 2.2K_0402_5%

RH89 10K_0402_5%RH89 10K_0402_5%

RH79 10K_0402_5%RH79 10K_0402_5%

1 2

RH82 10K_0402_5%RH82 10K_0402_5%

1 2

RH85 10K_0402_5%RH85 10K_0402_5%

1 2

RH86 10K_0402_5%RH86 10K_0402_5%

1 2

RH80 10K_0402_5%RH80 10K_0402_5%

1 2

RH81 10K_0402_5%RH81 10K_0402_5%

1 2

RH83 10K_0402_5%RH83 10K_0402_5%

1 2

RH84 10K_0402_5%RH84 10K_0402_5%

1 2

RH87 10K_0402_5%RH87 10K_0402_5%

1 2

1

RH102 4.7K_0402_5%RH102 4.7K_0402_5%

RH103 4.7K_0402_5%RH103 4.7K_0402_5%

PM_SMBDATA 11,12,26

PM_SMBCLK 11,12,26

+3VS+3VALW_PCH

EC_SMB_DA2 31

EC_SMB_CK2 31

12 12 12

+3VALW_PCH

For EMI

@

CH28 22P_0402_50V8J

RH37

1 2

0_0402_5%

GCLK@

12

3

@

12

1

2

PCH_X1

CH27

CH27 NOGCLK@

NOGCLK@ 27P_0402_50V8J

27P_0402_50V8J

DGPU_PRSNT#

CLK_PCILOOP

PCH_X1_R26

NOGCLK@

PCH_X1 PCH_X2

1

CH26

NOGCLK@

27P_0402_50V8J

RH227 10K_0402_5%RH227 10K_0402_5%

RH261 10K_0402_5%

1 2

@

1 2

2

@

12

RH124 10_0402_5%

Placement near to YH2

NOGCLK@

RH117 1M_0402_5%

YH2

25MHZ_20PF_7V25000016

1

GND

2

4

+3VS

5

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/03 2012/12/31

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

PCH_PCI-E/SMBUS/CLK

QFKAA

1

17 48Tuesday, March 27, 2012

of

0.3

5

+3VALW_PCH

D D

12

RH234 10K_0402_5%RH234 10K_0402_5%

12

RH157 10K_0402_5%RH157 10K_0402_5%

12

RH155 10K_0402_5%RH155 10K_0402_5%

12

RH163 10K_0402_5%RH163 10K_0402_5%

12

RH278 10K_0402_5%RH278 10K_0402_5%

12

RH279 10K_0402_5%RH279 10K_0402_5%

C C

B B

VGATE31,42

PM_PWROK5,31

Stuff R137 if EC does not want to involve in the handshake mechanism for the DeepSX state entry and exit

PM_PWROK

@

RH281 0_0402_5%

PCH_RSMRST# PM_PWROK SYS_PWROK

0_0402_5%

0_0402_5% @RH280

@

1 2

0.1U_0402_10V7K

0.1U_0402_10V7K 1 2

CH103

1 2

PCH_SUSPWRDN#_RSUSACK#_R

12

PCH_SUSPWRDN#_R RI# PCH_LOW_BAT#

RH280

+3VS

5

UH5

P

IN1

4

O

IN2

G

SN74AHC1G08DCKR_SC70-5

3

Reserve this signal to EC by SW demand 2011/10/18a

SUSACK#31

PCH_SUSPWRDN#31

+3VALW_PCH

ACIN31,36

Reserve this signal to EC by SW demand 2011/10/18a

DMI_CTX_PRX_N06 DMI_CTX_PRX_N16 DMI_CTX_PRX_N26 DMI_CTX_PRX_N36

DMI_CTX_PRX_P06 DMI_CTX_PRX_P16 DMI_CTX_PRX_P26 DMI_CTX_PRX_P36

DMI_PTX_CRX_N06 DMI_PTX_CRX_N16 DMI_PTX_CRX_N26 DMI_PTX_CRX_N36

DMI_PTX_CRX_P06 DMI_PTX_CRX_P16 DMI_PTX_CRX_P26 DMI_PTX_CRX_P36

+1.05VS_PCH

+3VS

DRAMPWROK5

PCH_RSMRST#31

PBTN_OUT#31

1 2

RH161 330K_0402_5%RH161 330K_0402_5%

CH751H-40PT_SOD323-2

4

1 2

RH126 49.9_0402_1%RH126 49.9_0402_1%

1 2

RH127 750_0402_1%RH127 750_0402_1%

1 2

RH47

12

1K_0402_5%

PM_PWROK

1 2

RH131 0_0402_5%RH131 0_0402_5%

1 2

RH132 0_0402_5%

DH2

21

DMI_CTX_PRX_N0 DMI_CTX_PRX_N1 DMI_CTX_PRX_N2 DMI_CTX_PRX_N3

DMI_CTX_PRX_P0 DMI_CTX_PRX_P1 DMI_CTX_PRX_P2 DMI_CTX_PRX_P3

DMI_PTX_CRX_N0 DMI_PTX_CRX_N1 DMI_PTX_CRX_N2 DMI_PTX_CRX_N3

DMI_PTX_CRX_P0 DMI_PTX_CRX_P1 DMI_PTX_CRX_P2 DMI_PTX_CRX_P3

DMI_COMP

RBIAS_CPY

@

RH133 0_0402_5%

@

PCH_SUSPWRDN#_R

SUSACK#_R

XDP_DBRESET#

SYS_PWROK

PM_PWROK_R

DRAMPWROK

PCH_RSMRST#

PBTN_OUT#

PCH_ACIN

PCH_LOW_BAT#

RI#

UH1C

BC24

DMI0RXN

BE20

DMI1RXN

BG18

DMI2RXN

BG20

DMI3RXN

BE24

DMI0RXP

BC20

DMI1RXP

BJ18

DMI2RXP

BJ20

DMI3RXP

AW24

DMI0TXN

AW20

DMI1TXN

BB18

DMI2TXN

AV18

DMI3TXN

AY24

DMI0TXP

AY20

DMI1TXP

AY18

DMI2TXP

AU18

DMI3TXP

BJ24

DMI_ZCOMP

BG25

DMI_IRCOMP

BH21

DMI2RBIAS

C12

SUSACK#

K3

SYS_RESET#

P12

SYS_PWROK

L22

PWROK

L10

APWROK

B13

DRAMPWROK

C21

RSMRST#

K16

SUSWARN#/SUSPWRDNACK/GPIO30

E20

PWRBTN#

H20

ACPRESENT / GPIO31

E10

BATLOW# / GPIO72

A10

RI#

PANTHER-POINT_FCBGA989

PANTHER-POINT_FCBGA989 PCHB0@

PCHB0@

3

FDI_CTX_PRX_N0

BJ14

FDI_RXN0 FDI_RXN1 FDI_RXN2 FDI_RXN3 FDI_RXN4 FDI_RXN5 FDI_RXN6 FDI_RXN7

FDI_RXP0 FDI_RXP1 FDI_RXP2 FDI_RXP3 FDI_RXP4 FDI_RXP5

DMI

System Power Management

FDI_RXP6

FDI

FDI_RXP7

FDI_INT FDI_FSYNC0 FDI_FSYNC1 FDI_LSYNC0 FDI_LSYNC1

DSWVRMEN

DPWROK

WAKE#

CLKRUN# / GPIO32

SUS_STAT# / GPIO61

SUSCLK / GPIO62

SLP_S5# / GPIO63

SLP_S4#

SLP_S3#

SLP_A#

SLP_SUS#

PMSYNCH

SLP_LAN# / GPIO29

FDI_CTX_PRX_N1

AY14

FDI_CTX_PRX_N2

BE14

FDI_CTX_PRX_N3

BH13

FDI_CTX_PRX_N4

BC12

FDI_CTX_PRX_N5

BJ12

FDI_CTX_PRX_N6

BG10

FDI_CTX_PRX_N7

BG9

FDI_CTX_PRX_P0

BG14

FDI_CTX_PRX_P1

BB14

FDI_CTX_PRX_P2

BF14

FDI_CTX_PRX_P3

BG13

FDI_CTX_PRX_P4

BE12

FDI_CTX_PRX_P5

BG12

FDI_CTX_PRX_P6

BJ10

FDI_CTX_PRX_P7

BH9

FDI_INT

AW16

FDI_FSYNC0

AV12

FDI_FSYNC1

BC10

FDI_LSYNC0

AV14

FDI_LSYNC1

BB10

DSWVREN

A18

PCH_DPWROK DSWVREN

E22

EC_SWI#

B9

PCH_GPIO32

N3

SUS_STAT#

G8

N14

PM_SLP_S5#

D10

PM_SLP_S4#

H4

PM_SLP_S3#

F4

PM_SLP_A#

G10

PM_SLP_SUS#

G16

H_PM_SYNC

AP14

PCH_GPIO29

K14

FDI_CTX_PRX_N0 6 FDI_CTX_PRX_N1 6 FDI_CTX_PRX_N2 6 FDI_CTX_PRX_N3 6 FDI_CTX_PRX_N4 6 FDI_CTX_PRX_N5 6 FDI_CTX_PRX_N6 6 FDI_CTX_PRX_N7 6

FDI_CTX_PRX_P0 6 FDI_CTX_PRX_P1 6 FDI_CTX_PRX_P2 6 FDI_CTX_PRX_P3 6 FDI_CTX_PRX_P4 6 FDI_CTX_PRX_P5 6 FDI_CTX_PRX_P6 6 FDI_CTX_PRX_P7 6

FDI_INT 6 FDI_FSYNC0 6 FDI_FSYNC1 6 FDI_LSYNC0 6 FDI_LSYNC1 6

EC_SWI# 26,27

T76 PADT76 PAD

32.768 KHz

CLK_EC 31

PM_SLP_S5# 31

PM_SLP_S4# 31

PM_SLP_S3# 31

T77 PADT77 PAD

T78 PADT78 PAD

H_PM_SYNC 5

2

1 2

RH128 0_0402_5%RH128 0_0402_5%

1

PCH_RSMRST#PCH_DPWROK

Stuff R222 if do not support DeepSX state

+RTCVCC

RH150 330K_0402_5%RH150 330K_0402_5% RH151 330K_0402_5%@RH151 330K_0402_5%@

12 12

DSWVREN must be always pulled high to +RTCVCC DSWVREN - Internal Deep Sleep 1.05V regulator

H

：

Enable

*

：

Disable

L

Follow EC check list demand, but don't implement CLKRUN# this fuction

+3VS

PCH_GPIO32

EC_SWI#

PCH_GPIO29

RH256 8.2K_0402_5%@RH256 8.2K_0402_5%@

1 2

RH160 10K_0402_5%RH160 10K_0402_5%

RH159 10K_0402_5%RH159 10K_0402_5%

1 2

RH162 10K_0402_5%@RH162 10K_0402_5%@

1 2

+3VALW_PCH

DH5

2 1

CH751H-40PT_SOD323-2

DH6

POK35,37

A A

DH6

CH751H-40PT_SOD323-2

5

21

PCH_RSMRST#PM_PWROK PCH_RSMRST#

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/03 2012/12/31

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

PCH_DMI/FDI/PM

QFKAA

1

18 48Tuesday, March 27, 2012

of

0.3

5

UMA_ENBKL31

D D

12

UMA_ENBKL

LCTL_CLK

LCTL_DATA

LCD_EDID_CLK

LCD_EDID_DATA

UMA_CRT_CLK

UMA_CRT_DATA

UMA_CRT_B

UMA_CRT_G

UMA_CRT_R

1 2

RH125 100K_0402_5%RH125 100K_0402_5%

+3VS

RH145 2.2K_0402_5%RH145 2.2K_0402_5%

RH146 2.2K_0402_5%RH146 2.2K_0402_5%

RH149 2.2K_0402_5%RH149 2.2K_0402_5%

RH148 2.2K_0402_5%RH148 2.2K_0402_5%

C C

B B

RH142 2.2K_0402_5%RH142 2.2K_0402_5%

RH144 2.2K_0402_5%RH144 2.2K_0402_5%

1 2

RH156 150_0402_1%RH156 150_0402_1%

1 2

RH152 150_0402_1%RH152 150_0402_1%

1 2

RH154 150_0402_1%RH154 150_0402_1%

UMA_ENVDD13

LCD_EDID_CLK13

LCD_EDID_DATA13

RH143 2.37K_0402_1%RH143 2.37K_0402_1%

LCD_TXCLK-13 LCD_TXCLK+13

LCD_TXOUT0-13 LCD_TXOUT1-13 LCD_TXOUT2-13

LCD_TXOUT0+13 LCD_TXOUT1+13 LCD_TXOUT2+13

LCD_TZCLK-13 LCD_TZCLK+13

LCD_TZOUT0-13 LCD_TZOUT1-13 LCD_TZOUT2-13

LCD_TZOUT0+13 LCD_TZOUT1+13 LCD_TZOUT2+13

UMA_CRT_B14 UMA_CRT_G14 UMA_CRT_R14

UMA_CRT_CLK14 UMA_CRT_DATA14

UMA_CRT_HSYNC14 UMA_CRT_VSYNC14

PCH_PWM13

1 2

4

UMA_ENBKL UMA_ENVDD

PCH_PWM LCD_EDID_CLK

LCD_EDID_DATA LCTL_CLK

LCTL_DATA LVDS_IBG

T79 PADT79 PAD

LCD_TXCLKLCD_TXCLK+

LCD_TXOUT0LCD_TXOUT1LCD_TXOUT2-

LCD_TXOUT0+ LCD_TXOUT1+ LCD_TXOUT2+

LCD_TZCLKLCD_TZCLK+

LCD_TZOUT0LCD_TZOUT1LCD_TZOUT2-

LCD_TZOUT0+ LCD_TZOUT1+ LCD_TZOUT2+

UMA_CRT_B UMA_CRT_G UMA_CRT_R

UMA_CRT_CLK UMA_CRT_DATA

UMA_CRT_HSYNC UMA_CRT_VSYNC

CRT_IREF

12

RH138 1K_0402_0.5%RH138 1K_0402_0.5%

UH1D

J47

L_BKLTEN

M45

L_VDD_EN

P45

L_BKLTCTL

T40

L_DDC_CLK

K47

L_DDC_DATA

T45

L_CTRL_CLK

P39

L_CTRL_DATA

AF37

LVD_IBG

AF36

LVD_VBG

AE48

LVD_VREFH

AE47

LVD_VREFL

AK39

LVDSA_CLK#

AK40

LVDSA_CLK

AN48

LVDSA_DATA#0

AM47

LVDSA_DATA#1

AK47

LVDSA_DATA#2

AJ48

LVDSA_DATA#3

AN47

LVDSA_DATA0

AM49

LVDSA_DATA1

AK49

LVDSA_DATA2

AJ47

LVDSA_DATA3

AF40

LVDSB_CLK#

AF39

LVDSB_CLK

AH45

LVDSB_DATA#0

AH47

LVDSB_DATA#1

AF49

LVDSB_DATA#2

AF45

LVDSB_DATA#3

AH43

LVDSB_DATA0

AH49

LVDSB_DATA1

AF47

LVDSB_DATA2

AF43

LVDSB_DATA3

N48

CRT_BLUE

P49

CRT_GREEN

T49

CRT_RED

T39

CRT_DDC_CLK

M40

CRT_DDC_DATA

M47

CRT_HSYNC

M49

CRT_VSYNC

T43

DAC_IREF

T42

CRT_IRTN

PANTHER-POINT_FCBGA989

PANTHER-POINT_FCBGA989 PCHB0@

PCHB0@

3

DDPB_0N

DDPB_0P

DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P

DDPC_0N DDPC_0P DDPC_1N DDPC_1P DDPC_2N DDPC_2P DDPC_3N DDPC_3P

DDPD_0N DDPD_0P DDPD_1N DDPD_1P DDPD_2N DDPD_2P DDPD_3N DDPD_3P

AP43 AP45

AM42 AM40

AP39 AP40

P38 M39

AT49 AT47 AT40

AV42 AV40 AV45 AV46 AU48 AU47 AV47 AV49

P46 P42

AP47 AP49 AT38

AY47 AY49 AY43 AY45 BA47 BA48 BB47 BB49

M43 M36

AT45 AT43 BH41

BB43 BB45 BF44 BE44 BF42 BE42 BJ42 BG42

SDVO_TVCLKINN SDVO_TVCLKINP

SDVO_STALLN

SDVO_STALLP

SDVO_INTN SDVO_INTP

SDVO_CTRLCLK

SDVO_CTRLDATA

DDPB_AUXN DDPB_AUXP

DDPB_HPD

LVDS

DDPC_CTRLCLK

DDPC_CTRLDATA

DDPC_AUXN DDPC_AUXP

DDPC_HPD

Digital Display Interface

DDPD_CTRLCLK

DDPD_CTRLDATA

DDPD_AUXN DDPD_AUXP

CRT

DDPD_HPD

2

+3VS

12

RH140

RH139

2.2K_0402_5%

2.2K_0402_5% HDMI@

HDMI@

HDMI_HPD HDMI_HPD UMA_HDMI_TX2-

UMA_HDMI_TX2+ UMA_HDMI_TX1UMA_HDMI_TX1+ UMA_HDMI_TX0UMA_HDMI_TX0+ UMA_HDMI_TXCUMA_HDMI_TXC+

RH141 100K_0402_5%RH141 100K_0402_5%

RH255 100K_0402_5%RH255 100K_0402_5%

RH139

2.2K_0402_5%

2.2K_0402_5% HDMI@

HDMI@

12

UMA_HDMI_CLK 15 UMA_HDMI_DATA 15

HDMI_HPD 15 UMA_HDMI_TX2- 15

UMA_HDMI_TX2+ 15 UMA_HDMI_TX1- 15 UMA_HDMI_TX1+ 15 UMA_HDMI_TX0- 15 UMA_HDMI_TX0+ 15 UMA_HDMI_TXC- 15 UMA_HDMI_TXC+ 15

HDMI

1

12

100K_0402_5%

100K_0402_5% RH254

RH254

A A

5

4

Security Classification

2010/09/03 2012/12/31

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

3

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

PCH_CRT/LVDS/HDMI

QFKAA

19 48Tuesday, March 27, 2012

1

of

0.3

5

D D

+3VS

1 2

RH318 8.2K_0402_5%RH318 8.2K_0402_5%

1 2

RH319 8.2K_0402_5%RH319 8.2K_0402_5%

1 2

RH320 8.2K_0402_5%RH320 8.2K_0402_5%

1 2

RH321 8.2K_0402_5%RH321 8.2K_0402_5%

1 2

RH324 8.2K_0402_5%RH324 8.2K_0402_5%

1 2

RH323 8.2K_0402_5%RH323 8.2K_0402_5%

1 2

RH325 8.2K_0402_5%RH325 8.2K_0402_5%

1 2

RH322 8.2K_0402_5%RH322 8.2K_0402_5%

1 2

RH326 8.2K_0402_5%RH326 8.2K_0402_5%

C C

1 2

RH327 8.2K_0402_5%RH327 8.2K_0402_5%

1 2

RH328 8.2K_0402_5%RH328 8.2K_0402_5%

1 2

RH329 8.2K_0402_5%RH329 8.2K_0402_5%

1 2

RH283 8.2K_0402_5%RH283 8.2K_0402_5%

1 2

RH290 8.2K_0402_5%RH290 8.2K_0402_5%

CLK_PCI_TPM_PCH28

Add new PCI CLK to TPM

B B

by ESD requestion and place near CPU

A A

PCH_GPIO54 PCH_GPIO4 PCI_PIRQB# PCI_PIRQC# PCH_GPIO52 PCH_GPIO53 PCI_PIRQA# ODD_DA# PCH_GPIO55 PCH_GPIO2 PCH_GPIO50 PCH_GPIO51 PCI_PIRQD# PCH_GPIO5

12

R31422_0402_5% R31422_0402_5%

CLK_PCI_EC31 CLK_PCILOOP17 CLK_PCI_DDR32

@

12

@

12

CH104100P_0402_50V8J@CH104100P_0402_50V8J

ODD_DA#

CH15180P_0402_50V8J@CH15180P_0402_50V8J

PLT_RST#

PCH_GPIO51

RH2851K_0402_5% @ RH2851K_0402_5% @

12

PCH_GPIO19

RH2861K_0402_5% @ RH2861K_0402_5% @

12

U3RXDN1_R29 U3RXDN2_R29

U3RXDP1_R29 U3RXDP2_R29

U3TXDN129 U3TXDN229

U3TXDP129 U3TXDP229

CLK_PCI_TPM_PCH_R

12

PCH_GPIO19 16

ODD_DA#25

T80 PADT80 PAD

PLT_RST#5,26,27,28,31,32

1 2 1 2 1 2

CH22

CH22 47P_0402_50V8J

47P_0402_50V8J @

@

U3RXDN1_R U3RXDN2_R

U3RXDP1_R U3RXDP2_R

U3TXDN1 U3TXDN2

U3TXDP1

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#

PCH_GPIO50 PCH_GPIO52 PCH_GPIO54

PCH_GPIO51 PCH_GPIO53 PCH_GPIO55

PCH_GPIO2 ODD_DA# PCH_GPIO4 PCH_GPIO5

PCI_PME# PLT_RST#

RH16722_0402_5% RH16722_0402_5% RH16622_0402_5% RH16622_0402_5% RH28422_0402_5% RH28422_0402_5%

CLK_PCI_TPM_PCH_R

PCH_GPIO51

4

UH1E

BG26

TP1

BJ26

TP2

BH25

TP3

BJ16

TP4

BG16

TP5

AH38

TP6

AH37

TP7

AK43

TP8

AK45

TP9

C18

TP10

N30

TP11

H3

TP12

AH12

TP13

AM4

TP14

AM5

TP15

Y13

TP16

K24

TP17

L24

TP18

AB46

TP19

AB45

TP20

B21

TP21

M20

TP22

AY16

TP23

BG46

TP24

BE28

USB3Rn1

BC30

USB3Rn2

BE32

USB3Rn3

BJ32

USB3Rn4

BC28

USB3Rp1

BE30

USB3Rp2

BF32

USB3Rp3

BG32

USB3Rp4

AV26

USB3Tn1

BB26

USB3Tn2

AU28

USB3Tn3

AY30

USB3Tn4

AU26

USB3Tp1

AY26

USB3Tp2

AV28

USB3Tp3

AW30

USB3Tp4

K40

PIRQA#

K38

PIRQB#

H38

PIRQC#

G38

PIRQD#

C46

REQ1# / GPIO50

C44

REQ2# / GPIO52

E40

REQ3# / GPIO54

D47

GNT1# / GPIO51

E42

GNT2# / GPIO53

F46

GNT3# / GPIO55

G42

PIRQE# / GPIO2

G40

PIRQF# / GPIO3

C42

PIRQG# / GPIO4

D44

PIRQH# / GPIO5

K10

PME#

C6

PLTRST#

CLK_EC_R CLK_PCH CLK_SIO

H49

CLKOUT_PCI0

H43

CLKOUT_PCI1

J48

CLKOUT_PCI2

K42

CLKOUT_PCI3

H40

CLKOUT_PCI4

PANTHER-POINT_FCBGA989

PANTHER-POINT_FCBGA989 PCHB0@

PCHB0@

Boot BIOS Strap

PCH_GPIO19 Boot BIOS Loaction

0 0 1

0 1

Reserved

0

11

LPC

PCI SPI

RSVD

PCI

*

EHCI 1

EHCI 2

USB

DF_TVS

USBP10N USBP10P USBP11N USBP11P USBP12N USBP12P USBP13N USBP13P

USBRBIAS#

USBRBIAS

OC0# / GPIO59 OC1# / GPIO40 OC2# / GPIO41 OC3# / GPIO42 OC4# / GPIO43

OC5# / GPIO9 OC6# / GPIO10 OC7# / GPIO14

RSVD1 RSVD2 RSVD3 RSVD4

RSVD5 RSVD6

RSVD7 RSVD8

RSVD9 RSVD10 RSVD11 RSVD12 RSVD13 RSVD14 RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20 RSVD21 RSVD22

RSVD23 RSVD24

RSVD25 RSVD26

RSVD27 RSVD28

RSVD29

USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N USBP9P

AY7 AV7 AU3 BG4

AT10 BC8

AU2 AT4 AT3 AT1 AY3 AT5 AV3 AV1 BB1 BA3 BB5 BB3 BB7 BE8 BD4 BF6

AV5 AV10

AT8 AY5

BA2 AT12

BF3

C24 A24 C25 B25 C26 A26 K28 H28 E28 D28 C28 A28 C29 B29 N28 M28 L30 K30 G30 E30 C30 A30 L32 K32 G32 E32 C32 A32

C33

B33

A14 K20 B17 C16 L16 A16 D14 C14

3

NV_ALE

USB20_N0 USB20_P0 USB20_N1 USB20_P1 USB20_N2 USB20_P2 USB20_N3U3TXDP2 USB20_P3

USB20_N8 USB20_P8 USB20_N9 USB20_P9

USB20_N11 USB20_P11

USBBIAS

Within 500 mils

USB_OC#0 USB_OC#1 USB_OC#2 SLP_CHG# USB_OC#4 USB_OC#5 USB_OC#6 USB_OC#7

USB20_N0 29 USB20_P0 29 USB20_N1 29 USB20_P1 29 USB20_N2 25 USB20_P2 25 USB20_N3 25 USB20_P3 25

USB20_N8 28 USB20_P8 28 USB20_N9 26 USB20_P9 26

USB20_N11 13 USB20_P11 13

1 2

RH165 22.6_0402_1%RH165 22.6_0402_1%

USB_OC#0 29 USB_OC#1 25

SLP_CHG# 29

USB-LEFT1 USB-LEFT2 USB-Right1 USB-Right2

Card Reader WiMax

Int. Camera

USB-LEFT USB-Right

2

1

Intel Anti-Theft Techonlogy

High=Endabled

NV_ALE

Low=Disable(floating)

NV_ALE

1 2

RH164 1K_0402_5%

USB_OC#6

RH209 10K_0402_5%RH209 10K_0402_5%

SLP_CHG#

RH196 10K_0402_5%RH196 10K_0402_5%

USB_OC#4

RH200 10K_0402_5%RH200 10K_0402_5%

USB_OC#1

RH192 10K_0402_5%RH192 10K_0402_5%

USB_OC#2

RH177 10K_0402_5%RH177 10K_0402_5%

USB_OC#5

RH183 10K_0402_5%RH183 10K_0402_5%

USB_OC#7

RH201 10K_0402_5%RH201 10K_0402_5%

USB_OC#0

RH188 10K_0402_5%RH188 10K_0402_5%

@

1 2 1 2 1 2 1 2

*

+1.8VS

+3VALW_PCH

A16 Swap Override Strap

PCH_GPIO55

RH2871K_0402_5% @ RH2871K_0402_5% @

12

5

PCH_GPIO55

Low= A16 swap override Enable High= A16 swap override Disable

*

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/03 2012/12/31

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

PCH_PCI/USB/NAND

QFKAA

1

20 48Tuesday, March 27, 2012

of

0.3

5

4

3

2

1

UH1F

+3VALW_PCH

12

RH204 1K_0402_5%RH204 1K_0402_5%

1 2

RH205 10K_0402_5%RH205 10K_0402_5%

1 2

RH289 10K_0402_5%RH289 10K_0402_5%

D D

+3VS

C C

B B

1 2

RH202 10K_0402_5%RH202 10K_0402_5%

1 2

RH207 10K_0402_5%RH207 10K_0402_5%

1 2

RH180 10K_0402_5%RH180 10K_0402_5% RH292 1K_0402_5%RH292 1K_0402_5% RH190 10K_0402_5%RH190 10K_0402_5% RH185 10K_0402_5%RH185 10K_0402_5% RH193 10K_0402_5%RH193 10K_0402_5%

RH178 200K_0402_5%RH178 200K_0402_5% RH197 10K_0402_5%RH197 10K_0402_5% RH179 10K_0402_5%RH179 10K_0402_5% RH293 10K_0402_5%RH293 10K_0402_5% RH194 10K_0402_5%RH194 10K_0402_5% RH181 10K_0402_5%RH181 10K_0402_5% RH195 10K_0402_5%RH195 10K_0402_5% RH186 10K_0402_5%RH186 10K_0402_5%

RH198 10K_0402_5%RH198 10K_0402_5% RH199 10K_0402_5%

RH199 10K_0402_5%

GPIO28 On-Die PLL Voltage Regulator

H: Enable

*

L: Disable

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

1 2

@

RH206 1K_0402_5%@RH206 1K_0402_5%@

1 2

12

GPIO8 Integrated Clock Chip Enable (Removed)

H: Disable L: Enable

*

RH298 1K_0402_5%@RH298 1K_0402_5%@

1 2

A A

Integrated clock enable functionality is achieved by soft-strap The current default is clock enable

EC_LID_OUT# EC_SMI# PCH_GPIO12 PCH_GPIO28 PCH_GPIO57

PCH_GPIO34 CHP3_SERDBG PCH_GPIO1 BT_DET# OPTIMUS_EN# ODD_DETECT# ODD_SEL 15ODD_DETECT# EC_SCI# PCH_GPIO39 PCH_GPIO48 PCH_GPIO49 PCH_GPIO17

PCH_GPIO37 PCH_GPIO27

PCH_GPIO28

EC_SMI#

ODD_SEL

GPIO6 High

SATA port Port 2 Port 4

Follow Compal ORB and Intel Check list 460603 V1.5

3D_DET#

SKU Non3D

OPTIMUS_EN#

SKU NonOPT

CHP3_SERDBG14

ODD_SEL25 EC_SCI#31 EC_SMI#31

EC_LID_OUT#31

15ODD_DETECT#25

14" 15"/17"

Low

T81 PADT81 PAD

ODD_DETECT#25

HL

5

4

CHP3_SERDBG PCH_GPIO1 ODD_SEL EC_SCI# EC_SMI# PCH_GPIO12 EC_LID_OUT#

15ODD_DETECT#

PCH_GPIO17 BT_DET#

PCH_GPIO27 PCH_GPIO28 PCH_GPIO34 PCH_GPIO35 ODD_DETECT# PCH_GPIO37 OPTIMUS_EN# PCH_GPIO39 PCH_GPIO48 PCH_GPIO49 PCH_GPIO57

3D

Optimus

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

UH1F

T7

BMBUSY# / GPIO0

A42

TACH1 / GPIO1

H36

TACH2 / GPIO6

E38

TACH3 / GPIO7

C10

GPIO8

C4

LAN_PHY_PWR_CTRL / GPIO12

G2

GPIO15

U2

SATA4GP / GPIO16

D40

TACH0 / GPIO17

T5

SCLOCK / GPIO22

E8

GPIO24

E16

GPIO27

P8

GPIO28

K1

STP_PCI# / GPIO34

K4

GPIO35

V8

SATA2GP / GPIO36

M5

SATA3GP / GPIO37

N2

SLOAD / GPIO38

M3

SDATAOUT0 / GPIO39

V13

SDATAOUT1 / GPIO48

V3

SATA5GP / GPIO49 / TEMP_ALERT#

D6

GPIO57

A4

VSS_NCTF_1

A44

VSS_NCTF_2

A45

VSS_NCTF_3

A46

VSS_NCTF_4

A5

VSS_NCTF_5

A6

VSS_NCTF_6

B3

VSS_NCTF_7

B47

VSS_NCTF_8

BD1

VSS_NCTF_9

BD49

VSS_NCTF_10

BE1

VSS_NCTF_11

BE49

VSS_NCTF_12

BF1

VSS_NCTF_13

BF49

VSS_NCTF_14

PANTHER-POINT_FCBGA989

PANTHER-POINT_FCBGA989 PCHB0@

PCHB0@

HDD2_DET#

SKU ONE HDD

2010/09/03 2012/12/31

3

A20GATE

PECI

RCIN#

INIT3_3V#

DF_TVS

TS_VSS1 TS_VSS2 TS_VSS3 TS_VSS4

NC_1

C40 B41 C41 A40

P4 AU16 P5 AY11 AY10 T14 AY1

AH8 AK11 AH10 AK10

P37

BG2 BG48 BH3 BH47 BJ4 BJ44 BJ45 BJ46 BJ5 BJ6 C2 C48 D1 D49 E1 E49 F1 F49

GPIO

NCTF

TACH4 / GPIO68 TACH5 / GPIO69 TACH6 / GPIO70 TACH7 / GPIO71

PROCPWRGD

THRMTRIP#

CPU/MISC

VSS_NCTF_15 VSS_NCTF_16 VSS_NCTF_17 VSS_NCTF_18 VSS_NCTF_19 VSS_NCTF_20 VSS_NCTF_21 VSS_NCTF_22 VSS_NCTF_23 VSS_NCTF_24 VSS_NCTF_25 VSS_NCTF_26 VSS_NCTF_27 VSS_NCTF_28 VSS_NCTF_29 VSS_NCTF_30 VSS_NCTF_31 VSS_NCTF_32

HL

TWO HDD

Compal Secret Data

Deciphered Date

ODD_EN#

PCH_GPIO69

PCH_GPIO70

PCH_GPIO71

GATEA20

KB_RST# H_PWRGOOD PCH_THRMTRIP#

NV_CLE

ODD_EN# 34

GATEA20 31

KB_RST# 31

1 2

RH191 390_0402_5%RH191 390_0402_5%

This signal has weak internal pull-up, can't be pulled low

H_PWRGOOD 5 H_THERMTRIP# 5

DMI & FDI Termination Voltage

NV_CLE

RH189 1K_0402_5%RH189 1K_0402_5%

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

ODD_EN# GATEA20 KB_RST# PCH_GPIO69 PCH_GPIO70 PCH_GPIO71

Set to VCC when HIGH Set to VSS when LOW

+1.8VS +1.8VS

12

RH187

2.2K_0402_5%

12

2 1

PMEG2010AEH_SOD123

Compal Electronics, Inc.

PCH_CPU/GPIO

QFKAA

1 2

RH288 10K_0402_5%RH288 10K_0402_5%

1 2

RH182 10K_0402_5%RH182 10K_0402_5%

1 2

RH184 10K_0402_5%RH184 10K_0402_5%

1 2

RH291 10K_0402_5%RH291 10K_0402_5%

1 2

RH315 10K_0402_5%RH315 10K_0402_5%

1 2

RH203 10K_0402_5%RH203 10K_0402_5%

12

RH210

2.2K_0402_5%

DH54

1

21 48Tuesday, March 27, 2012

+3VS

H_SNB_IVB# 5,11

of

0.3

5

+1.05VS_VCCP

PJ4

@PJ4

@

2

112

JUMP_43X118

D D

JUMP_43X118

10U_0603_6.3V6M

CH32

1

2

This pin can be left as NC if On-Die VR is enabled (Default)

C C

B B

+1.05VS_PCH

1

CH43

CH45

10U_0603_6.3V6M

This pin can be left as NC if On-Die VR is enabled (Default)

CH45

2

1U_0402_6.3V6K

1

CH33

2

1U_0402_6.3V6K

1

CH46

2

+3VS

1U_0402_6.3V6K

CH31

CH47

1U_0402_6.3V6K

+VCCP_VCCDMI

+1.05VS_PCH +VCCA_DAC

1

CH34

2

1U_0402_6.3V6K

+1.05VS_PCH

T82PAD T82PAD

1

CH44

CH44 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1

CH50

0.1U_0402_10V7K

2

+VCCAFDI_VRM

T83PAD T83PAD

+1.05VS_PCH

4

UH1G

1300mA

AA23

VCCCORE[1]

AC23

VCCCORE[2]

AD21

VCCCORE[3]

AD23

VCCCORE[4]

AF21

VCCCORE[5]

AF23

VCCCORE[6]

AG21

VCCCORE[7]

AG23

VCCCORE[8]

AG24

VCCCORE[9]

AG26

VCCCORE[10]

AG27

VCCCORE[11]

AG29

VCCCORE[12]

AJ23

VCCCORE[13]

AJ26

VCCCORE[14]

AJ27

VCCCORE[15]

AJ29

VCCCORE[16]

AJ31

VCCCORE[17]

AN19

VCCIO[28]

BJ22

VCCAPLLEXP

AN16

VCCIO[15]

AN17

VCCIO[16]

AN21

VCCIO[17]

AN26

VCCIO[18]

AN27

VCCIO[19]

AP21

VCCIO[20]

AP23

VCCIO[21]

AP24

VCCIO[22]

AP26

VCCIO[23]

AT24

VCCIO[24]

AN33

VCCIO[25]

AN34

VCCIO[26]

BH29

VCC3_3[3]

AP16

VCCVRM[2]

BG6

VccAFDIPLL

AP17

VCCIO[27]

AU20

VCCDMI[2]

PANTHER-POINT_FCBGA989

PANTHER-POINT_FCBGA989 PCHB0@

PCHB0@

3709mA

POWER

VCC CORE

VCCIO

FDI

1mA

CRTLVDS

1mA

VCCTX_LVDS[1] VCCTX_LVDS[2]

60mA

VCCTX_LVDS[3] VCCTX_LVDS[4]

DMI

75mA

VCCDFTERM[1]

VCCDFTERM[2]

190mA

VCCDFTERM[3]

VCCDFTERM[4]

DFT / SPI HVCMOS

20mA

VCCADAC

VSSADAC

VCCALVDS VSSALVDS

VCC3_3[6]

VCC3_3[7]

VCCVRM[3]

VCCDMI[1]

VCCCLKDMI

VCCSPI

U48

U47

AK36 AK37

AM37

+VCCTX_LVDS

AM38 AP36

0.01U_0402_25V7K

AP37

V33

V34

AT16

AT20

+1.05VS_VCC_DMI

AB36

AG16

AG17

AJ16

AJ17

V1

3

0.01U_0402_25V7K

+VCCA_LVDS

CH38

1

CH42

0.1U_0402_10V7K

2

+VCCAFDI_VRM

+VCCP_VCCDMI

1

CH51

0.1U_0402_10V7K

2

1

CH53

CH53 1U_0402_6.3V6K

1U_0402_6.3V6K

2

0.1U_0402_10V7K

CH35

CH36

RH208 0_0603_5%RH208 0_0603_5%

0.01U_0402_25V7K

CH39

+3VS

+VCCP_VCCDMI

0_0805_5%

1

CH49

CH49 1U_0402_6.3V6K

1U_0402_6.3V6K

2

+3VS

1

2

1 2

RH214

+1.8VS

1

2

1

CH40

CH40 22U_0805_6.3V6M

22U_0805_6.3V6M

2

+VCCAFDI_VRM

+1.05VS_PCH

12

RH299

1 2

1_0603_1%

CH37

CH37 10U_0603_6.3V6M

10U_0603_6.3V6M

+3VS

BLM18PG181SN1D_0603

0_0603_5%

1 2

1

2

+VCCA_DAC_R

LH2

12

RH221

RH213

0_0603_5%

1 2

CH48

CH48 1U_0402_6.3V6K

1U_0402_6.3V6K

LH1

12

BLM18PG181SN1D_0603

+1.8VS

+1.5VS

+1.05VS_VCCP

2

+3VS

PCH Power Rail Table Refer to PCH EDS R1.0

Voltage Rail

V_PROC_IO

V5REF

V5REF_Sus

Vcc3_3

VccADAC

VccADPLLA

VccADPLLB

VccCore

VccDMI

VccVRM 1.5 0.167

VccSSC 1.05 0.095

VccDIFFCLKN 1.05 0.055

VccALVDS 3.3

Voltage

S0 Iccmax Current (A)

1.05

5

3.3

1.05

1.1

1.05VccIO 3.711

1.05VccASW 0.903

3.3VccSPI 0.01

3.3VccDSW 0.001

1.8 0.002VccDFTERM

3.3VccRTC N/A

3.3VccSus3_3

3.3VccSusHDA

1.05VccCLKDMI

1

0.001

0.228

0.063

0.08

1.7

0.047

0.095

0.01

0.07

0.001

1.8VccTX_LVDS 0.04

+3VALW to +3V_PCH

Vgs=-4.5V,Id=3A,Rds<97mohm

+3VALW +3VALW_PCH

A A

PCH_PWR_EN#23,34

PCH_PWR_EN#

12

RH3 47K_0402_5%RH3 47K_0402_5%

PJ2

@

2

112

JUMP_43X79

QH2 AO3413_SOT23

D

S

D

S

13

G

1

2

CH99

2

CH102

0.1U_0402_25V6

12

1

@

2

0.1U_0402_10V7K~D

0.01U_0402_25V7K

0.01U_0402_25V7K CH98

CH98

RH1 20K_0402_5%~D@RH1 20K_0402_5%~D

5

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/03 2012/12/31

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

PCH_POWER-1

QFKAA

1

22 48Tuesday, March 27, 2012

of

0.3

5

4

3

2

1

+3VS

LH5

1 2

10UH_LB2012T100MR_20%

D D

C C

+1.05VS_PCH

B B

+1.05VS_PCH

A A

LH7 BLM18PG181SN1D_2PLH7 BLM18PG181SN1D_2P

1 2

LH8 BLM18PG181SN1D_2PLH8 BLM18PG181SN1D_2P

1 2

RH244

12

0_0603_5%

RH247

12

0_0603_5%

RH303

@RH303

@

12

0_0603_5%

5

+3VS_VCC_CLKF33

1

CH73

CH73 10U_0603_6.3V6M

10U_0603_6.3V6M

2

+VCCDIFFCLK

1

CH79

CH79 1U_0402_6.3V6K

1U_0402_6.3V6K

2

+1.05VS_VCCDIFFCLKN

1

CH81

CH81 1U_0402_6.3V6K

1U_0402_6.3V6K

2

+1.05VM_VCCSUS

1

CH83

CH83 1U_0402_6.3V6K

1U_0402_6.3V6K @

@

2

1

CH74

CH74 1U_0402_6.3V6K

1U_0402_6.3V6K

2

"@" Avoid leakage

This pin can be left as NC if On-Die VR is enabled (Default)

+1.05VS_VCCADPLLA

+1.05VS_VCCADPLLB

CH93

CH93 10U_0603_6.3V6M

10U_0603_6.3V6M

1

2

+1.05VS_VCCDIFFCLKN

1

2

CH94

CH94 1U_0402_6.3V6K

1U_0402_6.3V6K

+1.05VS_VCCP

CH95

CH95 10U_0603_6.3V6M

10U_0603_6.3V6M

1 2

0_0603_5%

4.7U_0603_6.3V6K

1U_0402_6.3V6K

1

2

CH96

CH96 1U_0402_6.3V6K

1U_0402_6.3V6K

0.1U_0402_10V7K

+1.05VS_PCH

1U_0402_6.3V6K

RH249

CH86

+3VALW_PCH

+1.05VS_PCH

CH67

CH84

0.1U_0402_10V7K

1

CH87

2

@

CH58

12

0.1U_0402_10V7K

+1.05VS_PCH

CH64

22U_0805_6.3V6M

1U_0402_6.3V6K

1

CH68

2

1

CH78

2

1

2

0.1U_0402_10V7K

0.1U_0402_10V7K CH85

CH85

2

1

CH88

0.1U_0402_10V7K

0.1U_0402_10V7K 2

2

1U_0402_6.3V6K

4

This pin can be left as NC if On-Die VR is enabled (Default)

PAD

1

CH55

0.1U_0402_10V7K

2

+PCH_VCCDSW

+3VS_VCC_CLKF33

+VCCSUS

1

CH54

CH54 1U_0402_6.3V6K

1U_0402_6.3V6K @

@

2

1

CH65

CH65 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

CH69

1U_0402_6.3V6K

2

+VCCRTCEXT

+VCCAFDI_VRM

+1.05VS_VCCADPLLA +1.05VS_VCCADPLLB

+VCCDIFFCLK

+1.05VS_VCCDIFFCLKN

+VCCSST

+1.05VM_VCCSUS

+V_CPU_IO

+RTCVCC

1

CH89

2

T84

PAD

T85

1

2

1

2

0.1U_0402_10V7K

1

CH90

2

PAD

1

CH91

0.1U_0402_10V7K

2

UH1J

AD49

VCCACLK

T16

VCCDSW3_3

V12

DCPSUSBYP

T38

VCC3_3[5]

BH23

VCCAPLLDMI2

AL29

VCCIO[14]

AL24

DCPSUS[3]

AA19

VCCASW[1]

AA21

VCCASW[2]

AA24

VCCASW[3]

AA26

VCCASW[4]

AA27

VCCASW[5]

AA29

VCCASW[6]

AA31

VCCASW[7]

AC26

VCCASW[8]

AC27

VCCASW[9]

AC29

VCCASW[10]

AC31

VCCASW[11]

AD29

VCCASW[12]

AD31

VCCASW[13]

W21

VCCASW[14]

W23

VCCASW[15]

W24

VCCASW[16]

W26

VCCASW[17]

W29

VCCASW[18]

W31

VCCASW[19]

W33

VCCASW[20]

N16

DCPRTC

Y49

VCCVRM[4]

BD47

VCCADPLLA

BF47

VCCADPLLB

AF17

VCCIO[7]

AF33

VCCDIFFCLKN[1]

AF34

VCCDIFFCLKN[2]

AG34

VCCDIFFCLKN[3]

AG33

VCCSSC

V16

DCPSST

T17

DCPSUS[1]

V19

DCPSUS[2]

1mA

BJ8

V_PROC_IO

A22

VCCRTC

PANTHER-POINT_FCBGA989

PANTHER-POINT_FCBGA989 PCHB0@

PCHB0@

POWER

N26

VCCIO[29]

P26

119mA

1mA

PCI/GPIO/LPCMISC

SATA USB

10mA

HDA

3

VCCIO[30] VCCIO[31] VCCIO[32] VCCIO[33]

VCCSUS3_3[7] VCCSUS3_3[8] VCCSUS3_3[9]

VCCSUS3_3[10]

VCCSUS3_3[6]

VCCIO[34]

V5REF_SUS

DCPSUS[4]

VCCSUS3_3[1]

V5REF

1mA

VCCSUS3_3[2] VCCSUS3_3[3] VCCSUS3_3[4] VCCSUS3_3[5]

VCC3_3[1] VCC3_3[8] VCC3_3[4]

VCC3_3[2]

VCCIO[5]

VCCIO[12] VCCIO[13]

VCCIO[6]

VCCAPLLSATA

VCCVRM[1]

VCCIO[2] VCCIO[3] VCCIO[4]

VCCASW[22]

VCCASW[23]

VCCASW[21]

VCCSUSHDA

P28 T27 T29

T23 T24 V23 V24 P24

T26

+PCH_V5REF_SUS

M26

+VCCA_USBSUS

AN23 AN24

+PCH_V5REF_RUN

P34

N20 N22 P20 P22

AA16 W16 T34

AJ2

AF13

AH13 AH14

AF14 AK1

+VCCAFDI_VRM

AF11

+1.05VS_VCC_SATA

AC16 AC17 AD17

+VCCME_22

T21

+VCCME_23

V21

+VCCME_21

T19

P32

2010/09/03 2012/12/31

3mA

1010mA

Clock and Miscellaneous

80mA 80mA

55mA

95mA

CPURTC

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+1.05VS_PCH

1

CH56

CH56 1U_0402_6.3V6K

1U_0402_6.3V6K

2

+3VALW_PCH

1

CH60

0.1U_0402_10V7K

2

+1.05VS_PCH

1 2

CH66 0.1U_0402_10V7KCH66 0.1U_0402_10V7K

1

2

1 2

CH75

0.1U_0402_10V7K

1

CH76

0.1U_0402_10V7K

2

+1.05VS_SATA3

PAD

T86

+VCCAFDI_VRM

+3VALW_PCH

1

CH92

0.1U_0402_10V7K

2

Compal Secret Data

+3VALW_PCH

1

CH61

0.1U_0402_10V7K

2

@

CH62 1U_0402_6.3V6K

1 2

+3VALW_PCH

CH70

CH70 1U_0402_6.3V6K

1U_0402_6.3V6K

+3VS

1

+3VS

+1.05VS_VCC_SATA

1

CH82

CH82 1U_0402_6.3V6K

1U_0402_6.3V6K

2

RH300 0_0402_5%RH300 0_0402_5%

RH301 0_0402_5%RH301 0_0402_5%

RH302 0_0402_5%RH302 0_0402_5%

Deciphered Date

CH72

0.1U_0402_10V7K

2

+1.05VS_SATA3

1

CH77

CH77 1U_0402_6.3V6K

1U_0402_6.3V6K

2

This pin can be left as NC if On-Die VR is enabled (Default)

RH246

0_0805_5%

12

PCH_PWR_EN#22,34

RH242

0_0805_5%

+1.05VS_PCH

12

+1.05VS_PCH

2

Change RH232, RH237 to 10 ohm by follow Compal ORB abd Intel CRB

+1.05VS_PCH

12

+5VALW +5VALW_PCH

RH4 47K_0402_5%RH4 47K_0402_5%

Date: Sheet

JUMP_43X39

PJ5

@ PJ5

@

2

112

QH6

AO3413_SOT23

D

S

D

S

1

CH80

2

12

10_0402_5%

Title

Size Document Number Rev

Custom

13

G

2

0.1U_0402_25V6

+5VALW_PCH

RH232

RH237

+3VALW_PCH

12

21

1

2

+3VS

+5VS

21

12

1

2

Compal Electronics, Inc.

PCH_POWER-2

QFKAA

12

1

CH59

2

@

0.1U_0402_10V7K~D

DH3

DH3 CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

+PCH_V5REF_SUS

CH63

0.1U_0402_10V7K

CH63 & CH71 are different by Intel CRB.

DH4

DH4 CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

+PCH_V5REF_RUN

CH71

CH71 1U_0402_6.3V6K

1U_0402_6.3V6K

1

RH228

20K_0402_5%~D

0.3

of

23 48Tuesday, March 27, 2012

5

UH1H

D D

C C

B B

UH1H

H5

VSS[0]

AA17

VSS[1]

AA2

VSS[2]

AA3

VSS[3]

AA33

VSS[4]

AA34

VSS[5]

AB11

VSS[6]

AB14

VSS[7]

AB39

VSS[8]

AB4

VSS[9]

AB43

VSS[10]

AB5

VSS[11]

AB7

VSS[12]

AC19

VSS[13]

AC2

VSS[14]

AC21

VSS[15]

AC24

VSS[16]

AC33

VSS[17]

AC34

VSS[18]

AC48

VSS[19]

AD10

VSS[20]

AD11

VSS[21]

AD12

VSS[22]

AD13

VSS[23]

AD19

VSS[24]

AD24

VSS[25]

AD26

VSS[26]

AD27

VSS[27]

AD33

VSS[28]

AD34

VSS[29]

AD36

VSS[30]

AD37

VSS[31]

AD38

VSS[32]

AD39

VSS[33]

AD4

VSS[34]

AD40

VSS[35]

AD42

VSS[36]

AD43

VSS[37]

AD45

VSS[38]

AD46

VSS[39]

AD8

VSS[40]

AE2

VSS[41]

AE3

VSS[42]

AF10

VSS[43]

AF12

VSS[44]

AD14

VSS[45]

AD16

VSS[46]

AF16

VSS[47]

AF19

VSS[48]

AF24

VSS[49]

AF26

VSS[50]

AF27

VSS[51]

AF29

VSS[52]

AF31

VSS[53]

AF38

VSS[54]

AF4

VSS[55]

AF42

VSS[56]

AF46

VSS[57]

AF5

VSS[58]

AF7

VSS[59]

AF8

VSS[60]

AG19

VSS[61]

AG2

VSS[62]

AG31

VSS[63]

AG48

VSS[64]

AH11

VSS[65]

AH3

VSS[66]

AH36

VSS[67]

AH39

VSS[68]

AH40

VSS[69]

AH42

VSS[70]

AH46

VSS[71]

AH7

VSS[72]

AJ19

VSS[73]

AJ21

VSS[74]

AJ24

VSS[75]

AJ33

VSS[76]

AJ34

VSS[77]

AK12

VSS[78]

AK3

VSS[79]

PANTHER-POINT_FCBGA989

PANTHER-POINT_FCBGA989 PCHB0@

PCHB0@

VSS[80] VSS[81] VSS[82] VSS[83] VSS[84] VSS[85] VSS[86] VSS[87] VSS[88] VSS[89] VSS[90] VSS[91] VSS[92] VSS[93] VSS[94] VSS[95] VSS[96] VSS[97] VSS[98]

VSS[99] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158]

AK38 AK4 AK42 AK46 AK8 AL16 AL17 AL19 AL2 AL21 AL23 AL26 AL27 AL31 AL33 AL34 AL48 AM11 AM14 AM36 AM39 AM43 AM45 AM46 AM7 AN2 AN29 AN3 AN31 AP12 AP19 AP28 AP30 AP32 AP38 AP4 AP42 AP46 AP8 AR2 AR48 AT11 AT13 AT18 AT22 AT26 AT28 AT30 AT32 AT34 AT39 AT42 AT46 AT7 AU24 AU30 AV16 AV20 AV24 AV30 AV38 AV4 AV43 AV8 AW14 AW18 AW2 AW22 AW26 AW28 AW32 AW34 AW36 AW40 AW48 AV11 AY12 AY22 AY28

4

AY4 AY42 AY46

AY8

B11 B15 B19 B23 B27 B31 B35 B39

B7

F45 BB12 BB16 BB20 BB22 BB24 BB28 BB30 BB38

BB4

BB46

BC14 BC18

BC2 BC22 BC26 BC32 BC34 BC36 BC40 BC42 BC48 BD46

BD5

BE22 BE26 BE40 BF10 BF12 BF16 BF20 BF22 BF24 BF26 BF28

BD3

BF30 BF38 BF40

BF8 BG17 BG21 BG33 BG44

BG8 BH11 BH15 BH17 BH19

H10 BH27 BH31 BH33 BH35 BH39 BH43

BH7

D3 D12 D16 D18 D22 D24 D26 D30 D32 D34 D38 D42

D8

E18

E26 G18 G20 G26 G28 G36 G48 H12 H18 H22 H24 H26 H30 H32 H34

F3

3

UH1I

VSS[159] VSS[160] VSS[161] VSS[162] VSS[163] VSS[164] VSS[165] VSS[166] VSS[167] VSS[168] VSS[169] VSS[170] VSS[171] VSS[172] VSS[173] VSS[174] VSS[175] VSS[176] VSS[177] VSS[178] VSS[179] VSS[180] VSS[181] VSS[182] VSS[183] VSS[184] VSS[185] VSS[186] VSS[187] VSS[188] VSS[189] VSS[190] VSS[191] VSS[192] VSS[193] VSS[194] VSS[195] VSS[196] VSS[197] VSS[198] VSS[199] VSS[200] VSS[201] VSS[202] VSS[203] VSS[204] VSS[205] VSS[206] VSS[207] VSS[208] VSS[209] VSS[210] VSS[211] VSS[212] VSS[213] VSS[214] VSS[215] VSS[216] VSS[217] VSS[218] VSS[219] VSS[220] VSS[221] VSS[222] VSS[223] VSS[224] VSS[225] VSS[226] VSS[227] VSS[228] VSS[229] VSS[230] VSS[231] VSS[232] VSS[233] VSS[234] VSS[235] VSS[236] VSS[237] VSS[238] VSS[239] VSS[240] VSS[241] VSS[242] VSS[243] VSS[244] VSS[245] VSS[246] VSS[247] VSS[248] VSS[249] VSS[250] VSS[251] VSS[252] VSS[253] VSS[254] VSS[255] VSS[256] VSS[257] VSS[258]

PANTHER-POINT_FCBGA989

PANTHER-POINT_FCBGA989 PCHB0@

PCHB0@

VSS[259] VSS[260] VSS[261] VSS[262] VSS[263] VSS[264] VSS[265] VSS[266] VSS[267] VSS[268] VSS[269] VSS[270] VSS[271] VSS[272] VSS[273] VSS[274] VSS[275] VSS[276] VSS[277] VSS[278] VSS[279] VSS[280] VSS[281] VSS[282] VSS[283] VSS[284] VSS[285] VSS[286] VSS[287] VSS[288] VSS[289] VSS[290] VSS[291] VSS[292] VSS[293] VSS[294] VSS[295] VSS[296] VSS[297] VSS[298] VSS[299] VSS[300] VSS[301] VSS[302] VSS[303] VSS[304] VSS[305] VSS[306] VSS[307] VSS[308] VSS[309] VSS[310] VSS[311] VSS[312] VSS[313] VSS[314] VSS[315] VSS[316] VSS[317] VSS[318] VSS[319] VSS[320] VSS[321] VSS[322] VSS[323] VSS[324] VSS[325] VSS[328] VSS[329] VSS[330] VSS[331] VSS[333] VSS[334] VSS[335] VSS[337] VSS[338] VSS[340] VSS[342] VSS[343] VSS[344] VSS[345] VSS[346] VSS[347] VSS[348] VSS[349] VSS[350] VSS[351] VSS[352]

H46 K18 K26 K39 K46 K7 L18 L2 L20 L26 L28 L36 L48 M12 P16 M18 M22 M24 M30 M32 M34 M38 M4 M42 M46 M8 N18 P30 N47 P11 P18 T33 P40 P43 P47 P7 R2 R48 T12 T31 T37 T4 W34 T46 T47 T8 V11 V17 V26 V27 V29 V31 V36 V39 V43 V7 W17 W19 W2 W27 W48 Y12 Y38 Y4 Y42 Y46 Y8 BG29 N24 AJ3 AD47 B43 BE10 BG41 G14 H16 T36 BG22 BG24 C22 AP13 M14 AP3 AP1 BE16 BC16 BG28 BJ28

2

1

A A

5

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/03 2012/12/31

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

PCH_GND

QFKAA

1

24 48Tuesday, March 27, 2012

of

0.3

5

SATA HDD Conn.

D D

C C

+5VS

1.2A

12

C356

10U_0805_6.3V6M

JHDD

GND

RX+

RX-

GND

TX-

TX+

GND

3.3V

3.3V GND GND GND

5V 5V 5V

GND

Reserved

23 24

SUYIN_127043FB022G278ZR

GND

12V

GND

12V

GND

12V

@

Place closely JHDD SATA CONN.

1

C357

0.1U_0402_10V7K

2

1

C358

0.1U_0402_10V7K

2

Close to JHDD

1 2 3 4 5 6 7

8 9 10 11 12 13 14 15 16 17 18 19 20 21 22

SATA_PTX_C_DRX_P0 SATA_PTX_C_DRX_N0

SATA_PRX_DTX_N0 SATA_PRX_DTX_P0

C369 0.01U_0402_25V7KC369 0.01U_0402_25V7K C367 0.01U_0402_25V7KC367 0.01U_0402_25V7K

C368 0.01U_0402_25V7KC368 0.01U_0402_25V7K C370 0.01U_0402_25V7KC370 0.01U_0402_25V7K

+3VS

+5VS

1 2 1 2

1

C359

0.1U_0402_10V7K

2

4

SATA_PTX_DRX_P0 16

SATA_PTX_DRX_N0 16

SATA_PRX_C_DTX_N0 16 SATA_PRX_C_DTX_P0 16

3

SATA ODD Conn (for 14")

JODD

1

14

GND1

15

GND2

SANTA_206001-1

@

GND

GND GND

A+

AB-

B+

DP +5V +5V

MD

2 3 4 5 6 7

8 9 10 11 12 13

SATA_PTX_C_DRX_P2 SATA_PTX_C_DRX_N2

SATA_PRX_DTX_N2 SATA_PRX_DTX_P2

+5VS_ODD

ODD_DA#

SATA ODD Conn (for 15" 17")

JODDB

@JODDB

@

1

1 2 3 4 5 6 7 8

9 10 11 12

GND GND

ACES_88058-120N

2 3 4 5 6 7 8 9 10 11 12 13 14

SATA_PTX_C_DRX_P4 SATA_PTX_C_DRX_N4

SATA_PRX_DTX_N4 SATA_PRX_DTX_P4

15ODD_DETECT#

+5VS_ODD

ODD_DA# ODD_SEL

C376 0.01U_0402_25V7KC376 0.01U_0402_25V7K

1 2

C377 0.01U_0402_25V7KC377 0.01U_0402_25V7K

1 2

C378 0.01U_0402_25V7KC378 0.01U_0402_25V7K

1 2

C375 0.01U_0402_25V7KC375 0.01U_0402_25V7K

1 2

ODD_DETECT# 21

ODD_DA# 20

C382 0.01U_0402_25V7KC382 0.01U_0402_25V7K

1 2

C381 0.01U_0402_25V7KC381 0.01U_0402_25V7K

1 2

C383 0.01U_0402_25V7KC383 0.01U_0402_25V7K

1 2

C384 0.01U_0402_25V7KC384 0.01U_0402_25V7K

1 2

15ODD_DETECT# 21

ODD_SEL 21

2

SATA_PTX_DRX_P2 16

SATA_PTX_DRX_N2 16

SATA_PRX_C_DTX_N2 16 SATA_PRX_C_DTX_P2 16

+5VS_ODD

SATA_PTX_DRX_P4 16 SATA_PTX_DRX_N4 16

SATA_PRX_C_DTX_N4 16

SATA_PRX_C_DTX_P4 16

1.6A

12

C355

10U_0805_6.3V6M

1

Place components closely ODD CONN.

12

C354

@C354

@

10U_0805_6.3V6M

1

C379

C379 @

@

1U_0402_6.3V6K

2

1

C380

0.1U_0402_10V7K

2

Close to JODD (for EMI)

ODD_DA# ODD_DETECT#

1

@

C364

2

C364

0.1U_0402_10V7K

2

15ODD_DETECT#

1

@

@ C365

C365

0.1U_0402_10V7K

2

C363

0.1U_0402_10V7K

1

C360

2

0.1U_0402_10V7K

Power Button & RUSB connector

OUT OUT OUT OCB

6 7 8 5

USB20_N220

USB20_P220

USB20_N320

USB20_P320

W=80mils

+USB_VCCA

1

2

For EMI

12

C361 1000P_0402_50V7KC361 1000P_0402_50V7K

USB_OC#1 20

C362

4.7U_0805_10V4Z

4.7U_0805_10V4Z @

@

USB20_N2

USB20_P2

USB20_N3

USB20_P3

1

4

WCM-2012-900T_0805

1

4

delete +USB_VCCA capacitance (place in SB will be better)

R77 0_0402_5%

@

1 2

L54

1

4

@

1 2

R88 0_0402_5%

R73 0_0402_5%

@

1 2

L53

1

4

WCM-2012-900T_0805

@

1 2

R87 0_0402_5%

USB20_N2_R

2

USB20_P2_R

3

USB20_N3_R

2

USB20_P3_R

3

4

+5VS

JUSIO

1

10 11 12 13 14

ACES_88058-120N

Issued Date

3

1

2

3

4

5

6

7

8

9

9 10 11 12 GND GND

@

Compal Secret Data

2010/09/03 2012/12/31

Compal Secret Data

Deciphered Date

2

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SATA-HDD/ODD/USB

QFKAA

1

0.3

of

25 48Tuesday, March 27, 2012

of

25 48Tuesday, March 27, 2012

of

25 48Tuesday, March 27, 2012

USB20_P3_R USB20_N3_R

USB20_P2_R USB20_N2_R

R22

ON/OFFBTN# +5VS_PWR_ON_LED

+USB_VCCA

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

ON/OFFBTN#31,33

1 2

390_0402_5%

+5VALW

2.5A

U14

2

IN

3

IN

USB_EN#29,31

B B

A A

4

EN/ENB

1

GND

SY6288DCAC_MSOP8

SA00004KB00 SA00003TV00

5

Slot 1 Half PCIe Mini Card-WLAN/ WiMax

+3V_WLAN

RM17

8.2K_0402_5%

CM2

C266

C266 @

@

C260

C260 @

@

40 mils

1 2

WL_OFF#

1

CM3

2

4.7U_0805_10V4Z

E51_TXD31

E51_RXD31

AOAC_WLAN_PWR_EN#31

WL_OFF#31

+3V_WLAN +1.5VS_WLAN

0.1U_0402_10V7K

1

CM1

2

0.01U_0402_25V7K

+3V_WLAN

12

47P_0402_50V8J

+1.5VS_WLAN

12

47P_0402_50V8J

Debug card using

+3V_WLAN

5

UM4

1

P

IN1

WLAN_OFF#

4

O

2

IN2

G

SN74AHC1G08DCKR_SC70-5

3

@

1 2

RM18 0_0402_5%RM18 0_0402_5%

For SED For SED

12

CM7

C253

@

EC_SWI#18,27

CLK_WLAN#17 CLK_WLAN17

@

0.01U_0402_25V7K

@

0_0402_5%

1 2

R16

R16 0_0402_5%

0_0402_5%

1 2 1 2

0_0402_5%

0_0402_5% R17

R17

47P_0402_50V8J

CLKREQ_WLAN#17

PCIE_PRX_WLANTX_N217 PCIE_PRX_WLANTX_P217

PCIE_PTX_C_WLANRX_N217 PCIE_PTX_C_WLANRX_P217

WLAN/ WiFi

0.1U_0402_10V7K

1

2

EC_SWI#

@ R1443

@

+3V_WLAN

CM8

@

BT_CTRL_RBT_ON

R1443

E51_RXD_R

For RF

1

CM9

@

2

4.7U_0805_10V4Z

Green Clock

+3VALW

1

CCL8

GCLK@

2

0.1U_0402_10V7K

+3VL

+3V_LAN

+1.05VS_VCCP

1

CCL1

GCLK@

2

0.1U_0402_10V7K

1

CCL2

GCLK@

2

0.1U_0402_10V7K

1

CCL3

GCLK@

2

0.1U_0402_10V7K

1

47P_0402_50V8J

2

JWLAN

1

3

5

7

7 9910 111112 131314 151516

171718 191920 212122 232324 252526 272728 292930 313132 333334 353536 373738 393940 414142 434344 454546 474748 494950 515152 G153G2

BELLW_80003-7041@

+1.05VS_VCCP

PLT_RST#5,20,27,28,31,32

WLAN_RST#31

12

C254

C254 @

@

+3VALW

+3V_LAN

+3VL

2 4 6 8

+1.5VS_WLAN

2 4 6 8 10 12 14 16

18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54

CLK_X2 CLK_X1

1

IN1

2

IN2

SN74AHC1G08DCKR_SC70-5

WLAN_RST#

RM19 0_0402_5%

+1.5VS

PJ33

PJ33 PAD-OPEN 2x2m

PAD-OPEN 2x2m @

@

2 1

+3V_WLAN

WLAN_OFF# WLAN_RST#_R

LED_WIMAX#

UCL1

2

VDD

15

+V3.3A

8

VDDIO_25M_A

3

VDDIO_25M_B

1

XTAL_OUT

16

XTAL_IN

4

VSS

7

VSS

13

VSS

17

Thermal Pad

SLG3NB244VTR_TQFN16_2X3

1 2

+3V_WLAN

5

UM5

P

O

G

3

@

LED_WIMAX#

WLAN_RST#_R

4

PM_SMBCLK 11,12,17 PM_SMBDATA 11,12,17

USB20_N9 20 USB20_P9 20

VDD_RTC_OUT

RM21

RM21 100K_0402_5%

100K_0402_5%

1 2

WiMax

LED_WIMAX# 33

WIMAX@

1 2

RM7 100K_0402_5%

WIMAX@

1 2

RM181 200K_0402_5%

GCLK@

10

VBAT

11

NC

9

32K

12

NC

5

25M_B

6

25M_A

14

WLAN&BT Combo module circuits

BT on module

Enable Disable

BT_ON#

BT_ON31

For isolate Intel Rainbow Peak and Compal Debug Card.

BT_ON

+3VALW TO +3V_WLAN for AOAC and WOWL

+3VALW

12

R1456

R1456 100K_0402_5%

100K_0402_5%

AOAC_WLAN_PWR_EN#

+5VS

2

GCLK@

GCLK@ 22U_0805_6.3V6M

22U_0805_6.3V6M CCL7

CCL7

1

PCH_RTCX1_R

PCH_X1_R_R LAN_X1_R_R

1

CCL6

2.2U_0603_6.3V6K

2

GCLK@

+RTCBATT

+RTCVCC

1 2

47K_0402_5%

PCH_RTCX1_R 16

R1457

R327

1 2

1K_0402_5%

BT on module

LH

E51_RXD_R

2

C907

0.1U_0402_10V7K

1

2

C908

0.01U_0402_25V7K

1

RCL1 0_0402_5%

RCL2 33_0402_5%

+3VALW

Vgs=-4.5V,Id=3A,Rds<97mohm

S

G

AO3413_SOT23

2

Q210

D

1 3

need short PJ30 if system don't support AOAC or WOWL

PCH_X1_RPCH_X1_R_R

GCLK@

1 2

LAN_X1_RLAN_X1_R_R

LAN_X1_R

GCLK@

1 2

1

CCL10

5P_0402_50V8C

2

GCLK@

+3VS

PJ30

PJ30 PAD-OPEN 2x2m

PAD-OPEN 2x2m @

@

2 1

+3V_WLAN

PCH_X1_R 17

LAN_X1_R 27

EMI request 11/06

GCLK@

YCL1 25MHZ 20PF X3G025000DK1H-X

1

CCL4

CCL4 18P_0402_50V8J

18P_0402_50V8J GCLK@

GCLK@

GND

2

1

2

GND

CLK_X2CLK_X1

3

4

1

CCL5

CCL5 18P_0402_50V8J

18P_0402_50V8J

2

GCLK@

LAN_X1_R_R

Reserved for Swing Level adjustment ( Close GCLK side )

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

@

1 2

RCL5 0_0402_5%

Compal Secret Data

2010/09/03 2012/12/31

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

PCIe-WLAN/JET/3G/TV/GCLK

QFKAA

Tuesday, March 27, 2012

26 48

of

0.3

A

B

C

D

E

UL1

CL1 0.1U_0402_10V7KCL1 0.1U_0402_10V7K

PCIE_PRX_C_LANTX_P117 PCIE_PRX_C_LANTX_N117

12

RL433 0_0402_5%RL433 0_0402_5%

LAN_EN

EC_SWI#

+3V_LAN

1 2

WOL_EN#

1 2

RL28 0_0402_5%

LANCLK_REQ#

RL22 1K_0402_5%@RL22 1K_0402_5%@

LAN_EN

Sx Enable Wake up

LOW

1 3

D

@

1 2

RL26 0_0402_5%

WOL_EN#ISOLATE#

LAN_EN17

CLKREQ_LAN#17

1 1

+3VS

RL24 10K_0402_5%RL24 10K_0402_5%

+3V_LAN

RL25 10K_0402_5%@RL25 10K_0402_5%@

+3VS

12

1K_0402_5%

1K_0402_5% RL6

RL6 @

@

2 2

RL7

15K_0402_5%

1 2

CL2 0.1U_0402_10V7KCL2 0.1U_0402_10V7K

1 2

PCIE_PTX_C_LANRX_P117

2

PCIE_PTX_C_LANRX_N117

G

2N7002_SOT23-3

LANCLK_REQ#CLKREQ_LAN#

QL53

S

@

Sx Disable Wake up

HIGH

PLT_RST#5,20,26,28,31,32

S0

HIGH

CLK_LAN17 CLK_LAN#17

EC_SWI#18,26

PCIE_PRX_LANTX_P1 PCIE_PRX_LANTX_N1 PCIE_PTX_C_LANRX_P1

PCIE_PTX_C_LANRX_N1

PLT_RST# CLK_LAN

CLK_LAN#

LAN_X1 LAN_X2

EC_SWI# ISOLATE#

RL21 10K_0402_5%@RL21 10K_0402_5%@

ENSWREG

+LAN_VDDREG

1 2

RL5 2.49K_0402_1%RL5 2.49K_0402_1%

RTL8105ENCRTL8111E/F Pin14 Pin15 Pin38

NC 10K ohm PD NC 1K ohm PH

12

UL1

22

HSOP

23

HSON

17

HSIP

18

HSIN

16

CLKREQB

25

PERSTB

19

REFCLK_P

20

REFCLK_N

43

CKXTAL1

44

CKXTAL2

28

LANWAKEB

26

ISOLATEB

14

NC/SMBCLK

15

NC/SMBDATA

38

GPO/SMBALERT

33

ENSWREG

34

VDDREG

35

VDDREG

46

RSET

24

GND

49

PGND

RTL8111F-CGT_QFN48_6x6

RTL8111F-CGT_QFN48_6x6 8111FVB@

8111FVB@

NC

LED3/EEDO

LED1/EESK

LED0

EECS

EEDI

MDIP0 MDIN0 MDIP1 MDIN1

NC/MDIP2

NC/MDIN2

NC/MDIP3

NC/MDIN3

DVDD10 DVDD10 DVDD10

DVDD33 DVDD33

AVDD33 AVDD33 AVDD33 AVDD33

EVDD10 AVDD10

AVDD10 AVDD10 AVDD10

REGOUT

LAN_X1_R26

CL43 10PF_0402_50V9

1 2

RL29 22_0402_5%

GCLK@

+3VALW TO +3V_LAN

1

CL26

CL26 27P_0402_50V8J

27P_0402_50V8J NOGCLK@

NOGCLK@

2

I/O2

GND

I/O1

I/O2

GND

I/O1

3

2

1

3

2

1

LAN_MDI0+

LAN_MDI0-

LAN_MDI3+

LAN_MDI3-

@

2

AO3413_SOT23

CL681

+3VALW

+3VALW_PCH

S

QL51

G

PJ29

@

D

1 3

Vgs=-4.5V,Id=3A,Rds<97mohm

1

2

@

2 1

PAD-OPEN 2x2m

2

1

PJ32

PJ32 PAD-OPEN 2x2m

PAD-OPEN 2x2m @

@

CL682

CL682 1U_0402_6.3V6K

1U_0402_6.3V6K

LAN_MDI1+

+3V_LAN

LAN_MDI1-

LAN_MDI2+

+3V_LAN

LAN_MDI2-

+3V_LAN

D99

@D99

@

6

I/O4

5

VDD

4

I/O3

AZC099-04S.R7G_SOT23-6

D100

@D100

@

6

I/O4

5

VDD

4

I/O3

AZC099-04S.R7G_SOT23-6

+3VALW

12

RL147

RL147 100K_0402_5%

100K_0402_5% @

@

RL432

@RL432

@

WOL_EN#31

3 3

1 2

47K_0402_5%

2

CL483

CL483 @

@

0.1U_0402_10V7K

1

2

@

@ CL482

CL482

0.01U_0402_25V7K

1

4.7U_0805_10V4Z

+3V_LAN rising time (10%~90%) need > 1ms and <100ms.

LAN WOL LAN_EN ISOLATEB S0 Sx S0 Sx

--------------------------------------------- 0 0 0 0 1 1 0 1 0 0 1 1 1 0 1 1 1 1 1 1 1 1 1 0*

4 4

* S3: after SUSP# assert low over 100ms S4/S5: after SYSON assert low over 100ms

2/9: Add for ESD request

A

B

Add test point for pin37 on DVT

31 37 40

30 32

1 2 4 5 7 8 10 11

13 29 41

27 39

12 42 47 48

21 3

6 9 45

36

RL2 10K_0402_5%@RL2 10K_0402_5%@ RL1 10K_0402_5%@RL1 10K_0402_5%@

LAN_MDI0+ LAN_MDI0LAN_MDI1+ LAN_MDI1LAN_MDI2+ LAN_MDI2LAN_MDI3+ LAN_MDI3-

+LAN_VDD10

+3V_LAN

+LAN_EVDD10 +LAN_VDD10

+LAN_REGOUT

60 mils

TL1TL1

12 12

Placement near to YL1

RL8

GCLK@RL8

GCLK@

1 2

0_0402_5%

GCLK@

YL1 25MHZ_20PF_7V25000016NOGCLK@ YL1 25MHZ_20PF_7V25000016NOGCLK@

1

GND

2

LAN_X2LAN_X1

3

4

27P_0402_50V8J

NOGCLK@

1

@

CL35

0.1U_0402_25V6

2

Place CL35 colse to UL3

1

CL34

0.1U_0402_25V6

2

Place CL34 colse to UL4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

LAN_X2

CL27

LAN_MDI0+ LAN_MDI0-

LAN_MDI1+ LAN_MDI1-

LAN_MDI2+ LAN_MDI2-

LAN_MDI3+ LAN_MDI3-

C

1

2

LL1

8111FVB@LL1

+LAN_REGOUT

2.2UH +-5% NLC252018T-2R2J-N

Layout Note: LL1 must be within 200mil to Pin36, CL13,CL9 must be within 200mil to LL1

8111FVB@

1 2

4.7U_0603_6.3V6K

1 2

LL2 0_0603_5%LL2 0_0603_5%

1U_0402_6.3V6K

8111FVB@

CL18

CL13

1

2

1

2

+LAN_EVDD10+LAN_VDD10

Close to Pin 21

+3V_LAN

1 2 LL3 0_0603_5%8111FVB@ LL3 0_0603_5%8111FVB@

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K 8111FVB@

8111FVB@

+3V_LAN

12

ENSWREG

UL3

1

TD+

2

TD-

3

CT

4

NC

5

NC

6

CT

7

RD+ RD-8RX-

10/100M transformer_NS681695

UL4

1

TD+

2

TD-

3

CT

4

NC

5

NC

6

CT

7

RD+ RD-8RX-

10/100M transformer_NS681695

2011/11/21 2011/12/11

TX+

TX-

CT NC NC CT

RX+

8111FVB@UL4

8111FVB@

TX+

TX-

CT NC NC CT

RX+

12

16 15 14 13 12 11 10 9

RL4

RL4 0_0402_5%

0_0402_5% 8111FVB@

8111FVB@

RL23

RL23 0_0402_5%

0_0402_5% 8105ELDO@

8105ELDO@

RJ45_MIDI0+ RJ45_MIDI0-

RJ45_MIDI1+ RJ45_MIDI1-

RJ45_MIDI2+ RJ45_MIDI2-

RJ45_MIDI3+ RJ45_MIDI3-

Compal Secret Data

Deciphered Date

+LAN_VDDREG

1

CL28

2

8105E-VL/VD 8111F/F-VB PWM Mode

0 ohm (Pull High)

NC 0 ohm

CL39 1000P_0402_50V7KCL39 1000P_0402_50V7K

12

CL40 1000P_0402_50V7KCL40 1000P_0402_50V7K

12

8111FVB@

CL41 1000P_0402_50V7K

12

CL42 1000P_0402_50V7K

12

8111FVB@

+LAN_VDD10

1

CL9

0.1U_0402_10V7K

2

8111FVB@

1

CL17

0.1U_0402_10V7K

2

1

CL29

0.1U_0402_10V7K

2

8111FVB@

8105E-VL/VD

LDO Mode

NC

(Pull Down)

1 2

RL11 75_0402_1%RL11 75_0402_1%

1 2

RL12 75_0402_1%RL12 75_0402_1%

8111FVB@

1 2

RL13 75_0402_1%

1 2

RL15 75_0402_1%

8111FVB@

D

+3V_LAN

+LAN_VDD10

For P/N and footprint Please place them to ISPD page

CL3 to CL6 close to Pin 27,39,47,48 CL7 to CL8 close to Pin 12,42

1 2

CL3 0.1U_0402_10V7KCL3 0.1U_0402_10V7K

1 2

CL4 0.1U_0402_10V7KCL4 0.1U_0402_10V7K

1 2

CL5 0.1U_0402_10V7KCL5 0.1U_0402_10V7K

1 2

CL6 0.1U_0402_10V7KCL6 0.1U_0402_10V7K

1 2

CL7 0.1U_0402_10V7K8111FVB@ CL7 0.1U_0402_10V7K8111FVB@

1 2

CL8 0.1U_0402_10V7K8111FVB@ CL8 0.1U_0402_10V7K8111FVB@

CL19, CL20,CL21 close to pin 13,29,45, respectively CL22 close to pin 3, respectively CL23,CL24,CL25 close to pin 6,9,41, respectively

1 2

CL19 0.1U_0402_10V7KCL19 0.1U_0402_10V7K

1 2

CL20 0.1U_0402_10V7KCL20 0.1U_0402_10V7K

1 2

CL21 0.1U_0402_10V7KCL21 0.1U_0402_10V7K

1 2

CL22 0.1U_0402_10V7K8111FVB@ CL22 0.1U_0402_10V7K8111FVB@

1 2

CL23 0.1U_0402_10V7K8111FVB@ CL23 0.1U_0402_10V7K8111FVB@

1 2

CL24 0.1U_0402_10V7K8111FVB@ CL24 0.1U_0402_10V7K8111FVB@

1 2

CL25 0.1U_0402_10V7K8111FVB@ CL25 0.1U_0402_10V7K8111FVB@

UL1

8105E-VD 10/100M

8105E-VD 10/100M 8105ELDO@

8105ELDO@

LAN Conn.

JRJ45

RJ45_MIDI0+ RJ45_MIDI0RJ45_MIDI1+ RJ45_MIDI2+ RJ45_MIDI2RJ45_MIDI1RJ45_MIDI3+ RJ45_MIDI3-

RJ45_GND LANGND

CL36 1000P_1808_3KV7KCL36 1000P_1808_3KV7K

JRJ45

1

PR1+

2

PR1-

3

PR2+

4

PR3+

5

PR3-

6

PR2-

7

PR4+

8

PR4-

SANTA_130452-S

SANTA_130452-S @

@

1 2

Title

Size Document Number Rev

Custom

Date: Sheet

9

GND

10

GND

1

CL37

CL37 220P_0402_50V6K

220P_0402_50V6K

2

Compal Electronics, Inc.

PCIe-LAN-RTL8105E/8111F

QMLE4 LA-8864P

1

223

3

223

1

2

E

For ESD

D92

D92 AZC199-02SPR7G_SOT23-3

AZC199-02SPR7G_SOT23-3

@

D93

D93 AZC199-02SPR7G_SOT23-3

AZC199-02SPR7G_SOT23-3 @

@

For ESD

CL38

CL38 @

@

4.7U_0603_6.3V6K

27 48Tuesday, March 27, 2012

0.3

of

5

4

3

2

1

CardReader Conn.

D D

C C

Add R2957 0 ohm to protect +3VS

JCRIO

14

+3VS

1 2 0_0603_5%

0_0603_5%

MIC_SENSE30 NBA_PLUG30

R2957

HP_R30 HP_L30

MIC1_L30 MIC1_R30

+3VS_CR USB20_N8_R

USB20_P8_R HP_R

HP_L MIC1_L

MIC1_R MIC_SENSE NBA_PLUG

GND

13

GND

12

11

10

9

8

7

6

5

4

3

2

1

ACES_88058-120N

@

USB20_N820

USB20_P820

USB20_N8 USB20_N8_R

USB20_P8

LR9

3

2

WCM-2012-900T_0805

1 2

@LR9

@

3

2

1 2

RR67

0_0402_5%

4

1

RR66

0_0402_5%

4

1

USB20_P8_R

TPM1.2 on board

1 2

CT1 22P_0402_50V8J

CT1 22P_0402_50V8J TPM9635@

TPM9635@

YT1

+VSB_TPM

12

YT1

TPM9635@

32.768KHZ_12.5P_1TJF125DP1A000D

B B

+3VS

12

RT2

RT2 TPM9635@

TPM9635@

4.7K_0402_5%

A A

4.7K_0402_5%

LPC_PD#

32.768KHZ_12.5P_1TJF125DP1A000D

1 2

CT6 22P_0402_50V8J

CT6 22P_0402_50V8J TPM9635@

TPM9635@

RT7

4.7K_0402_5%@

RT8

TPM9635@

TPM9635@ 0_0402_5%

0_0402_5%

5

4

1 2

CLK_PCI_TPM_PCH20

RT8

TPM9655@

RT8

TPM9655@

0_0402_5%

12 @RT1

@

LPC_FRAME#16,31,32

@

1 2

CT2

0.1U_0402_10V7K

0.1U_0402_10V7K TPM9655@

TPM9655@

0.1U_0402_10V7K

TPM_XTALI

RT1 10M_0402_5%

10M_0402_5%

TPM_XTALO

LPC_AD016,31,32 LPC_AD116,31,32 LPC_AD216,31,32 LPC_AD316,31,32

PLT_RST#5,20,26,27,31,32 SERIRQ16,31

CT710P_0402_50V8J@CT710P_0402_50V8J RT11 0_0402_5%

RT11 0_0402_5%

2

TPM9635@

1

LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 LPC_FRAME# PLT_RST# LPC_PD# SERIRQ

@

1 2

RT4 10_0402_5%

1 2

TPM9635@

TPM_XTALO TPM_XTALI

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

CT2

1

0.1U_0402_10V7K

CT3

0.1U_0402_10V7K

0.1U_0402_10V7K TPM9655@

TPM9655@ CT4

CT4

0.1U_0402_10V7K

0.1U_0402_10V7K TPM9655@

TPM9655@

0.1U_0402_10V7K

2

CT4

CT3

TPM9635@

1

UT1

24

26

LAD0

23

LAD1

20

LAD2

17

LAD3

22

LFRAME#

16

LRESET#

28

LPCPD#

27

SERIRQ

21

LCLK

SLB 9635 TT 1.2

15

CLKRUN#

7

PP

14

XTALO

13

XTALI/32K IN

25

2011/01/31 2012/12/31

+3VS

+VDD_TPM

+VSB_TPM

10

19

5

VSB

VDD

GPIO

GPIO2

TEST1

TESTB1/BADD

NC NC NC

GND

SLB 9635 TT 1.2_TSSOP28

4

11

18

TPM9635@

Compal Secret Data

12

RT13

RT13 0_0603_5%

0_0603_5% TPM9655@

TPM9655@

TPM_GPIO

6

TPM_GPIO2

2

Base I/O Address 0 = 02Eh 1 = 04Eh

*

TPM9635@

TPM9635@ 0_0402_5%

0_0402_5%

RT5

8

1 2

9

3 12 1

Deciphered Date

+VSB_TPM

RT12

2

CT5

TPM9635@

1

0.1U_0402_10V7K

TPM9655@

TPM9655@ 0_0402_5%

0_0402_5%

1 2

RT10 0_0603_5%

TPM9655@

RT9 0_0603_5%

TPM9635@

CT5

0.1U_0402_10V7K

0.1U_0402_10V7K TPM9655@

TPM9655@

T61PAD @ T61PAD @ T62PAD @ T62PAD @

TPM9635@

4.7K_0402_5%

PLT_RST#

12

RT3

Title

Size Document Number Rev

Custom

Date: Sheet

+3VS

+3VALW

+3VS

12

RT6

4.7K_0402_5%

4.7K_0402_5% @

@

1 2

Compal Electronics, Inc.

PCIe-CardReader RTS5129/TPM

QFKAA

1

of

28 48Tuesday, March 27, 2012

0.3

5

+5VALW

12

RB73

4.7K_0402_5%

4.7K_0402_5% @

@

12

RB74

4.7K_0402_5%

4.7K_0402_5% @

D D

@

SELCDP

USB20_DN0 USB20_DP0

CEN USB20_DN0 USB20_DP0 SELCDP

+5VALW

Pull-up for SLGC55584AV

12

RB75

4.7K_0402_5%

4.7K_0402_5% @

@

12

RB76

4.7K_0402_5%

4.7K_0402_5% @

@

Pull-down for SLGC55584V

U15 1 2 3 4 9

SLG55584AVTR_TDFN8_2X2

1 2 1 2

CEN DM DP SELCDP Thermal Pad

@U15

@

TDM TDP VDD

0_0402_5%

0_0402_5% 0_0402_5%

0_0402_5%

CB

8 7 6 5

RR44

RR44 RR45

RR45

USB20_N0 USB20_P0

SLP_CHG# USB20_N0 USB20_P0

0.1U_0402_16V7K

SLP_CHG#

SLP_CHG# 20 USB20_N0 20 USB20_P0 20

1

CB25

0

1 S0 charging with SDP only

1

CB49

@

10U_0603_6.3V6M

2

@

SELCDP

Function DCP autodetect with

X

mouse/keyboard wakeup

0

1

S0 charging with CDP or SDP only

4

Sleep & Charge Function

+5VALW

USB_CHG_EN#31

+5VALW

USB_CHG_EN#

4.7U_0805_10V4Z

2.5A

UR3

UR3 2 3 4 1

SY6288DCAC_MSOP8

SA00004KB00 SA00003TV00

1

CR46

2

IN IN EN/ENB GND

+USB_VCCB

220U_6.3V_M

6

OUT

7

OUT

8

OUT

5

OCB

W=80mils

0.1U_0402_10V7K

1

+

CR40

2

3

W=60mils

+USB_VCCB

CR38 1000P_0402_50V7KCR38 1000P_0402_50V7K

1

CR39

4.7U_0805_10V4Z

2

@

1

CR44

CR45

2

1000P_0402_50V7K

For EMI

12

USB_OC#0 20

2

@

PJ31

2

112

PAD-OPEN 2x2m

Q8

D

S

D

S

W=80mils

CR42

4.7U_0805_10V4Z

1 3

0.1U_0402_10V7K

1

2

AO3413_SOT23

@

G

2

1

CR43

2

1000P_0402_50V7K

1

CR41

2

+USB_VCCC +USB_VCCB

1 2

+5VALW

R568 100K_0402_5%@R568 100K_0402_5%@

USB_EN#25,31

To EC

+USB_VCCC

1

+

2

220U_6.3V_M

USB_EN#

CR47

@

1

C C

U3RXDP1_R20

U3RXDN1_R20

CR25 0.1U_0402_10V7K

U3TXDP120

U3TXDN120

B B

U3TXDP220

U3TXDN220

A A

1 2

IUSB30@

CR24 0.1U_0402_10V7K

1 2

U3RXDP2_R20

U3RXDN2_R20

IUSB30@

CR34 0.1U_0402_10V7K

1 2

CR35 0.1U_0402_10V7K

1 2

IUSB30@

U3TXDP1_C

U3TXDN1_C

USB20_DP0 USB20_P0_L

USB20_DN0

U3TXDN2_C

USB20_P120

USB20_N120

@ RR19

@

1 2

LR1

IUSB30@LR1

IUSB30@

3

2

KINGCORE WCM-2012HS-670T

1 2

@ RR32

@

1 2

LR2

IUSB30@LR2

IUSB30@

3

2

KINGCORE WCM-2012HS-670T

1 2

@ RR26

@

1 2

LR3

IUSB30@LR3

IUSB30@

3

2

WCM-2012-900T_0805

1 2

@ RR42

@

1 2

KINGCORE WCM-2012HS-670T

1

4

LR5

IUSB30@LR5

IUSB30@

1 2

@ RR43

@

1 2

KINGCORE WCM-2012HS-670T

1

4

LR6

IUSB30@LR6

IUSB30@

1 2

@ RR39

@

1 2

LR4

IUSB30@LR4

IUSB30@

3

2

WCM-2012-900T_0805

1 2

RR19

0_0402_5%

4

1

RR20

0_0402_5%@

RR32

0_0402_5%

4

1

RR22

0_0402_5%@

RR26

0_0402_5%

4

1

RR25

0_0402_5%@

RR42

0_0402_5%

2

3

RR40

0_0402_5%@

RR43

0_0402_5%

2

3

RR41

0_0402_5%@

RR39

0_0402_5%

4

1

RR38

0_0402_5%@

4

1

4

1

4

1

2

3

2

3

4

1

U3RXDP1_R_L

U3RXDN1_R_L

U3TXDP1_R_L

U3TXDN1_R_L

USB20_N0_L

U3RXDP2_R_L

U3RXDN2_R_L

U3TXDP2_R_LU3TXDP2_C

U3TXDN2_R_L

USB20_P1_L

USB20_N1_L

DR7

@

U3TXDP1_R_L U3TXDN1_R_L U3RXDP1_R_L U3RXDN1_R_L

YSCLAMP0524P_SLP2510P8-10-9

USB20_P0_L USB20_N0_L

@

1

2

4

4 5

3

8

DR1

@

2

1

3

AZC199-02SPR7G_SOT23-3

10

10 9

9 7

7 65

65

U3TXDP1_R_L

9

U3TXDN1_R_L

8

U3RXDP1_R_L

7

U3RXDN1_R_L

6

Change ESD Diode for EMI request

DR8

@

U3TXDP2_R_L U3TXDN2_R_L U3RXDP2_R_L U3RXDN2_R_L

YSCLAMP0524P_SLP2510P8-10-9

USB20_P1_L USB20_N1_L

@

1

2

4

4 5

3

8

DR4

@

2

1

3

AZC199-02SPR7G_SOT23-3

10

10 9

9 7

7 65

65

U3TXDP2_R_L

9

U3TXDN2_R_L

8

U3RXDP2_R_L

7

U3RXDN2_R_L

6

Change ESD Diode for EMI request

+USB_VCCB

+USB_VCCC

U3TXDP1_R_L U3TXDN1_R_L

USB20_N0_L USB20_P0_L

U3RXDP1_R_L U3RXDN1_R_L

U3TXDP2_R_L U3TXDN2_R_L

USB20_N1_L USB20_P1_L

U3RXDP2_R_L U3RXDN2_R_L

JUSBA

9

SSTX+

1

VBUS

8

SSTX-

2

D-

7

GND

3

D+

6

SSRX+

4

GND

5

SSRX-

OCTEK_USB-09EAEB

OCTEK_USB-09EAEB @

@

JUSBB

9

SSTX+

1

VBUS

8

SSTX-

2

D-

7

GND

3

D+

6

SSRX+

4

GND

5

SSRX-

OCTEK_USB-09EAEB

OCTEK_USB-09EAEB @

@

10

GND

11

GND

12

GND

13

GND

10

GND

11

GND

12

GND

13

GND

5

4

3

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

200910/9 2010/01/23

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

USB3.0

QFKAA

1

of

29 48Tuesday, March 27, 2012

0.3

5

UA1

MIC2_R MIC2_L

UA1

22 21

17 16

31 30 29

15 14

20 12 10 11

19 28 27 34 35 36

2 3

13 18

47

4

MIC1_R_R MIC1_R_L

+MIC1_VREFO_L +MIC1_VREFO_R

D D

+MIC2_VREFO

CA584.7U_0603_6.3V6K CA584.7U_0603_6.3V6K CA574.7U_0603_6.3V6K CA574.7U_0603_6.3V6K

MIC1_R_C_R MIC1_R_C_L

MONO_IN

1 2

0.01U_0402_25V7K

0.01U_0402_25V7K CA65

@CA65

@

AZ_RST_HD#16

1 2

close to pin 28

CA6010U_0603_6.3V6M CA6010U_0603_6.3V6M

1 2

AC_VREF

1

CA55

0.1U_0402_10V7K

C C

2

INT_MIC_CLK13

CA56

2.2U_0603_6.3V6K

2

@

RA34 20K_0402_1%

Analog MIC

B B

MIC2_L

MIC2_R

AMIC@

AMIC@ CA26

CA26 1U_0402_6.3V4Z

1U_0402_6.3V4Z

12

1U_0402_6.3V4Z

12

CA28

CA28 AMIC@

AMIC@

CA59 100P_0402_50V8JCA59 100P_0402_50V8J

AZ_SYNC_HD16

INT_MIC_DATA13

@

12

EC_MUTE#31

For EMI

RA42

FBMA-10-100505-301T

1

2

INT_MIC_CLK_R

CAM@

CA52

CAM@CA52

CAM@

220P_0402_50V7K

AMIC@

AMIC@ RA25

RA25 1K_0402_5%

1K_0402_5%

12

1K_0402_5%

12

RA26

RA26 AMIC@

AMIC@

close to pin19

RA30

20K_0402_1%

12

CA54 2.2U_0603_10V6KCA54 2.2U_0603_10V6K

12

CA53 2.2U_0603_10V6KCA53 2.2U_0603_10V6K

INT_MIC_CLK_R

+MIC2_VREFO

12

RA24

4.7K_0402_5%

4.7K_0402_5% AMIC@

AMIC@

1 2

AC_JDREF

12

CPVEE

SENSE_A SENSE_B

INT_MIC

CA27

220P_0402_50V7K

AMIC@

close to Codec

4

MIC1_R MIC1_L

MIC2_R MIC2_L

MIC1_VREFO_L MIC1_VREFO_R MIC2_VREFO

LINE2_R LINE2_L

MONO_OUT PCBEEP SYNC RESET#

JDREF LDO_CAP VREF CPVEE CBN CBP

GPIO0/DMIC_DATA GPIO1/DMIC_CLK

SENSE_A SENSE_B

EAPD PD#

ALC259-VC2-CG_MQFN48_6X6

DVDD_IO

SPK_OUT_R+

SPK_OUT_R-

SPK_OUT_L+ SPK_OUT_L-

HPOUT_R

HPOUT_L

SDATA_OUT

SDATA_IN

Thermal Pad

JMIC

1

2

3

GND

4

GND

ACES_50271-0020N-001

@

DVDD

AVDD1 AVDD2

PVDD1 PVDD2

BCLK

AVSS1 AVSS2 PVSS1 PVSS2

DVSS

1 9

25 38

39 46

45 44

40 41

33 32

5 8

6

23

NC

24

NC

48

NC

26 37 42 43 7

49

+DVDD_IO +3VS_DVDD

+AVDD +AVDD

+PVDD +PVDD

SPKR+ SPKR-

SPKL+ SPKL-

75_0402_1%

RA19

RA19 RA20

RA20

75_0402_1%

AZ_SDIN0_HD_R

AZ_BITCLK_HD

DGND

2W 4ohm =40mil 1W 8ohm =20mil

3

35mA for 3.3V level

1 2

+3VS

RA28 0_0603_5%RA28 0_0603_5%

1 2

+3VS

RA17 0_0603_5%RA17 0_0603_5%

HP_R 28 HP_L 28

RA23 33_0402_5%RA23 33_0402_5%

AZ_BITCLK_HD

12

@

12

RA2910_0402_5%@RA2910_0402_5%

place close to chip

AZ_SDIN0_HD 16

CA51

@

1 2

10P_0402_50V8J

AZ_SDOUT_HD 16

AZ_BITCLK_HD 16

AGND

placement near Audio Codec

LA7

SPKL+

SPKL-

SPKR+

SPKR- SPK_R2

LA7

0_0603_5%

LA8

0_0603_5%

LA9

0_0603_5%

LA10

0_0603_5%

12

2 CA71

CA71

@

10U_0603_6.3V6M

1 2

CA72

@

10U_0603_6.3V6M

1

12

2 CA76

CA76

@

10U_0603_6.3V6M

1 2

CA75

@

10U_0603_6.3V6M

1

12

SPK_L1

2

CA74

CA74 1U_0402_6.3V4Z

1U_0402_6.3V4Z @

@

1

SPK_L2

SPK_R1

2

CA73

CA73 1U_0402_6.3V4Z

1U_0402_6.3V4Z @

@

1

SPK_R2

0.1U_0402_16V4Z

12

CA3

10U_0805_6.3V6M

12

CA46

10U_0805_6.3V6M

For EMI please place near codec

1

CA4

2

0.1U_0402_16V4Z

1

CA45

2

+DVDD_IO

+3VS_DVDD

2

+PVDD

close to pin 25

CA42

10U_0603_6.3V6M

Internal AMP

EC_MUTE#

Hight LOW

1 2

0.1U_0402_10V7K

2

CA47

1

CA35

10U_0603_6.3V6M

Enable Disable

RA50

4.7K_0402_5%

+AVDD

1

CA33 0.1U_0402_10V7KCA33 0.1U_0402_10V7K

close to pin39

2

1

CA32 0.1U_0402_10V7KCA32 0.1U_0402_10V7K

2

EC Beep

EC_BEEP#31

PCI Beep

PCH_SPKR16

EC_MUTE#

To solve noise issue

Ext.MIC/LINE IN JACK

MIC1_R_R

MIC1_R_L

close to pin 38

2

1

CA37

1

2

10U_0603_6.3V6M

LA6

1 2

PBY160808T-601Y-N_2P

2

1

RA51

1 2 47K_0402_5%

47K_0402_5%

RA52

1 2 47K_0402_5%

47K_0402_5%

4.7K_0402_5%

RA47

1K_0402_5%

RA48 2.2K_0402_5%RA48 2.2K_0402_5%

12

1K_0402_5%

RA45

RA46 2.2K_0402_5%RA46 2.2K_0402_5%

0.1U_0402_10V7K

0.1U_0402_10V7K 1

CA50

2

0.1U_0402_10V7K

CA34

RA49

1 2

12

1

1 2

0_0603_5%

1

CA39

@

10U_0603_6.3V6M

2

1

12

CA36

10U_0805_6.3V6M

2

Beep sound

CA70

1 2

0.1U_0402_10V7K

CA69

100P_0402_50V8J

+MIC1_VREFO_R

+MIC1_VREFO_L

RA18

+5VS

MONO_IN

MIC1_R 28

MIC1_L 28

+5VS

SPK Conn.

Sense Pin

SENSE A

A A

Impedance

39.2K 20K 10K

5.1K

39.2K 20K 10K

5

Codec Signals

PORT-I (PIN 32, 33) PORT-B (PIN 21, 22) PORT-C (PIN 23, 24) (PIN 48) PORT-E (PIN 14, 15) PORT-F (PIN 16, 17)SENSE B PORT-H (PIN 20)

Function

Headphone out Ext. MIC

4

place close to chip

MIC_SENSE28

NBA_PLUG28

RA32 20K_0402_1%RA32 20K_0402_1%

RA33 39.2K_0402_1%RA33 39.2K_0402_1%

CA63 0.1U_0603_50V7KCA63 0.1U_0603_50V7K

SENSE_A

12

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1 2

CA61 0.1U_0603_50V7KCA61 0.1U_0603_50V7K

1 2

CA66 0.1U_0603_50V7KCA66 0.1U_0603_50V7K

1 2

CA62 0.1U_0603_50V7KCA62 0.1U_0603_50V7K

1 2

RA31 0_0603_5%RA31 0_0603_5%

2011/11/11 2012/12/31

3

Compal Secret Data

Deciphered Date

2

1

DA10 AZ5125-02S.R7G_SOT23-3

DA10 AZ5125-02S.R7G_SOT23-3 @

@

SPK_R1 SPK_R2 SPK_L1 SPK_L2

1

DA11 AZ5125-02S.R7G_SOT23-3

DA11 AZ5125-02S.R7G_SOT23-3 @

@

Title

Size Document Number Rev

Custom

Date: Sheet

3 2

Compal Electronics, Inc.

USB3.0 control

JSPK

1

2

3

4

ACES_85204-0400N

ACES_85204-0400N @

@

1

30 48Tuesday, March 27, 2012

of

5

0.1U_0402_10V7K

1 CB2

CB2

CB4

2

0.1U_0402_10V7K

RB20

0_0402_5%

1 2

0.1U_0402_10V7K

1

2

EC_SCI# AOAC_WLAN_PWR_EN#

100K_0402_5%

0.1U_0402_10V7K

1

CB1

0.1U_0402_10V7K

For EMI

CLK_PCI_EC

12

RB3

10_0402_5%

@

D D

+3VL

C C

+3VL

+3VS

B B

@

1

CB11

22P_0402_50V8J

@

2

RB2

47K_0402_5%

1 2

CB12 0.1U_0402_10V7KCB12 0.1U_0402_10V7K

RB12 2.2K_0402_5%RB12 2.2K_0402_5%

1 2 1 2

RB13 2.2K_0402_5%RB13 2.2K_0402_5% RB15 2.2K_0402_5%RB15 2.2K_0402_5%

1 2 1 2

RB16 2.2K_0402_5%RB16 2.2K_0402_5%

@

1 2

CB14 180P_0402_50V8J

EC_RST#

EC_SMB_CK1 EC_SMB_DA1

EC_SMB_CK2 EC_SMB_DA2

SUSP#

0.1U_0402_10V7K

KSI[0..7]32

KSO[0..15]32

2

GATEA2021

KB_RST#21

SERIRQ16,28

LPC_FRAME#16,28,32

LPC_AD316,28,32 LPC_AD216,28,32 LPC_AD116,28,32 LPC_AD016,28,32

CLK_PCI_EC20

PLT_RST#5,20,26,27,28,32

AOAC_WLAN_PWR_EN#26

EC_SCI#21

KSI[0..7] KSO[0..15]

EC_SMB_CK135,36 EC_SMB_DA135,36 EC_SMB_CK217 EC_SMB_DA217

PM_SLP_S3#18 PM_SLP_S5#18

EC_SMI#21

USB_CHG_EN#29

BT_ON26

FAN_SPEED15

WL_OFF#26

E51_TXD26 E51_RXD26 PM_PWROK5,18

PWR_SUSP_LED#33

CLK_EC18

1 CB5

CB5

2

1000P_0402_50V7K

GATEA20 KB_RST# SERIRQ LPC_FRAME# LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0

CLK_PCI_EC PLT_RST# EC_RST#

KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6

KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9

KSO10 KSO11 KSO12 KSO13 KSO14 KSO15

EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2

PM_SLP_S3# PM_SLP_S5# EC_SMI#

USB_CHG_EN# BT_ON

FAN_SPEED1 WL_OFF# E51_TXD E51_RXD PM_PWROK PWR_SUSP_LED#

12

RB22

4

1000P_0402_50V7K

1

CB6

CB6 2

UB1

1

GATEA20/GPIO00

2

KBRST#/GPIO01

3

SERIRQ

4

LPC_FRAME#

5

LPC_AD3

7

LPC_AD2

8

LPC_AD1

10

LPC_AD0

12

CLK_PCI_EC

13

PCIRST#/GPIO05

37

EC_RST#

20

EC_SCII#/GPIO0E

38

GPIO1D

55

KSI0/GPIO30

56

KSI1/GPIO31

57

KSI2/GPIO32

58

KSI3/GPIO33

59

KSI4/GPIO34

60

KSI5/GPIO35

61

KSI6/GPIO36

62

KSI7/GPIO37

39

KSO0/GPIO20

40

KSO1/GPIO21

41

KSO2/GPIO22

42

KSO3/GPIO23

43

KSO4/GPIO24

44

KSO5/GPIO25

45

KSO6/GPIO26

46

KSO7/GPIO27

47

KSO8/GPIO28

48

KSO9/GPIO29

49

KSO10/GPIO2A

50

KSO11/GPIO2B

51

KSO12/GPIO2C

52

KSO13/GPIO2D

53

KSO14/GPIO2E

54

KSO15/GPIO2F

81

KSO16/GPIO48

82

KSO17/GPIO49

77

EC_SMB_CK1/GPIO44

78

EC_SMB_DA1/GPIO45

79

EC_SMB_CK2/GPIO46

80

EC_SMB_DA2/GPIO47

6

PM_SLP_S3#/GPIO04

14

PM_SLP_S5#/GPIO07

15

EC_SMI#/GPIO08

16

GPIO0A

17

GPIO0B

18

GPIO0C

19

GPIO0D

25

EC_INVT_PWM/GPIO11

28

FAN_SPEED1/GPIO14

29

EC_PME#/GPIO15

30

EC_TX/GPIO16

31

EC_RX/GPIO17

32

PCH_PWROK/GPIO18

34

SUSP_LED#/GPIO19

36

NUM_LED#/GPIO1A

122

XCLKI/GPIO5D

123

XCLKO/GPIO5E

1

CB16

CB16 20P_0402_50V8

20P_0402_50V8

2

1 CB7

CB7

2

LPC & MISC

+3VL

Int. K/B

Int. K/B Matrix

Matrix

9

22

33

96

EC_VDD/VCC

PWM Output

DA Output

PS2 Interface

SPI Device Interface

SPI Flash ROM

SM Bus

GPIO

GND/GND

11

24

35

+3VL

CB3

0.1U_0402_10V7K

1 2

125

67

111

EC_VDD0

EC_VDD/VCC

AD Input

CPU1.5V_S3_GATE/GPXIOA00

GPIO

GND/GND

GND0

94

113

BEEP#/GPIO10

EC_VDD/AVCC

ACOFF/GPIO13

BATT_TEMP/GPIO38

ADP_I/GPIO3A

IMON/GPIO43

DAC_BRIG/GPIO3C EN_DFAN1/GPIO3D

CHGVADJ/GPIO3F

EC_MUTE#/GPIO4A

USB_EN#/GPIO4B

CAP_INT#/GPIO4C

EAPD/GPIO4D

TP_CLK/GPIO4E

TP_DATA/GPIO4F

WOL_EN/GPXIOA01

ME_EN/GPXIOA02

VCIN0_PH/GPXIOD00

SPIDI/GPIO5B

SPIDO/GPIO5C SPICLK/GPIO58 SPICS#/GPIO5A

ENBKL/GPIO40

PECI_KB930/GPIO41

FSTCHG/GPIO50

BATT_CHG_LED#/GPIO52

CAPS_LED#/GPIO53

PWR_LED#/GPIO54

BATT_LOW_LED#/GPIO55

SYSON/GPIO56 VR_ON/GPIO57

PM_SLP_S4#/GPIO59

EC_RSMRST#/GPXIOA03 EC_LID_OUT#/GPXIOA04

PROCHOT_IN/GPXIOA05

H_PROCHOT#_EC/GPXIOA06

VCOUT0_PH/GPXIOA07

GPO

BKOFF#/GPXIOA08

PBTN_OUT#/GPXIOA09

PCH_APWROK/GPXIOA10

SA_PGOOD/GPXIOA11

AC_IN/GPXIOD01

EC_ON/GPXIOD02

ON/OFF/GPXIOD03

GPI

LID_SW#/GPXIOD04

SUSP#/GPXIOD05

PECI_KB9012/GPXIOD07

AGND/AGND

KB9012QF-A3_LQFP128_14X14

69

GPIO0F GPIO12

GPIO39

GPIO3B

GPIO42

IREF/GPIO3E

GPXIOD06

V18R

3

WL_BT_LED#

21

EC_BEEP#

23 26 27

BATT_TEMPA

63 64

ADP_I

65 66 75

UMA_ENBKL

76

68

EN_DFAN1

70

PCH_SUSPWRDN#

71

SUSACK#

72

EC_MUTE#

83

USB_EN#

84 85 86

TP_CLK

87

TP_DATA

88

VGATE

97

WOL_EN#

98

PWRME_CTRL

99

VCIN0_PH

109

119

VCIN0_PH connect to

120 126

power portion (9012 only)

128

73 74 89

BATT_FULL_LED#

90

WLAN_RST#

91 92

BATT_CHG_LOW_LED#

93

SYSON

95

VR_ON

121 127

PCH_RSMRST#

100

EC_LID_OUT#

101

PROCHOT_IN

102

H_PROCHOT#_EC

103

VCOUT0_PH_L

104

BKOFF#

105

PBTN_OUT#

106

PCH_PWR_EN

107

SA_PGOOD

108

ACIN_D

110

EC_ON_R

112

ON/OFFBTN#

114

LID_SW#

115

SUSP#

116 117

EC_PECI H_PECI

118

+EC_V18R

124

1

CB15

4.7U_0805_10V4Z

2

WL_BT_LED# 33 EC_BEEP# 30

BATT_TEMPA 35 ADP_I 35,36

UMA_ENBKL 19

EN_DFAN1 5

PCH_SUSPWRDN# 18

SUSACK# 18

EC_MUTE# 30

USB_EN# 25,29

TP_CLK 33

TP_DATA 33

VGATE 18,42

WOL_EN# 27

PWRME_CTRL 16

VCIN0_PH 35

DRAMRST_CNTRL_EC 7 BATT_FULL_LED# 33 WLAN_RST# 26

BATT_CHG_LOW_LED# 33 SYSON 38 VR_ON 42

PM_SLP_S4# 18

PCH_RSMRST# 18 EC_LID_OUT# 21 PROCHOT_IN 35

BKOFF# 13

PBTN_OUT# 18 PCH_PWR_EN 34 SA_PGOOD 41

ON/OFFBTN# 25,33 LID_SW# 33

SUSP# 34,38,39,40

1 2

RB19 43_0402_1%RB19 43_0402_1%

Reserve this signal to EC by SW demand 2011/10/18a

2

VR_HOT#42

H_PROCHOT#_EC

SSM3K7002F_SC59-3

BATT_TEMPA

ACIN_D

H_PROCHOT#_EC

LID_SW#

TP_CLK

TP_DATA

SYSON

PROCHOT_IN connect to power portion (9012 only)

VCOUT0_PH connect to power portion (9012 only)

NV-GPU GPS function control pin connect to a OR-gate in the power portion

ACIN_D

H_PECI 5

RB10_0402_5% RB10_0402_5%

1 2

SUSP#

VR_ON

1

D

QB1

2

G

S

3

1 2

CB9 100P_0402_50V8JCB9 100P_0402_50V8J

1 2

CB10 100P_0402_50V8JCB10 100P_0402_50V8J

+3VS

@

1 2

RB6 10K_0402_5%

+3VL

1 2

RB35 47K_0402_5%RB35 47K_0402_5%

1 2

RB8 4.7K_0402_5%RB8 4.7K_0402_5%

1 2

RB9 4.7K_0402_5%RB9 4.7K_0402_5%

1 2

RB10 4.7K_0402_5%RB10 4.7K_0402_5%

VCOUT0_PH_L

VCOUT0_PH connect to power portion (9012 only)

RB34 0_0402_5%RB34 0_0402_5%

RB18

330K_0402_5%

RB21 10K_0402_5%RB21 10K_0402_5%

RB23 10K_0402_5%RB23 10K_0402_5%

1 2

12

DB1RB751V40_SC76-2 DB1RB751V40_SC76-2

1 2

+5VS

+3VL

1

CB8

CB8 47P_0402_50V8J

47P_0402_50V8J

2

TV tuner temperature

VS_ON 37

ACIN 18,36

H_PROCHOT# 5

1

Close to EC

Voltage Comparator Pins FOR 9012 A3

VCIN0 pin109 VCIN1 pin102

A A

VCOUT0 pin104

VCOUT1 pin103

RB27

100K_0402_5%

1 2

E51_TXD

5

>1.2V <1.2V

HIGH

LOW

4

LOW

HIGH

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

EC_ON_R

1 2

RB36 2.2K_0402_5%RB36 2.2K_0402_5%

1

CB50

CB50 1U_0402_6.3V6K

1U_0402_6.3V6K

2

For KB9012 EC_ON low pulse work around

2010/12/22 2011/12/22

Issued Date

3

2010/12/22 2011/12/22

EC_ON 37

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

LPC-EC-KB9012&930

Tuesday, March 27, 2012

1

of

31 48

of

31 48

of

31 48

0.3

SPI Flash (128KB)

Lid SW

LPC Debug Port

Place the JDB under DDR DIMM.

KEYBOARD CONN.

JKB

1

1 2 3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23

26

GND

24

27

GND

25

ACES_50524-02501-001

ACES_50524-02501-001 @

@

KSI[0..7]

KSO[0..15]

2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25

KSO15 KSO14 KSO13 KSO12 KSO11 KSO10 KSO9 KSO8 KSO7 KSI7 KSI6 KSO6 KSI5 KSO5 KSI4 KSI3 KSI2 KSI1 KSO4 KSI0 KSO3 KSO2 KSO1 KSO0

KSI[0..7] 31 KSO[0..15] 31

KSO0 KSO1 KSO2 KSO3

KSI0

KSO4 KSI1 KSI2 KSI3 KSI4

KSO5 KSI5

KSO6 KSI6 KSI7

KSO7

KSO8

KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15

1 2

C406 100P_0402_50V8JC406 100P_0402_50V8J

1 2

C405 100P_0402_50V8JC405 100P_0402_50V8J

1 2

C404 100P_0402_50V8JC404 100P_0402_50V8J

1 2

C408 100P_0402_50V8JC408 100P_0402_50V8J

1 2

C425 100P_0402_50V8JC425 100P_0402_50V8J

1 2

C407 100P_0402_50V8JC407 100P_0402_50V8J

1 2

C431 100P_0402_50V8JC431 100P_0402_50V8J

1 2

C422 100P_0402_50V8JC422 100P_0402_50V8J

1 2

C423 100P_0402_50V8JC423 100P_0402_50V8J

1 2

C424 100P_0402_50V8JC424 100P_0402_50V8J

1 2

C409 100P_0402_50V8JC409 100P_0402_50V8J

1 2

C427 100P_0402_50V8JC427 100P_0402_50V8J

1 2

C411 100P_0402_50V8JC411 100P_0402_50V8J

1 2

C429 100P_0402_50V8JC429 100P_0402_50V8J

1 2

C421 100P_0402_50V8JC421 100P_0402_50V8J

1 2

C412 100P_0402_50V8JC412 100P_0402_50V8J

1 2

C415 100P_0402_50V8JC415 100P_0402_50V8J

1 2

C416 100P_0402_50V8JC416 100P_0402_50V8J

1 2

C417 100P_0402_50V8JC417 100P_0402_50V8J

1 2

C418 100P_0402_50V8JC418 100P_0402_50V8J

1 2

C419 100P_0402_50V8JC419 100P_0402_50V8J

1 2

C413 100P_0402_50V8JC413 100P_0402_50V8J

1 2

C410 100P_0402_50V8JC410 100P_0402_50V8J

1 2

C420 100P_0402_50V8JC420 100P_0402_50V8J

G-Sensor

JDB

@JDB

@

1 2 3 4 5 6 7 8 9

10 GND GND

E-T_3801K-F10N-01L

1 2 3 4 5 6 7 8 9 10 11 12

+3VS

CLK_PCI_DDR

PLT_RST# 5,20,26,27,28,31 CLK_PCI_DDR 20

LPC_FRAME# 16,28,31 LPC_AD3 16,28,31 LPC_AD2 16,28,31 LPC_AD1 16,28,31 LPC_AD0 16,28,31

C457

1 2

22P_0402_50V8J

@

R393

22_0402_5%

@

CLK_PCI_DDR

For EMI

Close to JKB

Security Classification

2010/09/03 2012/12/31

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Debug/KB

QFKAA

Tuesday, March 27, 2012

of

32 48

of

32 48

of

32 48

0.3

5

Power Button

SW4

SW4 TJG-533-V-T/R_6P

TJG-533-V-T/R_6P

3

1 2

4

5

6

D D

For debug

SW3

SW3 TJG-533-V-T/R_6P

TJG-533-V-T/R_6P

3 4

1 2

5

6

+3VL

R395

R395 100K_0402_5%

100K_0402_5%

1 2

ON/OFFBTN#

1

C458

0.1U_0402_25V6

0.1U_0402_25V6 @

@

2

For EMI request

ON/OFFBTN# 25,31

4

3

2

1

Touchpad Connector

+5VS +5VALW+3VL

TP_CLK31 TP_DATA31

LID_SW#31

BATT_FULL_LED#31

BATT_CHG_LOW_LED#31

PWR_SUSP_LED#31

WL_BT_LED#31

WIMAX_LED#

Mount R802 and un-mount R801 When Wlan LED need Blinking

TP_CLK TP_DATA

LID_SW# BATT_FULL_LED# BATT_CHG_LOW_LED# PWR_SUSP_LED# HDD_LED# WL_BT_LED_R#

WL_BT_LED_R#

1 2

R801 0_0402_5%R801 0_0402_5%

1 2

R802 0_0402_5%@R802 0_0402_5%@

JTP

1

2

3

4

5

6

7

8

9

10

13

11

G1

11

14

12

G2

12

ACES_50504-0120N-001

@

H18

PCH

H8

H9

1

H_3P0

H_3P0 @

@

1

H_3P0x4P0N

H_3P0x4P0N @

@

1

H_3P0

H_3P0 @

@

NPTH

H19

1

H_3P0

H_3P0 @

@

H16

H_3P0N

H_3P0N @

@

1

WiMAX LED

+3VS

C C

SATA LED

+3VS

HDD_LED#

R819

10K_0402_5%

WIMAX@

WIMAX_LED#

R820

10K_0402_5%

3 4

Q5534B

Q5534B 2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

3

1 2

6 1

12

5

Q156A

Q156A 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6 WIMAX@

WIMAX@

4

Q156B 2N7002DW-T/R7_SOT363-6

Q156B 2N7002DW-T/R7_SOT363-6 WIMAX@

WIMAX@

2

12

6 1

5

Q5534A

Q5534A 2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

0_0402_5%@

R4534

LED_WIMAX# 26

2

SATA_LED# 16

Screw Hole

H2

H3

H1

H_4P2

H_4P2 @

@

1

H3

H_4P6

H_4P2x4P6

@

1

PTH

H10

H7

H17

H_3P0

@

1

H20

H_3P0

@

1

H12

H11

H_3P0

@

1

H14

H13

H_3P0

@

1

VGACPU

H5

H4

1

H15

H_3P0

H_3P0 @

@

1

H_3P5

H_3P5 @

@

H_3P0

H_3P0 @

@

1

PCB Fedical Mark PAD

FD2@FD2

FD3@FD3

FD1@FD1

@

B B

@

1

FD4@FD4

@

1

ISPD

ZZZ

PCB LA-8862P

PJP1

45@PJP1

45@

PJP1

PJP1 UH1

HM70R1@UH1

HM70R1@

Panther Point BD82HM70

A A

5

4

3

Panther Point BD82HM70

UH1

HM76R3@UH1

HM76R3@

Panther Point BD82HM76

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

TP/PWR/LED/Screw/ISPD

Size Document Number Rev

Date: Sheet

QFKAA

Tuesday, March 27, 2012

of

33 48

of

33 48

of

1

33 48

0.3

A

+3VALW TO +3VS

+3VALW +3VS

Q29

S

D

S

D

S

D

G

D

SI4800BDY_SO8

C465

1 2 3 4

1

2

0.022U_0402_25V7K

8 7 6 5

1 1

1

2

4.7U_0805_10V4Z

Vgs=10V,Id=9A,Rds=18.5mohm

1

C459

C459 1U_0402_6.3V6K

1U_0402_6.3V6K

2

12

C466

R412

R412 820K_0402_5%

820K_0402_5%

1

C460 4.7U_0805_10V4ZC460 4.7U_0805_10V4Z

2

R409

1 2

61

+VSB

120K_0402_5%

Q10A

SUSP SUSP

2

2N7002DW-T/R7_SOT363-6

5

R406

470_0805_5%

1 2 3

Q10B

4

B

+5VALW

8 7 6 5

SI4800BDY_SO8

1

C467

2

4.7U_0805_10V4Z

C

D

E

+5VALW TO +5VS

Vgs=10V,Id=9A,Rds=18.5mohm

+5VS

Q30

1

S

D

2

S

D

3

S

D

4

G

D

1

12

R413

C468

820K_0402_5%

2

0.01U_0402_25V7K

@

1

C461

C461 1U_0402_6.3V6K

1U_0402_6.3V6K

2

61

4.7U_0805_10V4Z

1

C462

2

R410

1 2

+VSB

200K_0402_5%

200K_0402_5% Q11A

Q11A

2

2N7002DW-T/R7_SOT363-6

5

R407

470_0805_5%

1 2 3

Q11B

4

2

C822

C822 @

@

1

0.1U_0402_10V7K

+5VS

For EMI

2

C821

C821 @

@

1

0.1U_0402_10V7K

PCH_PWR_EN#22,23

PCH_PWR_EN31

PCH_PWR_EN#

12

R5529

100K_0402_5%

+5VALW

R5545

R5545 10K_0402_5%

10K_0402_5%

1 2

13

D

2

G

SB570020110

S

2N7002E-T1-E3_SOT23-3

Q5527

+1.8VS

1 2

13

D

S

R470

R470 470_0805_5%

470_0805_5%

Q190

SUSP

2

G

2N7002_SOT23-3

Un-used Dual MOS

For S3 CPU Power Saving

+5VALW

R422

R422 100K_0402_5%

100K_0402_5%

1 2

SUSP

VCCP_PWRGOOD39,41

2 2

3 3

1 2

R158 220K_0402_5%R158 220K_0402_5%

SUSP

0.75VR_EN

3

Q6B

5

2N7002DW-T/R7_SOT363-6

4

0.75VR_EN 38

+5VS_ODD

R457

470_0805_5%

1 2 61

Q53A

2

2N7002DW-T/R7_SOT363-6

ODD_EN#21

ODD_EN#

SUSP5,9

SUSP#31,38,39,40

+3VS

5

4

2N7002DW-T/R7_SOT363-6

Q53B

61

Q6A

2

2N7002DW-T/R7_SOT363-6

+5VS TO +5VS_ODD

+5VS

R441

R441 10K_0402_5%

10K_0402_5%

R440

1 2

3

1 2

47K_0402_5%

+0.75VS

2

C471

0.1U_0402_10V7K

1

2

AO3413_SOT23

C217

0.01U_0402_25V7K

1

4.7U_0805_10V4Z

R421

22_0805_5%

1 2

13

D

Q189

SUSP

2

G

2N7002_SOT23-3

S

+5VS

Vgs=-4.5V,Id=3A,Rds<97mohm

2

S

Q45

C679

Q45

G

2

@

2

1

D

1 3

1

2

+1.05VS_VCCP

1 2

13

D

2

G

S

PJ28

PJ28 JUMP_43X79

JUMP_43X79 @

@

1

C680

C680 1U_0402_6.3V6K

1U_0402_6.3V6K

2

R468

R468 470_0805_5%

470_0805_5%

Q60

Q60 2N7002_SOT23-3

2N7002_SOT23-3

+5VS_ODD

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2010/09/03 2012/12/31

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

DC-DC INTERFACE

QFKAA

Tuesday, March 27, 2012

E

of

34 48

of

34 48

of

34 48

0.3

A

PL1

HCB2012KF-121T50_0805

1 2

PL2

HCB2012KF-121T50_0805

1 2

HCB2012KF-121T50_0805

1 2

12

PC2

100P_0402_50V8J

VMB

12

PC5

PC5 1000P_0402_50V7K

1000P_0402_50V7K

PD2

@PD2

@

PJSOT24CW_SOT323-3

2

1

3

12

PC3

1000P_0402_50V7K

PL3

HCB2012KF-121T50_0805

1 2

PL4

HCB2012KF-121T50_0805

1 2

ADPIN

+ +

-

@

@ PJP2

PJP2

1 2 3 4

1

2

EC_SMCA

3

EC_SMDA

4

TS_A

5

6

7

12

1

2

3

PC1

1000P_0402_50V7K

PD1

@

PJSOT24CW_SOT323-3

PR10 100_0402_1%PR10 100_0402_1%

PR11 100_0402_1%PR11 100_0402_1%

PR12 24K_0402_1%PR12 24K_0402_1%

PR13 0_0402_5%PR13 0_0402_5%

@

PJP1

1 1

SINGA_2DW-0005-B03

2 2

CCM_C250137GR007M262ZR

B

12

PC6

10U_0805_25V6K

+3VL

BATT_TEMPA 31

VIN

12

PC4

100P_0402_50V8J

12

PC7

EC_SMB_CK1 31,36

EC_SMB_DA1 31,36

BATT+

0.01U_0402_25V7K

C

PH1 under CPU botten side : CPU thermal protection at 93 +-3 degree C Recovery at 56 +-3 degree C

ADP_I31,36

PR2

0_0402_5%

PROCHOT_IN31 VCIN0_PH31

1 2

B+

100K_0402_1%

POK18,37

PR8

VL

1 2

PR9

0_0402_5%

VSB_N_002

12

PC10

VSB_N_003

13

D

2

G

S

.1U_0402_16V7K

PR7

22K_0402_1%

1 2

PQ2

PQ2 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

1 2

Please locate these parts Near EC chip

+3VL

PR1

1K_0402_1%

PR3

20K_0402_1%

TP0610K-T1-GE3_SOT23-3

12

PR6

PC8

100K_0402_1%

0.22U_0603_25V7K

VSB_N_001

+VSBP +VSB

PR5

0_0402_5%

1 2

PQ1

S

D

13

G

2

PJP3

2 1

PAD-OPEN 2x2m

12

PR4

12.1K_0402_1%

PH1

100K_0402_1%_TSM0B104F4251RZ

PC9

0.1U_0603_25V7K

D

+VSBP

3 3

RTC Battery

PR14

PBJ1

-+

MAXEL_ML1220T10@

PR14

560_0603_5%

1 2

12

PR15

560_0603_5%

560_0603_5% 1 2

+RTCBATT

SP093MX0000

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

2010/01/232009/01/23

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

PWR-DCIN / BATT CONN / OTP

SAMSUNG

D

of

35 48Tuesday, March 27, 2012

of

35 48Tuesday, March 27, 2012

of

35 48Tuesday, March 27, 2012

0.3

A

B

C

D

for reverse input protection

1

D

PQ209

2

SI1304BDL-T1-GE3_SC70-3

G

PR226

1 2

3M_0402_5%

P1 B+VIN

12

G

PR231@

0_0402_5%

S

3

12

PC231

0.1U_0402_25V6

12

PR234

4.12K_0603_1%

DMG4406LSS_SO8

1 2 3

PR235

4.12K_0603_1%

PQ205

4

P2

8 7 6 5

+3VALW

+3VL

ACIN18,31

VIN

PR211

0.01_1206_1%

1 2

PC236

0.1U_0402_25V6

12

PC238

0.1U_0603_25V7K

0.1U_0603_25V7K BQ24725_ACP

BQ24725_ACN

BQ24725_CMSRC

BQ24725_ACDRV

1 2

PR238 10K_0402_1%

@

PR238 10K_0402_1%

@

1 2

PR239 10K_0402_1%PR239 10K_0402_1%

1 2

PR240 10K_0402_1%PR240 10K_0402_1%

1 2

PR243

270K_0402_1%

1UH_NRS4018T1R0NDGJ_3.2A_30%

4 3

12

PC235

1 2

0.1U_0402_25V6

0.1U_0402_25V6 1U_0603_25V6K

1U_0603_25V6K

21

1

2

3

4

BQ24725_ACOK

12

PR244

5

154K_0402_1%

PL201

1 2

VIN

2

3

PD230

PD230 BAS40CW_SOT323-3

BAS40CW_SOT323-3

1 12

1 2

PR228

10_1206_1%

PC239

BQ24725_VCC

BQ24725_LX

19

20

PU200

VCC

PAD ACN

ACP

CMSRC

ACDRV

ACOK

PHASE

BQ24725RGRR_VQFN20_3P5X3P5

ACDET6IOUT7SDA8SCL9ILIM

BQ24725_ACDET

12

PC211

@

10U_0805_25V6K

0.047U_0402_25V7K

0.047U_0402_25V7K PC237

PC237

12

PR229

2.2_0603_5%

DH_CHG

BQ24725_REGN

BQ24725_BST

18

17

BTST

HIDRV

12

PC213

PC212

10U_0805_25V6K

12

PD231

PD231 RB751V-40_SOD323-2

RB751V-40_SOD323-2

PC205

1 2

1U_0603_25V6K

16

REGN

15

LODRV

14

GND

13

SRP

12

SRN

11

BATDRV

10

BQ24725_ILIM

12

PR242

100K_0402_1%

12

PC214

10U_0805_25V6K

DH_CHG

DL_CHG

PR236

10_0603_1%

SRP

1 2

PR237

6.8_0603_5%

SRN

1 2

BQ24725_BATDRV

PR241

1 2

150K_0402_1%

PC243

0.01U_0402_25V7K

12

@

PC215

CSOP1

CSON1

0.1U_0402_25V6

12

PC216

0.1U_0402_25V6

4

12

PC242

0.1U_0603_16V7K

+3VALW

BQ24725_BATDRV

5

PQ201

PQ201 AON7408L

AON7408L

4.7UH_ETQP3W4R7WFN_5.5A_20%

123

BQ24725_LX

5

Remember to change PC124 from SE000006S80 to SE025104K80 (2011-02-22)

12

@

PQ202

123

12

FDMC7692S_MLP8-5

@

PL202

1 2

PR206

4.7_1206_5%

PC206

680P_0402_50V7K

1 2

PR233

4.12K_0603_1%

CHG

DMG4406LSS_SO8

8 7 6 5

BQ24725_BATDRV_1

PR222

0.02_1206_1%

1 2

CSOP1

12

PC240

0.1U_0402_25V6

PQ207

1 2 3

4

4 3

CSON1

12

PC241

0.1U_0402_25V6

12

@

PC234

0.01U_0402_50V7K

PC221

10U_0805_25V6K

12

PR232

0_0402_5%

@

PC222

10U_0805_25V6K

12

PC223

10U_0805_25V6K

12

PC224

2200P_0402_50V7K

BATT+

12

PC225

0.01U_0402_50V7K

PR225

1 2

1M_0402_5%

1 1

2 2

3 3

1M_0402_5%

PQ203

TPCA8057-H_PPAK56-8-5

1

5

12

PC230

2200P_0402_50V7K

2 3

4

BQ24725_ACDRV_1

Vin Dectector & ILIM

2.4 < Vdetect < 3.15V Min. Typ Max.

H-->L 17.296V L-->H 17.7V

ILIM and external DPM 3A

4 4

12

PC244

0.1U_0402_25V6

12

PR245

66.5K_0402_1%

12

PC246

100P_0402_50V8J

PR246

1 2

100_0402_5%

12

PC245

Please locate the RC Near EC chip 2011-02-22

100P_0402_50V8J

EC_SMB_CK1 31,35

EC_SMB_DA1 31,35

ADP_I 31,35

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2009/01/23 2010/01/23

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

PWR-CHARGER

SAMSUNG

D

of

36 48Tuesday, March 27, 2012

of

36 48Tuesday, March 27, 2012

of

36 48Tuesday, March 27, 2012

0.3

A

B

C

D

E

2VREF_8205

12

PC333

1U_0603_16V6K

13K_0402_1%

1 2

120K_0402_1%

1 2

BST_3V

UG_3V

12

1U_0603_16V6K

PR330

PR331

20K_0402_1%

PR337

PU330

25

P PAD

7

VO2

8

VREG3

9

BOOT2

10

UGATE2

11

PHASE2

12

LGATE2

PC342

PC342 1U_0603_10V6K

1U_0603_10V6K

2VREF_8205

FB_3V

ENTRIP2

6

ENTRIP2

EN

13

3/5V_B+

5

14

FB2

SKIPSEL

4

TONSEL

15

30K_0402_1%

1 2

20K_0402_1%

FB_5V

1 2

120K_0402_1%

ENTRIP1

1 2

3

1

2

FB1

REF

ENTRIP1

VO1

PGOOD

BOOT1

UGATE1

PHASE1 LGATE1

NC18VREG5

VIN16GND

17

RT8205LZQW(2)_WQFN24_4X4

12

PC359

4.7U_0805_10V6K

12

PC360

0.1U_0603_25V7K

PR350

PR351

PR357

3/5V_B+

12

24 23 22 21 20 19

BST_5V

UG_5V LX_5V LG_5V

PR355

2.2_0402_5%

1 2

BST1_5VBST1_3V

VL

12

PC353

PC354

0.1U_0402_25V6

0.1U_0402_25V6 2200P_0402_50V7K

2200P_0402_50V7K

PC355

0.1U_0402_10V7K

0.1U_0402_10V7K 1 2

POK 18,35

FDMC7692S_MLP8-5

12

PC358

10U_0805_25V6K

PQ352

5

PQ351

4

AON7408L

123

5

4

123

PL352

2.2UH_ETQP3W2R2WFN_8.5A_20%

2.2UH_ETQP3W2R2WFN_8.5A_20% 1 2

12

+

PR356

@

SNUB_5V

12

PC356

@

4.7_1206_5%

680P_0402_50V7K

+

+5VALWP

1

PC351

2

220U_6.3V_M

1 1

PC338

0.1U_0402_25V6

3/5V_B+

12

PC339

+3VALWP

2200P_0402_50V7K

12

PC340

4.7U_0805_25V6-K

SSM6N7002FU_US6

PL332

4.7UH_ETQP3W4R7WFN_5.5A_20%

1

+

PC331

2

220U_D2_4VY_R15M

PQ333A

12

ENTRIP1

61

D

S

AON7408L

PR336

@

4.7_1206_5%

PC336

@

680P_0402_50V7K

N_3_5V_001

2

G

PQ331

12

SNUB_3V 12

5

4

123

5

4

123

PQ332

PQ332 FDMC7692S_MLP8-5

FDMC7692S_MLP8-5

ENTRIP2

34

5

G

10U_0805_6.3V6M

D

PQ333B

SSM6N7002FU_US6

S

PC341

PC335

0.1U_0402_10V7K

0.1U_0402_10V7K 1 2

LX_3V

3/5V_B+

+3VLP

12

PR334

499K_0402_1%

1 2

100K_0402_1%

PR333

1 2

2.2_0402_5%

LG_3V

PR338

12

B+

2 2

3 3

PL331

HCB2012KF-121T50_0805

1 2

PR339

100K_0402_5%

PR340

2.2K_0402_1%

EC_ON31

VS_ON31

4 4

1 2

PR341

0_0402_5%

1 2

2

12

PC343

4.7U_0805_25V6-K

A

100K_0402_5%

1 2

13

PQ334

PQ334 DRC5115E0L_SOD323-3

DRC5115E0L_SOD323-3

B

VL

+5VALWP

+3VALWP

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

PJP352

1 2

PAD-OPEN 4x4m

PAD-OPEN 4x4m PJP332

PJP332

1 2

PAD-OPEN 4x4m

C

(5A,200mils ,Via NO.= 10)

+5VALW

(4A,120mils ,Via NO.= 8)

+3VALW

Compal Secret Data

2007/08/02 2008/08/02

Compal Secret Data

Deciphered Date

+3VLP

D

VL +5VL

PJP333

2 1

PAD-OPEN 2x2m

PJP353

2 1

PAD-OPEN 2x2m

Title

Size Document Number Rev

Custom

Date: Sheet

+3VL

Compal Electronics, Inc.

PWR-3.3VALWP/5VALWP

QCLA4 LA-8861P M/B

37 48Tuesday, March 27, 2012

E

0.3

of

5

4

3

2

1

PL151

HCB1608KF-121T30_0603

D D

B+

HCB1608KF-121T30_0603

1 2

12

PL152

330U_D2_2V_Y

PL152

1UH_FDSD0630-H-1R0M-P3_11A_20%

+1.5VP

C C

Mode Level +0.75VSP VTTREF_1.5V S5 L off off S3 L off on S0 H on on

Note: S3 - sleep ; S5 - power off

B B

1

+

PC152

2

PC153

0.1U_0402_25V6

12

1.5V_B+

12

PC154

2200P_0402_50V7K

12

SNUB_+1.5VP

12

PC157

10U_0805_25V6K

PR156

4.7_1206_5%

4.7_1206_5% FDMC7692S_MLP8-5

FDMC7692S_MLP8-5

PC156

680P_0402_50V7K

12

@

PC158

4.7U_0805_25V6-K

PQ151

AON7408L

PQ152

SYSON31

123

PR155

PC160

PR155

1 2

2.2_0402_5%

DH_1.5V

SW_1.5V

DL_1.5V

20K_0402_1%

1U_0603_10V6K

12

EN_1.5V

PR152

1 2

PC159

1 2

VDD_1.5V

0.75VR_EN34

BOOT_1.5V

CS_1.5V

+5VALW

1.5V_B+

15

LGATE

14

PGND

13

CS

12

VDDP

11

VDD

PR158

887K_0402_1%

1 2

UGATE

TON

19

18

BOOT

S5

8

7

EN_0.75VSP

12

16

17

PHASE

RT8207MZQW_WQFN20_3X3

PGOOD

9

10

TON_1.5V

PR161

@PR161

@ 0_0402_5%

0_0402_5%

+1.5V

20

PU150

21

VTT

PAD

VLDOIN

S3

VTTGND

VTTSNS

GND

VTTREF

VDDQ

FB

6

FB_1.5V

1

2

3

4

5

VTTREF_1.5V

PR160

PR160 10K_0402_1%

10K_0402_1%

1 2

PR154

10.2K_0402_1%

+1.5VP

12

BST_1.5V

PC155

5

1 2

0.22U_0402_10V6K

4

PR157

5.1_0603_5%

4

1 2

+5VALW

1U_0603_10V6K

PR159

0_0402_5%

1 2

12

PC163

@PC163

@

0.1U_0402_10V7K

0.75Volt +/- 5% TDC 0.7A Peak Current 1A

12

PC261

10U_0805_6.3V6K

PC261

PC260

+1.5VP

PC162

PC162 .1U_0402_16V7K

.1U_0402_16V7K

12

@

10U_0805_6.3V6K

12

+0.75VSP

PC262

10U_0805_6.3V6K

PC161

0.033U_0402_16V7K

PR162

0_0402_5%

PJP152

1 2

PAD-OPEN 4x4m

PAD-OPEN 4x4m PJP153

PJP153

+1.5VP

+0.75VSP

A A

1 2

PAD-OPEN 4x4m

PJP76

1 2

PAD-OPEN 3x3m

5

(12A,480mils ,Via NO.= 24)

+1.5V

(1A,40mils ,Via NO.= 3)

+0.75VS

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/07/20

3

SUSP#31,34,39,40

Compal Secret Data

0_0402_5%

Deciphered Date

12

PC164

@PC164

@

0.1U_0402_10V7K

Compal Electronics, Inc.

2012/12/31

2

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

PWR-1.5VP / +0.75VSP

Tuesday, March 27, 2012

SAMSUNG

1

38 48

of

0.3Custom

5

4

3

+1.05VSP_B+

2

PL401

HCB1608KF-121T30_0603

12

1

B+

+3VS

12

D D

VCCP_PWRGOOD34,41

PR402

60.4K_0402_1%

1 2

PR404

0_0402_5%

SUSP#31,34,38,40

C C

1 2

PC411

@PC411

@

0.1U_0402_16V7K

12

PR401

PR401 100K_0402_1%

100K_0402_1%

TRIP_+1.05VSP EN_+1.05VSP FB_+1.05VSP RF_+1.05VSP

12

PR407

470K_0402_1%

PC413

@PC413

@

1000P_0402_50V7K

1 2

PU400

PU400 TPS51212DSCR_SON10_3X3

TPS51212DSCR_SON10_3X3

BST_+1.05VSP

1

PGOOD

2

TRIP

3

EN

4

VFB

5

TST

+1.05VSP1 +1.05VSP

PR409

4.99K_0402_1%

VBST

DRVH

SW

V5IN

DRVL

TP

PR408

@PR408

@

1.2K_0402_1%

1 2

12

10 9

SW_+1.05VSP

8 7

LG_+1.05VSP

6 11

PR405

2.2_0402_5%

1 2

+5VALW

12

PC410

PC410 1U_0603_10V6K

1U_0603_10V6K

BST1_+1.05VSP

VCCIO_SENSE1

PC405

0.22U_0402_10V6K

1 2

UG_+1.05VSP1UG_+1.05VSP

PC401

PC403

5

PQ401

4

PQ401 AON7518

AON7518

123

5

PQ402

PQ402 TPCA8059

TPCA8059

123

PC403

0.1U_0402_25V6

0.47UH_FDVE0630-H-R47M=P3_17.7A_20%

12

PR406

4.7_1206_5%

SNUB_+1.05VSP

12

PC406

680P_0402_50V7K

12

PC407

10U_0805_25V6K

2200P_0402_50V7K

PL402

1 2

.1U_0402_16V7K

PC408

10U_0805_25V6K

PC412

+1.05VSP

1

+

PC402

12

2

PR410

100_0402_1%

330U_D2_2.5VY_R15M

12

VCCIO_SENSE 8

PR414

PR414 10K_0402_1%

10K_0402_1%

1 2

B B

A A

5

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/07/20

3

Compal Secret Data

Deciphered Date

+1.05VSP

2012/12/31

1 2

PAD-OPEN 4x4m

1 2

PAD-OPEN 4x4m

2

PJP402

PJP403

+1.05VS_VCCP

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Tuesday, March 27, 2012

(12A,480mils ,Via NO.= 24)

PWR-V1.05SP

SAMSUNG

39 48

1

of

0.3Custom

A

B

C

D

1 1

PU180

SY8033BDBC_DFN10_3X3

PL181

HCB1608KF-121T30_0603

+5VALW

SUSP#31,34,38,39

2 2

1 2

PR183

0_0402_5%

12

PC184

PC184 22U_0805_6.3V6M

22U_0805_6.3V6M

EN_1.8VSP

@PR184

@

47K_0402_5%

VIN_1.8VSP

12

PR184

SY8033BDBC_DFN10_3X3

10

9 8

5

12

PC187

@

0.1U_0402_10V7K

PVIN PVIN SVIN

EN

PL182

4

PG

TP

NC

7

11

LX_1.8VSP

2

LX

3

LX

6

FB

NC

1

PL182

1UH_NRS4018T1R0NDGJ_3.2A_30%

1 2

12

PR186

4.7_1206_5%

SNUB_1.8VSP

12

PC186

680P_0603_50V7K

20K_0402_1%

10K_0402_1%

PR181

FB_1.8VSP

PR182

12

PC188

68P_0402_50V8J

+1.8VSP

12

PC182

PC183

22U_0805_6.3V6M

PJP182

+1.8VSP

1 2

PAD-OPEN 4x4m

(3A,120mils ,Via NO.= 6)

+1.8VS

3 3

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

2012/12/312009/01/23

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

PWR-1.8VSP

SAMSUNG

D

of

40 48Tuesday, March 27, 2012

of

40 48Tuesday, March 27, 2012

of

40 48Tuesday, March 27, 2012

0.3

5

4

3

2

1

D D

The 1k PD on the VCCSA VIDs are empty. These should be stuffed to ensure that VCCSA VID is 00 prior to VCCIO stability.

VID [0] VID[1] VCCSA Vout 0 0 0.9V 0 1 0.8V 1 0 0.725V

PC805

680P_0402_50V7K

1 2

SNUB_+VCCSA

PR801

4.7_1206_5%

1 2

PL801

PL803

HCB1608KF-121T30_0603

+5VALW +VCCSAP

C C

HCB1608KF-121T30_0603

1 2

+VCCSA_PWR_SRC +VCCSA_PHASE

PC815

68P_0402_50V8J

+VCCSAP_FB

PR802

1K_0402_5%

12

1 2

2

PC818

1

2200P_0402_50V7K

12

PC817

0.1U_0603_25V7K

12

PC819

22U_0805_6.3V6M

12

PC820

22U_0805_6.3V6M

PU801

SY8037BDCC_DFN12_3X3

12

PVIN

11 10

LX LX

PVIN

LX

SVIN

9

FB

PG

8

VOUT

EN

7

VID1

VID0

GND

13

1 2 3 4 5 6

+VCCSA_EN

PR805

1 2

1K_0402_5%

PR804

100K_0402_5%

12

PC809

@

PL801

0.47UH_FDVE0630-H-R47M=P3_17.7A_20%

0.47UH_FDVE0630-H-R47M=P3_17.7A_20% 1 2

SA_PGOOD 31

+3VS

1 2

PR806

0_0402_5%

0.1U_0402_10V7K

H_VCCSA_VID0 9

H_VCCSA_VID1 9

PC801

22U_0805_6.3V6M

VCCP_PWRGOOD34,39

PC803

PC802

1 2

22U_0805_6.3V6M

1 1 0.675V

output voltage adjustable network

+VCC_SAP TDC 4.2A Peak Current 6A OCP current 7.2A

PC804

1 2

22U_0805_6.3V6M

PR812

100_0402_5%

12

PR811

0_0402_5%

12

+VCCSA_SENSE 9

PJP801

B B

A A

+VCCSAP

1 2

PAD-OPEN 4x4m

+VCCSA

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/07/20

Compal Secret Data

Deciphered Date

2

2012/12/31

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

PWR-VCC_SAP

SAMSUNG

Tuesday, March 27, 2012

of

41 48

1

41 48

0.3C

5

4

3

2

1

PC503

1 2

COMPA1

1 2 3 4 5 6 7 8

9 10 11 12 13 14 15

12

COMP_CPU1

12

PC503

.1U_0402_16V7K

1 2

PR505

24K_0402_1%

PC510

1 2

2200P_0402_25V7K

DIFFA

61

60

59

58

PU500

PAD

VSPA

VSNA

VCC VDDBP VRDYA EN SDIO ALERT# SCLK VBOOT

NCP6132BMNR2G_QFN60_7X7

ROSC VRMP VRHOT# VRDY VSN VSP DIFF

FB

TRBST#

18

17

16

FB_CPU

TRBST#

COMP_CPU

PC529

12

2200P_0402_50V7K

PC536

PR555

1 2

23.7K_0402_1%

1 2

PC504

PC505

@

560P_0402_50V7K

1500P_0402_50V7K

165K_0402_1%

PR512

1 2

80.6K_0603_1%

80.6K_0603_1% PR513

PR513

1 2

80.6K_0603_1%

PC512

PC512 1000P_0402_50V7K

1000P_0402_50V7K

1 2

CSCOMPA

PR516

1 2

21.5K_0402_1%

FBA

DROOPA

ILIMA

COMPA

TRBSTA#

IMONAIMONA

53

54

56

55

52

57

FBA

ILIMA

DIFFA

IOUTA

COMPA

DROOPA

TRBSTA#

CSCOMP22CSP325CSREF24CSSUM

COMP

DROOP

IOUT

ILIM

23

21

19

20

DROOP

ILIM_CPU

IMONIMON

1 2

PR541 21K_0402_1%PR541 21K_0402_1%

CSCOMPCSCOMPCSCOMPCSCOMPCSCOMPCSCOMP

1 2

PR557

75K_0402_1%

.1U_0402_16V7K

PH501 220K_0402_5%_ERTJ0EV224JPH501 220K_0402_5%_ERTJ0EV224J

PUT CLOSE TO VCORE Phase 1 Inductor

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1 2

CSP1A

.1U_0402_16V7K

CSSUMA

TSENSEA

46

51

48

47

50

49

CSP2A

CSP1A

TSNSA

CSREFA

CSSUMA

PWMA

CSCOMPA

BSTA

HGA

SWA

LGA

BST2

HG2

SW2

LG2 PVCC PGND

LG1

SW1

HG1

BST1

CSP1

DRVEN

CSP2

TSNS

PWM

27

29

26

28

30

TSENSETSENSE CSP2A

PC526

1 2

.1U_0402_16V7K

.1U_0402_16V7K CSP1 CSP2 CSP3

PC532

PC532 1000P_0402_50V7K

1000P_0402_50V7K

CSSUM

1 2

PC535 1500P_0402_50V7KPC535 1500P_0402_50V7K

@

1 2

PC537 330P_0402_50V7K

12

3

PR502

10_0402_1%

D D

TRBSTA#

1 2

VCC_AXG_SENSE9

VSS_AXG_SENSE9

12

PR524

+1.05VS_VCCP

12

PR534

PR534 75_0402_1%

75_0402_1%

1 2

+1.05VS_VCCP

1 2

130_0402_1%

VGATE18,31

TRBST#

C C

PC517

.1U_0402_16V7K

VR_SVID_DAT8 VR_SVID_ALRT#8 VR_SVID_CLK8

PC523

47P_0402_50V8J

VR_HOT#31

VSSSENSE8

VCCSENSE8

B B

A A

FBA3

PR503

8.06K_0402_1%

1 2

0.033U_0402_16V7K

PR522

1 2

PC502

3300P_0402_50V7K

1 2

PC507

12

PC516

PC516 .1U_0402_16V7K

.1U_0402_16V7K

54.9_0402_1%

54.9_0402_1% VR_SVID_DAT1

1 2

PR527 0_0402_5%PR527 0_0402_5%

PR548

1 2

10_0402_1%

1 2

FBA1

12

+3VS

12

PR535

PR535 10K_0402_5%

10K_0402_5%

FB_CPU3

PR551

1 2

8.06K_0402_1%

PR560

806_0402_1%

VR_ON31

CPU_B+

PR538

1 2

0_0402_5%

PR540

1 2

0_0402_5%

PC531

49.9_0402_1%

1 2

0.033U_0402_16V7K

0.033U_0402_16V7K FB_CPU2

PC534

DROOP

PR504

1 2

PR509

10_0402_1%

1 2

PR510

1K_0402_1%

+5VS

PR528

95.3K_0402_1%

1 2

PR529

1K_0402_1%

VSN

12

PC524

PC524 1000P_0402_50V7K

1000P_0402_50V7K

VSP

PR543

1 2

1K_0402_1%

PR545

FB_CPU1

1 2

12

806_0402_1%

0.033U_0402_16V7K

PC538

1 2

1000P_0402_50V7K

PC508

680P_0402_50V7K

FBA2

1 2

1000P_0402_50V7K

PR501

2_0603_5%

1 2

PC501

2.2U_0603_10V7K

1 2

PR521

0_0402_5%

1 2

PR526

10K_0402_1%

1 2

12

PC521

0.01U_0402_25V7K

PC528

1 2

680P_0402_50V7K

PR552

CSREFCSCOMP

PC509 10P_0402_50V8JPC509 10P_0402_50V8J

PR511

1 2

5.11K_0402_1%

PC513

1 2

6132_VCC

VR_ON_CPU VR_SVID_DAT1 VR_SVID_ALRT# VR_SVID_CLK VBOOT

ROSC_CPU VRMP VR_HOT# VGATE

DIFF_CPU

PC527 22P_0402_50V8JPC527 22P_0402_50V8J

PR547

6.04K_0402_1%

5

4

PUT CLOSE TO GT Inductor

12

PH503

75K_0402_1%

PR520

1 2

36K_0402_1%

PR530 0_0402_5%PR530 0_0402_5%

3P: 73.2K 2P: 41.2K

6132_PWM 43 DRVEN 43

PH503 220K_0402_5%_ERTJ0EV224J

220K_0402_5%_ERTJ0EV224J

CSREFA

12

PR514

@PR514

@

0_0402_5%

CSP1A

CSREFA

12

PR518

@PR518

@

0_0402_5%

CSP2A

2P: 36K 1P: 26.1K

PR523

1 2

4.7_0603_5%

HG3 43 LG3 43

PR525

1 2

4.7_0603_5%

HG2 43 LG2 43

1 2

LG1 43 HG1 43

1 2

PR533

4.7_0603_5%

CSP3

12

PR542

@PR542

@

0_0402_5%

0_0402_5% CSREF

CSP2

12

PR546

@PR546

@

0_0402_5%

0_0402_5% CSREF

CSP1

12

PR553

@PR553

@

0_0402_5%

0_0402_5% CSREF

PR554

1 2

160K_0603_1%

PR556

1 2

160K_0603_1%

PR559

1 2

160K_0603_1%

Compal Secret Data

Deciphered Date

PC511

0.047U_0402_16V7K

1 2

PC514

0.047U_0402_16V7K

1 2

6132_PWMA 43

BST3_1

BST2_1

PC520 2.2U_0603_10V7KPC520 2.2U_0603_10V7K

PR532 0_0402_5%PR532 0_0402_5%

BST1_1

0.22U_0402_10V6K

12

SWN1

SWN2

SWN3

PR506

1 2

NTC_PH203

PR508

12

2P: install

SWN2A

1P: @

SWN1A

CSREFA 43

PC515

45

BST3

44 43 42 41

BST2

40 39 38 37

6132P_VCCP

36 35 34 33 32

BST1

31

PR536

1 2

73.2K_0402_1%

CSREF 43

1 2

PR558

165K_0402_1%

2009/12/01 2010/12/31

PR515 5.49K_0402_1%PR515 5.49K_0402_1%

1 2

PR519

5.49K_0402_1%

PC518

1 2

0.22U_0402_10V6K

PC519

1 2

0.22U_0402_10V6K

1 2

PC522

PR539

1 2

5.76K_0402_1%

PC525

0.047U_0402_16V7K

PR544

1 2

5.76K_0402_1%

PC530

0.047U_0402_16V7K

PR549

1 2

5.76K_0402_1%

PC533

0.047U_0402_16V7K

2

1 2

HF: 1.65K 2P: 1.65K 1P: 1K

SWN1A 43

2P: install 1P: @

SWN2A 43

SW3 43

SW2 43

+5VS

SW1 43

SWN3 43

3P: install 2P: @

SWN2 43

SWN1 43

PC506

PR507

1.65K_0402_1%

PC506

1 2

1000P_0402_50V7K

TSENSEA

12

PR517

1 2

13.7K_0402_1%

PUT CLOSE TO V_GT HOT SPOT

CSREFACSCOMPA DROOPA

PH504

PH504 100K_0402_1%_TSM0B104F4251RZ

100K_0402_1%_TSM0B104F4251RZ

+5VS

Option for 1 phase GFX

12

CSP2A

PR531

@PR531

@

0_0402_5%

2Phase: @ 1Phase: install

+5VS

CSP3

TSENSE

12

PR550

13.7K_0402_1%

PUT CLOSE TO VCORE HOT SPOT

12

1 2

3Phase: @

PR537

@PR537

@

2Phase: install

0_0402_5%

PH502

PH502 100K_0402_1%_TSM0B104F4251RZ

100K_0402_1%_TSM0B104F4251RZ

Compal Electronics, Inc.

PWR-CPU_CORE

QCL70

1

Option for 2 phase CPU

Title

Size Document Number Rev

Custom

Date: Sheet

0.3

of

42 48Tuesday, March 27, 2012

5

4

3

2

1

CPU_B+ CPU_B+

PQ505

PQ504

PQ504 TPCA8057

TPCA8057

4

AON7518

5

PQ507

AON7518

@

123

12

SNUB_CPU2

12

上

2(AON7518)下1(FDMS0308AS)

上

2(AON7518)下1(FDMS0308AS)

上

1(AON7518)下1(FDMS0308AS)

上

1(AON7518)下1(FDMS0308AS)

上

1(AON7518)下1(FDMS0308AS)

上

1(AON7518)下1(FDMS0308AS)

12

PC543

10U_0805_25V6K

0.36UH_FDUE1030D-H-R36M=P3_32A_20%

0.36UH_FDUE1030D-H-R36M=P3_32A_20% 1

2

PR564

4.7_1206_5%

PC548

680P_0402_50V7K

12

PC544

10U_0805_25V6K

PL512

PC545

0.1U_0402_25V6

4 3

12

PC546

2200P_0402_25V7K

V2N_CPU

12

PR566

10_0402_1%

CSREFV1N_CPU

12

SWN2 42

5

HG142

D D

SW142

LG142

C C

HG342

SW342

LG342

4

123

5

4

123

5

4

123

5

4

123

PQ501

PQ502

PQ502 TPCA8057

TPCA8057

PQ509

PQ506

PQ506 TPCA8057

TPCA8057

4

AON7518

4

AON7518

5

123

5

PQ511

PQ511 @

@

123

12

PC539

10U_0805_25V6K

PQ503

AON7518

@

0.36UH_FDUE1030D-H-R36M=P3_32A_20%

12

PR563

4.7_1206_5%

SNUB_CPU1

12

PC547

680P_0402_50V7K

12

PC550

PC549

AON7518

PC551

10U_0805_25V6K

0.36UH_FDUE1030D-H-R36M=P3_32A_20%

12

PR568

4.7_1206_5%

SNUB_CPU3

12

PC556

680P_0402_50V7K

12

PC540

10U_0805_25V6K

1 2

12

PC552

0.1U_0402_25V6

12

PC542

PC541

0.1U_0402_25V6

0.1U_0402_25V6 2200P_0402_25V7K

2200P_0402_25V7K

PL511

4 3

CPU_B+

12

2200P_0402_25V7K

PL513

PL513 1 2

PC555

1

2

100U_25V_M

+

HG242

SW242

LG242

1

12

+

PC571

PC572

2

100U_25V_M

0.1U_0402_25V4K

DC 35W CPU VID1=1.05V IccMax=53A Icc_Dyn=43A Icc_TDC=33A R_LL=1.9m ohm OCP~65A

CPU_B+

+CPU_CORE +CPU_CORE

PR565

12

10_0402_1%

0.1U_0603_25V7K

4 3

V3N_CPU CSREF

PR569

10_0402_1%

PC553

+CPU_CORE

12

CSREF 42

SWN1 42

HCB2012KF-121T50_0805

B+

HCB2012KF-121T50_0805

12

SWN3 42

PL516

PL517

12

1

+

PC554

2

100U_25V_M

QC 45W CPU VID1=0.9V IccMax=94A Icc_Dyn=66A Icc_TDC=56A R_LL=1.9m ohm OCP~110A

5

4

123

5

4

123

QC 45W CPU (HF) solution: 3+2 MOS: cpu_core --> Gfx_core -->

QC 45W CPU solution: 3+2 MOS: cpu_core --> Gfx_core -->

DC 35W CPU solution: 2+1 MOS: cpu_core --> Gfx_core -->

12

PL515

0_0402_5%

1

PC560

0.1U_0402_25V6

PR585

CPU_B+

12

PC561

2200P_0402_25V7K

10_0402_1%

12

+GFX_CORE

CSREFA

12

PR583

SWN2A 42

of

43 48Tuesday, March 27, 2012

0.3

B B

6132_PWMA42 DRVEN42

+5VS

A A

PR575

PR575 0_0402_5%

0_0402_5%

PR573

PR573 2K_0402_1%

2K_0402_1%

VCC_GFX1

12

PR576

PR576 0_0402_5%

0_0402_5%

12

PC567

2.2U_0603_10V7K

BSTA1

PU501

1

BST

2

PWM

3

EN

4

12

VCC

NCP5911MNTBG_DFN8_2X2

PR570

1 2

4.7_0603_5%

FLAG

DRVH

SW

GND

DRVL

9 8 7 6 5

BSTA1_1

PC557

HG1A SW1AEN_GFX1

LG1A

12

0.22U_0402_10V6K

5

4

123

5

4

123

PQ513

PQ508

PQ508 TPCA8057

TPCA8057

5

4

PQ515

AON7518

PQ515 @

@

123

12

SNUB_GFX1

12

PC562

AON7518

FDUM0640J-H-R36M=P3

PR580

4.7_1206_5%

PC568

680P_0402_50V7K

12

PC563

10U_0805_25V6K

PL514

1 2

10U_0805_25V6K

5

4

CPU_B+

12

PC565

PC564

0.1U_0402_25V6

0.1U_0402_25V6 2200P_0402_25V7K

2200P_0402_25V7K

10_0402_1%

0_0402_5%

QC 45W GT2 VID1=1.23V IccMax=46A Icc_Dyn=37A Icc_TDC=38A R_LL=3.9m ohm OCP~55A

12

+GFX_CORE

PR581

12

PR584

CSREFA 42

SWN1A 42

DC 35W GT2 VID1=1.23V IccMax=33A Icc_Dyn=20.2A Icc_TDC=21.5A R_LL=3.9m ohm OCP~40A

3

2Phase: install 1Phase:: @

BSTA2

PU502

1

BST

6132_PWM42

DRVEN

+5VS

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PR578

PR578 0_0402_5%

0_0402_5%

2K_0402_1%

VCC_GFX2

12

PR577

PC570

2.2U_0603_10V7K

2

PWM

EN_GFX2

3

12

EN

4

12

PR579

PR579 0_0402_5%

0_0402_5%

VCC

NCP5911MNTBG_DFN8_2X2

2009/12/01 2010/12/31

BSTA2_1

PR571

1 2

4.7_0603_5%

9

FLAG

8

DRVH

7

SW

6

GND

5

DRVL

Compal Secret Data

Deciphered Date

PC566

12

0.22U_0402_10V6K

HG2A SW2A

2

LG2A

4

12

PC558

PC559

5

4

PQ517

123

PQ510

PQ510 TPCA8057

TPCA8057

123

PQ517

AON7518

PQ519

AON7518

@

123

12

4.7_1206_5%

SNUB_GFX2

12

680P_0402_50V7K

Compal Electronics, Inc.

Title

Size Document Number Rev

C

Date: Sheet

PC559

10U_0805_25V6K

FDUM0640J-H-R36M=P3

1 2

PR582

PC569

PWR-CPU_CORE

QCL70

5

4

3

2

1

+CPU_CORE

12

PC1101

PC1101 10U_0805_6.3V6M

10U_0805_6.3V6M

D D

12

PC1106

PC1106 10U_0805_6.3V6M

10U_0805_6.3V6M

+CPU_CORE

1

PC1111

PC1111 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

PC1116

PC1116 22U_0805_6.3V6M

22U_0805_6.3V6M

2

C C

1

PC1121

PC1121 22U_0805_6.3V6M

22U_0805_6.3V6M

2

+CPU_CORE

12

PC1102

PC1102 10U_0805_6.3V6M

10U_0805_6.3V6M

12

PC1107

PC1107 10U_0805_6.3V6M

10U_0805_6.3V6M

1

PC1112

PC1112 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

PC1117

PC1117 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

PC1122

PC1122 22U_0805_6.3V6M

22U_0805_6.3V6M

2

12

PC1103

PC1103 10U_0805_6.3V6M

10U_0805_6.3V6M

12

PC1108

PC1108 10U_0805_6.3V6M

10U_0805_6.3V6M

1

PC1113

PC1113 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

PC1118

PC1118 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

PC1123

PC1123 22U_0805_6.3V6M

22U_0805_6.3V6M

2

12

PC1104

PC1104 10U_0805_6.3V6M

10U_0805_6.3V6M

12

PC1109

PC1109 10U_0805_6.3V6M

10U_0805_6.3V6M

1

PC1114

PC1114 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

PC1119

PC1119 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

PC1124

PC1124 22U_0805_6.3V6M

22U_0805_6.3V6M

2

12

PC1105

PC1105 10U_0805_6.3V6M

10U_0805_6.3V6M

12

PC1110

PC1110 10U_0805_6.3V6M

10U_0805_6.3V6M

1

PC1115

PC1115 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

PC1120

PC1120 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

PC1125

PC1125 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

PC1126

PC1126 22U_0805_6.3V6M

22U_0805_6.3V6M

2

+GFX_CORE

22U_0805_6.3V6M

PC1151

1

2

22U_0805_6.3V6M

PC1159

1

2

+CPU_CORE

1

+

PC1127

PC1127 330U_D2_2V_Y

330U_D2_2V_Y

2

+GFX_CORE

22U_0805_6.3V6M

PC1154

PC1153

PC1152

1

2

22U_0805_6.3V6M

PC1161

1

2

+

PC1128

PC1128 330U_D2_2V_Y

330U_D2_2V_Y

PC1162

1

2

PC1160

1

2

22U_0805_6.3V6M

1

2

1

2

22U_0805_6.3V6M

PC1155

1

2

330U_D2_2V_Y

1

PC1164

+

2

1

+

PC1129

PC1129 330U_D2_2V_Y

330U_D2_2V_Y

2

PC1156

22U_0805_6.3V6M

PC1157

1

2

330U_D2_2V_Y

1

+

2

22U_0805_6.3V6M

1

2

PC1165

PC1158

330U_D2_2V_Y

1

+

2

1

+

PC1130

PC1130 330U_D2_2V_Y

330U_D2_2V_Y

2

PC1166

1

+

PC1131

PC1131 330U_D2_2V_Y

330U_D2_2V_Y

2

Below is 458544_CRV_PDDG_0.5 Table 5-8.

5 x 22 µF (0805)

Socket Bottom

5 x (0805) no-stuff sites

7 x 22 µF (0805)

Socket Top

2 x (0805) no-stuff sites

22U_0805_6.3V6M

1

PC751

2

22U_0805_6.3V6M

1

PC752

2

22U_0805_6.3V6M

1

PC753

2

22U_0805_6.3V6M

1

PC754

2

22U_0805_6.3V6M

1

PC755

2

22U_0805_6.3V6M

1

PC756

2

22U_0805_6.3V6M

PC757

1

PC758

2

22U_0805_6.3V6M

1

2

1

2

PC762

1

2

+1.05VS_VCCP

22U_0805_6.3V6M

1

2

330U_D2_2V_Y

1

+

2

PC760

PC763

22U_0805_6.3V6M

1

2

330U_D2_2V_Y

22U_0805_6.3V6M

PC759

PC761

1

PC765

+

2

Chief River 330uF*9m 470uF*4.5m 22uF 10uF

B B

A A

5

4

Security Classification

2008/09/15 2012/12/31

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/09/15 2012/12/31

3

Compal Secret Data

Deciphered Date

8layer for DC CPU

8layer for QC CPU

6layer for DC CPU

6layer for QC CPU

GFX_CORE DC

GFX_CORE QC

1.05V_VCCP

2

4

5

4

1

2

3

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

PWR - PROCESSOR DECOUPLING

QCLA4 LA-8861P M/B

16

12

44 48Tuesday, March 27, 2012

1

10

of

0.3

NO DATE PAGE MODIFICATION LIST PURPOSE

--------------------------------------------------------------------------------------------------------------------------------

1. 2011/09/29 P51-PWR_+3VALWP/+5VALWP Change PU330 to RT8205L Change source

2. 2011/09/29 P53-PWR_ +1.05VS_VCCP/+16VSP Change PU400 to RT8237C Change source

3. 2011/09/29 P54-PWR_+VCCSAP/1.8VSP Change PU450 to SY8037B Change source

4. 2011/09/29 P57-PWR +CPU_CORE DECOUPLING Change HMOS to MDV1525 Change source

5. 2011/09/29 P53-PWR_ +1.05VS_VCCP/+16VSP Change HMOS to MDV1525 Change source

6. 2011/09/29 P49-PWR_BATTERY CONN / OTP Change PD5,PD6 to SCA00001G00 ESD team request

7. 2011/09/29 P57-PWR +CPU_CORE DECOUPLING Change PR589 from 348 to 8.06k FAE suggestion

8. 2011/09/29 P57-PWR +CPU_CORE DECOUPLING Change PR590 from 3.65k to 806 FAE suggestion

10. 2011/09/29 P57-PWR +CPU_CORE DECOUPLING Change PC574 from 680P to 0.033u FAE suggestion

11. 2011/09/29 P57-PWR +CPU_CORE DECOUPLING Change PC577 from 4700P to 0.033u FAE suggestion

12. 2011/09/29 P57-PWR +CPU_CORE DECOUPLING Change PR548 from 1.21k to 8.06k FAE suggestion

13. 2011/09/29 P57-PWR +CPU_CORE DECOUPLING Change PR550 from 10.7k to 806 FAE suggestion

14. 2011/09/29 P57-PWR +CPU_CORE DECOUPLING Change PC547 from 680P to 0.033u FAE suggestion

15. 2011/09/29 P57-PWR +CPU_CORE DECOUPLING Change PC551 from 4700P to 0.033u FAE suggestion

16. 2011/09/29 P57-PWR +CPU_CORE DECOUPLING Add snubber and boost resistor For 3x3 H-MOS solution

17. 2011/09/29 P49-PWR_BATTERY CONN / OTP Add PR22 30k,PR27 100k, PR32 0 Ohm For 120W adapter protect(9012)

18. 2011/09/29 P51-PWR_+3VALWP/+5VALWP Change PC360 to SE000006R80 Change source

19. 2011/09/29 P49-PWR_BATTERY CONN / OTP Add PR17 14k, PR33 0 Ohm For CPU temperature protect(9012)

20. 2011/09/29 P51-PWR_+3VALWP/+5VALWP Add PR373 0 Ohm For 3/5V always power on(9012)

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/11/11 2011/11/11

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

Power PIR

QFKAA

45 48Tuesday, March 27, 2012

of

0.3

HW PIR (Product Improve Record)

QCLA4,5 LA-7201P SCHEMATIC CHANGE LIST REVISION CHANGE: 0.0 TO 0.1 GERBER-OUT DATE: 2011/12/30 NO DATE PAGE MODIFICATION LIST PURPOSE

---------------------------------------------------------------------------------------------------------------------

D D

7

27 For support RPM FANChange PCH_PWR_EN from UB1.70 to UB1.68 and add UB1.70 EN_DFAN111/28 35 28 For no support PWM FANDelete C1~4,R1~2,D1 and UB1.26 FANPWM11/28 5,35

C C

29 For no support S&CDelete S&C schematic11/29 25 30 For no support external USB3.0 host ICDelete USB3.0 Host schematic11/29 31,32 31

37 12/02 35 For delete EC930 schematicDelete CPSETIN 38 12/02 16 For non-rechargeable RTC schematicAdd JRTC,CH9,DH8,DH9,R227

B B

55

68 Change UH1 P/N to SA00005FH3016~2412/15 For update UH1 P/N 69 Change CR40 P/N to SF000002Y003012/15 For layout limitation 70 Delete RA533312/15 For common design 71 Delete C381~42512/15 For placement update 72 Delete RR23~24,CR26,RR36~37,CR293012/15 For connect GND directly

A A

5

3311/24 Change P33 ALC280 schematic to ALC259 schematic. For audio function1 3411/24 Change JEXMIC.4 JACK_SENSE to MIC_SENSE. For audio function2

3511/24 Delete UB3,RB26,CB18,RH296 For delete CIR function3 6,13,2111/24 Delete QC1,RC4,C261,U17,R147,R103,R360,R392,R390,R1441~1442,R361,R106,RH304 For LVDS only4 6,13,1711/24 Delete Q23,C293,R62,R389,R120,R79,R97,L60,R262~265,R299~300,RH275,R1440 For LVDS only5

6,1311/24 Delete CPU_EDP_HPD,+LCD_VDD_R,+PANEL_VDD,LVDS_ENVDD,+3VS_LVDSDDC For LVDS only6

1311/24 Delete D15 BOM structure and JLVDS.10 connect to +3VS For LVDS function

1311/24 Add J17 connector and change JLVDS from 40 to 30 pin connector. For LVDS function8

2011/24 Delete USB20_N13,USB20_P13 For no Glasses free 3D Panel9

1311/24 Change RC82 BOM structure from IEDP@ to @. For LVDS function10

5,1711/24 Change RC157,RC158,RH119,RH203 BOM structure from LVDS@ to mount. For LVDS function11

1711/24 Delete CLK_CPU_EDP#,CLK_CPU_EDP12 For LVDS only

1511/24 Delete CEC schematic and JHDMI.13 HDMI_CEC net13 For no CEC support

1511/24 Delete R570,D55 and change U9.4 HDMI_HPD_R to HDMI_HPD For HDMI HPD14

1515 For HDMI signalChange L8~11 to SM070001U0011/25

1511/25 Delete U9.5 from +5VL to +5VS For HDMI HPD16

3311/25 Change Audio codec schematic For ALC259-VC217

17,2911/25 Delete CH16,CH18,card reader schematic For RTS512918

2611/25 Delete FP & B-CAS schematic For no support FP & B-CAS function19

35,3711/25 Delete JFUN,R8,R1466~1467,D90 For no support JFUN20

20,2711/25 Delete USB20_N10,USB20_P10,USB20_N12,USB20_P12 For no support TV tuner & 3G21

2711/25 Delete RH181 & 3G,B-CAS,JET schematic For no support TV tuner & 3G22

16,2711/25 Delete mSATA schematic For no support mSATA function23

2711/25 Delete RCL3,271@ component and net OSC_IN_R_R,OSC_IN_R For no support S&M function24

611/25 Change RC3 from 1Kohm to 10Kohm (SD028100280) For no support eDP function25

3511/25 Delete UB1.89 HDPACT,UB1.86 HDPLOCK,UB1.68 HDPINT For no support G-SENSOR function26

change DH1 from @ to NOGCLK@ For BOM control34 1612/01 Add SW4 For Debug35 3712/01 Delete U21,C453,C452 For LID on small board3612/0136

12/0239 36 For non-keyboard led schematicDelete JBLG schematic

12/06 12/06 12/07

12/19 For follow connector list77

Modify JKB pin define For meet SS KB Matrix3640 12/05 Change location from J17 to JLVDS1 For location naming 1312/0541 Delete UB1.85 SM_SENSE# For no support S&M3512/0642 Modify JUSIO pin define For small board connect2543 Delete R425 and 0.75VR_EN# For Power circuit connect3844 Add JODDB For 15" ODD connector2545 Change U9.5 connect from +5VS to +HDMI_5V_OUT For prevent leakage issue1546 12/07 Change JCRIO pin define2947 12/08 For small board connect Change UH1.K1 and RH180.2 from BT_ON# to PCH_GPIO342112/12 For common GPIO pins on EC side48 UB1.18 and RB11 connect to BT_ON#3512/12 For common GPIO pins on EC side49 Delete PWR_ON_LED# net25,35,3712/12 For common GPIO pins on EC side50 Change JUSIO pin define2512/12 For LED behavior51 Delete CH9,DH8,DH9,R277,JRTC1612/12 For RTC change to rechargeable52 Delete Q51 and change PCH_WL_BT_LED to PCH_GPIO692112/13 For change WL_BT_LED# to EC GPIO53 UB1.21 connect WL_BT_LED#3512/13 For change WL_BT_LED# to EC GPIO54 Change Q156B.3 from WL_BT_LED# to WIMAX_LED# and connect to R8023712/13 For WLAN LED behavior Delete UB1.127 (USB_OC#0) and UB1.17 (USB_OC#1)3512/13 For no support USB S&C56 Add TPM schematic20,2912/13 For TPM function57 Delete Q362712/13 For change BT_ON# to EC GPIO58 Change JCRT,JUSBA,JUSBB,JTP symbol14,30,3712/13 For connector list update59 Change JUSIO,JCRIO symbol25,2912/13 For connector list update60 Change UCL1 to SLG3NB244VTR2712/14 For green clock61 Change UT1.5 and RT7.1 net from +3VALW to +3VALW_PCH2912/14 For ErP Lot6 function62 Add RH181 and connect ISDBT_DET, delete RH2972112/14 For no support TV tuner63 Change RH194 from 100K 5% to 10K 5%2112/14 For update resistor value64 Change RH315.2 connect +3VS and BOM structure to mount2112/14 For update resistor value65 Change ZZZ P/N to DA60000T60066 For update PCB P/N12/14 37 Move D89 to TP small board67 For Move to TP small board12/14 37

Delete CC67912/1573 For not reserve Delete T67~T691612/1974 For not reserve Change YT1 form SJ132P7KW10 to SJ100004Z00 (small package)2912/19 For change to small size75 Change CT2, CT3, CT4, CT5 from SE095104K80 to SE102104K002912/19 For BOM reduce76 Change JCRIO to SP010015H0029 Delete JLVDS.28 (+LCD_INV)1312/20 For prevent issue78 Modify H1~H173712/20 For Update screw hole79

5

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

For change tolerancechange R409 from 120K_1% to 120K_5%11/30 38 For change tolerancechange RA17 from 0_1% to 0_5%11/30 3332 For reduce circuitDelete R260 and short directly11/30 1333

Compal Secret Data

2010/09/03 2012/12/31

3

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

QCLA4,5 LA-8862P M/B

HW-PIR

1

0.3

of

46 48Tuesday, March 27, 2012

1

HW PIR (Product Improve Record)

QCLA4,5 LA-8862P SCHEMATIC CHANGE LIST REVISION CHANGE: 0.0 TO 0.1 GERBER-OUT DATE: 2011/12/30 NO DATE PAGE MODIFICATION LIST PURPOSE

---------------------------------------------------------------------------------------------------------------------

85 12/20 17 Change CLKREQ_CR#,CLKREQ_USBA30#,CLKREQ_USB30# to PCH_GPIO25, 26, 44 For design change

D D

86 12/20 20,23 Change CH104 to 100p and CH71 to 0402 For design change 87 12/20 27,35 Change BT_ON# netname to BT_ON and UA4 to UM4 For design change 88 12/20 27 Modify LED_WIMAX# to 100k +5VS pull high & 200k pull low For design change 89 12/20 35 Delete CB13 For design change 90 12/20 33 Change CA3,CA46,CA36 to 0805_6.3V6M 91 12/20 38 Delete R5534 and short directly For design change 92 12/20 37 Changr R819 from +5VS to +3VS For design change 93 12/20 5,25 Changr C13,C17,C356,C355,C354 to 0805_6.3V6M and unmount C354 For cost down 94 12/20 35 Delete UB2,CB17,RB25 and connect UB1.127 to PM_SLP_S4#, UB1.14 to PM_SLP_S5# For cost down

C C

B B

QCLA4,5 LA-8862P SCHEMATIC CHANGE LIST REVISION CHANGE: 0.1 TO 0.2 GERBER-OUT DATE: 2012/01/10 NO DATE PAGE MODIFICATION LIST PURPOSE

---------------------------------------------------------------------------------------------------------------------

5

3512/20 Change UB1.68 (PCH_PWR_EN) to UB1.107 For EC common80

3512/20 For Update screw hole81 Change UB1.73 (UMA_ENBKL) to UB1.76

Change RH198 from 100k to 10k2112/20 For follow Intel checklist82 Change UC1.5 from +3VALW to +3VALW_PCH0512/20 For design change83 Modify SATA_LED# to10k (RH29) +5VS pull high & 20k (RH35) pull low1612/2084 For design change

12/20 35 Delete RB24,RB28,RB4,RB5,RB7,R37 and change UB1.119,117,75,64,27,16 to NC For cost down95 12/21 28 Change symbol from SP021105131 For apply symbol96 12/21 35 Change TP_CLK,TP_DATA pull high to +5VS For TP spec97 12/21 13 Unmount D84 For reserve98 12/22 Swap L9,L11,LR1,LR2,L53,L54 signal For swap signal99 15,25,30 12/22 Swap U3TXDP1_R_L and U3TXDN1_R_L, swap U3RXDP1_R_L and U3RXDN1_R_L For swap signal100 30 12/23 Change F1,F2 to SP040003A00 For component common101 14,15 12/24 Change RR66~67 to mount, LR9 to unmount For choke reserved29102 12/24 Cancel H6, H17 (FAN stand-off) and change H4 to H_3P3 (VGA) For ME drawing update37103 12/24 Change PJ29 from JUMP_43X118 to JUMP_43X39 For layout concern28104 12/24 Delete R105, add PJ30 to contact +3VS & +3V_WLAN For no support AOAC function38105 12/26 Update JDB symbol and modify pin define For connector list update and pin define for customer's request36106 12/26 Delete RH282, change RH116 to mount, JLVDS1.2 contact LVDS_SEL For update pin define and BOM reduce13,17107 12/26 JLVDS1.1&11&12 contact GND For LVDS cable smooth route and BOM reduce13108 12/26 Move RA32 & RA33 to Audio/B For AMIC function33109 12/26 JCRIO.11 contact SENSE_A, JCRIO.12 contact INT_MIC For AMIC function29110 12/26 Swap JKB connector pin define For latest keyboard spec36111 12/26 Swap LR9 pin define For layout concern29112 12/27 Swap JCRIO pin define For layout concern29113 12/27 Update JTP pin define For PIN define rule37114 12/27 Update TPM schematic For co-lay SLB9635 and SLB965529115 12/27 Add CL35 and un-mount For EMI request28116

Change CIR_EN# to PCH_GPIO39 and ISDBT_DET to PCH_GPIO4812/27117 21 For schematic update Change HDD2_DET# to PCH_GPIO57 and LNB_EN to PCH_GPIO7012/27118 21 For schematic update Change 3D_DET# to PCH_GPIO7112/27119 21 Add S&C schematic12/27120 20,30,35 For reserve S&C schematic Add Analog MIC schematic12/27 33 For Analog MIC121

02/03 change R1457.1 to connect AOAC_WLAN_PWR_EN#11

A A

Change CL36 from SE120102K80 to SE120102K9002/06 28 For sourcer suggestion16 Change H18,H19 to H_3P0N02/06 37 For ME drawing update17 Change UH1.T7 from HDMI_HPD to CHP3_SERDBG02/08 21 For Eureka Serial POST GPIO18 Change RH292 from 10Kohm to 1Kohm and delete T6602/08 21 For Eureka Serial POST GPIO19 Change UH1.T7 from HDMI_HPD to CHP3_SERDBG and connect to JCRT.402/08 21 For Eureka Serial POST GPIO20

5

4

3

2

1

For cost down

For schematic update

For vendor recommendation2812/27 Change RL8.2 from LAN_X1 to LAN_X2122 For Ivy/Sandy bridge M1/M3 co-lay solution11,2112/27 Add D54,RH210,RH100,QC9 and delete RC117,RC118123 For Ivy/Sandy bridge M1/M3 co-lay solution1112/27 Change QC7,QC8 to always mount124 For intel S3 power reduce sequence between +1.5VS_CPU and +0.75VS3812/27 Change R158 from 100Kohm to 220Kohm125 For audio sense A pin3312/27 Add CA64 0402 cap @ on SENSE_A126 For S&C function3012/28 Change R569 to PJ31127 For prevent abnormal turn on3012/28 Add RH4,CH80128 For prevent abnormal turn on and do soft start3012/28 Add CH99,CH102 and delete CH97129 For prevent abnormal turn on and do soft start3812/29 Change R5545 from 100k to 10k130 For update transformer P/N2801/03 Change UL3,UL4 from SP050006N00 to SP050005Z00131 For TPM firmware update2901/03 change UT1 P/N from SA00000GG40 to SA00000GG60.132 For TPM firmware update2701/03 change R1456,R1457,C907,C908,Q210 to @133

For power saving2802/01 Add PJ32 and connect +3VALW_PCH & +3V_LAN1 For change pin define2902/02 Change JCRIO.2 to connect MIC_SENSE and JCRIO.1 to connect NBA_PLUG2 For sense A circuit3302/02 Delete sense_A off page,CA64 and add RA32,RA333 For connector list3702/02 Change JTP from SP010015H00 to SP01001BF104 For connector list3302/02 Add JMIC connector SP02000RO005 For connector list2702/02 Change JWLAN from SP07000JP00 to SP07000TB006 For component reduce3802/02 Change Q44A to Q6B and delete Q447 For common design1602/02 Delete T67~698 For WLAN Power on/off and WLAN reset3502/03 UB1.38 connect AOAC_WLAN_PWR_EN# and UB1.91 connect WLAN_RST#9 For WLAN Power on/off and WLAN reset2702/03 Change R1456,R1457,C907,C908,Q210 to mount10 For WLAN Power on/off and WLAN reset27 For WLAN Power on/off and WLAN reset2702/03 Change JWLAN.22 to connect WLAN_RST#_R12 For WLAN Power on/off and WLAN reset2702/03 Change C260,CM7,CM8,CM9,C254 to connect +1.5VS_WLAN13 For WLAN Power on/off and WLAN reset2702/03 ADD PJ33 (PJ33 don't short),UM5,RM19,RM21 and +1.5VS_WLAN (power)14 For WLAN Power on/off and WLAN reset2702/03 Change UM4.1 to connect AOAC_WLAN_PWR_EN#15

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

HW-PIR

QCLA4,5 LA-8862P M/B

47 48Tuesday, March 27, 2012

1

0.3

of

QCLA4,5 LA-8862P SCHEMATIC CHANGE LIST REVISION CHANGE: 0.1 TO 0.2 GERBER-OUT DATE: 2012/01/10 NO DATE PAGE MODIFICATION LIST PURPOSE

---------------------------------------------------------------------------------------------------------------------

22 For ESD request1502/09 Add D94~D96 on HDMI signal 23 For ESD request2702/09 Add D99,D100 on LAN signal 24 For ESD request1402/09 DEL D3~D5 and add D97,D98 on CRT signal 25 For DS3 function reserve 7,3102/09 Add RC74 and net DRAMRST_CNTRL_EC connect RC74.1 & UB1.89 26 For reduce SATA signals reflection 2502/09 Add R79~82 27 For thermal issue1102/14 Change CD7 from SF000002O00 (H=5.9) to SF000002Z00 (H=4.4)

D D

28 For SN100002Y00 is EOL 3302/20 Change SW3,SW4 from SN100002Y00 to SN100000W00 QCLA4,5 LA-8862P SCHEMATIC CHANGE LIST

REVISION CHANGE: 0.2 TO 0.3 GERBER-OUT DATE: 2012/03/13 NO DATE PAGE MODIFICATION LIST PURPOSE

---------------------------------------------------------------------------------------------------------------------

5

Add TL1 test point02/08 27 For LAN FAE suggestion21

03/08 13 For LVDS power sequence02 Change R108 power rail to +3VALW

06 Add 15ODD_DETECT# to connect JODDB.8 & UH1.U2 & RH179.203/11 21,25 For 15" ODD detection

C C

Add C363,C364,C36503/1207 25 For ESD Add H2003/13 3308 For drawing update Change RL26 and RL28 to @ and RL24 and QL53 to always mount03/14 2709 For LAN disable function

2703/14 Change UL3 and UL4 to SP050006N00 For LAN transformer10

4

3

2

1

For LVDS power sequence1303/08 Change R109 to 100ohm 0805,R110 to 68Kohm,C228 to 0.047U,C230 to 4700P01

For 15" ODD16,2503/08 Add SATA port4 to connect JODDB and UH103 For 15" ODD detection2503/09 Add ODD_SEL to connect JODDB.12 and UH1 GPIO604 For thermal over temperature1103/09 Add CD14 colay with CD705

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

HW-PIR

QCLA4,5 LA-8862P M/B

48 48Tuesday, March 27, 2012

1

0.3

of

Samsung Scala2-R Schematic

Specifications and Main Features

Frequently Asked Questions

User Manual