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DEFLECTION PROCESSOR FOR MULTISYNC MONITORS S1D2147A01
DEFLECTION PROCESSOR
42-SDIP-600
The S1D2147A01is a monolithic integrated circuit assembled
in a 42 pins shrunk dual in line plastic package.
The goal of this IC is to control all the functions related to the
horizontal and vertical deflection in multimodes or multisync
monitors.
FUNCTIONS
• Positive or Negative sync polarities
• Auto-sync horizontal processing
• H-PLL lock/unlock identification
• Auto-sync Vertical processing
• East/West signal processing block
• B+ controller
• Safety blanking output
ORDERING INFORMATION
Device Package Operation Temperature
FEATURES
(HORIZONTAL)
• Dual Pll concept
• Self-adaptative (30 to 70kHz)
• X-ray protection input
• DC adjustable duty-cycle
• Internal 1st PLL lock/unlock information
• Wide range DC controlled H-position
• ON/OFF switch (for PWR management)
• Two H-drive polarities
(VERTICAL)
• Vertical ramp generator
• 50 to 120Hz AGC Loop
• DC controlled V-amp, V-pos, S-amp & S-centring
• ON/OFF Switch
(B+ REGULATOR)
S1D2147A01-A0B0 42-SDIP 0 °C — 70 °C
(GENERAL)
• Accept Positive or Negative Horizontal &
Vertical sync polarities
• Separate H & V TTL input
• Safety blanking output
(E
WPCC
)
• Internal PWM generator for B+ current mode
step-up conveter
• DC adjustable B+ voltage
• Output pulse synchronised on horizontal frequency
• Internal MAX current limitation
• Vertical parabola generator with DC
• controlled keystone & amplitude
0
S1D2147A01 DEFLECTION PROCESSOR FOR MULTISYNC MONITORS
BLOCK DIAGRAM
R0
PLL1NHIB
35 15
H-POS
PLL1F
12 11
10
C0
FH-MIN
14
HLOCK-CAP
13 3
HFLY
PLL2C
H-DUTY
H-OUTEM
1 2 20 21
H-OUTCOL
HSYNC
XRAY-IN
HREF
HGND
VREF
VGND
VSYNC
16
26
24
34
17
INPUT
INTERFACE
5
H-VREF
4
V-VREF
INPUT
INTERFACE
19
GND
18
VCC
1st PHASE
COMP
BANDGAP
OSCILLATOR
VERTICAL
VCAP
VAGCCAP
VCO
CORRECTION
VS-CENT
S
2nd PHASE
COMP
LOCK
DETECT
+
SAFETY
PROCESSOR
VCC
OUTPUT
INHIBITION
282927 25
33 31 30 32 38 37
V-POS
VS-AMP
V-AMP
EA
-
VOUT
PHASE
SHAPER
DCOUT
V
V
REF
+
PARABOLA
GENERATOR
KEYST
-
OUTPUT
BUTTER
EW-AMP
23
SBLKOUT
39
B+ADJ
42
R
22
S
41
40
36
I
SENSE
B+OUT
COMP
REGIN
E/WOUT
1
DEFLECTION PROCESSOR FOR MULTISYNC MONITORS S1D2147A01
PIN CONFIGURATIONS
1
2
4
5
6
7
8
9
10
11
12
3
PLL2C
H-DUTY
HFLY
HGND
HREF
NC
NC
NC
NC
C0
R0
PLL1F
I-SENSE
COMP
REGIN
B+ ADJ
KEYST
E/W-AMP
E/WOUT
PLL1-INHIB
VSYNC
V-POS
V-DCOUT
S1D2147
V-AMP
42
41
40
39
38
37
36
35
34
33
32
31
13
HLOCK-CAP
14
FH-MIN
15
H-POS
16
XRAY-IN
17
HSYNC
18
VCC
19
GND
20
H-OUTEM
21
H-OUTCOL
VOUT
VS-CENT
VS-AMP
VCAP
VREF
VAGCCAP
VGND
SBLK-OUT
B+ OUT
30
29
28
27
26
25
24
23
22
2
S1D2147A01 DEFLECTION PROCESSOR FOR MULTISYNC MONITORS
PIN DESCRIPTION
Table 1. Pin Description
Pin No Pin Name Description
1 PLL2C Second PLL Loop Filter
2 H-DUTY DC Control of Horizontal Drive Output Pulse Duty-cycle.
If this pin grounded, the horizontal and vertical outputs are inhibited. By connecting a
capacitor on the this pin a soft-start function may be realized on h-drive output.
3 H-FLY Horizontal Flyback Input (Positive Polarity)
4 H-GND Horizontal section ground. Must be connected only to components related to H
blocks.
5 H-REF Horizontal section reference voltage. Must be filtered by capacitor to pin 4.
6 NC
7 NC
8 NC
9 NC
10 C0 Horizontal Oscillator Capacitor. To be connected to pin 4.
11 R0 Horizontal Oscillator Resistor. To be connected to pin 4.
12 PLL1F First PLL Loop filter. To be connected to pin 4.
13 HLOCK-CAP First PLL Lock/Unlock Time Constant Capacitor. Capacitor filtering the freqency
change detected on pin 13. When frequency is changing, a blanking pulse is
generated on pin 23, the duration of this pulse is proportionnal to the capacitor on
pin 13. To be connected to pin 4.
14 FH-MIN DC Control for free running frequency setting. Comming from DAC output or DC
voltage generated by a resistor bridge connected between pin 5 and 4.
15 H-POS DC Control for Horizontal Centering
16 XRAY-IN X-RAY Protection input (with Internal latch function)
17 H-SYNC TTL Horizontal Sync Input
18 Vcc Supply Voltage (12V Typical)
19 GND Ground
20 H-OUTEM Horizontal Drive Output (emiter of internal transistor)
21 H-OUTCOL Horizontal Drive Output (open collector of internal transistor)
22 B+OUT B+ PWM Regulator output
23 SBLK
OUT
Safety Blanking output. Activated during frequency changes, when X-RAY input is
triggered or when VS is too low.
24 VGND Vertical Section Signal Ground
25 VAGCCAP Memory Capacitor for Automatic Gain Control Loop in Vertical Ramp Generator
26 V
REF
Vertical Section Reference Voltage
3
DEFLECTION PROCESSOR FOR MULTISYNC MONITORS S1D2147A01
Table 1. Pin Description (Continued)
Pin No Pin Name Description
27 VCAP Vertical Sawtooth Generator Capacitor
28 VS-AMP DC Control of Vertical S-Shape Amplitude
29 VS-CENT DC Control of Vertical S-Centering
30 V-OUT Vertical Ramp Output (with frequency independant amplitude and S-Correction)
31 V-AMP DC Control of Vertical Amplitude Adjustment
32 VDCOUT Vertical Position Reference Voltage Output Temperature matched with V-AMP
output
33 V-POS DC Control of Vertical Position Adjustment
34 V-SYNC Vertical TTL Sync Input
35 PLL1INHIB TTL Input for PLL1 Output Current Inhibition (To be used in case of comp sync input
signal)
36 E/WOUT East/West Pincushion Correction Parabola Output
37 E/W-AMP DC Control East/West Pincushion Correction Amplitude
38 KEYST DC Control of Keystone Correction
39 B+ADJ DC Control of B+ Adjustment
40 REGIN Regulation Input of B+ Control Loop
41 COMP B+ Error Amplifier Output for Frequency Compensation and Gain Setting
42 I
SENSE
Sensing of External B+ Switching Transistor Emitter Current
4
S1D2147A01 DEFLECTION PROCESSOR FOR MULTISYNC MONITORS
ABSOLUTE MAXIMUM RATINGS
NO Item Symbol Spec Unit
1 Supply Voltage (Pin 18) V
2 Maximum Voltage on Pins 2, 14,15, 28, 29, 31, 33, 37, 38, 39
Pin 3
Pins 17, 34
Pin 40
Pin 42
Pin 16
3 ESD Succeptibility
Human Body Model, 100pF Discharge through 1.5kΩ
EIAJ Norm, 200pF Discharge through 0Ω
4 Storage Temperature T
5 Maximum Operating Junction Temperature T
6 Operating Temperature T
V
VESD
CC
IN
stg
j
opr
13.5 V
8
1.8
6
8
8
6
2
300
-40, +150 °C
150 °C
0, +70 °C
THERMAL CHARACTERISTICS
NO Item Symbol Spec Unit
1 Junction-Ambient Thermal Resistance θja 65 °C/W
HORIZONTAL SECTION
V
kV
V
OPERATING CONDITIONS
Parameter Symbol Conditions Min Typ Max Unit
VCO
Oscillator Resistor Min Value (Pin 11) R0min 6 kΩ
Oscillator Capacitor Min Value (Pin 10) C0min 390 pF
Maximum Oscillator Frequency Fmax 70 kHz
Horizontal Sync Input Voltage (Pin 17) HsVR 0 5.5 V
INPUT SECTION
Minimum Input Pulses Duration (Pin 17) MinD 1 µS
Maximum Input Signal Duty Cycle (Pin 17) Mduty 25 %
OUTPUT SECTION
Maximum Input Peak Current (Pin 3) I3m 2 mA
Horizontal Drive Output Max Current
Pin 20
Pin 21
DC CONTROL VOLTAGE
HOI1
HOI2
Sourced current
Sink current
20
20
mA
mA
5
DEFLECTION PROCESSOR FOR MULTISYNC MONITORS S1D2147A01
Parameter Symbol Conditions Min Typ Max Unit
DC Voltage Range on DC Controls (Pins 2-14-15) DCadj V
= 8V 2 6 V
REF-H
6
S1D2147A01 DEFLECTION PROCESSOR FOR MULTISYNC MONITORS
ELECTRICAL CHARACTERISTICS
(Vcc = 12 V, Tamb = 25 °C)
Table 2. Horizontal Section Electrical Characteristics
Parameter Symbol Conditions Min Typ Max Unit
SUPPLY AND REFERENCE VOLTAGES
Supply Voltage (Pin 18) V
Supply Current (Pin 18) I
Reference Voltage for Horizontal
Section (Pin 5)
Max Sourced Current on V
REF-H
(Pin 5)
Reference Voltage for Vertical
Section (Pin 26)
Max Sourced Current on V
REF-V
(Pin 26)
INPUT SECTION/PLL1
Horizontal Input Threshold Voltage
(Pin 17)
VCO Control Voltage (Pin 12) V
VCO Gain, dF/dV (Pin 12) V
Horizontal Phase Adjustment
(Pin 15)
Free running frequency
adjustment (pin 14)
10.8 12 13.2 V
2 mA
7.4 8 8.6 V
2 mA
0.8 V
V
REF-H
I
REF-H
V
REF-V
I
REF-V
V
INTH
CC
CC
See Figure 1 40 60 mA
7.4 8 8.6 V
Low level voltage
High level voltage 2
V
VCO
COG
= 8V 1.6 to 6.2 V
REF-H
R0 = 6.49kΩ,
15 kHz/V
C0 = 680pF
Hph % of Horizontal period ±10 %
FFadj Without H-sync signal ±20 %
PLL1 Capture Range
Fh Min
Fh Max
PLL 1 Inhibition (Pin 35)
PLL ON
PLL OFF
CR See conditions on Figure 1
PLLinh
V35
V35
28 kHz
70
0.8 V
2
SECOND PLL AND HORIZONTAL OUTPUT SECTION
Flyback Horizontal Threshold
FBth 0.65 0.75 V
Voltage (Pin 3)
Horizontal Jitter Hjit 150 ppm
Horizontal Drive Output Duty-cycle
(Pin 20 or 21)
Minimum
Maximum
Horizontal Drive Low Level Output
Voltage
HDmin HDmax V2 = 2V
V2 = 2V
HDvd Pin 20 to GND,
V21-V20, I
OUT
= 20mA
45
30
35 %
50
1.1 1.7 V
7
kHz
V
%
DEFLECTION PROCESSOR FOR MULTISYNC MONITORS S1D2147A01
Table 2. Horizontal Section Electrical Characteristics (Continued)
Parameter Symbol Conditions Min Typ Max Unit
Horizontal Drive High Level Output
Voltage (output on Pin 20)
X-RAY Protection Input Threshold
Voltage (Pin 16)
Maximum Output Current on Safety
Blanking Output
Low-Level Voltage on Safety
Blanking output
Internal Clamping Voltage on 2nd
PLL Loop Filter Output (Pin 1)
Pin2 Threshold Voltage to Stop
H-out, V-out
B+out and to Activate S-BLK
(OFF Mode when V2 < V
OFF
)
HDem Pin 21 to VCC,
I
= 20mA
OUT
XRAYth 1.6 1.8 V
ISblkO I
VSblkO V23 with I23 = 10mA 0.25 0.5 V
Vphi2 Vmin
V
OFF
23
Vmax
V
2
9.5 10 V
10 mA
1.6
3.2
1 V
V
VERTICAL SECTION
OPERATING CONDITIONS
Parameter Symbol Conditions Min Typ Max Unit
Vertical Sync Input Voltage (Pin 34) VSVR 0 5.5 V
ELECTRICAL CHARACTERISTICS
(VCC = 12V, Tamb = 25 °C)
Table 3. Vertical Section Electrical Characteristics
Parameter Symbol Conditions Min Typ Max Unit
Pin 23-28-29 bias current
(Currnt sourced by PNP base)
Pin 31 bias Current
(Current sunk by PNP base)
Vertical sync input threshold voltage VSth Pin 34; High-level
Vertical sync input bias current
(Current sourced by PNP base)
Voltage at ramp bottom point VRB On Pin 27 2/8 VREF-V
Voltage at ramp top point (with sync) VRT On Pin 27 5/8 VREF-V
Voltage at ramp top point (without sync) VRTF On Pin 27 VRT-0.1 V
IBIASP For V23-28-29 = 2V 2 °C
IBIASN For V31 = 6V 0.5 °C
2
Low -level
VSBI V34 = 0.8V 1 µA
0.8
V
V
8
S1D2147A01 DEFLECTION PROCESSOR FOR MULTISYNC MONITORS
Table 3. Vertical Section Electrical Characteristics (Continued)
Parameter Symbol Conditions Min Typ Max Unit
Output current range on pin 27 during
ramp charging time. Current to charge
capacitor between pin 27 and ground
IR27
V28 = 2V
2V < V27 < 5V
Min current
Max current
Minimum Vertical sync pulse width VSW Pin 34 5 µS
Vertical sync input maximum duty-cycle VSmDut Pin 34 15 %
(2)
,
100
15
135
20 µA
µA
Vertical Sawtooth discharge time duration VSTD On pin 27, with 150nF
cap
Vertical Free running frequency ( V28 = 2V ) VFRF Measured on pin 27
Cosc (pin 27) = 150nF
AUTO-SYNC frequency see
(3)
ASFR With C27 = 150nF
±5%
Ramp Amplitude Thermal Drift RATD
On pin 30 see
(1)
(0°C < Tamp < 70°C )
Ramp Amplitude Drift Versus Frquency RAFD V31 = 6V, C27 = 150nF
50Hz < F < 120Hz
Ramp Linearity on Pin 27 127 / I27 RIin V28 = 2V, V25 = X =
4.3V
2.5V < V27 < 4.5V
Minimum Load on Pin 25 for less than 1%
RIoad 50 kΩ
Vertical Amplitude Drift
Vertical Position Adjustment Votlage on pin 32 Vpos V33 = 2V
V33 = 4V
V33 = 6V 3.65
Max Current on Vertical Position Control output
IVPOS ±2 mA
(pin32)
Vertical Output Votlage (on pin 30)
(peak to peak voltage on pin 30)
Vor V31 = 2V
V31 = 4V
V31 = 6V 3.75
DC Votlage on Vertical Output (pin 30) VOUTDC
See
(4)
85 µS
100 Hz
50 120 Hz
100 ppm/
°C
200 ppm/
Hz
0.5 %
3.2
3.3 V
3.5
3.8
2
2.2 V
3
4
7/16 VREF-V
V
V
V
V
Vertical output maximum output current V0I On Pin 30 ±5 mA
Max vertical S-Correction Amplifitude
(V28 = 2V inhibits S-CORR; V28 = 6V gives
dVS ∆V/V30pp at T/4
∆V/V30pp at 3T/4
-4
+4
%
%
maximum S-CORR) (see figure 3)
C-Correction adjustment range voltage on
pin 27 for maximum slope on the ramp
(with S-Correstion ) (see figure 4)
Ccorr V29 = 2V
V29 = 4V
V29 = 6V
3
3.5
4
V
V
V
9
DEFLECTION PROCESSOR FOR MULTISYNC MONITORS S1D2147A01
B+ SECTION
OPERATING CONDITIONS
Parameter Symbol Conditions Min Typ Max Unit
Maximum Error Amplifier Output
Current
Minimum Feedback Resistor FeedRes Resistor between pins 40 and 41 5 kΩ
ELECTRICAL CHARACTERISTICS
(VCC = 12V, Tamb = 25 °C)
Parameter Symbol Conditions Min Typ Max Unit
Error Amplifier Open loop gain OLG At low frequency
Unity gain bandwidth UGBW
EAOI Source by pin 14
Sunk by pin 41
Table 4. B+ Section Electrical Characteristics
(1)
see
(1)
see
0.5
2
85 dB
6 MHz
mA
mA
Regulation input bias current IRI Current sourced by
pin 40 (PNP base)
Maximum guaranted error amplifier
output current
Current Sense Input Voltage Gain CSG Pin 42 3
Max Current Sense Input Threshold
Votlage
Current Sense Input Bias Current ISI Current sunk by pin 42
Maximum External Power Transistor
on Time
B+ Output Low Level Saturation
voltage
Internal Reference voltage IVref On error amp (+) input for V39 = 4V 4.9 V
Internal Reference Voltage Adjustment V
EAOI Current sourced by pin 41
Current sink by pin 41
MCEth Pin 42 1.2 V
(NPN base)
Tonmax % of H-period
@ f0 = 27kHz
B+OSV V22 with I22 = 10mA 0.25 V
RERADJ
2V < V39 < 6V ±14 %
0.2 µA
0.5
2
1 µA
75 %
mA
mA
EAST/WEST PARABOLA GENERATOR
ELECTRICAL CHARACTERISTICS
(VCC = 12V, Tamb = 25 °C)
Table 5. East/West Parabola Generator Electrical Characteristics
Parameter Symbol Conditions Min Typ Max Unit
Parabola symetry adjustment capability
(for Keystone adjustment; with pin 38)
Vsym See figure 2; Internal voltage
V38 = 2V
V38 = 4V
V38 = 6V
V
3.2
3.5
3.8
10
S1D2147A01 DEFLECTION PROCESSOR FOR MULTISYNC MONITORS
Table 5. East/West Parabola Generator Electrical Characteristics (Continued)
Parameter Symbol Conditions Min Typ Max Unit
Keystone adjustment capability
B/A ratio
A/B ratio
Parabola amplitude adjustment capability
Maximum amplitude on pin 36
Maximum ratio between max and min
NOTES:
1. These parameters are not tested on each unit. They are measured during our internal qualification procedure
which includes characterization on batches comming from comers of our processes and also temperature
characterization.
2 . When 2V are applied on pin 28 (Vertical S-Correction control ), then the S-Correction is inhibited, consequently the
sawtooth have a linear shape.
3. It is the frequency range for which the VERTICAL OSCILLATOR will automatically synchorize, using a single
capacitor value on Pin 27 and with a constant ramp amplitude.
4. Typically 3.5V for vertical reference voltage typical value (8V).
Kadj See figure 2; V37 = 4V
V38 = 2V
V38 = 6V
Paramp V38 = 4.3V, V28 = 2V
V37 = 2V
2V < V37 < 6V
3.3
2.4
2.3
2.0
V
3.834.3
11
DEFLECTION PROCESSOR FOR MULTISYNC MONITORS S1D2147A01
APPLICATION CIRCUIT
AFC
10nF
H-POSI
27k
6W
H-ref
1/
12V
1
22nF
24k 1/6W
1nF 50v
4.7uF
1.2k
1/6W
4.7k
1/6W
+
470uF
16V
+
H-SYNC1
1k 1/6W
103
+
100uF 16V
680pF MONO
1.5k
1/6W
100nF
1N4148
1N4148
1k 1/6w
18k 1/
6W
+
10uF
1K 1/6W
100pF 50V
1/6W
100V
5.6k 1/4W MF
1.8k
30k 1/8W
2.20nF
220nF MP
22nF MP
100V
20k
1/4W
MF
5.6k 1/6W
1N4148
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
PLL2C
H-DUTY
HFLY
HGND
HREF
S4
S3
S2
S1
C0
R0
PLL1F
HLOCK-CAP
FH-MIN
H-POS
XRAY-IN
HSYNC
VCC
GND
H-OUTEM
H-OUTCOL
PLL1-INHIB
S1D2147A01
VAGCCAP
SBLK-OUT
I-SENSE
COMP
REGIN
B+ ADJ
KEYST
E/W-AMP
E/WOUT
VSYNC
V-POS
V-DCOUT
V-AMP
VOUT
VS-CENT
VS-AMP
VCAP
VREF
VGND
B+ OUT
42
D
KEY-STONE
E/W OUT
1uF
+
47k 15k
1/6W
100uF
I-SENSE
H-REF
AFC
H-SIZE
S-PIN
5V
6.8k
To vertical Amp(+)
V-SIZE
To vertical Amp
V-LIN
Vref
+
16V
B+ DRIVE
41
1M
40
39
38
37
36
35
36K 1/6W
34
33
32
31
30
29
28
27
26
25
24
23
22
22k 1/6W
+
3.3k
1/6W
20k
0.47uF
R
R
56K 1/6W
22K 1/6W
1K 1/6W
12k 1/6W
33k 1/6W
10k 1/6W
47K 1/6W
220 nF 64V
1N4148
1uF
V-sync
V-posi
47k
1/6W
+
82k 1/6W
C
100nF
10nF
12V
H-DRIVE
Figure 1. Application Circuit
12
S1D2147A01 DEFLECTION PROCESSOR FOR MULTISYNC MONITORS
V
36
A B
V
27
3.8
3.5
3.2
Figure 2. Keystone Adjusment
V
27
V38 = 2V
V38 = 4V
V38 = 6V
4.0V
3.5V
3.0V
Figure 3. Amplitude Adjusment
V
30
0 T/4 T/2 3T/2 T
¡âV increase when V28 increase.
¡âV = 0 when V28 = 0.
T0
¡âV
V30pp
Figure 4. Correction Adjusment
13
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