Samsung S1C7309X01-E0R0 Datasheet
S1C7309X01B/W CCD PROCESSOR
1
INTRODUCTION
The S1C7309X01 is a bipolar monolithic integrated circuit for B/W CCD
camera 1 chip signal processor.
FUNCTION
• CDS (Correlated Double Sampling)
• AGC (Automatic Gain Control)
• Gamma & Knee
• Horizontal Aperture
• Video Setup
• Video Driver
• OP-Amp.
• Comparator
FEATURE
• 5 Steps Sample & Hold
• 4 to 32 dB AGC gain control
• Built-in 2 comparators for EE mode control
• EE mode WND/BLK selectable
• Gamma γ ·=· 0.40 to 0.65 / Linear
• Built-in OP-Amp. for AGC loop
• Built-in Delay Line for Horizontal Aperture
• 3 Mode set-up control
• 2 Mode white-clip control
• 75 ohm video driver & sag compensation
• PACKAGE: 48-VQFP-0707
48-QFP-0707
ORDERING INFORMATION
Device Package Operating
S5C7212X01-E0R0 48-QFP-0707
-20 °C − 75 °C
B/W CCD PROCESSORS1C7309X01
2
BLOCK DIAGRAM
(CDS)
+
-
(IRIS)
MAX
CTL
(AGC)
(LPF)
+
-
+
-
(COMP)
(COMP)
B.G
REF
+
-
(3.1V REG)
+
-
(OPAMP)
DRIV
+
-
(VIDEO SETUP)
VCA
VCA
CTL
GAMMA
SW
(H-APERTURE)
46
ECL1
45
ECL2
1
SHP1 SHP2
2
SHD1
SHP3
SHD2
IRIS
WND/
BLK
41
OB
CLAMP
42
33
AGC
+
-
GAIN
CTL
10
9
4
14
LPF
CONT
39 38
43
11
32
MIX
29
30
31
WHITE
CLPCTL
27
VIDEO
SETUP
262522
21
23
+
-
DL2DL1
BUF
DRIV
17
GAMMA
AMP
15
GAMMA
CTL
(GAMMA & KNEE)
5
AGC
DETECT
8
KNEE
16
LIN.
AMP
OB
CLAMP
7
19
OB
CLAMP
20
gm
CTL
CLAMP
CLAMP
47
+
-
7.5K
1
2
3
4
6
5
40
37
13
12
24
W/D
CLIP
SYNC
MIX
BLANK
36
35
S1C7309X01B/W CCD PROCESSOR
3
PIN CONFIGURATION
48
47
4546
44 43 42 41 40 38
39 37
1
2
3
4
5
6
7
8
9
10
11
12
36
35
34
33
32
31
30
29
28
27
26
25
PG-IN
DATA-IN
DGND
AGC-OUT
GAMMA-IN
AGND
G-CLP
DET-OUT
MAX-CTL
GAIN-CTL
OP-OUT
OP-IN(-)
COMP1-OUT
COMP2-OUT
SVCC
OB-CLP
VIDEO-OUT
SAG-IN
BLANK
SYNC-IN
WC-CTL
SETUP-CTL
VIDEO-IN
SGND
OP-IN(+)
LPF-R
KNEE-SW
GAMMA-CTL
GAMMA-OUT
HGND
A-CLP
DELAY-CTL
APER-CTL
CLIP-CTL
VCA-CTL
APER-OUT
DVCC
DUMMY-CLP
SHD
SHP
AVCC
VREF
IRIS-CLP
WND-BLK
IRIS-OUT
COMP2-IN
COMP1,2-IN
COMP1-IN
S1C7309X01
13
14
16
15 17 18 19 20 21 2322
24
B/W CCD PROCESSORS1C7309X01
4
PIN EXPLANATION
Table 1.
Pin No Name I/O DC LEVEL EQUIVALENT CIRCUIT
1 PG-IN I 3.0 V
2 DATA-IN I
3.0 V
3 DGND GND
4 AGC-OUT O 2.0 V
5 GAMMA-IN I -
6 AGND GND
7 G-CLP I/O -
8 DET-OUT O 2.0 V
100 µ
AGC-OUT
200
PG-IN
DATA-IN
500 µ
GAMMA-IN
G-CLP
G-CLP
400 µ
500 µ
S1C7309X01B/W CCD PROCESSOR
5
Pin No Name I/O DC LEVEL EQUIVALENT CIRCUIT
9 MAX-CTL I
0 to 5 V
10 GAIN-CTL I
0 to 5 V
11 OP-OUT O -
12 OP-IN(-) I -
13 OP-IN(+) I -
14 LPF-R I/O 2.5 V
5 V
0 V
5 V
0 V
MAX-CTL
3 V
40 µ
GAIN-CTL
200
3 V
120 µ
OP-OUT
350 µ
OP-IN(+)
20 µ 20 µ
OP-IN(-)
1.7 V
LPF-R
2.5 V
B/W CCD PROCESSORS1C7309X01
6
Pin No Name I/O DC LEVEL EQUIVALENT CIRCUIT
15 GAMMA-CTL I
0 to 5 V
16 KNEE-SW I
17 GAMMA-OUT O 1.9 V
18 HGND GND -
19 A-CLP I/O
-
20 DELAY-CTL I
0 to 5 V
5 V
0 V
5 V
0 V
GAMMA-CTL
35 µ
100 K
100 K
35 µ
KNEE-SW
20 K
30 K
5 V
0 V
200
GAMMA-OUT
500 µ
A-CLP
DELAY-CTL
100 K
S1C7309X01B/W CCD PROCESSOR
7
Pin No Name I/O DC LEVEL EQUIVALENT CIRCUIT
21 APER-CTL I
0 to 5 V
22 CLIP-CTL I
0 to 5 V
23 VCA-CTL I
0 to 5 V
24
APERTURE-
OUT
O 1.8 V
25 VIDEO-IN I
-
5 V
0 V
5 V
0 V
5 V
0 V
APER-CTL
CLIP-CTL
VCA-CTL
APERTURE-OUT
200
250 µ
50 µ
VIDEO-IN
SET BIAS
B/W CCD PROCESSORS1C7309X01
8
Pin No Name I/O DC LEVEL EQUIVALENT CIRCUIT
26 SETUP-CTL I
0 to 5 V
27 WC-CTL I
0 to 5 V
28 SGND GND
29 SYNC-IN I
30 BLANK I
31 SAG-IN I -
32 VIDEO-OUT O
-
5 V
0 V
5 V
0 V
5 V
0 V
5 V
0 V
SETUP-CTL
WC-CTL
SYNC-IN
BLANK
VIDEO-OUT
200
1.6 m
SAG-IN
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