Samsung R519, R719 Schematics

SAMSUNG ELECTRONICS CO’S PROPERTY.
Design
DATE
Owner :
Chip Set :
A
B
ELECTRONICS
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4
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B
C
2
PCB Code :
4
Model Name : R719 / R519
1.0
Remarks :
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
CPU :
T.R. Date :
CHECK
NANYA BA41-01147A
PROPRIETARY INFORMATION THAT IS
THIS DOCUMENT CONTAINS CONFIDENTIAL
Intel Pentium
Signature : X
SAMSUNG PROPRIETARY
A
MODULE CODE
Intel Cantiga & ICH9M
OFPAGE
C
D
SEC Mobile R & D
EXCEPT AS AUTHORIZED BY SAMSUNG.
Dev. Step : PR Revision :
PBA Name :
2
PART NO.
TITLE
3
1
CANNES-L / BONN-L
DEV. STEP
3
HST BA41-01148A
Montevina Platform
GCE BA41-01146A
DRAW
MAIN
2009.08.07
1
APPROVAL
Jun PARK
YM AN
HJ KIM
10/10/2008
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CANNES-L_EXT
MAIN
COVER
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Confidential
EXCEPT AS AUTHORIZED BY SAMSUNG.
SAMSUNG PROPRIETARY
Page 25
PCIe PEX1
Transformer
RTL8103EL
10/100 LAN
Controller
RJ45
Page 30
PEX4
SPI ROM
Page 25
16Mbit
CARDREADER
ALCOR AU6336
3-in-1
Cantiga-PM45
LVDS(Dual Channel)
DDR2-SODIMM x 2
17.3" HD+ / 15.6"
LED LCD / CCFL
MODULE CODE
DEV. STEP
nVidia
N10M-GE
A
2
PROPRIETARY INFORMATION THAT IS
A
1
C
THIS DOCUMENT CONTAINS CONFIDENTIAL
APPROVAL
C
4
4
Page 26
Page 12
Page 8
Page 8
CRT
Page 27
Page 9~11
RTC
P 10
SUB_USB
P 0,2,6
Intel Pentium
ICH9-M
CLOCK
CPU
Thermistor
LAST EDIT
D
SAMSUNG
1
PART NO.REV
ELECTRONICS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
B
3
PAGE
CHECK
OF
DRAW
D
FAN
FSB 800/667MHz
USB 2.0
L2 Cache : 1MB
CK-505M
ANT
Dual channel
Bluetooth
Channel B (Reverse)
Channel A (Reverse)
EMC2112
DDR II 800
BLOCK DIAGRAM
T4300, T4200, T3400, T1600, T1700
Intel Celeron
Internal -
Space bar
MICOM
Page 34
Page 35
SYNAPTICS
TOUCHPAD
For Cannes-L
For Bonn-L
0.3M
gDDR3
Page 25
2
TITLE
3
DATE
B
Cantiga-GL40
External -
P 5
P 8
WLAN
Page 32
( Half Type)
L R
Page 28
ALC269
High Definition
SATA
2.5" HDD
Page 25
SATA0
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BLOCK DIAGRAM
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SATA1
12.7mm ODD
Page 31
P 3
FFC
MEC1308
KEYBOARD
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MICOM
SODIMM1 1010 001X
0001 011X
UHCI_3 UHCI_4
See rev notes for more information.
8 9
ICH9-M
UHCI_5
SUB_USB(TBD)
MICOM
-
PCI EXPRESS Assignation
LAN
14.318MHz
WLANPCIe1
UHCI_2
BLUETOOTH
Crystal
Address Hex
Crystal
PCIe4 -
SMBUS Master
Clock, Unused Clock Output Disable
PREQUENCY DEVICE
CLOCK-Generator
REVISION HISTORY
Master
SODIMM0 1010 000X
D2h
ASSIGNED TO USB PORT (LEFT, BOTTOM)
16hBATTERY
2 3
CK-505M (Clock Generator) 1101 001X
Charger Reference Voltage SourceVDC_CHG
UHCI_0 UHCI_1
P1.05V_PEG P1.05V (Direct Media Interface Compensation)
32.768KHzCrystal
CAMERA
CARD READER(AU6336)
EMC2102 7Ah
P12.0V_ALW 12.0V always power well
10 11
P5.0V P3.3V
25MHz
SATA Assignation
Port Number
10MHzCrystal
SATA0 SATA1
I C / SMB Address
Devices
ODD
-
Bus
ICH9M
1.5V Power Rail (off in S4-S5)
Core Voltage for CPU
Port Number ASSIGNED TO
P0.9V DDR2 Termination
-A0h
ASSIGNED TO Wired LAN
Master
P2.0V_VREF Power Chip Reference
Crystal / Oscillator
TYPE
To charge USB device at sleep statusP5.0V_STB
0111 101X
A4h
Primary DC system power supply (9 to 19V)
VDC
USB PORT Assignation
Port Number
Power Rail Descriptions
0 1
5.0V supply for AudioAUD_P5V
6 7
SAMSUNG ELECTRONICS CO’S PROPERTY.
3
LCD_VDD3V 3.3V (LED LCD)
SAMSUNG PROPRIETARY
1
Port Number ASSIGNED TO
P5.0V_ALW 5.0V always power well
4 5
CHECK
LAST EDIT
Power Rail Descriptions
TITLE
USB PORT (LEFT,CENTER )
USB PORT (LEFT, TOP)
P1.05 P5.0V_AUX
ASSIGNED TO HDD
CPU_CORE
5.0V Power Rail (off in S3-S5)
Port Number ASSIGNED TO
1.5V Power Rail (off in S3-S5)
1.05V Power Rail (off in S3-S5)
SATA2 SATA3
PAGE
1
KBC3_CHG4.2V To charge battery
DEV. STEP
SCHEMATIC ANNOTATIONS AND BOARD INFORMATION
PCIe2
Port Number
P5.0V_VREF_FILT Power Chip Reference
-PCIe3
A
4
Auido Analog VoltageP4.75V_AUD
THIS DOCUMENT CONTAINS CONFIDENTIAL
BOARD INFORMATION
USAGE
Voltage Rails
EGFX_CORE nVidia Graphic Chip power
VDC_ADPT
P3.3V_MICOM
MODULE CODE
B
Output voltage of TPS51125 (if VDC is removed, it will be off)
C
DATE
PRTC_BAT 3.3V supply for the RTC well.
P1.7V_VREF Power Chip Reference
B
2
Power source of External
DRAW
P1.2V_LAN Internal Regulator’s Power of LAN Controller
C
PROPRIETARY INFORMATION THAT IS
P3.3V_MCD 3.3V (3-in-1 Socket)
5.0V supply at SUB_ODD BoardP5.0V_ODD
APPROVAL
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
2
D
P1.8V
P1.5V
A
PART NO.
P3.3V_AUX
P1.5_AUX
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
ELECTRONICS
3
REV
OF
5.0V Power Rail (off in S4-S5)
3.3V Power Rail (off in S4-S5)
Jun PARK
YM AN
HJ KIM
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CANNES-L_EXT
MAIN
BOARD INFO
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D
3.3V Power Rail (off in S3-S5)
1.8V Power Rail (off in S3-S5)
SAMSUNG
P1.8_AUX 1.8V Power Rail (off in S4-S5)
2
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P5.0V
AC ADAPTER
P3.3V_MICOM
DC BATTERY
LED,Wire LAN, LED LCD
TPS51124
P1.5V_AUX
S5-S4 S0
(CHP3_SLPS3*)
(CHP3_S4_STATE*)
RT8107
P1.8V_AUX
DDR II
USB, GL40
CRT
POWER DIAGRAM
KBC3_VRON
VDC
Swithched Power
ICH9M,
ICH9M
P5.0V_AUX
P5.0V_STB
SPI ROM,
3-in-1 Socket
WLAN HDD MICOM LID SW
MICOM, LEDs
EMC2112 GL40
KBC3_SUSPWR KBC3_PWRON
HDD
ODD TOUTCHPAD CAMERA
CK505M GL40 DDR2 ICH9M
P0.9V
P12.0V_ALW
P5.0V_ALW
P3.3V_AUX
TPS51125
80 PORT LED LCD ALC269Q AU6336
RTL8103EL,
P3.3V_MCD
LEDs
P1.5V
PENTIUM CPU CK505M
EXCEPT AS AUTHORIZED BY SAMSUNG.
SAMSUNG ELECTRONICS CO’S PROPERTY.
1
OF
4
GL40 ALC269Q
DDR II Termination
P1.05V
PENTIUM CPU
TPS51620
RTL8103EL
S3
GL40,
P1.8V
P5.0V_AUD
ALC269Q
P3.3V
EMC2112
FAN
N10M-GE
SC471
EGFX_CORE
N10M-GE
A
THIS DOCUMENT CONTAINS CONFIDENTIAL
3
24 3
A
DRAW
PAGE
CHECK
APPROVAL
LAST EDIT
TITLE
PART NO.
B
SAMSUNG
CC
SAMSUNG PROPRIETARY
CPU_CORE
PENTIUM CPU
GL40 ICH9M
P1.2V_LAN
1
D
DATE
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
2
DEV. STEP
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POWER DIAGRAM
MAIN
CANNES-L_EXT
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9/23/2008
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HJ KIM
YM AN
Jun PARK
REV
MODULE CODE
gDDR3
B
PROPRIETARY INFORMATION THAT IS
ELECTRONICS
D
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Confidential
RTL8103EL
Sheet 30
9) P3.3V_AUX
AU6336
Sheet 31
16) P3.3V
P3.3V_MCD
WLAN
Sheet 32
16) P3.3V
9) P3.3V_AUX
4) P3.3V_MICOM
TOUCHPAD
Sheet 36
8) P5.0V_ALW
VCCP3_PWRGD
P1.8V
SI3456
VCCP3_PWRGD
10) P1.8V_AUX
EGFX_CORE
SC471
EGFX_CORE
17) P3.3V
24) KBC3_PWRGD
10) P1.8V_AUX
MEM1_VREF
17) P3.3V
PRTC_BAT
9) P3.3V_AUX
16) P3.3V
17) P1.5V
16) P3.3V
P5.0V_AUD
17) P1.5V
0 OHM
P4.75V_AUD
P5.0V_AUD
15) P5.0V
GCORE3_PWRGD
2) VDC
THIS DOCUMENT CONTAINS CONFIDENTIAL
SAMSUNG PROPRIETARY
CHECK
DRAW
C
D D
2
EXCEPT AS AUTHORIZED BY SAMSUNG.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
SAMSUNG ELECTRONICS CO’S PROPERTY.
PROPRIETARY INFORMATION THAT IS
2
1
MEM1_VREF
7) KBC3_SUSPWR
2) VDC
14) KBC3_PWRON
19
20) CPU_CORE
TPS51620
Sheet 43
CPU_CORE
18) P1.05V
17) P1.5V
20) CPU_CORE
CPU
18) P1.05V
10) P1.8V_AUX
16) P1.5V
1
C
ELECTRONICS
DATE
DEV. STEP
REV
LAST EDIT
SAMSUNG
VCCP3_PWRGD
GCORE3_PWRGD
AA
3
3
APPROVAL
24
26) CHP3_SUSSTAT#
26
20) VRM3_CPU_PWRGD
(KBC3_VRON)
23) KBC3_CPURST#
23
27
28
11
7) KBC3_SUSPWR
2) VDC
18) P1.05V
18
14) KBC3_PWRON
19) VCCP3_PWRGD
MODULE CODE
TITLE
PART NO.
4
4
BB
PAGE OF
16) P3.3V
ODD
Sheet 33
15) P5.0V
2.5" HDD
Sheet 8
15) P5.0V
9) P3.3V_AUX
11) CHP3_SLPS5#/4#/3#
17
16
15
8
14-1
12
2-1) P12.0V_ALW
11) P1.5V_AUX
9) P3.3V_AUX
8) P5.0V_AUX
14) KBC3_PWRON
14-1) KBC3_PWRON_INV#
25
20) VRM3_CPU_PWRGD
16) P3.3V
16) P3.3V
4) P3.3V_MICOM
TOUCHPAD
Sheet 36
15) P5.0V
Sheet 35
LED
Sheet 36
18) P1.05V
MX25L
Sheet 25
4) P3.3V_MICOM
LED LCD
Sheet 26
9) P3.3V_AUX
S/W
DDR2
CK-505M
PRTC_BAT
P3.3V_AUX & P5V_ALW
27) PLT3_RST#
Sheet 12
TPS51125
SI3456
24) KBC3_PWRGD
7) KBC3_SUSPWR
14) KBC3_PWRON
22) CLK3_PWRGD
PWROK
CL_PWROK
4) P3.3V_MICOM
LCD_VDD3V
16) P3.3V
VDD_LED
2) VDC
CRT
Sheet 27
15) P5.0V
ALC 269
Sheet 28
20
19) VCCP3_PWRGD
2) VDC
21) VRM3_CPU_PWRGD
CPU1_DPRSTP#
CHP3_DPRSLPVR
21
BATTERY
2) VDC
ICH9-M
KBC
RTC
Battery
PENTIUM
GL40
CHP3_RTCRST#
6) KBC3_PWRSW#
7) KBC3_SUSPWR
14) KBC3_PWRON
16) P3.3V
28) CPU1_CPURST#
25) CPU1_PWRGDCPU
POWER
22
26) PLT3_RST#
25) PLT3_RST#
16) P1.5V
17) P3.3V
EMC21112
Sheet 8
15) P5.0V
9) P3.3V_AUX
POWER SEQUENCE
VDC_CHG
3) P5.0V_ALW
** KBC3_USBCHG **
5) P5.0V_STB
5
10) P1.8V_AUX
17) P1.5V
SI3456
VRMPWRGD
PWROK
Sheet 44
Sheet 20~24
Sheet 9~11
1
2
7
Sheet 13~17
Sheet 18~19
6
VDC_ADPT /
ISL6255
ADAPTER
RT8207
Sheet 41
P1.8V_AUX
10
P0.9V
11) P1.5V_AUX
TPS51124
Sheet 42
P1.5V_AUX & P1.05V
3
9
12) KBC3_RSMRST#
13
14
4) P3.3V_MICOM
14-1) KBC3_PWRON_INV#
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POWER SEQUENCE
MAIN
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YM AN
Jun PARK
4
8) P5.0V_AUX
14) KBC3_PWRBTN#
14
15) P5.0V
AP4435
Sheet 44
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LOM3_CLKREQ*#
CLK3_USB4848 MHz
KBC
14.318 MHz
CK-505M (w/ CLKREQ* & SSDC)
xSLG8SP513r05)
100 MHz
CLK1_DREFCLK/DREFCLK#
96 MHz
CLK1_PCIEICH/PCIEICH#100 MHz (SRC 3)
BSEL
14 MHz
266 MHz CLK0_HCLK/CLK#
266 MHz
SSC
48MHz PLL
100 MHz (SRC4) CLK1_MCH3GPLL/MCH3GPLL#
AUD3_BCLK
1
SPI
KBC3_SPI_CLK
CLOCK DISTRIBUTION
667/800 MHz
CLK1_MCLK3/3#
CLK1_MCLK4/4#
CLK1_MCLK0/0#
CLK1_MCLK1/1#
PCI_STP*
P3.3V
CLK1_PCIELOM/PCIELOM#100 MHz (SRC 9)
32.768 KHz
WLAN
CLK1_MINIPCIE/MINIPCIE#
10 MHz
Page 8
MCH3_CLKREQ#
333/400 MHz
SAMSUNG ELECTRONICS CO’S PROPERTY.
CLK1_DREFSSCLK/DREFSSCLK#
100 MHz (SRC 6)
A
APPROVAL
17.86 MHz
HPLL
PCIE PLL
DPLLA
MPLL
DPLLB
SODIMM #0
SODIMM #1
333/400 MHz
SATAPLL
32.768 KHz
PCI Express Gfx
100 MHz (SRC0)
OSC
LAST EDIT
B
HD Audio
WIRED LAN
OF
2
CLK1_SATA/SATA#100 MHz (SRC 2)
14.318 MHz
CHP3_SATACLKREQ#
CLK3_PCLKICH33 MHz
33 MHz CLK3_PCLKMICOM
THIS DOCUMENT CONTAINS CONFIDENTIAL
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
CHECK
OSC
Main PLL
PLL3
SSC
33 MHz
CLK0_HCLK1/HCLK1#
CLK1_DREFSSCCLK/DREFSSCCLK#
Buffer
MUX
CPU
MCH
PEG
DMI
FS(2:0)
CPU_STP*
ITP_EN
SS(96/100) SEL
B
C
DATE
CLK3_PWRGD*
100 MHz (SRC 6,9)
MIN3_CLKREQ*#
333/400 MHz
333/400 MHz
RTC Clock
25 MHz
Jun PARK
MODULE CODE
A
DRAW
D D
4
2
TITLE
3
ELECTRONICS
1
1
ICH9-M
USBPLL
PAGE
PART NO.
4
PCIEPLL
Cantiga
C
3
SAMSUNG
MUX
MUX
FSB
EXCEPT AS AUTHORIZED BY SAMSUNG.
REV
DEV. STEP
PROPRIETARY INFORMATION THAT IS
SAMSUNG PROPRIETARY
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CLOCK DIAGRAM
MAIN
CANNES-L_EXT
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REV
LAST EDIT
4
PART NO.
B
D
OF
A
1
D
PROPRIETARY INFORMATION THAT IS
THERMAL SENSOR & FAN CONTROL
HIGH Z
0101 110xb
3
THIS DOCUMENT CONTAINS CONFIDENTIAL
PAGE
DATE TITLE
SAMSUNG ELECTRONICS CO’S PROPERTY.
C
Line Width = 20 mil
93 degree C
For Intel 45nm(From penryn)
2
B
1
APPROVAL
SAMSUNG
ELECTRONICS
AMD CPU/DIODE MODE
1
SMBUS Address 7Ah
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
2
1
3.3 * [R2/(R1+R2)] = (T-75)/21
4
EXCEPT AS AUTHORIZED BY SAMSUNG.
10mil width and 10mil spacing.
HIGH Z
EXT.DIODE 2 MODE
R1
R2
MODULE CODE
DESIGN
C
Opposite side of CPU.
A
August 07, 2009 15:14:35 PM
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CANNES-L_EXT
THERMAL SENSOR
THERMAL SENSOR EMC2112
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HJ KIM
9/23/2008
PR
1.0
INTEL TR MODE
CHECK
0
To support heatsink
SHDN_SEL MODE
0111 101xb (7A)
0101 111xb
DEV. STEP
SAMSUNG PROPRIETARY
0
3
ADDRESSS_SEL MODE
TRIP_SET pin voltage = (T-75)/21
M503
BA61-01090A
DIA
HEAD LENGTH
R533
0
nostuff
9-C4,54-D2
C551
0.47nF
50V
P3.3V_AUX
9-C4,54-D2
P3.3V_AUX
1%
R536
51.1K
P3.3V_AUX
1%
20K
R537
7-B3
C535
100nF 10V 10V
100nF
C549
7-C4,54-C2
7-B2,54-D4
1%
R530
10K
1
3
2
LENGTH
HEAD DIA
BA61-01090A
M501
MMBT3904 Q510
10K
R547
1%
R535
10K
P1.05V
22-C4
1%
39-B3,55-B3
22-C4
2.2nF
C552
50V
10000nF-X5R
C550
6.3V
nostuff
1%
nostuff
R549
0
P5.0V
2K
R538
C553
2.2nF 50V
P3.3V
LENGTH
HEAD DIA
BA61-01090A
M504
1%
R534
200K
54-B2 27-C3,39-C3
22-B3
10K
R532
1%
SYS_SHDN#
28
TACH
13
THERMTRIP#
THRM_PAD
29
11
TRIP_SET
1
VDD_3V
24
VDD_5V_1
27
VDD_5V_2
10
FAN_MODE
20
GND
8
NC_1
15
NC_2 NC_3
21
14
POWER_OK
16
RESET#
9
SHDN_SEL
23
SMCLK
22
SMDATA
12
19
ALERT#
18
CLK_IN
17
CLK_SEL
2
DN1
4
DN2
6
DN3
3
DP1
5
DP2
7
DP3
25
FAN_1
26
FAN_2
5.5V
U506 EMC2102
1209-001718
10K
R531
1%
39-B3,55-C3
7-B2,54-C2
LENGTH
HEAD DIA
BA61-01090A
M502
P3.3V
25-B1
9-C4,13-B1
7-C4
40V
Q509 MMBT3904
nostuff
1
3
2
10000nF-X5R
C6
6.3V
39-C4,54-B313-B1,27-B3
7-C4,54-D4
3711-000456
1 2 3 4 MNT1
5 6
MNT2
39-D1,54-B4
HDR-4P-1R-SMD
J1
CPU3_THRMTRIP#
GFX3_THERM#
1%
R546
49.9
FAN3_FDBACK#
FAN5_VDD
THM3_ALERT#
CPU2_THERMDC CPU2_THERMDA
GFX3_THERMDP
FAN5_VDD
KBC3_PWRGD
KBC3_THERM_SMCLK
KBC3_THERM_SMDATA
THM3_STP#
FAN3_FDBACK#
CPU3_THRMTRIP#
GFX3_THERMDN
CPU1_THRMTRIP#
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ADDR GROUP
ICH
0
ADDR GROUP
1
CONTROL
2 / 4
DATA GRP 0
DATA GRP 2
DATA GRP 1
DATA GRP 3
1
LAST EDIT
1
SAMSUNG PROPRIETARY
PART NO.
DRAW
C
4
EXCEPT AS AUTHORIZED BY SAMSUNG.
CPU Mount
D
PAGE
2
C
CPU Socket : 3704-001153
DATE
APPROVAL
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A
CANNES-L_EXT
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undefined
HJ KIM
YM AN
Jun PARK
SAMSUNG ELECTRONICS CO’S PROPERTY.
REV
2
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
OF
DEV. STEP
B
CHECK
SAMSUNG
ELECTRONICS
TITLE
B
A
D
4 3
MODULE CODE
3
PROPRIETARY INFORMATION THAT IS
5 6
D:/users/mobile24/mentor/cannes-l_ext/Cannes-L-Ext_MAIN
PENRYN (1/3)
CPU
41 42
15
12-D4
12
31
12-D1
16 19 20
11
24
26
12-C1
12-D1
12-B1
25-C1,54-C3
12-C1
12-B1
5
6
7
8
12-B1
12-B1
P1.05V
61 62
25-B1,54-C4
27
28
44 45 46
25-B1,54-D2
34 35
43
23
24
13 14
34
0
25-B1,54-D4
1
37 38
33
20
12
11
2
12-B1
12-A1
19
nostuff
4
9 10
50V
C793
0.1nF
BA75-02034A
M505
MNT1
1 2
MNT2 MNT3
3 4
MNT4
3
29
30
SUPLECODE
32 33 31
0
12-B1
12-B1
12-B1
25-C1
25-C1,54-C2
12-B1
39 40
63
32
50
4
3
4
27 28
49
DSTBN1#
Y26
DSTBN2#
AE25
DSTBN3#
H26
DSTBP0#
M26
DSTBP1#
AA26
DSTBP2#
AF24
DSTBP3#
3
AF22
D62#
AC23
D63#
E23
D7#
K24
D8#
G24
D9#
H25
DINV0#
N24
DINV1#
U22
DINV2#
AC20
DINV3#
J26
DSTBN0#
L26
AB21
D52#
AC26
D53#
AD20
D54#
AE22
D55#
AF23
D56#
AC25
D57#
AE21
D58#
AD21
D59#
E25
D6#
AC22
D60#
AD23
D61#
D42#
W24
D43#
W25
D44#
AA23
D45#
AA24
D46#
AB25
D47#
AE24
D48#
AD24
D49#
G25
D5#
AA21
D50#
AB22
D51#
AB24
D33#
V24
D34#
V26
D35#
V23
D36#
T22
D37#
U25
D38#
U23
D39#
F23
D4#
Y25
D40#
W22
D41#
Y23
M23
D23#
P25
D24#
P23
D25#
P22
D26#
T24
D27#
R24
D28#
L25
D29#
G22
D3#
T25
D30#
N25
D31#
Y22
D32#
D13#
K22
D14#
H23
D15#
N22
D16#
K25
D17#
P26
D18#
R23
D19#
E26
D2#
L23
D20#
M24
D21#
L22
D22#
E22
D0#
F24
D1#
J24
D10#
J23
D11#
H22
D12#
F26
REQ4#
L1
C1
RESET#
F3
RS0#
F4
RS1#
G3
RS2#
A3
SMI#
D5
STPCLK#
G2
TRDY#
PENRYN
CPU1-2
0143854500|bga_479p_sock
D20
IERR#
C4
IGNNE#
B3
INIT#
C6
LINT0
B4
LINT1
H4
LOCK#
REQ0#
K3
REQ1#
H2
REQ2#
K2
REQ3#
J3
ADSTB0#
V1
ADSTB1#
E2
BNR#
G5
BPRI#
F1
BR0#
E1
DBSY#
H5
DEFER#
F21
DRDY#
A5
FERR#
G6
HIT#
E4
HITM#
AA4
A33#
AB2
A34#
AA3
A35#
L5
A4#
L4
A5#
K5
A6#
M3
A7#
N2
A8#
J1
A9#
H1
ADS#
M1
U1
A23#
R4
A24#
T5
A25#
T3
A26#
W2
A27#
W5
A28#
Y4
A29#
J4
A3#
U2
A30#
V4
A31#
W3
A32#
A13#
P4
A14#
P1
A15#
R1
A16#
Y2
A17#
U5
A18#
R3
A19#
W6
A20#
A6
A20M#
U4
A21#
Y5
A22#
PENRYN
CPU1-1
0143854500|bga_479p_sock
N3
A10#
P5
A11#
P2
A12#
L2
17 18
59 60
12-C1
58
57
12-C1
12-B1
12-C1
12-B112-B4,54-A2
12-C1
25-C1,54-C3
12-B1
12-C1
12-B1
9
10
25-C1
8
12-B1
48
2
53 54
7
12-A1
12-A1
1
12-B1
12-D4
12-B1
56
R642
26
12-B1 12-B1
23
15 16
25
30
21
22 25
47
12-D4
29
56
12-D4
12-B1
14
35 36
55
18
51 52
13
21 22
17
CPU1_ADS#
CPU1_IERR#_MN
CPU1_CPURST#
CPU1_INTR
CPU1_DBI0#
CPU1_D#(63:48)
CPU1_D#(47:32)
CPU1_ADSTB0#
CPU1_ADSTB1#
CPU1_D#(31:16)
CPU1_D#(15:0)
CPU1_REQ#(4:0)
CPU1_A#(16:3)
CPU1_DSTBP2#
CPU1_DSTBP3#CPU1_DSTBP1#
CPU1_DSTBN1#
CPU1_DSTBP0#
CPU1_DBI1#
CPU1_DSTBN0#
CPU1_A#(35:17) CPU1_DBI2#
CPU1_DBI3#
CPU1_DSTBN2#
CPU1_DSTBN3#
CPU1_LOCK#
CPU1_RS0# CPU1_RS1# CPU1_RS2#
CPU1_SMI#
CPU1_STPCLK#
CPU1_TRDY#
CPU1_A20M#
CPU1_BNR# CPU1_BPRI#
CPU1_BREQ#
CPU1_DBSY#
CPU1_DEFER# CPU1_DRDY#
CPU1_FERR#
CPU1_HIT# CPU1_HITM#
CPU1_IGNNE#
CPU1_INIT#
CPU1_NMI
Samsung
Samsung
Samsung
Confidential
Confidential
Confidential
3 / 4
RSVD
THERMAL
H CLK
XDP/ITP SIGNALS
0
0
1
1
1
1
1
0
1
1 1
0
0
1.1625 V
0
0.8750 V
0
1
1.2000 V
1
0
0
0
1
1
1
0
1
0.8625 V
1
1
1
0.1000 V
DPRSLPVR
0
1
1
0
000
0
1
GND test points within 100mil of the VCC/VSSsense at the end of the line.
1.3500 V
1
0.9250 V
1
0
1
0
VID(6:0)
0
1.3375 V
1
1
1
1
0
0.0000 V
0
0
1
1
0
0
1.4250 V
1
1
0
1
1
1
0
1
0
0
1
1
1
0
0.9000 V
1
0
ELECTRONICS
0
0
1
0
1
0
0
1
1
1
0.1875 V
0
0
0.2000 V
0
0
0
1
1
0
0
1
1
1
0
0
0
1
011
Voltage
0.8875 V
1 0
0
1
0.4125 V
0
SAMSUNG PROPRIETARY
0
0
1
0
0
0
10
1
A
1
0
0
0.1750 V
1
1
1
4
0
0
0
1
0
1
0
1
0
from each of the VCC/VSS test point vias.
0
1
0
1
1
0
1
1
0
1
1
1
1
1
0
1
1
10.9500 V
000
LAST EDIT
1
1
1
0
0
1
1.2500 V
0
0
0
1
1
Voltage
0.0000 V
0
1
0
1
0
1
0.8000 V
0
1
0
0
1
0
1
0
1
1
1
1
0
0
1
0
THIS DOCUMENT CONTAINS CONFIDENTIAL
1
PART NO.
0
1
0
0
3
0.5625 V
0
DPRSTP*
0.2125 V
0.6125 V
0
COMP0,2(COMP1,3) should be connected with Zo=27.4ohm(55ohm)
1
1
0
1.0250 V
1
0
1
0
VID(6:0)
0
1
0
0.9625 V
1
0.6625 V
0
0
0
1
0
1
0
1
0
0.0000 V
0
1
0
1
1
0
0
1
1
B
D
0
0
0.9750 V
0
0
0
0
1
1
0
1
0
0.0000 V
CPU Core Voltage Table
1.1250 V
0
0
1
1
1
1
0
11
1
1
0
1
0.4250 V
0
1
1
0
0 or 1
0.1250 V
1
0
1
1
1
0
0
1
0
1
1
0 1
0
1.3875 V
1
0
1.2875 V
1
0
0
0
0
0
1
0
1
0.7750 V
1
PROPRIETARY INFORMATION THAT IS
Dual Mode Region
1
0
0
1
0
0
1
0
0
1
1.1000 V
1
1.4375 V
1
0
0
0
1
0
1
0
1.3750 V
1
1
0
0
1
1
1
0
1
0
0.7500 V
1
0
0
1
0
0
1
1
1 0.9875 V
0
1
0
0.3875 V
1
1
1
1
1.4000 V
trace shorter than 1/2" to their respective Banias socket pins.
1
1
1
1
0
1
0
1
1
01
1
0
1
0
1.1500 V
1.0875 V
0 1
0
1
1
0
0
1
0
1
1
0
0.5750 V
1
VID(6:0)
0
1.0000 V
1
0
1
0
0
1
1
0
1
0
1
1
1
0.7625 V
0
1.0500 V
0
1
0
0
1
0
1
0.9375 V
1
1
1
0
1
1
1
1
0
1
1
1.4500 V
1
0
0
0
0
0
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
0
1 1
0
Active Mode
1
0
1.0125 V
1
1
0.0000 V
1
0
1
of the first GTLREF0 pin with Zo=55ohm trace.
0
0
1
EXCEPT AS AUTHORIZED BY SAMSUNG.
0
0
1
0
0
0
1
1
1
1
0
1.2375 V
0
0
0
1
0.7000 V
1
1.4125 V
0
1
GTLREF : Keep the Voltage divider within 0.5"
0
1.2750 V
0
1
1.4750 V
1
1
0
1
0
0
1
1
1
1
0
1
0
0.6500 V
0
1.2125 V
0.6750 V
1
0
1
0
1
0
0
1
Active/Deeper Sleep
C
PAGE
0
0
0.4000 V
1
1
1
0
0
1
1
1
1
0
0.4375 V
0.7875 V
1
0
1
1
CHECK
0
1
PSI2*
0
0
1.0375 V
1
0
1
1
0
1
0
0
1
011
1
0 0.0500 V
0.3625 V
0
0
1
11
1
0
Voltage
1
0
1
0
0.6250 V
0
0
1
1
0
1
0
1
0
0
4
0
TITLE
1
0.3125 V
0
1
0
0
0.3250 V
0
0.3000 V
1
1
0
0
1
0.4500 V
0
1
1.3250 V
1
1
0
0.8500 V
0.0250 V
0.0125 V
1
0
0
0.1125 V
0 or 1
PSI2*
1
0
1
0
1
0
1.1125 V
1
1
1
1
1
1
0
0.0750 V
1
0
1
00.7375 V
0
0
1
0
0
0.1375 V
1
0
1 1
1
1
0
1.2625 V
1
1.4875 V
0
0
1
IMVP-6
0
1
1
0
DPRSTP*
1
1
0
0
0.2750 V
1
0
1.0750 V
1
0
0
1
0
Deeper Slp
1
1
0
0
0
1
0.0875 V
0
1
0
0.0000 V
0.4625 V
1
0
0.5875 V
0
0
0
1
1
0
1
0.8375 V
1
D
0
0
1
1
0
0
1
0.0000 V
1
C
1
1
0
1
1.3625 V
0
0
0.3500 V
0
1
0
0
0
0
0
1
1
1
0
0
1
0
0
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
1
0
1
1
0
0
0
0.1500 V
0
3
0
0.8250 V
0
0
1
1
0.6375 V
1 1
1
0
1
0
1
1
1
0.2375 V
1
1
0
1
1.3000 V
1
0
0
0
1
0
1
1
1
0
0
1
0
0
0
0
0
1
0.0375 V
1
0
Deeper Sleep/Extended Deeper Sleep
1
1
0.6875 V
0
1
1
1
1
2
0
0
0
0
SAMSUNG
0
1
0.3375 V
0
0
1
0
0
0
1
1
1
1
0.2875 V
0
1
0.5250 V
1
1
0
0
0
0.3750 V
Pull-down
0
DATE
1
1
BSEL0, BSEL1, BSEL2
DEV. STEP
0
0.4750 V
1
0.0625 V
1
0
1
0.7250 V
1
0.2500 V
0
DRAW
1
0
1
1
0
0
1
0
1
0
1
0
0
01
0
1
1
0
Active
1
0
1
0
1.1375 V
Minimize coupling of any switching signals to this net.
1
0
0
1
000
0
1
1
0
1
1
Dual Mode Region
1
1
0
0
1
0
0
0
1
1
0
1
1
0
0
1
1
0
0
0
0
1
0
1
0
1
0
1
1
1
0.5000 V
1.1875 V
1
0
1
0
0
0
APPROVAL
MODULE CODE
0
1
0
0
1
1.0625 V
0
1
0
1
1
*Yonah Processor (2.33 GHz / 800 MHz : TBD)
1
0
0.5125 V
0
0
1
1
FSB 800 MHz
1
0
0
1
1
0
1
1
SAMSUNG ELECTRONICS CO’S PROPERTY.
0
0
0.0000 V
1
0
0
0
0
0
0.6000 V
0
0.9125 V
0
1
0
1
1
FSB 1067 MHz
0.2625 V
0
1
1
266M
1
166M
0
0
0
1
1
0
0
0
0
1
1
1
A
SI team request
1
0
0
1
0
0.8125 V
0
FSC FSB
1
0
0
1
Observe 3:1 spacing b/w VCC/VSSsense lines and 25mil away
1
1
1
0
0.4875 V
1
0
1
0.5375 V
near the CPU
0
1
BSEL0, BSEL2
0
1
1
0
*"1111111" : 0V power good asserted.
0
0
0
0
FRQ
0
1
1
1
0
(preferred 50mil) from any other signal. And GND via 100mil away
1
1
1
1
0
1
1
0
0
0.1625 V
0
1
001
1
1
1
0
200M
0
1
1
REV
1
1
0
1.4625 V
1
0
Route the VCC/VSSsense as a Zo=55ohm traces with equal length.
0
1
1
0
1
1.5000 V
1
0
FSA
DPRSLPVR
1
0
0
1
2
0
0
0
1
CPU Socket : 3704-001153
1
0
0
1
0
0
1
0
0.2250 V
1
0
0
0
0
0
1
0
0
1.2250 V
BSEL
1
OF
1
D:/users/mobile24/mentor/cannes-l_ext/Cannes-L-Ext_MAIN
PENRYN (2/3)
CPU
CANNES-L_EXT
559
BA41-
August 07, 2009 15:14:35 PM
1.0
PR
9/23/2008
undefined
HJ KIM
YM AN
Jun PARK
-> delete and change layout (ECAE)
1
1.1750 V
1.3125 V
1
0.7125 V
1
0.5500 V
1
9-A4,54-D4
1K
R635
1%
25-C1,54-C2
10nF
C690
25V
R638
1%
27.4
11-C1
9-A4,54-D4
nostuff
50V
C125
0.1nF
25-C1,55-B4
4
P1.5V
2
P1.05V
12-B4
54.9
R93
100nF
C687
10V
nostuff
P1.05V
7-C2,54-D2
1
P1.05V
6
54.9
R92
1%
7-A4,13-B1 25-B1
27-D3,55-D4
10V
C686
100nF
11-C4,12-A3
12-B1
5
9-C3,54-D4
6.3V
10000nF-X5R
C691
54.9
R91
13-B1,25-C1 49-C4,54-A2
AD
2.5V
220uF
EC512
nostuff
P1.05V
1%
10-C4,49-A4 55-B4
0
2K
R636
1%
100nF
C778
10V
49-C4,54-C2
100nF
C780
10V
49-D4,54-C4
R90
1%54.9
9-C3,54-D4
11-C4,12-A3
9-A4,54-D4
54.9
1%
R637
9-A4,54-C3
9-C3,54-D4
11-C4,12-A3
VSSSENSE
AE7
P1.05V
7-C2,54-D2
11-C1
VCCP_8
J21
VCCP_9
M21
VCCSENSE
AF7
AD6
VID_0
AF5
VID_1
AE5
VID_2
AF4
VID_3
AE3
VID_4
AF3
VID_5
AE2
VID_6
R21
VCCP_13
V21
VCCP_14
W21
VCCP_15
V6
VCCP_16
G21
VCCP_2
J6
VCCP_3
M6
VCCP_4
N6
VCCP_5
T6
VCCP_6
R6
VCCP_7
K21
THERMTRIP#
C7
A24
THRMDA
B25
THRMDC
TMS
AB5
TRST#
AB6
VCCA_1
B26
VCCA_2
C26
VCCP_1
K6
VCCP_10
N21
VCCP_11
T21
VCCP_12
TDI
AA6
TDO
AB3
TEST1
C23 D25
TEST2 TEST3
C24
TEST4
AF26
TEST5
AF1
TEST6
A26
TEST7
C3
RSVD_1
N5
RSVD_2
T2
RSVD_3
V3
RSVD_4
B2
RSVD_5
D2
RSVD_6
D22
RSVD_7
D3
RSVD_8
F6
RSVD_9
SLP#
D7
TCK
AC5
C20
DBR#
DPRSTP#
E5
DPSLP#
B5
DPWR#
D24
GTLREF
AD26
AC2
PRDY#
AC1
PREQ#
PROCHOT#
D21
PSI#
AE6
PWRGOOD
D6
M4
AD1
BPM2#
AC4
BPM3#
B22
BSEL0
B23
BSEL1
C21
BSEL2
COMP0
R26
COMP1
U26
AA1
COMP2
COMP3
Y1
CPU1-3
0143854500|bga_479p_sock
A22
BCLK0
A21
BCLK1
AD4
BPM0#
AD3
BPM1#
nostuff
10V
100nF
C655
PENRYN
nostuff
3
27.4
1%
R701
56
R703
nostuff
R641
56
10V
C779
100nF
9-C3,54-C3
10V
C688
100nF
54.9
R702
1%
CPU1_TDI CPU1_TMS ITP3_DBRESET#
CPU1_PROCHOT#_MN
CPU1_COMP3_MN
CPU1_COMP1_MN
CPU1_COMP2_MN
CPU1_COMP0_MN
CPU1_GTLREF_MN
CPU1_TRST#
CPU1_THRMTRIP#
55-B410-B4,49-A4
CPU1_TCK
CPU1_TDI CPU1_TMS
CPU1_TRST#
CPU1_VID(6:0)
CLK0_HCLK0
CLK0_HCLK0#
CPU1_PWRGDCPU
CPU1_DPSLP#
CPU1_SLP#
CPU1_VSSSENSE
CPU1_DPRSTP#
CPU2_THERMDA CPU2_THERMDC
CPU1_DPWR#
CPU1_PSI#
CPU1_BSEL0
CPU1_BSEL1
CPU1_BSEL2
CPU1_VCCSENSE
CPU1_TCK
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A
C
OF
1
APPROVAL
B B
4
D
3
PROPRIETARY INFORMATION THAT IS
9/23/2008
undefined
HJ KIM
YM AN
Jun PARK
4
2
SAMSUNG PROPRIETARY
1
Prodlizer & Cbulk common used(Socket inside)
SAMSUNG ELECTRONICS CO’S PROPERTY.
D
SAMSUNG
3
2
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
THIS DOCUMENT CONTAINS CONFIDENTIAL
EXCEPT AS AUTHORIZED BY SAMSUNG.
PAGE
REV
DRAW
PART NO.
TITLE
LAST EDIT
DEV. STEP
A
ELECTRONICS
MODULE CODE
CHECK
C
DATE
D:/users/mobile24/mentor/cannes-l_ext/Cannes-L-Ext_MAIN
PENRYN (3/3)
CPU
CANNES-L_EXT
5510
BA41-
August 07, 2009 15:14:35 PM
1.0
PR
10000nF-X5R
C99
6.3V
6.3V
C103
10000nF-X5R
10000nF-X5R
C100
6.3V
6.3V
C98
10000nF-X5R
10000nF-X5R
C107
6.3V
6.3V
C108
10000nF-X5R
10000nF-X5R
C101
6.3V
6.3V
C82
10000nF-X5R
6.3V
C106
10000nF-X5R
10000nF-X5R
C81
6.3V
10000nF-X5R
C84
6.3V
6.3V
C83
10000nF-X5R
6.3V
C102
10000nF-X5R
10000nF-X5R
C109
6.3V
10000nF-X5R
C104
6.3V
10%
10%
6.3V
C105
10000nF-X5R
CPU_CORECPU_CORE
VSS_91
E16
VSS_92
VSS_93
E19
E21
VSS_94
E24
VSS_95
E3
VSS_96
E6
VSS_97
VSS_98
E8
F11
VSS_99
CPU_CORE
D11
VSS_82
D13
VSS_83
D16
VSS_84
D19
VSS_85
D23
VSS_86
D26
VSS_87
D4
VSS_88
D8
VSS_89
A8
VSS_9
E11
VSS_90
E14
C11
VSS_72
C14
VSS_73
C16
VSS_74
C19
VSS_75
C2
VSS_76
C22
VSS_77
C25
VSS_78
C5
VSS_79
A4
VSS_8
C8
VSS_80
D1
VSS_81
VSS_62
AF8
VSS_63
VSS_64
B11
B13
VSS_65
VSS_66
B16
B19
VSS_67
B21
VSS_68
B24
VSS_69
A25
VSS_7
B6
VSS_70
B8
VSS_71
AE4
VSS_53
AE8
VSS_54
AF11
VSS_55
AF13
VSS_56
AF16
VSS_57
AF19
VSS_58
AF2
VSS_59
A23
VSS_6
AF21
VSS_60
AF25
VSS_61
AF6
AD25
VSS_43
AD5
VSS_44
AD8
VSS_45
AE1
VSS_46
AE11
VSS_47
AE14
VSS_48
AE16
VSS_49
A2
VSS_5
AE19
VSS_50
AE23
VSS_51
AE26
VSS_52
VSS_33
AC6
VSS_34 VSS_35
AC8
AD11
VSS_36
AD13
VSS_37
AD16
VSS_38
AD19
VSS_39
A19
VSS_4
AD2
VSS_40
AD22
VSS_41
AB23
VSS_42
AB26
VSS_24
AB4
VSS_25
AB8
VSS_26
AC11
VSS_27
AC14
VSS_28
AC16
VSS_29
A16
VSS_3
AC19
VSS_30
AC21
VSS_31
AC24
VSS_32
AC3
Y24
VSS_161
Y3
VSS_162
Y6
VSS_163
AA5
VSS_17
AA8
VSS_18
AB1
VSS_19
A14
VSS_2
AB11
VSS_20
AB13
VSS_21
AB16
VSS_22
AB19
VSS_23
VSS_151
V2
VSS_152
VSS_153
V22
V25
VSS_154
V5
VSS_155
W1
VSS_156
W23
VSS_157
W26
VSS_158
W4
VSS_159
AA25
VSS_16
Y21
VSS_160
R25
VSS_142
R5
VSS_143
T1
VSS_144
T23
VSS_145
T26
VSS_146
T4
VSS_147
U21
VSS_148
U24
VSS_149
AA22
VSS_15
U3
VSS_150
U6 N1
VSS_132
N23
VSS_133
N26
VSS_134N4VSS_135
P21
VSS_136
P24
VSS_137P3VSS_138P6VSS_139
AA2
VSS_14
R2
VSS_140
R22
VSS_141
VSS_122K4VSS_123
VSS_124
L21
L24
VSS_125
VSS_126
L3
L6
VSS_127M2VSS_128
M22
VSS_129
AA19
VSS_13
M25
VSS_130M5VSS_131
H24
VSS_113
H3
VSS_114
H6
VSS_115
J2
VSS_116
J22
VSS_117
J25
VSS_118
J5
VSS_119
AA16
VSS_12
K1
VSS_120
K23
VSS_121
K26
F2
VSS_103
F22
VSS_104
F25
VSS_105
F5
VSS_106
F8
VSS_107
G1
VSS_108
G23
VSS_109
AA14
VSS_11
G26
VSS_110
G4
VSS_111
H21
VSS_112
VCC_94
F15
VCC_95 VCC_96
F17 F18
VCC_97
F20
VCC_98
F7
VCC_99
A11
VSS_1
AA11
VSS_10
F13
VSS_100
F16
VSS_101
F19
VSS_102
E13
VCC_85
E15
VCC_86
E17
VCC_87
E18
VCC_88
E20
VCC_89
A9
VCC_9
E7
VCC_90
E9
VCC_91
F10
VCC_92
F12
VCC_93
F14
C9
VCC_75
D10
VCC_76
D12
VCC_77
D14
VCC_78
D15
VCC_79
A7
VCC_8
D17
VCC_80
D18
VCC_81
D9
VCC_82
E10
VCC_83
E12
VCC_84
VCC_65
B20
VCC_66 VCC_67
B7 B9
VCC_68
C10
VCC_69
A20
VCC_7
C12
VCC_70
C13
VCC_71
C15
VCC_72
C17
VCC_73
C18
VCC_74
AF17
VCC_56
AF18
VCC_57
AF20
VCC_58
AF9
VCC_59
A18
VCC_6
B10
VCC_60
B12
VCC_61
B14
VCC_62
B15
VCC_63
B17
VCC_64
B18
AE13
VCC_46
AE15
VCC_47
AE17
VCC_48
AE18
VCC_49
A17
VCC_5
AE20
VCC_50
AE9
VCC_51
AF10
VCC_52
AF12
VCC_53
AF14
VCC_54
AF15
VCC_55
VCC_36
AD12
VCC_37 VCC_38
AD14 AD15
VCC_39
A15
VCC_4
AD17
VCC_40
AD18
VCC_41
AD7
VCC_42
AD9
VCC_43
AE10
VCC_44
AE12
VCC_45
AB9
VCC_27
AC10
VCC_28
AC12
VCC_29
A13
VCC_3
AC13
VCC_30
AC15
VCC_31
AC17
VCC_32
AC18
VCC_33
AC7
VCC_34
AC9
VCC_35
AD10
AA7
VCC_17
AA9
VCC_18
AB10
VCC_19
A12
VCC_2
AB12
VCC_20
AB14
VCC_21
AB15
VCC_22
AB17
VCC_23
AB18
VCC_24
AB20
VCC_25
AB7
VCC_26
VCC_1
A10
AA10
VCC_10
F9
VCC_100
AA12
VCC_11
AA13
VCC_12
AA15
VCC_13
AA17
VCC_14
AA18
VCC_15
AA20
VCC_16
9-C4,49-A4 55-B4
0143854500|bga_479p_sock
CPU1-4
PENRYN
R699
100 1%
100 1%
55-B49-C4,49-A4
CPU1_VCCSENSE
CPU1_VSSSENSE
R700
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SEL_LCDCLK*
1
SAMSUNG
1
1
3
CLK REQ A
SAMSUNG PROPRIETARY
0
SRC PORTCLK REQ
TITLE
0
B
166 MHz
1
MODULE CODE
400 MHz 100 MHz
OF
1
SL : 1205-003533
RSVD
SRC2
VDD_SRC_IO
0
PAGE
DOT_96/DOT_96#
PART NO.
THIS DOCUMENT CONTAINS CONFIDENTIAL
MINI CARD
FSC
266 MHz
VDD_PLL3_IO
0
DEVICE
Pin 24/25
GMCH
VDD_PLL3
CLK REQ F
0
1
133 MHz
VDD_REF
1
1
SRC4
FSB
0
0
HOST CLK
2
EXCEPT AS AUTHORIZED BY SAMSUNG.
A
PROPRIETARY INFORMATION THAT IS
Place 14.318MHz within
BSEL1
1
BSEL0
SRC_0/SRC_0#
DATE
HIGH
0
PEG_CLK/PEG_CLK#
SAMSUNG ELECTRONICS CO’S PROPERTY.
IDT : 1205-003159
SRC6
200 MHz
REV
1
2
0
SATA
D
VDD_CPU_IO VDD_SRC
1
DEV. STEP
FSA
SRC8
ELECTRONICS
CK505M
CLK REQ E
1
VDD_CPU
C
4
0
0
500mils of CK-505
BSEL2
August 07, 2009 15:14:35 PM
1.0
PR
undefined
HJ KIM
YM AN
Jun PARK
A
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
Pin 20/21
CLK REQ B
This part is 64pin QFN package.
D
VDD_48
CHECK
C
LOW
VDD_PCI
DRAW
4
1
APPROVAL
LAST EDIT
3
1
0
VDD_IO
EXP3_CLKREQ#
27M & 27M_SS
333 MHz
B
10V
nostuff
CK_CLOCK_505M
D:/users/mobile24/mentor/cannes-l_ext/Cannes-L-Ext_MAIN
MAIN_CLOCK_CIRCUIT
CANNES-L_EXT
5511
BA41-
10V
100nF
C871
C876
100nF
100nF
C908
10V
25-B1
10V
C903
100nF
33
R179
nostuff
27-B3
9-D4
10V
R183
10K
1%
C901
100nF
26-C2
C251
50V
5%
0.033nF
6.3V
10000nF-X5R
C909
R233
22 5%
27-A3
P3.3V
35-A3,54-B2
22
R184
5%
30-A4
13-A1,54-B2
100nF
C902
P1.5V
13-B1
10V
0.022nF
C249
50V
nostuff
37-C4,55-C4
27-A3
17-B4,18-B4 27-B4,54-D4
39-B4
17-B4,18-B4 27-B4,54-B4
R180
22
22-A4
12-B1
27-C3,54-B2
19-C4
B523 BLM18PG181SN1
R177
2.2K
6.3V
22
R181
C874
10000nF-X5R
10V
100nF
C870
36-B4
14.31818MHz
Y2
1
2
9-C4,12-A3
2801-004667
0.033nF
5%
50V
C250
27-C1
35-A4
R234
10K
1%
nostuff
P3.3V
13-B1
VSS_PCI
15
VSS_PLL3
26
VSS_REF
1
VSS_SRC1
30 36
VSS_SRC2 VSS_SRC3
49
XTAL_IN
3 2
XTAL_OUT
9
VDD_PLL3
23
27
VDD_PLL3_IO
VDD_REF
4
VDD_SRC
46
VDD_SRC_IO1
33
VDD_SRC_IO2
43
VDD_SRC_IO3
52
18
VSS_48 VSS_CPU
59
VSS_IO
22
51
SRC8#_ITP#
53
SRC8_ITP
54
SRC9
37 38
SRC9#
65
THERM_GND
USB_FS_A
17
VDD_48
16
VDD_CPU
62
VDD_CPU_IO
56
VDD_IO
19
VDD_PCI
SRC11_CLKREQH#
40
SRC2
28
SRC2#
29
SRC3#_CLKREQD#
32
SRC3_CLKREQC#
31
34
SRC4
35
SRC4#
SRC6
48
SRC6#
47
SRC7#_CLKREQE#
50
SRC7_CLKREQF#
PCI_2
11
PCI_3
12
PCI_4_SEL_LCDCLK#
13
REF_FS_C_TEST_SEL
5
SCL
7
SDA
6
SRC0#_DOT96#
21
SRC0_DOT96
20
SRC10
41
SRC10#
42
SRC11#_CLKREQG#
39
58
CPU1_MCH#
57
CPUSTOP#
44
FSB_TESTMODE
64
LCDCLK#_27M_SS
25
LCDCLK_27M
24
55
NC
PCIF_5_ITP_EN
14
PCISTOP#
45
PCI_0_CLKREQ_A#
8
PCI_1_CLKREQ_B#
10
SLG8SP513
1205-003156
U10
CLKPWRGD_PWRDN#
63
CPU0
61
CPU0#
60
CPU1_MCH
nostuff
6.3V
10000nF-X5R
C872
1%
10K
R235
10K
R187
1%
C900
100nF
10V
R237
475
0.018nF
C254
50V
1% 1%
R185
475
19-C4
5%22
R236
nostuff
6.3V
10000nF-X5R
C873
R178
33
10V
100nF
C907
27-B3,55-C3
35-A4
1%
10K
R182
nostuff
37-C4
27-C1
22-A4
50V
C253
0.1nF
10V
12-B1
C906
100nF
B522 BLM18PG181SN1
100nF
C875
10V
0.033nF
5%
50V
C252
9-C4,12-A3
37-C4
10V
C905
100nF
0.018nF
C255
50V
C899
10000nF-X5R
6.3V
R186
33
C904
10000nF-X5R
6.3V
25-B1
9-C4,12-A3
27-C3,54-B2
9-D4
CLK3_VDD_SRC_IO_MN
CLK3_PCLKICH_R_MN
CLK3_GFX_27M_SS
CLK3_GFX_27M
CLK3_PCLKMICOM_R_MN
CLK3_DBGLPC_R_MN
CLK1_PEG#
CLK1_MINIPCIE#
CLK3_USB48_R_MN
CLK3_ICH14_R_MN
MCH3_CLKREQ#_R_MN
CHP3_SATACLKREQ#_R_MN
CLK3_VDD_REF_MN
CLK1_MCH3GPLL
CHP3_SATACLKREQ#
CLK3_PCLKMICOM
MCH3_CLKREQ#
CLK3_DBGLPC
MIN3_CLKREQ#
CLK1_PCIEICH
CLK1_PCIELOM
LOM3_CLKREQ#
CLK1_PEG
CLK0_HCLK0
CLK3_USB48
SMB3_CLK
SMB3_DATA
CHP3_CPUSTP#
CHP3_PCISTP#
CPU1_BSEL2
CPU1_BSEL0
CLK3_ICH14
CLK3_PCLKICH
CLK3_FM48
CLK1_PCIEICH#
CLK1_PCIELOM#
CLK1_MINIPCIE
CLK1_MCH3GPLL#
CLK1_SATA CLK1_SATA#
CLK3_PWRGD
CPU1_BSEL1
CLK0_HCLK1#
CLK0_HCLK1
CLK0_HCLK0#
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1 OF 5
VTT
HOST DATA BUS
VTTLF
NC
HOST CONTROL
HOST ADDRESS BUS
VCC CORE
CFG
1
iTPM Host Interface Disable (def.)
PAGE
CHECK
DRAW
Simultaneously
DATE
SAMSUNG PROPRIETARY
OF
3
CFG(20)
A
CFG(9)
SAMSUNG ELECTRONICS CO’S PROPERTY.
2
Enabled (def.)
*POCAFEB-12 Only (Remove in MP Model)
B
THIS DOCUMENT CONTAINS CONFIDENTIAL
Low
SDVO or PCIE X1
CFG(5)
CFG(19)
DMIx4 (def.)
Only(def.)
(def. : default Option)
APPROVAL
1
ELECTRONICS
PCIE Loop Back Enable
SDVO and PCIE X1
D
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
CFG(6)
Normal
REV
High
MODULE CODE
PROPRIETARY INFORMATION THAT IS
CFG(7)
3
Dynamic ODT Disabled
DMIx2
Current Setting
ME Crypto confidentiality (def.)
1608
TITLE
C
Dynamic ODT
DMI Lane Reversal
PART NO.
LAST EDIT
CFG(16)
4
B
ME Crypto no confidentiality PEG Reversal (def.)
2
C
SAMSUNG
Jun PARK
YM AN
HJ KIM
undefined
9/23/2008
PR
1.0
August 07, 2009 15:14:35 PM
BA41-
12 55
CANNES-L_EXT
MCH_CANTIGA_GM_DDR2
CANTIGA (1/5)
D:/users/mobile24/mentor/cannes-l_ext/Cannes-L-Ext_MAIN
iTPM Host Interface Enable
iTPM option
EXCEPT AS AUTHORIZED BY SAMSUNG.
A
CFG#
PCIE Loop Back Disable(def)
DMI Lane Normal (def.)
D
4
DEV. STEP
CFG(10)
13
8-C3
22
15
8-C3
27
2
C536
470nF
16V
58
C37
470nF
16V
20
8-C4
8-B1
9-D4
8-B4
5
0
39 40
3
6
5 6
8-C1
8-C3 8-C3
44
11-B1
11-C1
31
8-C3
61
42 43
26
8-C3
29
62
8
52
4
1%
100
R41
17
19
8-B1
41
16
nostuff
10V
C34
100nF
22
AD
2.5V
220uF
EC501
8-C4
19
12-B4,54-A3
23
56
8-C1
8-C2
48
8-C1
nostuff
11
8-C2
10000nF-X5R
C554
6.3V
1000nF-X5R
C556
6.3V
29
8-B1
4
8-C3
34
6.3V
10000nF-X5R
C594
12-C4,54-B2
53
32
8-C3
P1.05V
23
P1.05V
6.3V
C555
10000nF-X5R
35 36
24
8-C3
VTT_8T7VTT_9
T8
21
24
VTT_20U7VTT_21U8VTT_22
U9
V1
VTT_23V2VTT_24V3VTT_25
VTT_3
T12
VTT_4
T13
VTT_5T2VTT_6T5VTT_7
T6
T9
VTT_11U1VTT_12
U10
VTT_13
U11
VTT_14
U12
VTT_15
U13
VTT_16U2VTT_17U3VTT_18U5VTT_19
U6
VTT_2
T11
Y32
VCC_NCTF_44
AC29
VCC_NCTF_5
AC30
VCC_NCTF_6
AC32
VCC_NCTF_7
AE29
VCC_NCTF_8
AE30
VCC_NCTF_9
VTTLF_1
A8
VTTLF_2
AB2
VTTLF_3
L1
VTT_1
T10
VTT_10
VCC_NCTF_34
U30
VCC_NCTF_35
U32
VCC_NCTF_36
V29
VCC_NCTF_37
V30
VCC_NCTF_38
W29
VCC_NCTF_39
AB30
VCC_NCTF_4
W30
VCC_NCTF_40
W32
VCC_NCTF_41
Y29
VCC_NCTF_42
Y30
VCC_NCTF_43
VCC_NCTF_24
AK29
VCC_NCTF_25
AK30
VCC_NCTF_26
AK32
VCC_NCTF_27
AL26
VCC_NCTF_28
AL28
VCC_NCTF_29
AA32
VCC_NCTF_3
AL29
VCC_NCTF_30
AL30
VCC_NCTF_31
AL32
VCC_NCTF_32
AM30
VCC_NCTF_33
AM32
AH29
VCC_NCTF_15
AH30
VCC_NCTF_16
AH32
VCC_NCTF_17
AJ29
VCC_NCTF_18
AJ32
VCC_NCTF_19
AA30
VCC_NCTF_2
AK23
VCC_NCTF_20
AK24
VCC_NCTF_21
AK25
VCC_NCTF_22
AK26
VCC_NCTF_23
AK28
VCC_5
AC26
VCC_6
AC28
VCC_7
AC33
VCC_8
AC34
VCC_9
AE26
AA29
VCC_NCTF_1
AE32
VCC_NCTF_10
AF30
VCC_NCTF_11
AG29
VCC_NCTF_12
AG30
VCC_NCTF_13
AG32
VCC_NCTF_14
VCC_27
T32
VCC_28
U33
VCC_29
VCC_3
AA34
U34
VCC_30
V33
VCC_31
V34
VCC_32
W33
VCC_33
Y33
VCC_34
Y34
VCC_35
VCC_4
AB34
AG33
VCC_18
AG34
VCC_19
VCC_2
AA33
AH23
VCC_20
AH25
VCC_21
AH28
VCC_22
AJ23
VCC_23
AJ26
VCC_24
AJ33
VCC_25
AK33
VCC_26
AM33
H_SWING
C5
C9
H_TRDY#
VCC_1
AA28
VCC_10
AE33
VCC_11
AF23
VCC_12
AF25
VCC_13
AF28
AF33
VCC_14
AG24
VCC_15
AG25
VCC_16
AG26
VCC_17
H_HITM#
H11
H_LOCK#
H_RCOMP
E3
B15
H_REQ#_0
K13
H_REQ#_1
F13
H_REQ#_2
B13
H_REQ#_3
B14
H_REQ#_4
B6
H_RS#_0
F12
H_RS#_1
C8
H_RS#_2
L10
H_DSTBN#_0
M7
H_DSTBN#_1
AA5
H_DSTBN#_2
AE6
H_DSTBN#_3
L9
H_DSTBP#_0
M8
H_DSTBP#_1
AA6
H_DSTBP#_2
AE5
H_DSTBP#_3
H_DVREF
B11
H9
H_HIT#
E12
H_D#_7
D4
H_D#_8
H3
H_D#_9
B10
H_DBSY#
E9
H_DEFER#
J8
H_DINV#_0
L3
H_DINV#_1
Y13
H_DINV#_2
Y1
H_DINV#_3
J11
H_DPWR#
F9
H_DRDY#
H_D#_54
AE14
H_D#_55
AF3
H_D#_56
AC1
H_D#_57
AE3
H_D#_58
AC3
H_D#_59
H2
H_D#_6
AE11
H_D#_60
AE8
H_D#_61
AG2
H_D#_62
AD6
H_D#_63
F6
AD11
H_D#_45
AD10
H_D#_46
AD13
H_D#_47
AE12
H_D#_48
AE9
H_D#_49
H6
H_D#_5
AA2
H_D#_50
AD8
H_D#_51
AA3
H_D#_52
AD3
H_D#_53
AD7
H_D#_35
Y12
H_D#_36
Y14
H_D#_37
Y7
H_D#_38
W2
H_D#_39
G2
H_D#_4
AA8
H_D#_40
Y9
H_D#_41
AA13
H_D#_42
AA9
H_D#_43
AA11
H_D#_44
H_D#_25
N6
H_D#_26
P13
H_D#_27
N8
H_D#_28
L7
H_D#_29
E6
H_D#_3
N10
H_D#_30
M3
H_D#_31
Y3
H_D#_32
AD14
H_D#_33
Y6
H_D#_34
Y10
P2
H_D#_16
L2
H_D#_17
R2
H_D#_18
N9
H_D#_19
F8
H_D#_2
L6
H_D#_20
M5
H_D#_21
J3
H_D#_22
N2
H_D#_23
R1
H_D#_24
N5
H_BREQ#
C12
H_CPURST#
E11
H_CPUSLP#
F2
H_D#_0
G8
H_D#_1
M9
H_D#_10
M11
H_D#_11
J1
H_D#_12
J2
H_D#_13
N12
H_D#_14
J6
H_D#_15
H_A#_5
H13
H_A#_6
C18
H_A#_7
M16
H_A#_8
J13
H_A#_9
H12
H_ADS#
B16
H_ADSTB#_0
G17
H_ADSTB#_1
H_AVREF
A11
A9
H_BNR#
F11
H_BPRI#
G12
J17
H_A#_28
H20
H_A#_29
A14
H_A#_3
B18
H_A#_30
K17
H_A#_31
B20
H_A#_32
F21
H_A#_33
K21
H_A#_34
L20
H_A#_35
C15
H_A#_4
F16
H_A#_17
B19
H_A#_18
J16
H_A#_19
E20
H_A#_20
H16
H_A#_21
J20
H_A#_22
L17
H_A#_23
A17
H_A#_24
B17
H_A#_25
L16
H_A#_26
C21
H_A#_27
CFG_8
C23
CFG_9
HPLL_CLK
AH7 AH6
HPLL_CLK#
P16
H_A#_10
R16
H_A#_11
N17
H_A#_12
M13
H_A#_13
E17
H_A#_14
P17
H_A#_15
F17
H_A#_16
G20
H21
CFG_17
P29
CFG_18
R28
CFG_19
P25
CFG_2
T28
CFG_20
P20
CFG_3
P24
CFG_4
C25
CFG_5
N24
CFG_6
M24
CFG_7
E21
T25
CFG_0
R25
CFG_1
C24
CFG_10
N21
CFG_11
P21
CFG_12
T21
CFG_13
R20
CFG_14
M20
CFG_15
L21
CFG_16
U2-1 EB88CTPM
0904-002376
18
15
35
8-C2
8-B2
P1.05V
13
1K
R551
1%
4
10
18
30
3
49
20
3
221
R539
45
16
1%
0
7
8-C3,54-A2
33 34
60
8-C1
51
8-B3
47
1
P1.05V
50
10 11
14
8-C3
25
P1.05V
63
1%24.9
R540
1 2
8-B2
8-B2
31
27 28
21
37
12-B4,54-B2
16V
470nF
C537
8-C3
12-A4,54-A3
9-D4
9
12
26
8-C3
30
100nF
C590
10V
9-C4,11-C4
10V
100nF
C644
28
8-C3
9-C4,11-C4
9-C4,11-C4
38
25
EC504 220uF
2.5V AD
10V
nostuff
32
12
C592
100nF
1%
57
9
8-C3
55
R550
2K
R581
2.2K
33
7 8
46
nostuff
54
14
MCH1_H_RCOMP_MN
MCH1_VTTLF2_MN
MCH1_CFG6_MN
59
17
CPU1_LOCK#
CPU1_RS0# CPU1_RS1# CPU1_RS2#
CPU1_TRDY#
CPU1_REQ#(4:0)
CPU1_DPWR#
MCH1_HVREF
MCH1_VTTLF1_MN
MCH1_VTTLF3_MN
MCH1_HXSWING
MCH1_HVREF
CPU1_BSEL0 CPU1_BSEL1 CPU1_BSEL2
CPU1_D#(63:0)
CPU1_A#(35:3)
CPU1_ADS# CPU1_ADSTB0# CPU1_ADSTB1# CPU1_BNR# CPU1_BPRI# CPU1_BREQ#
CPU1_SLP#
CPU1_CPURST#
CLK0_HCLK1#
CLK0_HCLK1
CPU1_DBSY#
CPU1_DEFER#
CPU1_DBI0#
MCH1_HXSWING
CPU1_DBI1# CPU1_DBI2# CPU1_DBI3#
CPU1_DRDY#
CPU1_DSTBN0# CPU1_DSTBN1# CPU1_DSTBN2# CPU1_DSTBN3#
CPU1_DSTBP0# CPU1_DSTBP1# CPU1_DSTBP2# CPU1_DSTBP3#
CPU1_HIT# CPU1_HITM#
Samsung
Samsung
Samsung
Confidential
Confidential
Confidential
2 OF 5
LVDSHDA
NC RSVD
GFX VCC NCTF
GFX VCC NCTF
GFX VCC
TV VGA
PCIE GFX
PCIE GFX
DMICLKMEPMMISC
PART NO.
DRAW
4
TITLE
SAMSUNG PROPRIETARY
C
2
THIS DOCUMENT CONTAINS CONFIDENTIAL
3
PAGE
C
DATE
2
EXCEPT AS AUTHORIZED BY SAMSUNG.
ME Debug Port
undefined
HJ KIM
YM AN
Jun PARK
LAST EDIT
D
3
REV
1
PROPRIETARY INFORMATION THAT IS
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
RSVD11
A
SAMSUNG
1608
RSVD10
ELECTRONICS
A
B B
SAMSUNG ELECTRONICS CO’S PROPERTY.
4
1
D
RSVD12
RSVD13
For ESD
OF
CHECK DEV. STEP
APPROVAL
MODULE CODE
2 5
D:/users/mobile24/mentor/cannes-l_ext/Cannes-L-Ext_MAIN
CANTIGA (1/5)
MCH_CANTIGA_GM_DDR2
CANNES-L_EXT
5513
BA41-
August 07, 2009 15:14:35 PM
1.0
PR
9/23/2008
1
12 15
nostuff
11
50V
C646
0.1nF
R552
56
C67
10V
1%
R580
10K
10V
100nF
4
6 9
C65
100nF
5
2
1K
R583
1%
2
100nF
C51
10V
C75
100nF
10V
19-B4
100nF
C72
10V
C66
100nF
10V
1413
100nF
C64
10V
10V
10
100nF
C55
10V
C58
100nF
10V
6 9
100nF
C48
10V
C49
100nF
10 1398
100nF
C77
10V
P1.05V_PEG
10V
10 13
10V
100nF
C59
54
C57
100nF
C50
100nF
10V
11-B4,54-B2
100nF
C91
10V
12 15111
VCC_AXG_NCTF_59
Y17
VCC_AXG_NCTF_6
AC16
VCC_AXG_NCTF_60
Y19
VCC_AXG_NCTF_7
AC17
VCC_AXG_NCTF_8
AE16
VCC_AXG_NCTF_9
AE17
8
VCC_AXG_NCTF_49
W17
VCC_AXG_NCTF_5
AB19
W19
VCC_AXG_NCTF_50 VCC_AXG_NCTF_51
W20
VCC_AXG_NCTF_52
W21
VCC_AXG_NCTF_53
W23
VCC_AXG_NCTF_54
W24
VCC_AXG_NCTF_55
W25
VCC_AXG_NCTF_56
W26
VCC_AXG_NCTF_57
W28
VCC_AXG_NCTF_58
Y16
V16
VCC_AXG_NCTF_4
AB17
VCC_AXG_NCTF_40
V17
VCC_AXG_NCTF_41
V19
VCC_AXG_NCTF_42
V21
VCC_AXG_NCTF_43
V23
VCC_AXG_NCTF_44
V24 V25
VCC_AXG_NCTF_45 VCC_AXG_NCTF_46
V26
VCC_AXG_NCTF_47
V28
VCC_AXG_NCTF_48
W16
VCC_AXG_NCTF_3
AB16
VCC_AXG_NCTF_30
AM16
VCC_AXG_NCTF_31
AM17
VCC_AXG_NCTF_32
AM19
VCC_AXG_NCTF_33
AM20
VCC_AXG_NCTF_34
AM21
VCC_AXG_NCTF_35
U16 U19
VCC_AXG_NCTF_36 VCC_AXG_NCTF_37
U20
VCC_AXG_NCTF_38
U21
VCC_AXG_NCTF_39
VCC_AXG_NCTF_2
AA19
VCC_AXG_NCTF_20
AJ16 AJ19
VCC_AXG_NCTF_21 VCC_AXG_NCTF_22
AK16
VCC_AXG_NCTF_23
AK17
VCC_AXG_NCTF_24
AK19
VCC_AXG_NCTF_25
AK20
VCC_AXG_NCTF_26
AK21
VCC_AXG_NCTF_27
AL16
VCC_AXG_NCTF_28
AL19
VCC_AXG_NCTF_29
AL21
AA16
VCC_AXG_NCTF_10
AE19
VCC_AXG_NCTF_11
AF16
VCC_AXG_NCTF_12
AF17
VCC_AXG_NCTF_13
AF19
VCC_AXG_NCTF_14
AG16
VCC_AXG_NCTF_15
AG17 AG19
VCC_AXG_NCTF_16 VCC_AXG_NCTF_17
AH16
VCC_AXG_NCTF_18
AH17
VCC_AXG_NCTF_19
AH19
VCC_AXG_38
Y15
VCC_AXG_39
VCC_AXG_4
AA23
VCC_AXG_40
Y21 Y24
VCC_AXG_41
Y26
VCC_AXG_42
VCC_AXG_5
AA24
VCC_AXG_6
AA25 AB15
VCC_AXG_7 VCC_AXG_8
AB20
VCC_AXG_9
AB23
VCC_AXG_NCTF_1
VCC_AXG_29
AL15
VCC_AXG_3
AA21
AM14
VCC_AXG_30 VCC_AXG_31
AM15
VCC_AXG_32
AN14
VCC_AXG_33
T14
VCC_AXG_34
T16
VCC_AXG_35
T17 U14
VCC_AXG_36
U15
VCC_AXG_37
V15
AE24
VCC_AXG_2
AA20
VCC_AXG_20
AE25
VCC_AXG_21
AF15
VCC_AXG_22
AF20
VCC_AXG_23
AG15
VCC_AXG_24
AG21 AH15
VCC_AXG_25 VCC_AXG_26
AH20
VCC_AXG_27
AJ15
VCC_AXG_28
AJ21
H24
VCC_AXG_1
AA15
VCC_AXG_10
AB25
VCC_AXG_11
AC20
VCC_AXG_12
AC21
VCC_AXG_13
AC23
VCC_AXG_14
AC24
VCC_AXG_15
AE15 AE20
VCC_AXG_16 VCC_AXG_17
AE21
VCC_AXG_18
AE23
VCC_AXG_19
RSVD_9
AY21
G36
SDVO_CTRLCLK
SDVO_CTRLDATA
E36
T20
THERMTRIP#
B12
TSATN#
TVA_DAC
F25
TVB_DAC
H25
TVC_DAC
K25
TV_DCONSEL_0
C31
TV_DCONSEL_1
E32
TV_RTN
N36
RSVD_2
AH12
RSVD_20
R33
RSVD_21
T24
RSVD_22
T33
RSVD_3
AH13
RSVD_4
AH9
RSVD_5
AK34
RSVD_6
AL34
AM35
RSVD_7
AN35
RSVD_8
AT11
RSVD_1
AH10
RSVD_10
B2
B31
RSVD_11 RSVD_12
BF18
RSVD_13
BF23
RSVD_14
BG23
RSVD_15
BH18
K12
RSVD_16 RSVD_17
M1
M36
RSVD_18 RSVD_19
PEG_TX_5
R47 N37
PEG_TX_6
T39
PEG_TX_7 PEG_TX_8
U36 U39
PEG_TX_9
B7
PM_DPRSTP#
PM_EXT_TS#_0
N33
P32
PM_EXT_TS#_1
R29
PM_SYNC#
AT40
PWROK
RSTIN#
J42 L46
PEG_TX_1
Y39
PEG_TX_10 PEG_TX_11
Y46
PEG_TX_12
AA36 AA39
PEG_TX_13
AD42
PEG_TX_14 PEG_TX_15
AD46
M48
PEG_TX_2
M39
PEG_TX_3
M43
PEG_TX_4
AA40
PEG_TX#_14
AD43 AC46
PEG_TX#_15
M47
PEG_TX#_2
M40
PEG_TX#_3
M42
PEG_TX#_4
R48
PEG_TX#_5 PEG_TX#_6
N38 T40
PEG_TX#_7
U37
PEG_TX#_8
U40
PEG_TX#_9
PEG_TX_0
PEG_RX_5
P47 N43
PEG_RX_6
T42
PEG_RX_7 PEG_RX_8
U42 Y42
PEG_RX_9
J41
PEG_TX#_0
M46
PEG_TX#_1
Y40
PEG_TX#_10
AA46
PEG_TX#_11 PEG_TX#_12
AA37
PEG_TX#_13
H43 J44
PEG_RX_1
W47
PEG_RX_10
Y37
PEG_RX_11 PEG_RX_12
AA42 AD36
PEG_RX_13
AC48
PEG_RX_14
AD40
PEG_RX_15
L43
PEG_RX_2
L41
PEG_RX_3
N40
PEG_RX_4
AD37
PEG_RX#_14
AC47 AD39
PEG_RX#_15
L44
PEG_RX#_2 PEG_RX#_3
L40 N41
PEG_RX#_4
P48
PEG_RX#_5
N44
PEG_RX#_6
T43
PEG_RX#_7
U43
PEG_RX#_8
Y43
PEG_RX#_9
PEG_RX_0
B47
NC_9
PEG_CLK
F43
E43
PEG_CLK#
T37
PEG_COMPI
PEG_COMPO
T36
H44
PEG_RX#_0
J46
PEG_RX#_1
Y48
PEG_RX#_10
Y36
PEG_RX#_11
AA43
PEG_RX#_12 PEG_RX#_13
NC_38
D47
NC_39
NC_4
A47
E1
NC_40
E48
NC_41 NC_42
F1
F48
NC_43
NC_5
A5
NC_6
A6
NC_7
B4
NC_8
B45
NC_28
BH43
NC_29
NC_3
A46
NC_30
BH44
NC_31
BH46 BH47
NC_32
BH5
NC_33
BH6
NC_34
C3
NC_35
C46
NC_36
C48
NC_37
D2
NC_19
BF46
NC_2
A44
BF48
NC_20
BG1
NC_21
BG2
NC_22
BG4
NC_23
BG45
NC_24 NC_25
BG47 BG48
NC_26 NC_27
BH2 BH3
M29
NC_1
A43
NC_10
B48
NC_11
BC1
NC_12
BC48
BD1
NC_13 NC_14
BD48
NC_15
BE2
NC_16
BE47
BF1
NC_17
BF3
NC_18
LVDSB_DATA_3
LVDS_IBG
C44
B43
LVDS_VBG
LVDS_VREFH
E37
LVDS_VREFL
E38
L_BKLT_CTRL
L32
L_BKLT_EN
G32
L_CTRL_CLK
M32
L_CTRL_DATA
M33
K33
L_DDC_CLK
L_DDC_DATA
J33
L_VDD_EN
B40
LVDSA_DATA_3
A37
LVDSB_CLK
LVDSB_CLK#
B37
A41
LVDSB_DATA#_0
H38
LVDSB_DATA#_1
G37
LVDSB_DATA#_2
LVDSB_DATA#_3
J37
B42
LVDSB_DATA_0
LVDSB_DATA_1
G38
F37
LVDSB_DATA_2
K37
A28
H36
ICH_SYNC#
C40
LVDSA_CLK
C41
LVDSA_CLK#
H47
LVDSA_DATA#_0
E46
LVDSA_DATA#_1
LVDSA_DATA#_2
G40
A40
LVDSA_DATA#_3
H48
LVDSA_DATA_0
LVDSA_DATA_1
D45
F40
LVDSA_DATA_2
GFX_VID_0
B33
B32
GFX_VID_1
GFX_VID_2
G33
F33
GFX_VID_3
E33
GFX_VID_4
GFX_VR_EN
C34
B28
HDA_BCLK
B30
HDA_RST#
B29
HDA_SDI
HDA_SDO
C29
HDA_SYNC
DMI_TXN_2
AE46
DMI_TXN_3
AH42
AD35
DMI_TXP_0
DMI_TXP_1
AE44
DMI_TXP_2
AF46
DMI_TXP_3
AH43
DPLL_REF_CLK
B38
A38
DPLL_REF_CLK#
DPLL_REF_SSCLK
E41
DPLL_REF_SSCLK#
F41
R32
DPRSLPVR
DDPC_CTRLDATA
DMI_RXN_0
AE41
DMI_RXN_1
AE37
DMI_RXN_2
AE47
DMI_RXN_3
AH39
AE40
DMI_RXP_0
DMI_RXP_1
AE38
DMI_RXP_2
AE48
DMI_RXP_3
AH40
DMI_TXN_0
AE35
DMI_TXN_1
AE43
CRT_BLUE
E28
CRT_DDC_CLK
H32
CRT_DDC_DATA
J32
CRT_GREEN
G28
CRT_HSYNC
J29
G29
CRT_IRTN
CRT_RED
J28
CRT_TVO_IREF
E29
CRT_VSYNC
L29
DDPC_CTRLCLK
N28
M28
K36
CLKREQ#
CL_CLK
AH37
AH36
CL_DATA
AN36
CL_PWROK
CL_RST#
AJ35
AH34
CL_VREF
7
37-C3,39-B3
30-A4,35-B3
19-D4,26-C1
U2-2
EB88CTPM
0904-002376
1%
100
R543
43
11-B4,54-B2
27-D1
27-D1
0
14
27-C1,55-A4
0 3
nostuff
15
P1.05V
50V
C543
0.1nF
P3.3V
7 11
27-D1
14
1
7-C4,27-B3
39-C4,54-B3
13
11-B1
7-A4,9-C4,25-B1
9
27-D1
27-C1,55-B4
1062 5
P1.05V
R631
49.9 1%
14 1
55-B4 27-C3,49-C4
10V
C47
100nF
10V
27-D1
C92
100nF
100nF
C71
10V
C73
100nF
10V
6
10V
nostuff
0.1nF
C928
50V
7
100nF
C63
10K
R630
1%
10V
100nF
C56
10V
C54
100nF
3
P3.3V
R629
10K
11-B1
0
12 15
10V
C597
100nF
27-D1
8 114 7
27-D1
R578
0
27-C1,55-D3
39-C4,54-B3
7-C4,27-B3
9-D4,25-C149-C4,54-A2
nostuff
12
27-D1
27-D1
27-B3,55-D4
10V
27-C1
8
27-C1
C70
100nF
C62
100nF
10V
27-D1
1%
27-C1
R632
499
0 3
100nF
C46
10V
C69
100nF
10V
19-B4
19-C4
100nF
C68
10V
C61
100nF
10V
19-C4
100nF
C60
10V
10V
27-D1
27-D1
100nF
C52
10V
C53
100nF
MCH1_CL_VREF_MN
MCH3_CLKREQ#
CLK1_MCH3GPLL#
CLK1_MCH3GPLL
CHP3_CL_RST_0#
CHP3_CL_CLK_0
CHP3_CL_DATA_0
KBC3_PWRGD
27-D3,55-B4
27-C1
MCH1_COMPIO_R_MN
MCH3_ICHSYNC#
CHP3_DPRSLPVR
DMI1_RXP_3
DMI1_RXP_2
DMI1_RXP_1
DMI1_RXP_0
DMI1_RXN_3
DMI1_RXN_2
DMI1_RXN_1
DMI1_RXN_0
DMI1_TXP_3
DMI1_TXP_2
DMI1_TXP_1
DMI1_TXP_0
DMI1_TXN_3
DMI1_TXN_2
DMI1_TXN_1
DMI1_TXN_0
CPU1_THRMTRIP#
PLT3_RST#_R_MN
KBC3_PWRGD
CHP3_PM_SYNC#
CPU1_DPRSTP#
MCH3_CLKREQ#
PLT3_RST#
PEG1_RXN(15:0)
PEG1_RXP(15:0)
PEG1_TXN(15:0) PEG1_TXP(15:0)
Confidential
Confidential
Confidential
Samsung
Samsung
Samsung
3 OF 5
SYSTEM MEMORY A
SYSTEM MEMORY A
SYSTEM MEMORY B
SYSTEM MEMORY B
B
3
PART NO.
MODULE CODE
1
APPROVAL
4
LAST EDIT
DEV. STEP
DRAW
REV
D
3
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
THIS DOCUMENT CONTAINS CONFIDENTIAL
ELECTRONICS
PAGE
SAMSUNG
D
C
10nF->100nF
2
2
4
OF
DDR3 : Connect to VRM.
DDR2 : GND
DATE
A
Jun PARK
YM AN
HJ KIM
9/23/2008
PR
1.0
August 07, 2009 15:14:35 PM
BA41-
14 55
CANNES-L_EXT
MCH_CANTIGA_GM_DDR2
CANTIGA (2/5)
SM_RCOMP# : 80 ohm to VSS
SAMSUNG ELECTRONICS CO’S PROPERTY.
CHECK
TITLE
1
SM_RCOMP : 80 ohm to P1.8V_AUX
EXCEPT AS AUTHORIZED BY SAMSUNG.
Cantiga
PROPRIETARY INFORMATION THAT IS
B
A
Route as short as possible
PLACE EACH CAP NEAR AV42 PIN
SM_PWROK
DDR2
C
SAMSUNG PROPRIETARY
3637
5 6
18-C4
18-C4
2728
17-C3,18-C3 46-B2,54-B4
17
17-C4
4
R584
1K
16
1%
18-C1
1K
R588
1%
1 2
18-C1
14
1%
R585
80.6
C648
18-B4
nostuff
10V
100nF
2
10V
nostuff
C649
100nF
5
1 2
1
5
3 4
1
17-C2
17-C2
4
12
13
17-B4
1 2
18-B4
2425
1 2
0
0
17-C4
5 6
5051
17-B4
1
3
14
44
17-C4
6061
0
1 2
1%
R42
499
31
5 6
3.01K
R586
1%
13
63
7
0
59
10
4
1314
0
5152
1812 49
2
C607
2200nF-X5R 10V
100nF
C606
10V
nostuff
6
1 2
5 6
5
3536
3 4
33
11
12
6
17-C3,18-C3 46-B2,54-B4
32 5455
4
7
30 4546
47
5556
1
454640 41
18-C4
18-C4
1516
7
0
40
3435
2
30
4
39 60
6263
1
2223
8
3
3
7
0
15
18-D1
1 19
1314
R587
1%
4
8 9
80.6
4950
3
3839
17-C2
17-C2
32
11
445
5859
31 6162
17-B4
29 382526
19
4142
43
23
2
534748
42
22
3
18-B4
18-A4
333412
4
2 18
2627
17-B4
17-B4
6 7 179
0
18-B4
2
0
54
7
0
18-B4
20
17-D2
18-D4
3 4
7
0
17-D4
10V
C605
100nF
17-C2
18-C1
2829
6
8
18-B4
18-B4
9
43
17-C2
7
6 7 53
18-C1
17-C2
52
3724
5 6
11 21
0
3
1011
10 5758
18-C1
57
5
17-B4
3
SM_PWROK
SM_RCOMP
BG22 BH21
SM_RCOMP#
BF28
SM_RCOMP_V_OH
BH28
SM_RCOMP_V_OL
BF17
SM_REXT
AV42
SM_VREF
56
BB28
SB_MA_5
AU28
SB_MA_6
AW28
SB_MA_7
AT33
SB_MA_8
BD33
SB_MA_9
BF15
SB_ODT_0
AY13
SB_ODT_1
AU17
SB_RAS#
BF14
SB_WE#
BC36
SM_DRAMRST#
AR36
SB_DQ_9
AV17
SB_MA_0
BA25
SB_MA_1
BB16
SB_MA_10
AW33
SB_MA_11
AY33
SB_MA_12
BH15
SB_MA_13
AU33
SB_MA_14
BC25
SB_MA_2
AU25
SB_MA_3
AW25
SB_MA_4
AL2
SB_DQ_57
AJ1
SB_DQ_58
AH1
SB_DQ_59
AM48
SB_DQ_6
AM2
SB_DQ_60
AM3
SB_DQ_61
AH3
SB_DQ_62
AJ3
SB_DQ_63
AP48
SB_DQ_7
AU47
SB_DQ_8
AU46
BD3
SB_DQ_47
AV2
SB_DQ_48
AU3
SB_DQ_49
AJ48
SB_DQ_5
AR3
SB_DQ_50
AN2
SB_DQ_51
AY2
SB_DQ_52
AV1
SB_DQ_53
AP3
SB_DQ_54
AR1
SB_DQ_55
AL1
SB_DQ_56
SB_DQ_37
BF8
SB_DQ_38
BG7
SB_DQ_39
AJ46
SB_DQ_4
BC5
SB_DQ_40
BC6
SB_DQ_41
AY3
SB_DQ_42
AY1
SB_DQ_43
BF6
SB_DQ_44
BF5
SB_DQ_45
BA1
SB_DQ_46
BH40
SB_DQ_28
BG39
SB_DQ_29
AP46
SB_DQ_3
BG34
SB_DQ_30
BH34
SB_DQ_31
BH14
SB_DQ_32
BG12
SB_DQ_33
BH11
SB_DQ_34
BG8
SB_DQ_35
BH12
SB_DQ_36
BF11
BG43
SB_DQ_18
BF43
SB_DQ_19
AP47
SB_DQ_2
BE45
SB_DQ_20
BC41
SB_DQ_21
BF40
SB_DQ_22
BF41
SB_DQ_23
BG38
SB_DQ_24
BF38
SB_DQ_25
BH35
SB_DQ_26
BG35
SB_DQ_27
SB_DQS_7
AK47
SB_DQ_0
AH46
SB_DQ_1
BA48
SB_DQ_10
AY48
SB_DQ_11
AT47
SB_DQ_12
AR47
SB_DQ_13
BA47
SB_DQ_14
BC47
SB_DQ_15
BC46
SB_DQ_16
BC44
SB_DQ_17
SB_DQS#_4
BC2
SB_DQS#_5
AT2
SB_DQS#_6
AN5
SB_DQS#_7
AL47
SB_DQS_0
AV48
SB_DQS_1
BG41
SB_DQS_2
BG37
SB_DQS_3
BH9
SB_DQS_4
BB2
SB_DQS_5
AU1
SB_DQS_6
AN6
BD40
SB_DM_2
BF35
SB_DM_3
BG11
SB_DM_4
BA3
SB_DM_5
AP1
SB_DM_6
AK2
SB_DM_7
AL46
SB_DQS#_0
AV47
SB_DQS#_1
BH41
SB_DQS#_2
BH37
SB_DQS#_3
BG9
SB_CAS#
AU24
SB_CK#_0
AV20
SB_CK#_1
AY36
SB_CKE_0
BB36
SB_CKE_1
AV24
SB_CK_0
AU20
SB_CK_1
AV16
SB_CS#_0
AR13
SB_CS#_1
AM47
SB_DM_0
AY47
SB_DM_1
BG27
SA_MA_7
BF25
SA_MA_8
AW24
SA_MA_9
BD17
SA_ODT_0
AY17
SA_ODT_1
BB20
SA_RAS#
AY20
SA_WE#
BC16
SB_BS_0
BB17
SB_BS_1
BB33
SB_BS_2
BG16
BC24
SA_MA_1
BC21
SA_MA_10
BG26
SA_MA_11
BH26
SA_MA_12
BH17
SA_MA_13
AY25
SA_MA_14
BG24
SA_MA_2
BH24
SA_MA_3
BG25
SA_MA_4
BA24
SA_MA_5
BD24
SA_MA_6
SA_DQ_58
AJ8
SA_DQ_59
AM44
SA_DQ_6
AN12
SA_DQ_60
AM13
SA_DQ_61
AJ11
SA_DQ_62
AJ12
SA_DQ_63
AM42
SA_DQ_7
AN43
SA_DQ_8
AN44
SA_DQ_9
BA21
SA_MA_0
AV7
SA_DQ_49
AJ40
SA_DQ_5
AT9
SA_DQ_50
AN8
SA_DQ_51
AU5
SA_DQ_52
AU6
SA_DQ_53
AT5
SA_DQ_54
AN10
SA_DQ_55
AM11
SA_DQ_56
AM5
SA_DQ_57
AJ9
BC12
SA_DQ_39
AJ36
SA_DQ_4
BB9
SA_DQ_40
BA9
SA_DQ_41
AU10
SA_DQ_42
AV9
SA_DQ_43
BA11
SA_DQ_44
BD9
SA_DQ_45
AY8
SA_DQ_46
BA6
SA_DQ_47
AV5
SA_DQ_48
SA_DQ_29
AM38
SA_DQ_3
AV36
SA_DQ_30
AW36
SA_DQ_31
BD13
SA_DQ_32
AU11
SA_DQ_33
BC11
SA_DQ_34
BA12
SA_DQ_35
AU13
SA_DQ_36
AV13
SA_DQ_37
BD12
SA_DQ_38
AN38
SA_DQ_2
AV41
SA_DQ_20
AY43
SA_DQ_21
BB41
SA_DQ_22
BC40
SA_DQ_23
AY37
SA_DQ_24
BD38
SA_DQ_25
AV37
SA_DQ_26
AT36
SA_DQ_27
AY38
SA_DQ_28
BB38
AJ41
SA_DQ_1
AU40
SA_DQ_10
AT38
SA_DQ_11
AN41
SA_DQ_12
AN39
SA_DQ_13
AU44
SA_DQ_14
AU42
SA_DQ_15
AV39
SA_DQ_16
AY44
SA_DQ_17
BA40
SA_DQ_18
BD43
SA_DQ_19
SA_DQS#_6
AM8
SA_DQS#_7
AJ44
SA_DQS_0
AT44
SA_DQS_1
BA43
SA_DQS_2
BC37
SA_DQS_3
AW12
SA_DQS_4
BC8
SA_DQS_5
AU8
SA_DQS_6
AM7
SA_DQS_7
AJ38
SA_DQ_0
BB12
SA_DM_4
AY6
SA_DM_5
AT7
SA_DM_6
AJ5
SA_DM_7
AJ43
SA_DQS#_0
AT43
SA_DQS#_1
BA44
SA_DQS#_2
BD37
SA_DQS#_3
AY12
SA_DQS#_4
BD8
SA_DQS#_5
AU9
AR21
SA_CK#_1
BC28
SA_CKE_0
AY28
SA_CKE_1
AP24
SA_CK_0
AT21
SA_CK_1
BA17
SA_CS#_0
AY16
SA_CS#_1
AM37
SA_DM_0
AT41
SA_DM_1
AY41
SA_DM_2
AU39
SA_DM_3
BD21
SA_BS_0
BG18
SA_BS_1
AT25
SA_BS_2
BD20
SA_CAS#
AR24
SA_CK#_0
8
P1.8V_AUX
P1.8V_AUX
0904-002376
EB88CTPM
U2-3
2021
7
9 10
48
17-C4
2200nF-X5R
C609
MEM1_ODT3
CLK1_MCLK3#
CLK1_MCLK3
MEM1_ODT1
MEM1_CKE2
MEM1_ODT0
MEM1_VREF
MEM1_VREF
MCH1_SM_RCOMP#_MN
MCH1_SM_RCOMP_MN
MCH1_SM_RCOMP_V_OH_MN
MEM1_SM_REXT_MN
MCH1_SM_RCOMP_V_OL_MN
nostuff
10V
MEM1_ABS(2:0)
MEM1_BDQ(63:0)
MEM1_ADQ(63:0)
MEM1_ARAS#
MEM1_ACAS#
MEM1_AWE#
MEM1_CS1#
MEM1_ADM(7:0)
MEM1_ADQS#(7:0)
MEM1_ADQS(7:0)
MEM1_AMA(14:0)
MEM1_BBS(2:0)
MEM1_BRAS#
MEM1_BCAS# MEM1_BWE#
MEM1_BDM(7:0)
MEM1_BDQS#(7:0)
MEM1_BDQS(7:0)
MEM1_BMA(14:0)
MEM1_CS0#
MEM1_CKE0
MEM1_CS2#
MEM1_CKE1
MEM1_CS3#
CLK1_MCLK2#
MEM1_CKE3
CLK1_MCLK0#
CLK1_MCLK0
CLK1_MCLK1#
CLK1_MCLK1
MEM1_ODT2
CLK1_MCLK2
Samsung
Samsung
Samsung
Confidential
Confidential
Confidential
VCCA_SMVCCA_SM_CKVCCA_SM_CK_NCTF
VCC AXGCRT / TV POWERLVDS POWER
4 OF 5
VCC_SM
VCC HADVCC_HVPEG POWER
AXG SENSE
VCC_SM_CKVCC_SM_LF
VCC AXG
PLL POWER
2
A
D
SAMSUNG
Cantiga : 1.5V
2
APPROVAL
PAGE
SAMSUNG PROPRIETARY
DRAW
ELECTRONICS
TITLE
4
REV
MODULE CODE
2A routing
1
LAST EDIT
B
DEV. STEP
4
D
9/23/2008
PR
1.0
August 07, 2009 15:14:35 PM
BA41-
15 55
CANNES-L_EXT
MCH_CANTIGA_GM_DDR2
CANTIGA (3/5)
D:/users/mobile24/mentor/cannes-l_ext/Cannes-L-Ext_MAIN
CHECK
3
A
B
HDMI OPTION
OF
3
SAMSUNG ELECTRONICS CO’S PROPERTY.
DATE
C
THIS DOCUMENT CONTAINS CONFIDENTIAL
C
1
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
PART NO.
PROPRIETARY INFORMATION THAT IS
Jun PARK
YM AN
HJ KIM
P1.05V
10V
C677 100nF
16V470nF
C645
100nF
C596
10V
BA36
VCC_SM_NC_4
BB21
VCC_SM_NC_5
BB24
VCC_SM_NC_6
BD16
VCC_SM_NC_7
VCC_TX_LVDS
K47 AH14
VSS_AXG_SENSE
P1.05V
VCC_SM_CK_4
BH20
VCC_SM_LF_1
AM10
VCC_SM_LF_2
AM40
VCC_SM_LF_3
AV21
VCC_SM_LF_4
AV44
VCC_SM_LF_5
AY5
VCC_SM_LF_6
BA37
VCC_SM_LF_7
BB13
VCC_SM_NC_1
AT13
AW13
VCC_SM_NC_2
VCC_SM_NC_3
AW16
VCC_SM_34
VCC_SM_35
BH32
VCC_SM_4
AP32
VCC_SM_5
AP33
VCC_SM_6
AR29
VCC_SM_7
AR32
VCC_SM_8
AT29
VCC_SM_9
AT32
BF20
VCC_SM_CK_1
VCC_SM_CK_2
BF21
VCC_SM_CK_3
BG20
BD29
VCC_SM_25
BD32
VCC_SM_26
BF29
VCC_SM_27
BF31
VCC_SM_28
BF32
VCC_SM_29
BG29
VCC_SM_3
AP29
VCC_SM_30
BG30
VCC_SM_31
BG31
VCC_SM_32
BG32
VCC_SM_33
BH29
BH31
VCC_SM_15
AW32
VCC_SM_16
AY29
VCC_SM_17
AY32
VCC_SM_18
BA29
VCC_SM_19
BA32
VCC_SM_2
AN33
VCC_SM_20
BB29
VCC_SM_21
BB32
VCC_SM_22
BC29
VCC_SM_23
BC32
VCC_SM_24
U46
VCC_PEG_2
U47
VCC_PEG_3
U48
VCC_PEG_4
V47
VCC_PEG_5
V48
VCC_SM_1
AN32
VCC_SM_10
AU29
VCC_SM_11
AU32
AV29
VCC_SM_12
VCC_SM_13
AV32
VCC_SM_14
AW29
B22
VCC_AXF_3
AJ14
VCC_AXG_SENSE
AF48
VCC_DMI_1
AG47
VCC_DMI_2
AH47
VCC_DMI_3
AH48
VCC_DMI_4
A32
VCC_HDA
VCC_HV_1
A35
VCC_HV_2
B35 C35
VCC_HV_3
VCC_PEG_1
AM28
VCCA_SM_CK_NCTF_8
A24
VCCA_TV_DAC_1
B24
VCCA_TV_DAC_2
VCCD_HPLL
AF1
VCCD_LVDS_1
L37
VCCD_LVDS_2
M38
VCCD_PEG_PLL
AA47
VCCD_QDAC
L28
VCCD_TVDAC
M25
A21
VCC_AXF_1 VCC_AXF_2
B21
AN25
AN28
VCCA_SM_CK_3
AP25
VCCA_SM_CK_4
AP28
VCCA_SM_CK_5
AL23
VCCA_SM_CK_NCTF_1
AL24
VCCA_SM_CK_NCTF_2
AL25
VCCA_SM_CK_NCTF_3
AM23
VCCA_SM_CK_NCTF_4
AM24
VCCA_SM_CK_NCTF_5
AM25
VCCA_SM_CK_NCTF_6
VCCA_SM_CK_NCTF_7
AM26
VCCA_SM_1
AN17
VCCA_SM_2
AN20
VCCA_SM_3
AP16
VCCA_SM_4
AP17
VCCA_SM_5
AP20
VCCA_SM_6
AR16
VCCA_SM_7
AR17
VCCA_SM_8
AR20
VCCA_SM_9
AT16
VCCA_SM_CK_1
AN24
VCCA_SM_CK_2
VCCA_CRT_DAC_1
B27
VCCA_CRT_DAC_2
A26
VCCA_DAC_BG
A25
VCCA_DPLLA
F47
VCCA_DPLLB
L48
VCCA_HPLL
AD1
VCCA_LVDS
J48
VCCA_MPLL
AE1
VCCA_PEG_BG
AD48
VCCA_PEG_PLL
AA48
0904-002376
EB88CTPM
U2-4
1000nF-X5R 6.3V
P1.5V
C650
SHORT1
INSTPAR
C561
100nF 10V
P1.05V_PEG
B504 BLM18PG181SN1
C542
6.3V
10000nF-X5R
C600
10000nF-X5R
6.3V
100nF
C558
P1.05V
P1.05V
10V
10V
C78
4700nF-Y5V
6.3V
6.3V
10000nF-X5R
C559
P3.3V
C610
10000nF-X5R
nostuff
EC3 220uF
2.5V AD
1000nF-X5R
C647
6.3V
50V
C591
1nF
10V
C541
100nF
AD
2.5V
220uF
EC505
P1.05V
nostuff
1000nF-X5R
C560
6.3V
R582
1
100nF
C74
10V
1
R555
INSTPAR
SHORT2
6.3V
C593
6.3V
C587
1000nF-X5R
10000nF-X5R
B506
P1.8V_AUX
10000nF-X5R
C608
BLM18PG181SN1
10V
C601
220nF
6.3V
25V
10nF
C589
P1.8V_AUX
P1.05V
6.3V
10000nF-X5R
C586
0
R553
nostuff
nostuff
0
R554
nostuff
10V
C603
100nF
6.3V
C566
10000nF-X5R
10V
C538
100nF
P1.05V
3
12
220nF
C544
10V
30V
BAT54A
D3
10000nF-X5R
6.3V
C539
10000nF-X5R
C557
6.3V
P1.5V
1
R542
B505 BLM18PG181SN1
100nF
C39
10V
22000nF-X5R
C76
6.3V
20%
P1.05V
100nF
C540
10V
100nF
C602
10V
P1.05V
nostuff
EC506 220uF
2.5V AD
20%
6.3V
R541
1
nostuff
C599
22000nF-X5R
100nF
C595
10V
10V
C564 100nF
100nF
C588
10V
2200nF-X5R
1%
12.1
R43
MCH1_VSS_AXG_SENSE_MN
MCH1_VCC_AXG_SENSE_MN
MCH1_P1.05V_MPLL_R_MN
P1.05V_PEG
nostuff
10V
C598
MCH1_P1.05V_MPLL_MN
MCH1_P1.8VAUX_SM_CK_MN
MCH1_P3.3V_HV_R_MN
MCH1_P1.05V_PEG_PLL_MN
Samsung
Samsung
Samsung
Confidential
Confidential
Confidential
5 OF 5
VSS
VSS
VSS
VSS
VSS
VSS SCB VSS NCTF VSS
TV & LVDS VSS
TITLEDATE
4
PAGE
C
2
SAMSUNG
THIS DOCUMENT CONTAINS CONFIDENTIAL
REV
1
ELECTRONICS
A
B
EXCEPT AS AUTHORIZED BY SAMSUNG.
PART NO.
C
4
PROPRIETARY INFORMATION THAT IS
3
A
D
LAST EDIT
SAMSUNG PROPRIETARY
1
D
B
3
DEV. STEPCHECK
SAMSUNG ELECTRONICS CO’S PROPERTY.
Jun PARK
YM AN
HJ KIM
9/23/2008
PR
1.0
August 07, 2009 15:14:35 PM
BA41-
16 55
CANNES-L_EXT
MCH_CANTIGA_GM_DDR2
CANTIGA (4/5)
D:/users/mobile24/mentor/cannes-l_ext/Cannes-L-Ext_MAIN
APPROVAL
DRAW
MODULE CODE
OF
2
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
AL17
VSS_NCTF_9
A3
VSS_SCB_1
A48
VSS_SCB_2
BH1
VSS_SCB_3
BH48
VSS_SCB_4C1VSS_SCB_5
VSS_NCTF_13
U26
VSS_NCTF_14
V20
VSS_NCTF_15
V32
VSS_NCTF_16
AB29
VSS_NCTF_2
AB32
VSS_NCTF_3
AC19
VSS_NCTF_4
AF29
VSS_NCTF_5
AF32
VSS_NCTF_6
AJ17
VSS_NCTF_7
AJ30
VSS_NCTF_8
AN13
VSS_94
AN16
VSS_95
AN21
VSS_96
AN29
VSS_97
AN37
VSS_98
AN40
VSS_99
AA17
VSS_NCTF_1
AL20
VSS_NCTF_10
AM29
VSS_NCTF_11
U17
VSS_NCTF_12
U23
AM12
VSS_84
AM34
VSS_85
AM36
VSS_86
AM39
VSS_87
AM41
VSS_88
AM43
VSS_89
AA1
VSS_9
AM46
VSS_90
VSS_91
AM6
AM9
VSS_92
AN11
VSS_93
VSS_74
AJ39
VSS_75
AJ42
VSS_76
AJ47
VSS_77
AJ7
VSS_78
AK15
VSS_79
A34
VSS_8
AL3
VSS_80
AL33
VSS_81
AL48
VSS_82
AM1
VSS_83
AH8
VSS_65
AJ10
VSS_66
AJ13
VSS_67
AJ2
VSS_68
AJ20
VSS_69
A31
VSS_7
AJ24
VSS_70
AJ25
VSS_71
AJ28
VSS_72
AJ34
VSS_73
AJ37
AH2
VSS_55
AH21
VSS_56
AH24
VSS_57
AH26
VSS_58
AH33
VSS_59
A29
VSS_6
AH35
VSS_60
AH38
VSS_61 VSS_62
AH41 AH44
VSS_63
AH5
VSS_64
VSS_45
AF21
VSS_46
AF24
VSS_47
AF26
VSS_48
AF34
VSS_49
A23
VSS_5
AF47
VSS_50
AG20
VSS_51
AG23
VSS_52
AG28
VSS_53
AH11
VSS_54
AE10
VSS_36
AE13
VSS_37
AE2
VSS_38
AE28
VSS_39
A20
VSS_4
AE34
VSS_40
AE36
VSS_41
AE39
VSS_42
AE42
VSS_43
AE7
VSS_44
AF2
VSS_340
Y25
VSS_341
Y28
VSS_342
Y35
VSS_343
Y38
VSS_344
Y41
VSS_345
Y44
VSS_346
Y47
VSS_347
Y5
VSS_348
Y8
AJ6
VSS_349
AD9
VSS_35
VSS_330
U38
VSS_331
U41
VSS_332
U44
VSS_333
V46
VSS_334
W15
VSS_335
W34
VSS_336
Y11
VSS_337
Y2
VSS_338
Y20
VSS_339
Y23
AD5
VSS_34 VSS_321
T38
VSS_322
T41
VSS_323
T44
VSS_324
T47
VSS_325
U24
VSS_326
U25
VSS_327
U28
VSS_328
U29
VSS_329
U35
AD47
VSS_33
P33
VSS_311
P36
VSS_312 VSS_313
P46
VSS_314
R17
VSS_315
R21
VSS_316
R24
VSS_317
R3
VSS_318
R46
VSS_319
T29AD44
VSS_32
VSS_320
T35
VSS_301
N29
VSS_302
N32
VSS_303
N39
VSS_304
N42
VSS_305
N47
VSS_306
N7
VSS_307
P1
VSS_308
P28
VSS_309
AD41
VSS_31
VSS_310
P3
VSS_292
M21
VSS_293
M41
VSS_294
M44
VSS_295
M6
VSS_296
N11
VSS_297
N13
VSS_298
N16
VSS_299
A18
VSS_3
AD38
VSS_30
N20
VSS_300
N25
L33
VSS_283
L36
VSS_284
L39
VSS_285
L42
VSS_286
L47
VSS_287
L5
VSS_288
L8
VSS_289
AD2
VSS_29
M10
VSS_290
M17
VSS_291
M2
VSS_273
K20
VSS_274
K24
VSS_275
K28
VSS_276
K29
VSS_277
K32
VSS_278
L12
VSS_279
AD12
VSS_28
L13
VSS_280
L24
VSS_281 VSS_282
L25
VSS_263
J21
VSS_264
J24
VSS_265
J25
VSS_266
J36
VSS_267
J38
VSS_268
J43
VSS_269
AC25
VSS_27
J5
VSS_270
J7
VSS_271
K16
VSS_272
K2
H1
VSS_254
H17
VSS_255
H28
VSS_256
H29
VSS_257
H33
VSS_258
H37
VSS_259
AC2
VSS_26
H40
VSS_260
H46
VSS_261
H5
VSS_262
J12
VSS_244
G11
VSS_245
G13
VSS_246
G16
VSS_247
G21
VSS_248
G24
VSS_249
AC15
VSS_25
G25
VSS_250
G41
VSS_251
G47
VSS_252 VSS_253
G9
VSS_234
F24
VSS_235
F28
VSS_236
F29
VSS_237F3VSS_238
F32
VSS_239
AB47
VSS_24
F36
VSS_240
F38
VSS_241
F44
VSS_242
F46
VSS_243
F5
C38
VSS_225
C43
VSS_226C6VSS_227
E13
VSS_228
E16
VSS_229
AB33
VSS_23
E24
VSS_230
E25
VSS_231
E40
VSS_232E8VSS_233
F20
VSS_215
BH8
VSS_216
C11
VSS_217
C14
VSS_218
C17
VSS_219
AB28
VSS_22
C20
VSS_220
C26
VSS_221
C28
VSS_222
C32
VSS_223
VSS_224
C37
VSS_205
BG21
VSS_206
BG28
VSS_207
BG33
VSS_208
BG36
VSS_209
AB26
VSS_21
BG40
VSS_210
BG42
VSS_211
BG6
VSS_212
BH23
VSS_213
BH25
VSS_214
BH38
BF37
VSS_197
BF44
VSS_198
BF9
VSS_199
A15
VSS_2
AB24
VSS_20
BG10
VSS_200
BG13
VSS_201
BG14
VSS_202
BG15
VSS_203
BG17
VSS_204
BG19
VSS_187
BD36
VSS_188
BD41
VSS_189
AB21
VSS_19
BD46
VSS_190
BD6
VSS_191
BE4
VSS_192
BF12
VSS_193
BF24
VSS_194
BF26
VSS_195 VSS_196
BF34
VSS_177
BC17
VSS_178
BC20
VSS_179
AA7
VSS_18
BC3
VSS_180
BC33
VSS_181
BC38
VSS_182
BC43
VSS_183
BC9
VSS_184
BD11
VSS_185
BD25
VSS_186
BD28
BA38
VSS_168
BA46
VSS_169
AA44
VSS_17
BA5
VSS_170
BB11
VSS_171
BB25
VSS_172
BB37
VSS_173
BB40
VSS_174
BB47
VSS_175
BB8
VSS_176
BC13
VSS_158
B41
VSS_159
AA41
VSS_16
B8
VSS_160
B9
VSS_161
BA13
VSS_162
BA16
VSS_163
BA2
VSS_164
BA20
VSS_165
BA28
VSS_166 VSS_167
BA33
VSS_148
AY11
VSS_149
AA38
VSS_15
AY24
VSS_150
AY42
VSS_151
AY46
VSS_152
AY7
VSS_153
B23
VSS_154
B26
VSS_155
B34
VSS_156
B36
VSS_157
B39
AV43
VSS_139
AA35
VSS_14
AV46
VSS_140
AV6
VSS_141
AV8
VSS_142
AW17
VSS_143
AW2
VSS_144
AW20
VSS_145
AW21
VSS_146
AW37
VSS_147
AW47
VSS_129
AA26
VSS_13
AU48
VSS_130
AU7
VSS_131
AV10
VSS_132
AV12
VSS_133
AV25
VSS_134
AV28
VSS_135
AV3
VSS_136
AV33
VSS_137 VSS_138
AV40
VSS_119
AA14
VSS_12
AT42
VSS_120
AT6
VSS_121
AT8
VSS_122
AU16
VSS_123
AU2
VSS_124
AU21
VSS_125
AU36
VSS_126
AU38
VSS_127
AU41
VSS_128
AU43
AA12
VSS_11
AR46
VSS_110
AR48
VSS_111
AT10
VSS_112
AT12
VSS_113
AT17
VSS_114
AT20
VSS_115
AT24
VSS_116
AT28
VSS_117
AT37
VSS_118
AT39
VSS_10
AN42
VSS_100
AN47
VSS_101
AN7
VSS_102
AN9
VSS_103
AP2
VSS_104
AP21
VSS_105
AR2
VSS_106
AR25
VSS_107
AR28
VSS_108
VSS_109
AR33
B25
VSSA_DAC_BG
J47
VSSA_LVDS
A12
VSS_1
AA10
0904-002376
EB88CTPM
U2-5
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Confidential
Confidential
Confidential
2/2
1/2
DEV. STEP
TITLE
SAMSUNG
EXCEPT AS AUTHORIZED BY SAMSUNG.
C
SAMSUNG ELECTRONICS CO’S PROPERTY.
Suyin : 3709-001502
Place one cap close to every 2 pull-up resistors terminated to P0.9V
PAGE
4
APPROVAL
2
DDR SO-DIMM #0
ME POWER RAIL UNDER ME ENABLE
1
LAST EDIT
A
B
D
B
Height : 5.2mm (Reverse)
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
DRAW
OF
C
PR
1.0
August 07, 2009 15:14:35 PM
BA41-
17 55
CANNES-L_EXT
MCH_CANTIGA_GM_DDR2
CANTIGA (5/5)
D:/users/mobile24/mentor/cannes-l_ext/Cannes-L-Ext_MAIN
1
PROPRIETARY INFORMATION THAT IS
ME POWER RAIL UNDER ME ENABLE
DATE
3
CHECK
REV
A
Place one cap close to every 2 pull-up resistors terminated to P0.9V
Place near SO-DIMM0
ELECTRONICS
2
D
4 3
THIS DOCUMENT CONTAINS CONFIDENTIAL
MODULE CODE
Tyco/Foxcn : 3709-001341
SAMSUNG PROPRIETARY
PART NO.
7
Jun PARK
YM AN
HJ KIM
9/23/2008
13
10V
C617
100nF
7
62
55
15
R556
56
0.047nF
nostuff
5
2200nF-X5R
1
50V
C565
10V
C613
48
0.047nF
C604
50V
5
12
11
14-C4
3
14-D4
23
56
R561
nostuff
11-B4,18-B4 27-B4,54-B4
2200nF-X5R
10V
C719
14-D4,17-C2
10V
C615
100nF
33
21
63
14-B4,17-C4
0
9
1%
10K
R523
2200nF-X5R
C614
10V
R563
56
C622
10V
14-B4,17-C4
2200nF-X5R
61
10V
C621
2200nF-X5R
14-B4,17-B4
49 50
56
5
C562
50V
nostuff
R589
4
44
0.047nF
42
6
11
R599
56
22
P1.8V_AUX
14-D4,17-C2
30 31
1
14-B4,17-C4
56
R594
10V
C619
100nF
2
0
14-B4,17-C2
R604
56
57
8
5
50V
C563
0.047nF
2 3
P1.8V_AUX
1
56
7
52
56
R564
14-D4
29
9
6
100nF
C570
10V
14-B4,17-C2
0
5
56
3
R559
56
R591
13
34
100nF
C618
10V
14-B4,17-C2
56
R590
14-B4,17-C4
14-D4,17-C4
56
R560
0
54
14-D1,18-C3 46-B2,54-B4
10V
C624
100nF
100nF
C616
10V
14-B4,17-C4
R597
56
17
R557
56
10V
C568
2200nF-X5R
39
43
12
220uF
EC502
2.5V AD
nostuff
R596
56
40
P3.3V
37
0
9
32
3
25
2
14-B4
P0.9V
16
4
58 59
6
6
7
2
14-B4,17-C2
53
14
7
38
56
R592
100nF
C567
10V
8
36
10
7
11-B4,18-B4 27-B4,54-D4
14-D4,17-C4
100nF 10V
C525
56
4
R558
4
14-B4
14-B4
10V
C526
2200nF-X5R
nostuff
1
14-B4,17-C2
14
20
14-B4,17-C2
47
56
R600
C720
100nF
10V
1
R603
56
184
VSS7
78
VSS8
71
VSS9
24
1
156
VSS44
168
VSS45
2
VSS46
3
VSS47 VSS48
15 27
VSS49
12
VSS5
39
VSS50
149
VSS51
161
VSS52
28
VSS53
40
VSS54 VSS55
138 150
VSS56
162
VSS57
48
VSS6
183
VSS3
165
VSS30
171
VSS31
172
VSS32 VSS33
177 187
VSS34
178
VSS35
190
VSS36
9
VSS37
21
VSS38
33
VSS39
77
VSS4
VSS40
155 34
VSS41
132
VSS42
144
VSS43
8
VSS15
18
VSS16
24
VSS17
41
VSS18 VSS19
53
133
VSS2
42
VSS20
54
VSS21
59
VSS22
65
VSS23
60
VSS24
66
VSS25 VSS26
127 139
VSS27
128
VSS28
145
VSS29
111
VDD2
117
VDD3
96
VDD4
95
VDD5 VDD6
118
81
VDD7
82
VDD8
87
VDD9
199
VDDSPD
1
VREF
47
VSS1
72
VSS10 VSS11
121 122
VSS12
196
VSS13
193
VSS14
201
GND0
202
GND1
83
NC1
120
NC2
50
NC3
69
NC4
163
NCTEST
VDD1
112
103
VDD10
88
VDD11
104
VDD12
56
3709-001341
DDR2M_1-2 DDR2-SODIMM-200P-RVS
10V
C569
100nF
R605
18
56
R593
14-D3
14-B4,17-C2
4
11
35
10
14-B4,17-B4
41
100nF
C612
10V
10
6
56
R602
14-B4,17-C4
56
R595
5
3
26
60
14-C4,17-D4
14-B4,17-C2
P0.9V
19
P1.8V_AUX
27
6
46
14-B4,17-C2
R562
56
SA1
200
SCL
197
SDA
195
WE*
109
0
51
DQS*6
167
DQS*7
186
DQS0
13
DQS1
31
DQS2
51
DQS3
70
DQS4
131
DQS5
148
DQS6
169
DQS7
188
ODT0
114
ODT1
119
RAS*
108
S0*
110
S1*
115
SA0
198
DQ58
189
DQ59
191
DQ6
14
DQ60
180
DQ61
182
DQ62
192
DQ63
194
DQ7
16
DQ8
23
DQ9
25
DQS*0
11
DQS*1
29
DQS*2
49
DQS*3
68
DQS*4
129
DQS*5
146
DQ43
153
DQ44
140
DQ45
142
DQ46
152
DQ47
154
DQ48
157
DQ49
159
DQ5
6
DQ50
173
DQ51
175
DQ52
158
DQ53
160
DQ54
174
DQ55
176
DQ56
179
DQ57
181
DQ29
64
DQ3
19
DQ30
74
DQ31
76
DQ32
123
DQ33
125
DQ34
135
DQ35
137
DQ36
124
DQ37
126
DQ38
134
DQ39
136
DQ4
4
DQ40
141
DQ41
143
DQ42
151
DQ14
36
DQ15
38
DQ16
43
DQ17
45
DQ18
55
DQ19
57
DQ2
17
DQ20
44
DQ21
46
DQ22
56
DQ23
58
DQ24
61
DQ25
63
DQ26
73
DQ27
75
DQ28
62
CKE0
79
CKE1
80
DM0
10
DM1
26
DM2
52
DM3
67
DM4
130
DM5
147
DM6
170
DM7
185
DQ0
5
DQ1
7
DQ10
35
DQ11
37
DQ12
20
DQ13
22
A16_BA2
85
A2
100
A3
99
A4
98
A5
97
A6
94
A7
92
A8
93
A9
91
BA0
107
BA1
106
CAS*
113
CK0
30
CK0*
32
CK1
164
CK1*
166
3709-001341
DDR2M_1-1
A0
102
A1
101
A10_AP
105
A11
90
A12
89
A13
116
A14
86
A15
84
13
2
12
DDR2-SODIMM-200P-RVS
8
45
14-C4,17-D2
56
R606
10V
C620
100nF
10K
4
14-B4
R522
1%
56
R601
2
14
14-D4,17-C4
14-B4,17-B4
28
3
14-D4,17-C2
R598
56
MEM1_ODT1
MEM1_ABS(0) MEM1_ABS(1)
MEM1_AWE#
MEM1_ACAS# MEM1_ARAS#
MEM1_ABS(2)
MEM3_CHA_SA0_MN MEM3_CHA_SA1_MN
CLK1_MCLK1#
MEM1_ABS(2)
MEM1_AMA(14:0)
MEM1_CS0# MEM1_CS1#
MEM1_CKE0 MEM1_CKE1
MEM1_ODT0
CLK1_MCLK0#
MEM1_ADQS(7:0)
MEM1_CKE0 MEM1_CKE1
CLK1_MCLK0 CLK1_MCLK1
MEM1_ADM(7:0)
MEM1_ABS(0) MEM1_ABS(1)
MEM1_AWE#
MEM1_ACAS# MEM1_ARAS#
SMB3_CLK
SMB3_DATA
MEM1_ADQ(63:0)
MEM1_AMA(14:0)
MEM1_ADQS#(7:0)
MEM1_ODT0 MEM1_ODT1
MEM1_VREF
MEM1_CS0# MEM1_CS1#
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