Samsung ps42p2std_ch_d53a Datasheet

PLASMA DISPLAY TV

Chassis : D53A(P)_42” TTX
Model: PS42P2STD/XEC

PLASMA DIAPLAY TV CONTENTS

Precautions
Reference Information
Specifications
Alignment and Adjustments
Circuit Operation Description
Troubleshooting
Exploded View and Parts List
Electric Parts List
Handling Description
Glossary
Wiring Diagram
Schematic Diagrams

1.

2.

3.

4.

5.

6.

7.

8.

9.

10.

11.

12.

1. Precautions

1-1 Safety Precautions

1. Be sure that all of the built-in protective
devices are replaced. Restore any missing
protective shields.

2. When reinstalling the chassis and its
assemblies, be sure to restore all protective
devices, including: nonmetallic control knobs
and compartment covers.

3. Make sure that there are no cabinet openings
through which people—particularly
children—might insert fingers and contact
dangerous voltages. Such openings include
the spacing between fornt cabinet and back
cabinet, excessively wide cabinet

ventilation slots, and improperly fitted back

covers.

4. Leakage Current Hot Check (Figure 1-1):
Warning: Do not use an isolation
transformer during this test. Use a leakage­current tester or a metering system that
complies with American National Standards
Institute (ANSI C101.1, Leakage Current for
Appliances), and Underwriters Laboratories
(UL Publication UL1950.5.2).

5. With the unit completely reassembled, plug
the AC line cord directly into the power
outlet. With the unit’s AC switch first in the
ON position and then OFF, measure the
current between a known earth ground (metal
water pipe, conduit, etc.) and all exposed
metal parts, including: antennas, handle
brackets, metal cabinets, screwheads and
control shafts. The current measured should
not exceed 3.5 milliamp. Reverse the power­plug prongs in the AC outlet and repeat the
test.

Fig. 1-1 AC Leakage Test

6. Antenna Cold Check:
With the unit’s AC plug disconnected from the
AC source, connect an electrical jumper across
the two AC prongs. Connect one lead of the
ohmmeter to an AC prong. Connect the other
lead to the coaxial connector.

7. High Voltage Limits:
High voltage must be measured each time ser­vicing is done on the B+, horizontal deflection

or high voltage circuits.

Precautions

Samsung Electronics 1-1

LEAKAGE
CURRENT

TESTER

DEVICE
UNDER

TEST

TEST ALL

EXPOSED METAL

SURFACES

2-WIRE CORD

ALSO TEST WITH
PLUG REVERSED

(USING AC ADAPTER

PLUG AS REQUIRED)

EARTH

GROUND

(READING SHOULD

NOT BE ABOVE

0.5mA)

Follow these safety, servicing and ESD precautions to prevent damage and protect against potential
hazards such as electrical shock and X-rays.

1-2 Safety Precautions (Continued)

8. High voltage is maintained within specified
limits by close-tolerance, safety-related
components and adjustments. If the high
voltage exceeds the specified limits, check
each of the special components.

9. Design Alteration Warning:
Never alter or add to the mechanical or
electrical design of this unit. Example: Do not
add auxiliary audio or video connectors. Such
alterations might create a safety hazard. Also,
any design changes or additions will void the
manufacturer’s warranty.

10. Hot Chassis Warning:
Some TV receiver chassis are electrically
connected directly to one conductor of the AC
power cord. If an isolation transformer is not
used, these units may be safely serviced only
if the AC power plug is inserted so that the
chassis is connected to the ground side of the
AC source.

To confirm that the AC power plug is inserted
correctly, do the following: Using an AC
voltmeter, measure the voltage between the
chassis and a known earth ground. If the
reading is greater than 1.0V, remove the AC
power plug, reverse its polarity and reinsert.
Re-measure the voltage between the chassis
and ground.

11. Some TV chassis are designed to operate with
85 volts AC between chassis and ground,
regardless of the AC plug polarity. These units
can be safely serviced only if an isolation
transformer inserted between the receiver and
the power source.

12. Some TV chassis have a secondary ground
system in addition to the main chassis ground.
This secondary ground system is not
isolated from the AC power line. The two
ground systems are electrically separated by
insulating material that must not be defeated
or altered.

13. Components, parts and wiring that appear to
have overheated or that are otherwise
damaged should be replaced with parts that
meet the original specifications. Always
determine the cause of damage or overheat­ing, and correct any potential hazards.

14. Observe the original lead dress, especially
near the following areas: Antenna wiring,
sharp edges, and especially the AC and high

voltage power supplies. Always inspect for
pinched, out-of-place, or frayed wiring. Do
not change the spacing between components
and the printed circuit board. Check the AC
power cord for damage. Make sure that leads
and components do not touch thermally hot
parts.

15. Product Safety Notice:
Some electrical and mechanical parts have
special safety-related characteristics which
might not be obvious from visual inspection.
These safety features and the protection they
give might be lost if the replacement compo­nent differs from the original—even if the
replacement is rated for higher voltage,
wattage, etc.

Components that are critical for safety are
indicated in the circuit diagram by shading,
( ) or ( ).

Use replacement components that have the
same ratings, especially for flame resistance
and dielectric strength specifications.
A replacement part that does not have the
same safety characteristics as the original
might create shock, fire or other hazards.

Precautions

1-2 Samsung Electronics

!

1-3 Servicing Precautions

1. Servicing precautions are printed on the
cabinet. Follow them.

2. Always unplug the unit’s AC power cord from
the AC power source before attempting to: (a)
Remove or reinstall any component or
assembly, (b) Disconnect an electrical plug or
connector, (c) Connect a test component in
parallel with an electrolytic capacitor.

3. Some components are raised above the printed
circuit board for safety. An insulation tube or
tape is sometimes used. The internal wiring is
sometimes clamped to prevent contact with
thermally hot components. Reinstall all such
elements to their original position.

4. After servicing, always check that the screws,
components and wiring have been correctly
reinstalled. Make sure that the portion around
the serviced part has not been damaged.

5. Check the insulation between the blades of the
AC plug and accessible conductive parts
(examples: metal panels, input terminals and
earphone jacks).

6. Never defeat any of the B+ voltage interlocks.
Do not apply AC power to the unit (or any of
its assemblies) unless all solid-state heat sinks
are correctly installed.

7. Always connect a test instrument’s ground
lead to the instrument chassis ground before
connecting the positive lead; always remove
the instrument’s ground lead last.

8. Plasma display panels have partial afterim­ages when a same picture continues to be dis­played for a certain time. This happens due to
the degradation of brightness caused by a
scale-down effect.
To prevent such afterimages when displaying
a same picture for a certain time, be sure to
reduce the level of brightness and contrast.
ex) Contrast : 50 or 75, Brightness : 25

9. Plasma display is an array of pixels(cells).
Therefore, if at least 99.9% pixels keep normal,
the appropriate panel is judged as ‘approved
product.’ Even though some of pixels keep
luminescent or always light off, do not worry
because the panel is approved.

Precautions

Samsung Electronics 1-3

Warning 1 : First read the “Safety Precautions” section of this manual. If some unforeseen circumstance creates a

conflict between the servicing and safety precautions, always follow the safety precautions.

Warning 2 : An electrolytic capacitor installed with the wrong polarity might explode.

1-4 Precautions for Electrostatically Sensitive Devices (ESDs)

1. Some semiconductor (“solid state”) devices
are easily damaged by static electricity. Such
components are called Electrostatically
Sensitive Devices (ESDs); examples include
integrated circuits and some field-effect
transistors. The following techniques will
reduce the occurrence of component damage
caused by static electricity.

2. Immediately before handling any semicon
ductor components or assemblies, drain the
electrostatic charge from your body by
touching a known earth ground. Alternatively,
wear a discharging wrist-strap device. (Be
sure to remove it prior to applying power—
this is an electric shock precaution.)

3. After removing an ESD-equipped assembly,
place it on a conductive surface such as
aluminum foil to prevent accumulation of
electrostatic charge.

4. Do not use freon-propelled chemicals. These
can generate electrical charges that damage
ESDs.

5. Use only a grounded-tip soldering iron when
soldering or unsoldering ESDs.

6. Use only an anti-static solder removal device.
Many solder removal devices are not rated as
“anti-static”; these can accumulate sufficient
electrical charge to damage ESDs.

7. Do not remove a replacement ESD from its
protective package until you are ready to
install it. Most replacement ESDs are
packaged with leads that are electrically
shorted together by conductive foam,
aluminum foil or other conductive materials.

8. Immediately before removing the protective
material from the leads of a replacement ESD,
touch the protective material to the chassis or
circuit assembly into which the device will be
installed.

9. Minimize body motions when handling
unpackaged replacement ESDs. Motions such
as brushing clothes together, or lifting a foot
from a carpeted floor can generate enough
static electricity to damage an ESD.

Precautions

1-4 Samsung Electronics

Reference Information

Samsung Electronics 2-1

2. Reference Information

2-1 Tables of Abbreviations and Acronyms

A
Ah
Å
dB
dBm

°C
°F
°K
F
G
GHz
g
H
Hz
h
ips
kWh
kg
kHz
kΩ
km
km/h
kV
kVA
kW
I
MHz

Ampere
Ampere-hour
Angstrom
Decibel
Decibel Referenced to One
Milliwatt
Degree Celsius
Degree Fahrenheit
degree Kelvin
Farad
Gauss
Gigahertz
Gram
Henry
Hertz
Hour
Inches Per Second
Kilowatt-hour
Kilogram
Kilohertz
Kilohm
Kilometer
Kilometer Per Hour
Kilovolt
Kilovolt-ampere
Kilowatt
Liter
Megahertz

MV
MW
MΩ
m
µA
µF
µH
µm
µs
µW
mA
mg
mH
mI
mm
ms
mV
nF

Ω

pF
Ib
rpm
rps
s
V
VA
W
Wh

Megavolt
Megawatt
Megohm
Meter
Microampere
Microfarad
Microhenry
Micrometer
Microsecond
Microwatt
Milliampere
Milligram
Millihenry
Milliliter
Millimeter
Millisecond
Millivolt
Nanofarad
Ohm
Picofarad
Pound
Revolutions Per Minute
Revolutions Per Second
Second (Time)
Volt
Volt-ampere
Watt
Watt-hour

Table 2-1 Abbreviations

Reference Information

2-2 Samsung Electronics

Table 2-2 Table of Acronyms

ABL
AC
ACC
AF
AFC
AFT
AGC
AM
ANSI
APC
APC
A/V
AVC
BAL
BPF
B-Y
CATV
CB
CCD
CCTV
Ch
CRT
CW
DC
DVM
EIA
ESD
ESD
FBP
FBT
FF
FM
FS
GND
G-Y
H
HF
HI-FI
IC
IC
IF

Automatic Brightness Limiter
Alternating Current
Automatic Chroma Control
Audio Frequency
Automatic Frequency Control
Automatic Fine Tuning
Automatic Gain Control
Amplitude Modulation
American National Standards Institute
Automatic Phase Control
Automatic Picture Control
Audio-Video
Automatic Volume Control
Balance
Bandpass Filter
Blue-Y
Community Antenna Television (Cable TV)
Citizens Band
Charge Coupled Device
Closed Circuit Television
Channel
Cathode Ray Tube
Continuous Wave
Direct Current
Digital Volt Meter
Electronics Industries Association
Electrostatic Discharge
Electrostatically Sensitive Device
Feedback Pulse
Flyback Transformer
Flip-Flop
Frequency Modulation
Fail Safe
Ground
Green-Y
High
High-Frequency
High Fidelity
Inductance-Capacitance
Integrated Circuit
Intermediate Frequency

I/O
L
L
LED
LF
MOSFET
MTS
NAB
NEC
NTSC
OSD
PCB
PLL
PWM
QIF
R
RC
RF
R-Y
SAP
SAW
SIF
SMPS
S/N
SW
TP
TTL
TV
UHF
UL
UV
VCD
VCO
VCXO
VHF
VIF
VR
VTR
VTVM
TR

Input/output
Left
Low
Light Emitting Diode
Low Frequency
Metal-Oxide-Semiconductor-Field-Effect-Tr
Multi-channel Television Sound
National Association of Broadcasters
National Electric Code
National Television Systems Committee
On Screen Display
Printed Circuit Board
Phase-Locked Loop
Pulse Width Modulation
Quadrature Intermediate Frequency
Right
Resistor & Capacitor
Radio Frequency
Red-Y
Second Audio Program
Surface Acoustic Wave(Filter)
Sound Intermediate Frequency
Switching Mode Power Supply
Signal/Noise
Switch
Test Point
Transistor Transistor Logic
Television
Ultra High Frequency
Underwriters Laboratories
Ultraviolet
Variable-Capacitance Diode
Voltage Controlled Oscillator
Voltage Controlled Crystal Oscillator
Very High Frequency
Video Intermediate Frequency
Variable Resistor
Video Tape Recorder
Vacuum Tube Voltmeter
Transistor

Specifications

Samsung Electronics 3-1

3. Specifications

MODEL

SCREEN SIZE

3-1 Display(PDP Monitor)

Display

Remote Control

Display

Remote Control

Front

Back

Dimensions

(mm/inch)

Terminal

In/Out

Terminals

Power Supply

Power Consumption

Screen Size

Adjustment System

PS-42P2ST

16:9

1039(W) x 89(D) x 635(H)/40.9(W) x 3.5(D) x 25(H)

54(W) x 31.5(D) x 220(H)/2.13(W) x 1.24(D) x 8.66(H)

32Kg/70.54\bs

150g/0.33\bs

POWER , MUTE, -VOLME+, ▲SELECT▼, MENU,SOURCE

AV1(S-VHS IN, VIDEO IN)

AV2(SCART IN) SCART MODEL

COMPONENT1(480i, 576i)

COMPONENT2(480p, 576p, 720p, 1080i)

PC IN

RS-232 IN, OUT

Audio In(AV1, PC)

Aduio In(AV1, Component, PC)

Extrnal Speaker Out(R, L)

AC220V 50/60Hz

350W

852 x 474(106 cm)/33.54 x 18.66(42inchs)

Electronic Function Adjustment

RCA MODEL

SCART MODEL
RCA MODEL

3-2 Samsung Electronics

MENO

Alignment and Adjustments

Samsung Electronics 4-1

4. Alignment and Adjustments

4-1 Service Mode

4-1-1 SERVICE MODE ENTRY METHOD (General Transmitter)

1. Turn off the power to make the SET STAND-BY mode.

2. In order to enter the Service Mode, select MUTE-1-8-2-POWER.

✳ In case entry into SERVICE MODE is unsuccessful, repeat the procedures above.

4-1-2 Initial DISPLAY State in times of SERVICE MODE Switch overs

4-1-2(A) OSD DISPLAY

4-1-2(B) BUTTONS OPERATIONS WITHIN SERVICE MODE

1. PW364A 9. CXA2101Q-2

2. VPC3230 10. PinP Control

3. SDA9400 11. OSD Position

4. SDA9280 12. Test Position

5. AD9884-Video 13. Option Table

6. AD9884-PC 14.Reset

7. AD9884-DTV

8. CXA2101Q-1

Release Time :

Menu
Joystick UP/DOWN
Joystick

Entire menu display
Cursor move to select items
Enable to increase and decrease the data of the selected items

Alignment and Adjustments

4-2 Samsung Electronics

4-1-3 Details of Control

-. Varies according to color system

-. Varies according to input mode

-. Varies according to Scart/RCA

4-1-3(A) PW364A

No OSD AV1(S-Video) AV2(S-Video) AV2 Component1 Component2 PC Remark

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

H Position

V Position

Red Gain

Green Gain

Blue Gain

Red offset

Green offset

Blue offset

APL on/off

High Light

Low Light

Shift Pixel

Test

Pixel Number

Shift Line

Time

35

34

140

140

140

90

90

90

1

140

90

On

0

4

4

4

120

120

120

140

140

140

1

120

140

On

0

4

4

4

120

120

120

140

140

140

1

120

140

Off

0

4

4

4

Mode 1 : AV1(Video)

AV2(S-Video)

AV2

Component1

Mode 2 : Component2

Mode 3 : PC

Doesn’t operate in PC
Mode

Different input signal

❈ White Balance, High Light, Low Light must be separately adjusted according to three modes shown below and be saved

to the data of each mode.

❏ Mode 1 (adjust AD9884 to Video): AV1(Video), AV1(S-Video), AV2, Component1 identical Data
❏ Mode 2 (adjust AD9884 to DTV): Component2
❏ Mode 3 (adjust AD9884 to PC): PC

❈ Pixel Shift: Off=>On ( When entering the Factory mode or PC mode, the pixel shift doesn't happen (always Pixel Off).

Alignment and Adjustments

Samsung Electronics 4-3

4-1-3(B) VPC3230

No OSD AV1(S-Video) AV2(S-Video) AV2 Component1 Component2 PC Remark

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

CIP Bright

CIP Cont

IF Comp

Chroma Band

Ena Luma

HPLL Speed

Luma Delay

3230 Bright

3230 Contrast

H LPF Y/C

H LPF Chroma

H peaking

Coaring Off/On

CIP Sat Cb

CIP Sat Cr

CIP Tint

195

27

2

3

1

1

See attachment below

168

36

0

0

2

1

23(Scart Model) 42(RCA Model)

29(Scart Model) 42(RCA Model)

36

Different system and
input mode

Operate only in

Component1

Operate only in

Component1

❈ Attachment: Initial data by Luma Delay Color System and input mode

AV1(Video)

5

6

6

6

6

5

AV1(S-Video)

5

5

7

7

7

5

AV2

5

6

4

4

4

5

Component1 Component2 PC

PAL

SECAM

NTSC4.43

NTSC3.58

PAL-M

PAL-N

-. Calls the data created before switching to
the above mode

-. As the above mode signals don't pass
through the VPC3230 Luma Delay loot,
they are not affected by the value of
Luma Delay.

Alignment and Adjustments

4-4 Samsung Electronics

4-1-3(C) SDA9400

No OSD AV1(S-Video) AV2(S-Video) AV2 Component1 Component2 PC Remark

1

2

3

4

5

6

SNR On

VCSNR On

HCSNR On

DTNR On

TNRCLY

TNRCNC

1

1

0

1

5

5

Same in all modes

4-1-3(D) SDA9280

No OSD AV1(S-Video) AV2(S-Video) AV2 Component1 Component2 PC Remark

1

2

3

4

5

6

7

8

CTI Thresh

CTI Trawid

Y-Delay

LPF Gain

BPF Gain

HPF Gain

Phacom

Cor

0

0

9

4

8

8

0

1

Scart = 11(Fix)

Same in all modes

Same in all modes

❈ Y-Delay :

❏ Scart model : 11(Fix) ❏ RCA model : 9 (Fix)

4-1-3(E) AD9884

No OSD

AV1(S-Video) AV2(S-Video)

AD9884-Video

AV2 Component1

Scart/RCA

Scart/RCA Scart Only Scart OnlyRCA Only RCA Only

Component2 PC

AD9884-DTV AD9884-PC

Remark

Scart=Europe,
RCA =South &

East Asia

1

2

3

4

5

6

7

Red Gain

Green Gain

Blue Gain

Red Offset

Green Offset

Blue Offset

Current

120

120

120

30

30

30

1

120

120

120

30

30

30

0/3/4

120

120

120

30

30

30

-

480P/720P/1080i

Alignment and Adjustments

Samsung Electronics 4-5

4-1-3(F) CXA2101-1

No OSD AV1(S-Video) AV2(S-Video) AV2 Component1 Component2 PC Remark

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

Sub Bright

Limit Level

System

D-Color

R Drive

G Drive

B Drive

R CutOff

G CutOff

B CutOff

ABL Mode

ABL TH

H Sep Sel.

Fix Sync.

V Time Con

H Width

HHD timi Con

51

0

1

1

32

32

32

32

32

32

0

0

0

0

1

1

0

55

0

1

1

32

32

32

32

32

32

0

0

0

0

1

1

0

51

0

1

1

32

32

32

32

32

32

0

0

0

0

1

1

0

Fixed after setting
picture quality

Component2 is

separate

❈ Items that must be separately saved according to mode: Sub Bright, R Drive, G Drive, B Drive, R Cutoff, G Cutoff, B Cutoff
❈ The items must be separately adjusted according to two modes shown below and be saved to the data of each mode.

(The initial value is fixed after setting picture quality.)

❏ Mode 1 : AV1(Video), AV1(S-Video), AV2, Component1, PC
❏ Mode 2 : Component2

Alignment and Adjustments

4-6 Samsung Electronics

4-1-3(G) CXA2101-2

No OSD AV1(S-Video) AV2(S-Video) AV2 Component1 Component2 PC Remark

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

HS Mask

Sub Cont

Sub Color

Sub Hue

Sub SHP

R-Y/R

R-Y/B

G-Y/R

G-Y/B

PABL Level

SHP FO

Pre/over

CTI Level

LTI Level

DC-Tran

D-Pic

Cr-Offset1

Cb-offset1

1

6

8

8

3

8

2

3

1

0

1

1

7

7

1

0

8

8

3

8

2

3

1

0

1

1

7

7

1

6

8

8

3

8

2

3

1

0

1

1

7

7

Must be separately
saved according to
color system and
input mode

See attachment below

Component2 is

separate

❈ Items that must be separately saved according to mode: Sub Cont, R-Y/R, R-Y/B, G-Y/R, G-Y/B
❈ The items must be separately adjusted according to three modes shown below and be saved to the data of each mode.

(The initial value is fixed after setting picture quality.)

❏ Mode 1: AV1(Video), AV1(S-Video), AV2, PC
❏ Mode 2: Component1
❏ Mode 3: Component2

❈ Attachment : Items that must be separately saved according to Color System and Input Mode

Component2 is

separate

Adjusts and operates

only in Component2

PAL

13

15

8

4

NT

5

15

8

8

PAL

9

15

15

4

NT

4

15

11

3

AV1(Video), AV1(S-Video), AV2, PC

Scart RCA

576i(PAL)

13

15

15

4

480i(NT)

4

15

11

3

50Hz(PAL)

Later

60Hz(NT)

3

11

8

4

RCA Only RCA Only

Component1 Component2

Remark

R-Y/R

R-Y/B

G-Y/R

G-Y/B

Scart models will
have the same
data as RCA
models

Alignment and Adjustments

Samsung Electronics 4-7

4-1-4 White Balance Adjust Method

1. Press MUTE-1-8-2-POWER to enter the factory mode.

2. Enter PW364.

3. Adjust LOW coordinates as R, G, OFFSET and HIGH coordinates as R, G, GAIN.(Blue is fixed)

4. Adjust LOW light as Center Offset.

5. Adjust HIGH light as Gain Max.

6. Adjust fine as B-Offset and B-Gain.

✥ SCART MODEL : W/B Adjustment SPEC(Suwon Factory Toshiba PATTERN)

➣ VIDEO MODE

➣ PC MODE

Adjustment

Coordinates

H-LIGHT

L-LIGHT

Coordinates

Value

x : 282
y : 296

Y : 24.5[f\]

x : 282
y : 296

Y : 0.95[f\]

Adjustment

Deviation

±: 3
±: 3
±: 1

±: 5
±: 5
± : 0.1

Adjustment

Coordinates

H-LIGHT

L-LIGHT

Coordinates

Value

x : 282
y : 296

Y : 15[f\]

x : 282
y : 296

Y : 0.33[f\]

Adjustment

Deviation

±: 3
±: 3
±: 1

±: 5
±: 5
± : 0.05

Alignment and Adjustments

4-8 Samsung Electronics

✥ RCA0 MODEL : W/B Adjustment SPEC(Suwon Factory Toshiba PATTERN)

➣ VIDEO MODE

➣ Component2(DTV) mode

➣ PC MODE

Adjustment

Coordinates

H-LIGHT

L-LIGHT

Coordinates

Value

x : 282
y : 296

Y : 25.5[f\]

x : 282
y : 296

Y : 0.95[f\]

Adjustment

Deviation

±: 3
±: 3
±: 1

±: 5
±: 5
± : 0.1

Adjustment

Coordinates

H-LIGHT

L-LIGHT

Coordinates

Value

x : 283
y : 297

Y : 14.5[f\]

x : 283
y : 297

Y : 0.75[f\]

Adjustment

Deviation

±: 3
±: 3
±: 1

±: 5
±: 5
± : 0.05

Adjustment

Coordinates

H-LIGHT

L-LIGHT

Coordinates

Value

x : 273
y : 273

Y : 25.5[f\]

x : 273
y : 273

Y : 0.95[f\]

Adjustment

Deviation

±: 3
±: 3
±: 1

±: 5
±: 5
± : 0.1

Alignment and Adjustments

Samsung Electronics 4-9

PS42P2ST

USER

V-Position

Factory

HP/VP/P

PHASE

CLOCK/

fO(Hz)

125/8/0/1

125/22/0/0

125/8/0/1

125/22/0/0

85

70.1

124/31/0/0

125/31/0/0

124/31/0/0

125/31/0/0

75

72.8

125/2/0/0

125/9/1/2

125/2/0/0

125/9/1/2

59.9

85.1

125/0/0/1

125/31/0/2

125/0/0/1

125/31/0/2

75

72.2

126/1/0/1

125/15/0/1

126/1/0/1

125/15/0/1

60.3

56.3

126/14/2/3

125/20/1/3

126/14/2/3

125/20/1/3

85

75

125/21/1/3

125/16/1/2

125/21/1/3

125/16/1/2

60

70.1

HFreqSec

/99=31.777

=2288.21

HS1Period

31.777u/10.1n=3146.2

=23.111

Dot_c

V_P

H_P

VTotal

28.232

1

0

449

31.777

36.0

0

0

509

23.111

HFreqSes

=26.666

=26.414

=2640.29

=2615.14

31.5

31.5

0

0

0

0

500

520

26.667

26.413

=31.777

=18.626

=3146.23

=1844.65

56.25

25.175

0

1

0

1

525

631

31.777

18.631

=21.333

=20.797

=2112.17

=2059.4

49.5

50.0

1

1

1

1

625

666

21.333

20.800

=26.393

=28.444

=2613.86

=2816.23

40.0

36.0

1

1

628

625

26.400

28.444

=14.555

=16.656

=1441.68

=1649.50

94.5

78.75

1

1

1

1

808

800

14.561

16.660

=17.707

=20.676

=1753.16

=2047.22

75.000

65.000

0

0

0

0

806

806

17.707

20.677

400

480

480

480

480

600

600

600

600

600

768

768

768

1024

13

768

1024

14

VRes

720

640

640

640

640

800

800

800

800

800

1024

11

1024

12

HRes

1

2

3

4

5

6

7

8

9

NO

10

Alignment and Adjustments

4-10 Samsung Electronics

4-3 Discharge Voltage Adjustment Method (Monitor) in Times of ASS’Y Repair

and Replacement

-All VR (Variable Resistor), except for VR for Vs, voltage goes down when turned counterclockwise.

● Vsc and Vy Adjustment Method

● Vs and Va Adjustment Method

■ Vsc is the voltage of the left terminal

for D5207

■ Voltage adjustment is made for Vsc by
using VR5201

■ Standard voltage for Vsc is –55V±10V

■ Vy is the voltage of the right terminal

for D5207

■ Voltage adjustment is made for Vy by
using VR5200

■ Standard voltage for Vy is 132V±10V

■ Vs is the voltage of the no.11 PIN of

SX Connector.

■ Voltage adjustment is made for Vs by
using VR in 7

■ Vs is 175±5V

■ Va is the voltage of the no.7 PIN of SX

Connector.

■ Voltage adjustment is made for Va by
using right VR in 6

■ Va is 75±5V

Y-Main

Alignment and Adjustments

Samsung Electronics 4-11

● Vw Adjustment Method

■ Vw is the voltage of the right terminal

for R4414

■ Voltage adjustment is made for Vw by
using VR4400

■ Standard voltage for Vw is 175V±5V

Alignment and Adjustments

4-12 Samsung Electronics

4-4 Fault Finding Using MULTI METER

Parts defects can be found for DIODE TRANSISTOR IC, using MULTI TEST including
Forward/Reverse direction Multi Test. Of course, in case resistance of several ohms and COIL are connect­ed in parallel circuit, the lock out circuit parallel connected to part must be severed.

1.DIODE

2. TRANSISTOR

● For NPN(KSC815-Y, 2SC2068, 2SC2331-Y)

● For PNP(KSA539-Y)

Forward Direction

Hundreds of ohms

Reverse Direction

Infinity

Between Anode and Cathode

C (COLLECTOR)

E

B(BASE)

BC

C (COLLECTOR)

E

B(BASE)

BC

E (EMITTER)

E (EMITTER)

Forward Direction
Hundreds of ohms
Hundreds of ohms

Infinity

Reverse Direction

Infinity
Infinity
Infinity

Between B and E
Between B and C
Between E and C

Forward Direction
Hundreds of ohms
Hundreds of ohms

Infinity

Reverse Direction

Infinity
Infinity
Infinity

Between B and E
Between B and C
Between E and C

+- +-

Alignment and Adjustments

Samsung Electronics 4-13

3. IC (INTEGRATED CIRCUIT)

IC has built in DIODE against overvoltage in PIN. Generally, except for internal circuit defects, IC defects
can be found, by measuring the DIODE.

✴ Defects have SHORT(0 ohm) for both forward and reverse direction.

Hundreds of ohms

Forward Direction

Reverse Direction

Varying depending on IC but generally normal

Infinity in DIODE TEST MODE

Alignment and Adjustments

4-14 Samsung Electronics

MEMO

Circuit Operation Description

Samsung Electronics 5-1

5. Circuit Description

5-1 Power supply

5-1-1 Outline(PDP SMPS)

Considering various related conditions, the switching regulator with good efficiency and allowing for its
small size and lightweight was used as the power supply for PDP. Most of the power supply components
used forward converter, and Vsamp and Vsb used simple flyback converter.
To comply with the international harmonics standards and improve the power factor, active PFC (Power
Factor Correction) was used to rectify AC input into +400V DC output, which in turns used as input to the
switching regulator.

5-1-2 42"SD SMPS SPECIFICATION

5-1-2(A) INPUT

PDP-42PS board is designed so that input power can be used within AC 90 VAC to 264 VAC with
50/60Hz ± 3Hz.

5-1-2(B) OUTPUT

PDP-42PST board provides 13 output switching power supplies for PDP 50inch (+165Vs, +220Set,
+185Ve, +75Va, +80Scan, +18Vg, +5Vsb, +5V(D), +5V(A), +12V. +9V, +12Vfan, and +12Vsamp). The out­put voltage, and current requirements for continuous operation are stated below (Table 3).

Table1. Specifications of Output Power Supplies for PDP SMPS

Output Name

Vs

Va

Vscan

Vset

Ve

Vg

Vfan

V9

V5(A)

V5(D)

Vsb

V12

Vsamp

Output Voltage

+165V

+75V

+80V

+220V

+185V

+18.3V

+12V

+9V

+5V

+5.3V

+5V

+12V

+12V

Output Current

1.4A

0.5A

0.05A

0.05A

0.05A

0.3A

0.8A

0.3A

1.0A

3.5A

0.4

1.2A

1.5A

Using in PDP driving

Sustain Voltage of Drive Board

Address Voltage of Drive Board

Analog IC Drive Voltage of Video Board

IC Drive Voltage of Logic Board

Stand-by for Remote Control

Circuit Operation Description

5-2 Samsung Electronics

Table 2. Specifications to Protect PDP SMPS

Division

Vs

Va

+5V

OCP Current

5A

2A

10A

OVP Voltage

195V

90V

6.2V

Short Circuit

O.K

O.K

O.K

5-1-2(C) FUNCTION OF BOARD

(1) Remote control

Using 250V/ 10A relay, the board makes remote control available.

(2) Free voltage

The board designed so that input voltage can be used within 90 VAC to 264VAC.

(3) Embedded thermal sensor

The board is equipped with thermal sensor to detect the internal temperature of the unit, and to short
relay when the internal temperature is higher than specified temperature so as to shutdown the unit.

(4) Improvement of power factor

The board is designed using PFC circuit so that PF (Power Factor) can be over 0.95, because low PF
can be a problem in high voltage power.

(5) Protection

The OCP (Over Current Protection), the OVP (Over voltage Protection), and the Short Circuit
Protection functions are added against system malfunction.

Circuit Operation Description

Samsung Electronics 5-3

5-1-2(D) PDP-PS-42 BLOCK DIAGRAM

Circuit Operation Description

5-4 Samsung Electronics

(1) AC-DC Converter

PDP-42PS outputs +400V DC from the common AC power supply using the active PFC booster con­verter. This converter is designed for improving the power factor and preventing the noise with high
frequency and finally becomes the input power system for the switching regulator on the output side.

(2) Auxiliary Power Supply

The auxiliary power supply is a block generating power of •Ï-com for remote controlling. Once the
power plug is inserted, this block always comes into operation, causing •Ï-com to get into the stand­by state for the output. Thus, this output is called the stand-by voltage. And with the relay ON signal
inputted through the remote controller, this block turns the mechanical switch of relay to ON for dri­ving the main power supply.

(3) Implementation of Sustain Voltage

As the main part of a SMPS for PDP, sustain voltage must supply a high power, +165V/ 1.4A. It is
designed using forward converter basically. At the output stage two 90V converters are connected
serially for high efficiency and reduction of system size against a single 180V converter.

(4) Implementation of Small Power Output (Va, V(D), V(A), Vfan, V9, Vsamp, Ve, Vset, Vscan, V12, and

Vg)Vset, Ve, and Vscan used DC-DC module. V(D), Va, V12, and Vfan used forward converter, and
Vsamp used flyback converter. V(A), V9, and Vg are simply implemented using switching regulator.

5-1-3 Requirements of PDP SMPS

Since SMPS does not operate alone, but it operates with the load of the whole system, it should be designed
carefully considering the load of the system. In addition, it should be designed considering emerging issues
such as EMC, and protection against heat as well as system stability especially.

5-1-3(A) SAFETY AND REMOTE CONTROL CAPABILITY

Stability is one of the most important requirements for SMPS. SMPS should be designed to prevent
abnormal status due to abnormal load variation so as to keep the system stable, and guarantee customer
safety.
The protection circuits of SMPS include over-current protection (OCP), over voltage protection (OVP),
and under voltage lock-out (UVLO), and short circuit protection circuit. Although each circuit can be
implemented by various procedures, the most popular is implementing with comparator that compares
current value with that of standard and determine abnormality of the circuit.
In addition, surge current protection, insulation management, and static electricity protection circuit
should be added, because it uses commercial power source as an input.
PDP SMPS should be designed using auxiliary power and relay to provide remote control capability.

Circuit Operation Description

Samsung Electronics 5-5

5-1-3(B) THE RELATION BETWEEN POWER CONSUMPTION AND POWER CONVERSION Efficiency

The power consumption and the power conversion efficiency of SMPS affect protection against heat and
system operation much.
[ If the power conversion efficiency of 100W SMPS is 70%, is the power loss of internal circuit 30W? ]
Output power consumption Po is determined by the multiplication of DC output voltage Vo and output
current Io. Input power consumption Pi is determined by the addition of output power consumption
Po and internal power loss of SMPS Pl.
Provided that the power conversion efficiency is _,

If the power conversion efficiency of 100W SMPS is 70%, the internal power loss is about 42.8W by
Equation (1). If the power conversion efficiency of 400W SMPS for 42"SD is 82%, the internal power loss
is 87.8W by Equation (1). Table 4 shows internal power loss as a function of output power for various
power conversion efficiencies.

Table 4. Power Conversion Efficiency vs. Internal Power Loss

0

20

40

60

80

100

120

140

160

180

200

120 140 160 180 200 240220 260 280 300

50%

60%

90%

70%

80%

η

=

η

=

η

=

η

=

η

=

Internal

Power

Loss ( W)

Direct Current Output Power (W)

Circuit Operation Description

5-6 Samsung Electronics

5-1-3(C) PFC (Power Factor Correction) Circuit Descriptions

The current electric devices use DC power supply and require a rectifier circuit converting AC into DC.
As most rectifier circuits apply a capacitor input type, the rectifier circuit becomes the core of the occur­rence of harmonics with lower reverse rate.If various electronic and electric devices are connected to a
power system, high-frequency current will occur due to a power rectifier circuit, a phase control circuit
with power input current of non-sine wave, or components with non-linear load characteristics, such as
capacitor, inductor, etc. As the result, the disturbance of voltage occurs, and finally a power capacitor or
a transformer generates heat, fire or noise occurs, controls malfunction, or the accessed devices abnor­mally operate or their lives are shortened.To prevent those symptoms, IEC (International
Electrotechnical Commission) regulated standards for Power Supply Harmonics.
(Refer to IEC 1000-3-2.)Figure 8 shows the basic structure of Active Boost PFC and waveforms.

Standards for Power Supply Harmonics

Scale: Devices accessed to 220V/380V, 230V/400V, 240V/425V and lower than 16A (IEC 100-3-2)
Devices with AC 230V and lower than 16A (IEC 555-2)

Applied Classes :

♣ Class A: Devices not included in another class
♣ Class B : Portable tools
♣ Class C : Lighting devices
♣ Class D : Devices with special current waveforms

Application Schedule : Except the devices less than rating input of 75W (1996~1999)

Except the devices less than rating input of 50W (2000 and after)

Circuit Operation Description

Samsung Electronics 5-7

5-1-3(D) CONCLUSION

Although SMPS (Switching Mode Power Supply) enables small lightweight high-power consumption
power design, it is hard to be used when stability and precise control are required. Power stage for PDP
can be designed using the lightweight SMPS feature. It is important to design SMPS considering
system load, stability, and related international standards.

The architecture and the pulse of active boost PFC

Circuit Operation Description

5-8 Samsung Electronics

5-2 Driver Circuit

5-2-1 Driver Circuit Overview

5-2-1(A) WHAT IS THE DEFINITION OF DRIVE CIRCUIT?

It is a circuit generating an appropriate pulse (High voltage pulse) and then driving the panel to implement
images in the external terminals (X electrode group, Y electrode group and address electrode), and this high
voltage switching pulse is generated by a combination of MOSFET’s.

5-2-1(B) PANEL DRIVING PRINCIPLES

In PDP, images are implemented by impressing voltage on the X electrode, Y electrode and address elec­trode, components of each pixel on the panel, under appropriate conditions. Currently, ADS (Address &
Display Separate: Driving is made by separating address and sustaining sections) is most widely used to
generate the drive pulse. Discharges conducted within PDP pixels using this method can largely be classi­fied into 3 types, as follows:

(1) Address discharge : This functions to generate wall voltage within pixels to be lighted by addressing

information to them (i.e., impressing data voltage)

(2) Sustain discharge : This means a display section where only pixels with wall voltage by the address

discharge display self-sustaining discharge by the support of such wall voltage. (Optic outputs realiz­ing images are generated.)

(3) Erase discharge : To have address discharge occur selectively in pixels, all pixels in the panel must

have the same conditions (i.e., the same state of wall and space electric discharges). The ramp reset
discharge section, therefore, is important to secure the drive margin, and methods most widely used
to date include wall voltage controlling by ramp pulse.

Circuit Operation Description

Samsung Electronics 5-9

5-2-1(C) TYPES AND DETAILED EXPLANATION OF DRIVE DISCHARGES

(1 ) Sustaining discharge

Sustaining discharge means a self-sustaining discharge generated by the total of the sustaining pulse
voltage (usually, 160~170V) alternately given to X and Y electrodes during the sustaining period and
the wall voltage that varies depending upon pixels' previous discharge status. It is operated by the
memory function (through this, the current status is defined by previous operation conditions) AC
PDP basically possesses. That is, when there is existing wall voltage in pixels (in other words, when
pixels remain ON), the total of wall voltage and a sustaining voltage to be impressed subsequently
impresses a voltage equal to or above the discharge start voltage, thereby generating discharge again,
but when there is no existing wall voltage in pixels (in other words, when pixels remain OFF), the sus­taining voltage only does not reach the discharge start voltage, thus causing no discharge. The sustain­ing discharge is a section generating actual optic outputs used in displaying images.

(2) Address discharge

This means a discharge type generated by the difference between positive voltage of the address elec­trode (normally 70~75V determined by supplied Va voltage + positive wall charge) and the negative
potential of Y electrode (supplied GND level voltage + negative wall charge). The address discharge
serves to generate wall voltage in pixels where images are to be displayed (that is, discharge is to be
generated) prior to the sustaining discharge section. Namely, pixels with wall voltage by the address
discharge will generate sustaining discharge by the following sustaining pulses.

(3) Erase discharge

The purpose of resetting or erase discharge is to make even wall voltage in all pixels on the panel.
Wall voltage, which may vary depending upon the previous sustaining discharge status, must be
made even. That is, wall voltage generated by the sustaining discharge must surely be removed, by
making discharges and then supplying ions or electrons. Wall voltage can be removed by making dis­charges and then setting a limitation on time for opposite polarity charging of the wall voltage or gen­erating weak discharge (Low voltage erasing) to supply an appropriate quantity of ions or electrons
and keep polarities from being charged oppositely. The weak discharge (Low voltage erasing) meth­ods, which have been known to date, can largely be into two types: 1) the log pulse adopted by most
companies including F Company, and 2) the ramp pulse adopted by Matsushita. In both two methods,
impression is made with a slow rising slope of the erasing pulse. Because the total of the existing wall
voltage and a voltage on the rising pulse must be at least the drive start voltage to generate dis­charges, external impressed voltage is adjusted based on the difference in wall voltage between pixels.
And, weak discharge is generated because of a small impressed voltage.

Circuit Operation Description

5-10 Samsung Electronics

5-2-2 SPECIFICATION OF DRIVE PULSES

5-2-2(A) DRIVE PULSES

Circuit Operation Description

Samsung Electronics 5-11

5-2-2(B) FUNCTIONS OF PULSES

(1) X rising ramp pulse

Just before X rising ramp pulse is impressed, the last Y electrode sustain pulse of previous sub field is
impressed. The pulse causes sustain discharge. Consequently, positive wall charge is accumulated in X
electrode, and negative wall charge is accumulated in Y electrode. X rising ramp erases wall charge
produced by the last sustain discharge pulse using weak-discharge.

(2) Y rising ramp pulse

During Y rising ramp period, weak-discharge begins when external voltage of about 390V~400V is
impressed to Y electrode, and each gap voltage is equal to discharge start voltage. Sustaining the
weak-discharge, positive wall charge is accumulated in X electrode and address electrode, and nega­tive wall charge is accumulated in Y electrode of the entire panel.

(3) Y falling ramp pulse

During Y falling ramp period, the negative wall charge in Y electrode accumulated by 200V of X bias
is used to erase positive wall charge in X electrode. Address electrode (0V) sustains most of the posi­tive electric charge accumulated during rising ramp period so that it can maintain wall charge distrib­ution beneficial to the upcoming address discharge.

(4) Y scan pulse

This is called the scan pulse, selecting each of Y electrodes on a one-line-at-a-time basis. In this case,
Vscan means the scan bias voltage. About 70 V (Vscan) voltage is impressed on the selected electrode
lines, while 0 V (GND) voltage is impressed on the other lines.
In the cells the address pulse (70V~75V) is impressed on, address discharge is occurred because nega­tive wall charge is accumulated in Y electrode, positive wall charge is accumulated in address elec­trode by the applied ramp pulse, and the sum of impressed voltage is greater than discharge start
voltage. Thus, because scan pulse and data pulse are impressed line by line, very long time is taken
for PDP addressing.

(5) 1st sustain pulse

The sustaining pulse always begins with the Y electrode. This is because when address discharge is
generated, positive wall voltage is generated on the Y electrodes. Because wall electric charge generat­ed by address discharge is generally smaller than wall voltage generated by sustaining discharge, ini­tial discharges have small discharge strength, and stabilization is usually obtained after 5~6 times dis­charges, subject to variations depending on the structure and environment of electrodes. The purpose
of impressing the initial sustaining pulses long is to obtain stable initial discharges and generate wall
electric charges as much as possible.

5-2-3(A) FUNCTIONS OF EACH BOARD

(1) X board

X board is connected to the panel’s X-electrode blocks, 1) generates sustain voltage pulse (including
ERC), 2) generates X rising ramp pulse, and 3) sustains Ve bias during scan period.

(2) Y board

Y board is connected to the Y-electrode blocks of panel, 1) generates sustain voltage pulse (including
ERC), 2) generates Y rising and falling ramp pulse, and 3) sustains Vscan bias.

(3) Y buffer board (upper and lower)

Y buffer board impresses scan pulse to Y electrodes, and consists of upper and lower sub-boards. In
case of SD class, one board is equipped with 4 scan driver IC’s (STMicroelectronics STV7617 with 64
or 65 outputs).

(4) COF

Impresses Va pulse on address electrodes in the address section and generates address discharge
based on a difference between such Va pulse and scan pulse impressed on Y electrodes. It is in the
form of COF, and a COF is equipped with 4 data drive IC’s (STMicroelectronics STV7610A with 96
outputs). For a single scan, 7 COF’s are required.

Circuit Operation Description

5-12 Samsung Electronics

5-2-3 Configuration and Operation Principles of Driver Circuit

Y-Buffer (Upper)

Y Drive board

- Sustain pulse
(Energy recovery)

- Rising ramp pulse

- Falling ramp pulse

X Drive board

- Sustain pulse
(Energy recovery)

- Rising ramp pulse

- Ve bias

- Vscan pulse

Y-Buffer (Lower)

Y-electrode blocks

COF X-electrode blocks

(6 blocks)

(3 blocks)

Circuit Operation Description

Samsung Electronics 5-13

5-2-3(B) DRIVING BOARD'S BLOCK DIAGRAM

(1) Y

(2) X

170V

17V

POWER

220V

75V

POWER

220V

17V

170V

Circuit Operation Description

5-14 Samsung Electronics

➣ Components of driving board's operations

1. Power supply

1) Supplied from the power supply board

- For sustaining discharge: 180V;

- For logic signaling buffer: 5V; and

- For gate driver IC: 15V.

2) Generated by the internal DC/DC part

- For generating Vw pulse: 180V.

2. Logic signal

1) Supplied from the logic board

- Gate signals for FETs.

Circuit Operation Description

Samsung Electronics 5-15

5-2-3(C) PRINCIPLES OF FET’S OPERATION AND HIGH VOLTAGE SWITCHIng

❏ FET’s operation principles

❏ FET’s high voltage switching principles

(1) With no signal impressed on G1, FET1 gets

open-circuited, and with signal impressed on
G2, FET2 gets short-circuited, thereby causing
GND to be outputted to output terminals.

(2) With signal impressed on G1, FET1 gets short-

circuited, and with no signal impressed on G2,
FET2 gets open-circuited, thereby causing
180V to be outputted to output terminals.

(1) With signal impressed on the gate (Positive voltage),

FET gets short-circuited (a conducting wire of zero (0)
resistance); and

(2) With no signal impressed on the gate (GND), FET gets

open-circuited (a non-conducting wire of ∞ resistance).

Circuit Operation Description

5-16 Samsung Electronics

5-2-3 (D) DRIVER CIRCUIT DIAGRAM

Circuit Operation Description

Samsung Electronics 5-17

5-2-3(E) DRIVER BOARD CONNECTOR LAYOUT

Circuit Operation Description

5-18 Samsung Electronics

Circuit Operation Description

Samsung Electronics 5-19

Circuit Operation Description

5-20 Samsung Electronics

Circuit Operation Description

Samsung Electronics 5-21

Circuit Operation Description

5-22 Samsung Electronics

Circuit Operation Description

Samsung Electronics 5-23

Circuit Operation Description

5-24 Samsung Electronics

Circuit Operation Description

Samsung Electronics 5-25

Circuit Operation Description

5-26 Samsung Electronics

Circuit Operation Description

Samsung Electronics 5-27

Circuit Operation Description

5-28 Samsung Electronics

Circuit Operation Description

Samsung Electronics 5-29

Circuit Operation Description

5-30 Samsung Electronics

Circuit Operation Description

Samsung Electronics 5-31

5-3 Logic part

5-3-1 Logic Board Block diagram

Circuit Operation Description

5-32 Samsung Electronics

5-3-1(A) TDESCRIPTION OF LOGIC BOARD

The logic board consists of the logic main board and the buffer board. The logic main board processes video
signal, generates, and output address driver output signal as well as XY drive signal. The buffer board
stores address driver output signal, and sends the signal to the address driver IC (COF module).

5-3-1 (B) NAME AND DESCRIPTION OF MAJOR COMPONENTS OF LOGIC BOARD

Logic Board

Login Main

Function

- Video signal processing (W/L, Error diffusion, APC)

- Outputs address drive control signal, and data signal to buffer board.

- Outputs XY drive board control signal.

Buffer board

E Buffer board

F Buffer board

Sends data and control signal to left-bottom COF

Sends data and control signal to right-bottom COF

Circuit Operation Description

Samsung Electronics 5-33

5-3-1(C) WAVEFORMS IN NORMAL OPERATION

If the PDP unit and the logic board is in normal operation, the operation LED of Figure 1 would blink at
about 1 second interval.
If the unit is out of order, check the status of the operation LED through eye-inspection first. If the behavior
of the operation LED is different from that of normal state, you have to replace the board. To check trouble
on the board, the following logic board test procedures described below.

❑ 42°” SD s1.0 logic main board T/S

Required test equipment: : - Oscilloscope (digital 400 MHz 3 channel or more)

- Multi meter

Other equipment: : - DC power supply (5V: 1EA)

- Sub-PCB ASS'Y for JIG: 1 EA

Name

LVDS Connector

Operation LED

Key-Scan Connector

256k

Y Connector

X Connector

LE01 (Address Buffer Connector)

LE02 (Address Buffer Connector)

Power Fuse

Power Connector

No

1

2

3

4

5

6

7

8

9

10

Function

Input connector to receive encoded RGB, H, V, DATAEN, and DCLK signal.

It shows Sync and clock are properly received by the logic board.

Connector to connect key scan board to check and adjust 256K data.

EEPROM including gamma table, APC table, drive signal timing and other options

Connector to output Y drive board control signal

Connector to output X drive board control signal

Connector to output address data, and control signal to the E and F buffer boards.

Connector to output address data, and control signal to the E and F buffer boards.

Fuse connected to the power source line of the logic board.

Connector to connect the supply power (5V) with the logic board.
drive board control signal.

Circuit Operation Description

5-34 Samsung Electronics

(1) First, perform eye-inspection and short circuit inspection for the power stage of the logic board to exam-

ine. Then, perform the following examinations on the board in order if no problem was found.

(2) Replace IC2017(256K EEPROM) of the logic board with Test EERPOM. Change the clock setting of the

logic board to internal referring to the configuration procedures described below.

❈ If there is no available Test EEPROM, you can use PG 00 for Windows NT systems, or PG 40 for

NT/PAL compatible systems by setting address 20 to 81, 22 to 00, 23 to 00,and 70 to 01.

(3) Connect power(5V) to LD1, and check that LED(LD2000) on the left top of the board blinks at about 1

second interval.
(4) If the logic board is out of order, the LED would blink too fast or not be lighted on.
(5) If no problem was found in the above examination, connect sub-PCB for logic output examination, mea-

sure output waveform, and compare the waveform with the appended waveform of normal state.

Record either OK or NG after examination.
(6) Check drive Y s/w, drive X s/w and address signal in order.
(7) Set probe 1 of oscilloscope to trigger signal, and connect it to the TP31 of the logic board.
(8) Set oscilloscope to 2ms/div. After adjusting probe 2 to 5V/div, check output signal.
(9) After T/S, turn off the power supply, and disconnect connector.
(10) Record the result on the examination sheet (either OK or NG).

❐ Jumper settings to select internal or external clock

On the top of the logic main board, there is option jumper (CN01) that allows selecting internal/external

clock. While T/S, set it to internal clock as the following figure shows.

❈ It is set to external clock in normal. Set it to internal clock while examination, and set it to external

clock again after examination.

Figure 1. Jumper Settings to Select Internal / External Clock Signal

Circuit Operation Description

Samsung Electronics 5-35

131

Figure 2. Layout of 42" Signal Logic Main Board.

160mm

LA03

CN01

LD1

320mm

LD2001

CN05

CN06

GND1

256k

F2 F1

IC2001

F3

GND3

IC2010

IC2002

IC2011

GND4

IC2012

GND2

L
Y
1

IC2003

RST

IC2013

CN02

IC2017

SW2001

TP13

GND5

LX1 LE01 LE02

Circuit Operation Description

5-36 Samsung Electronics

(1) Checking Y S /W

Figure 3. Connecting The Logic Main Board and The Test JIG Board

Figure 4. Connecting Oscilloscope Probe 1 (Trigger)

30

LA03

CN01

131

F2 F1

RST

IC2017

F3

IC2002

IC2003

CN02

SW2001

LD2001

CN05

CN06

GND1

GND2

L
Y
1

L
Y
1

IC2001

256k

LD1

GND3

IC2010

IC2011

GND4

IC2012

IC2013

TP13

GND5

1

1

LX1 LE01 LE02

LX1 LE01 LE02

113

80

180

GND5

TP13

Circuit Operation Description

Samsung Electronics 5-37

! Connect Probe 2 to LY1 30 of The JIG Board (8 (LE-Y) of The Logic Main Board F2016).

# Connect Probe 2 to LY1 25 of The JIG Board (6 (TCS_Y) of The Logic Main Board F2016).

@ Connect Probe 2 to LY1 28 of The JIG Board (7 (STB_Y) of The Logic Main Board F2016).

Circuit Operation Description

5-38 Samsung Electronics

$ Connect Probe 2 to LY1 24 of The JIG Board (5 (CLK_Y) of The Logic Main Board F2016).

^ Connect Probe 2 to LY1 20 of The JIG Board (7 (SIA) of The Logic Main Board F2016).

% Connect Probe 2 to LY1 21 of The JIG Board (8 (SIB) of The Logic Main Board F2016).

Circuit Operation Description

Samsung Electronics 5-39

& Connect Probe 2 to LY1 14 of The JIG Board (5 (YSP) of The Logic Main Board F2016).

* Connect Probe 2 to LY1 13 of The JIG Board (6 (YSC) of The Logic Main Board F2016).

( Connect Probe 2 to LY1 10 of The JIG Board (7 (YER) of The Logic Main Board F2016).

Circuit Operation Description

5-40 Samsung Electronics

) Connect Probe 2 to LY1 9 of The JIG Board (8 (YP) of The Logic Main Board F2016).

1 Connect Probe 2 to LY1 8 of The JIG Board (6 (YRR) of The Logic Main Board F2016).

2 Connect Probe 2 to LY1 5 of The JIG Board (5 (YG) of The Logic Main Board F2016).

Circuit Operation Description

Samsung Electronics 5-41

3 Connect Probe 2 to LY1 4 of The JIG Board (8 (YF) of The Logic Main Board F2016).

4 Connect Probe 2 to LY1 2 of The JIG Board (6 (YR) of The Logic Main Board F2016).

5 Connect Probe 2 to LY1 1 of The JIG Board (5 (YS) of The Logic Main Board F2016).

Circuit Operation Description

5-42 Samsung Electronics

6 Connect Probe 2 to 1 and 72 of IC2005, and Check The Following Waveform Shows at Oscilloscope.

7 Connect Probe 2 to 1 and 72 of IC2006, and Check The Following Waveform Shows at Oscilloscope.

8 Connect Probe 2 to 1 and 81 of IC2007, and Check The Following Waveform Shows at Oscilloscope.

Circuit Operation Description

Samsung Electronics 5-43

9 Connect Probe 2 to 1 and 81 of IC2008, and Check The Following Waveform Shows at Oscilloscope.

Circuit Operation Description

5-44 Samsung Electronics

! Connect Probe 2 to LX1 2 of The JIG Board (6 (XRR) of The Logic Main Board F2016).

@ Connect Probe 2 to LX1 4 of The JIG Board (7 (XR) of The Logic Main Board F2016).

# Connect Probe 2 to LX1 6 of The JIG Board (8 (XS) of The Logic Main Board F2016).

(1) Checking X S /W

Circuit Operation Description

Samsung Electronics 5-45

$ Connect Probe 2 to LX1 8 of The JIG Board (5 (XF) of The Logic Main Board F2016).

% Connect Probe 2 to LX1 10 of The JIG Board (6 (XG) of The Logic Main Board F2016).

Circuit Operation Description

5-46 Samsung Electronics

■ 42°”SD logic buffer board T/S

Required test equipment : -.Oscilloscope (digital 400 MHz 2 channel or more)

Other equipment : -.DC power supply (5V : 1EA )

-.Multi meter

-.Logic board : 1EA

-.Sub-PCB ASS'Y for JIG: 1 EA

(1) First, perform eye-inspection and short circuit inspection for the power stage of the logic board to

examine. Then, perform the following examinations on the board in order if no problem was found.

(2) If no problem was found in step ®ÿ, connect buffer board as Figure 5 shows, connect sub-PCB for

COF data check and replace 256K EEPROM with Test EERPOM for the logic board to output full­white pattern.

(3) Supply 5V to the logic board, and check that the LED on the left-top of the board blinks at about 1 sec-

ond interval. If no problem is found, measure the output waveform of sub-PCB, and compare it with
that of normal state.

(4) Check EC1, EC2, EC3, EC4, FC5, FC6, and FC7 in order. You can only examine doubtable waveform

selectively.
(5) Set probe 1 of oscilloscope to trigger signal, and connect it to the TP31 of the logic board.
(6) Set oscilloscope to 2ms/div. After adjusting probe 2 to 5V/div, check output signal zooming important

points.
(7) Appended waveform is for full-white input pattern. Output waveform when each of R, G and B pat-

tern is supplied individually is summarized in the following table.

❈ For short check, it would be better to test waveform in the order of R, G and B pattern.

R0(TP13,TP49), R1(TP16,TP52), G0(TP14,TP50), G1(TP17,TP53),
B0(TP15,TP51), and B1(TP18,TP54) in The JIG Board

(8) After T/S, turn off the power supply, and disconnect the connector. Record the result on the examina-

tion sheet.

Output waveform for the applied pattern

Full-white R G B

The same as the attached waveform

Control signal output of

sub-PCB for COF data check

R, B, G data signal output of

sub-PCB for COF data check

The output wave­forms of all of the
R, G, B TP’s are the
same as the
attached waveform.

The output wave­forms of all of the
R0, R1 TP’s are the
same as the
attached waveform.

The output wave­forms of all of the
G0, G1 TP’s are the
same as the
attached waveform.

The output wave­forms of all of the
B0, B1 TP’s are the
same as the
attached waveform.

Circuit Operation Description

Samsung Electronics 5-47

Figure 5. 42” Single logic buffer

LA03

CN01

131

IC2010

CN05

IC2001

IC2002

CN06

IC2011

GND1

GND4

GND5

IC2012

IC2013

TP13

IC2003

SW2001

CN02

RST

IC2017

256k

GND2

LX1 LE01 LE02

L

1

Y

GND3

LD1

F3

F2 F1

LD2001

Circuit Operation Description

5-48 Samsung Electronics

! TP 13 ~ 18, 49 ~ 54 of The Test JIG Board

@ 21, 57 of The Test JIG Board

# 24, 31, 60, 67 of The Test JIG Board

(3) Checking buffer data

Circuit Operation Description

Samsung Electronics 5-49

$ TP 25, 32, 61, 68 of The Test JIG Board

% TP 19, 26, 55, 62 of The Test JIG Board

^ TP 20, 27, 56, 63 of The Test JIG Board

Circuit Operation Description

5-50 Samsung Electronics

5-4 Block Diagram

5-4-1 42” Monitor Scaler Block Diagram

CT_F /B
S

SCT_CVBS

MAIN_Y/C

VD_Pb/ SCT_B

MAIN_CVBS

D

M_RSTR

5V_A

RESE TQ

3. 3V_D

SDA/ S CL

DVD_Y / SC T_ G

DVD_P r / S CT _R

( VPC3230- I CP01)

Sub Vi deo Decoder ( PIP)

M_RE

M_OE

LLC1

RESETQ

3. 3 V_D

SDA/ S CL

VF I EL D

Y/ UV 8 Bi t

CLK2 : 27MHz

LLC1 : 13.5MHz

I nter l ace To Pr ogres si ve

Main Vid eo Decoder

Y[ 0~7]

3. 3V_D

RESET Q

SDA3/SC L3

3. 3 V_D, 2. 5 V_t t x

C[ 0~7]

( 81V04160-I CP02)

Megat ext SDA6000

C[ 0~7]

Y_[ 0~7]

YIN/UVIN[0~7]

(SDA9400 - IC202)

H1/ V1 _OUT

RESETQ

SDA/SCL

( VPC3230- I C201)

I VVS

IVHS

CAPT_CVBS

I VHS/ I VVS

I VCLK/ I VPE N

3CH. DA Conver t er

( SDA9280 - I C703)

5V_A,3.3V_D

V-YPbPr

TTX_F B/ R/ G/ B

A[ 0~20]

CLK2 0

D[ 0~15]

EPROM

(I CT002-M27V160)

SDRAM

(I CT003-4S641632)

EEPROM

5V_A

RESE TQ

SDA/SCL

HS/ V S_ OUT1

IR Module

Ent ernal Keypad

KEY[ 1~4]

LEDRED/ GRN

I RRCVR/ I RRCVR1

(M4LV- 32 - I C401)

SCP

SDA/ S CL

( 24C16 - I C302)

SCL1 /SDA1

SEL_[ 0~2]

3. 3VA
SDA/SCL

HS_ OUT1

R/ G/ B_ OUT

EEPROM

( 24C16 - I C302)

Sandcast l e Pul e Gen

LVDS( DS9 0C385 - I C503)

LVS/LHS/

R/ G/B 8Bi t

Conv er s i on Wi t h CPU)

OSD M i x e r , Fr a me R at e

Image Pr ocess or (I mage Scal i ng,

VHS/VCL K

R/G/B [ 0~7]

( AD9 88 4 - I C 80 1 )

A/D Conv er t er W it h PLL /Gain A mp

VS _OUT 1

Fl ash Memory

ROMWEn

( PW364 - I C301)

SR[ 0~23]

AD_R _OUT

A[1~19]

SQ[ 0~23]

ROMOEn

D[0~15]

SOG/MHS/ PCL K

CK INV/ CL AMP

( AD9884 - I C101)

A/ D Co nv er t e r Wi t h PL L / Gai n Amp

AD_G_ OUT

AD_B _OUT

LENG

Sram

29LV160 - OTP01

MHSYN C

616V1000 - I C602

BHENn

RAMWEn

RAMOEn

A[ 0~18]

D[ 0~15]

PC_DET

TH_DET

PROTECT

FAN_DET

DCKE XT : 2 6 MHz

MCKEXT : 130 MHz

OSC

Ser i al

RXD/ TXD

MCOAST

5V

3. 3V_A

Interface

MAX232 - I C603

CAPT_CVBS

I VVS/ I VHS

3D_Comb

Mai n CVBS

Mai n CVBS

Mai n Y/ C

SCT_F B/ SCT_CVBS

480P

DVD- Y/SCT _G

DVD- Pb/SCT- B

480i

S-V ideo( Y/C)

DVD- P r / SC T_ R

Scar t Jack

DVD YPbPr

( 480P, 480i )

Component Input Jack

( YPbPr RGB)

( CXA2101- IC402)

Mul ti Component Pr ocessor

9VA

SDA/SCL

DTV Y/ Pb/Pr

Component Input Jack

DTV YPbPr

HS_ OUT2 / V S_OUT 1

R/ G/ B_ OUT

Analog Swit ch

( BA7657F- I C501)

PC_DET

HD_PC_SW(PW364)

PC_R/G/B, H/V- SYNC

VGA T o SXGA

( Vf : 56 TO 75Hz)

( Hf : 31 TO 80KHz )

( 480P, 7 20P, 10800i )

PC In put ( 15Pi n D- sub)

PC_V- SYNC

DDC I C

( 24LC21- I C506)

Circuit Operation Description

Samsung Electronics 5-51

5-5 Major In/Out Signal Waveforms and Voltages of the Unit

5-5-1 In/Out Waveforms

❏ Y output waveform

- It is the waveform when it is not connected to the panel.

* You should check that a single scan waveform is outputted!!!

Y output waveform (200us/div, 100V/div)

* You should check that energy recovery software is in operation!!!

Circuit Operation Description

5-52 Samsung Electronics

❏ X output waveform

- It is the waveform when it is not connected to the panel.

X output waveform (200us/div, 100V/div)

* You should check that energy recovery software is in operation!!!

Circuit Operation Description

Samsung Electronics 5-53

5-6 Main I/O signal pules and voltages

5-6-1 Signal Pulses of Image Board(Input Signal Conditions : 7 Color bar)

Circuit Operation Description

5-54 Samsung Electronics

Circuit Operation Description

Samsung Electronics 5-55

5-56 Samsung Electronics

MEMO

Troubleshooting

Samsung Electronics 6-1

6. Troubleshooting

6-1 Entirely no screen

Remove SMPS output connector

(connect Video B d only)

Normal

Power on

Normal

SMPS Output

Voltage

Normal

Logic Connect Power

LED Light-on
(Power, Sink)

Normal

X-B d Connect Power

Abnormal

Abnormal

Abnormal

5V Output

Abnormal

AC Input

Normal

Replace SMPS

Replace Logic B d

Normal

Normal

Replace Video B d

Change Fuse

X-B d Output

Normal

Y-B d Connect Power

Y-B d Output

Normal

Replace Panel

Abnormal

Replace X-B d

Abnormal

Replace Y-B d

6-2 Samsung Electronics

Alignment and Adjustments

6-2 Partly no screen

Power on

Upper part no screen

No

Lower part no scree

No

1//14 Screen part

Abnormal

No

1/28 no screen

Yes

Yes

Yes

Yes

Replace Upper Scan Buffer B d

Replace Lower Scan Buffer B d

Replace Corresponding

Address Buffer B d

Replace Panel

No

1/7 no screen

Yes

Replace Panel

Troubleshooting

Samsung Electronics 6-3

6-3 Checking the Board (Unit)

6-3-1 Y buffer

- To check the main board, you have to check the Y buffer first.

- After separating Y Main and Y buffer board,

- Check the Diode between OUTL and OUTH, and make sure that the forward voltage drop is between

0.4 and 0.5V.

- Check that the resistance between the two terminals is more than several kW.

Troubleshooting

6-4 Samsung Electronics

6-3-2 Y Main

- After connecting Y main and Y buffer board, check that one of the output waveforms from OUT 1, 2, 3
or 4 is the same as that of the appendix 1 when power is supplied.

Troubleshooting

Samsung Electronics 6-5

6-3-3 X Board

- Check that one of the output waveforms from X-OUT 1 or 2 is the same as that of the appendix 2
when power is supplied.

X- OUT1

X- OUT1

Troubleshooting

6-6 Samsung Electronics

6-3-4 SMPS

- Check output voltage.

- If output voltage is not detected, check the following lists:

(1) Check fuse
(2) In case of +5V(D), check that D305 is short
(3) In case of VSAMP, check that D506 is short
(4) In case of VA, check that D303 is short
(5) In case of VS, check that pin 2 and 3 of Q303 are short
(6) In case of Q6S, check that pin 2 and 3 are short
(7) Check that BRD101S is short

Troubleshooting

Samsung Electronics 6-7

6-3-5 Scaler Borad

1. PW364 Input Clock

(1) MCKEXT

Check IC406(IC502) pin 5.
Power on : MCKEXT = 97.5MHz
Standby : MCKEXT = 48.75MHz

(2) MCKEXT, DCKEXT

Check IC407(ICS502) pin 25. DCKEXT = 65MHz

(3) VCLK

Check IC203(SDA9400) pin 26. VCLK = 27MHz

(4) GCLK

Check IC401(AD9884) pin 115(TP404).
GCLK is differently seen according to PC input signal format(VGA, SVGA, XGA)
GCLK = 15MHz ~ 50MHz(This value is apparently half of the clock frequency of the relevant PC input signal format.

2. VPC3230

- Check power is supplied(5V, 3.3V).

- Check Reset(pin 15) is high.

- Check I

2

C-bus(pins 13, 14)

- Check the signal input to Y signal(pin73), C signal(pin 71), PLL DVD-Y signal (pin 72).

- Check the output clocks LLC1(pin 28), LLC2(pin 27). (LLC1 = 13.5MHz, LLC2 = 27MHz)

- Check the output H sync(pin 56) and check V sync(pin 57) is output.

- Check output digital data.

3. SDA9400

- Check power is supplied(3.3V).

- Check Reset(pin 30) is high.

- Check I

2

C-bus(pins 20, 21)

- Check clock is input.(pins 28, 54 : 27MHz. pin 29 : 13.5MHz)

- Check digital data input.

- Check the input H sync (pin 23) = 15.75MHz, V sync (pin 22) = 60Hz

- Check digital data input.

- Check the output H sync (pin 60) = 31.5KHz, V sync (pin 61) = 60Hz, VCLK (pin 26) = 27MHz

4. AD9884(IC101)

- Check power is supplied(3.3V)

- Check I

2

C-bus(pins 29, 30)

- Check PC signal, HD-component signal is input.

- Check the input signal GREF (pin 40). The GREF signal applies to a fixed form of the input H sync signal.

- Check the output signal GFBK (pin 117). The GFBK signal applies to a fixed form of PLLD H sync signal.

- Check the output signal GCLK (pin 115). The GCLK is differently seen according to the PC input signal format(VGA, SVGA, XGA).
GCLK = 15MHz ~ 50MHz This value is apparently half of the clock frequency of the relevant PC input signal format.

- Check digital data output.

Troubleshooting

6-8 Samsung Electronics

5. AD9884(IC801)

- Check power is supplied(3.3V).

- Check I

2

C-bus(pins 29, 30)

- Check Video signal is input.

- Check the input signal 2HS (pin 40 or TP406)

- Check the output signal VHS (pin 117 or TP409)

- Check the output signal VCLK (pin 115 or TP408)

- Check digital data input.

6. PW364 Reset

- When the Reset switch is pressed. if OTP01(29LV160T) pin 28(TP151) undergoes ransition.
PW364 operates and OTP01 also does. Unless transition happens, it means PW364 is not operating.

7. PW364 Communication

- Operate the PC hyper terminal Settings are as follows :

Model Selection : Direct connect to com1
No. of Bit per second : 57600
Data Bit : 8
Parity : None
Stop Bit : 1
Flow Control : None

- Whenever the Reset switch is pressed, the following is displayed on the PC hyper terminal screen.

CBooter V1.5 & 2000.01.26
CBooter V1.5 & 2000.01.26
CBooter V1.5 & 2000.01.26

8. SDA6001

- Check power is supplied ( 5V, 3.3V )

- Check I

2

C-bus ( Pins 98, 99 )

- Check Video Signal is input ( Pin 121 )

- Check the input signal VVS, VHS ( Pins 102, 103 )

- Check the output Signal FB, R, G, B ( Pins 105, 112, 113, 114 )

7. Exploded View & Parts List

7-1 PS42P2STD/XEC

Exploded View & Parts List

Samsung Electronics 7-1

1 CABINET-FRONT;42P2,HIPS HB,G4309,SV012P+ 1 S.N.A
2 BADGE-BRAND;PDP,AL FORGING,L68(45),SILVE 1 S.N.A
3 KNOB-MASTER;PDP,ABS,HB,G3676,SV012P T/S 1
4 SPRING ETC-CS;-,SUS304,-,-,OD6,N7,OD6,-, 1 S.N.A
5 BRACKET-FILTER SIDE L,ASSY;AL 6063,42P2S 1 S.N.A
6 WINDOW-RMC;PDP,ACRYL VIOLET,20:1 1 S.N.A
7 ASSY PCB MISC-REMOCON MODULE;,42 PDP 1
8 SCREW-TAPTITE;RH,+,2S,M3,L10,ZPC(YEL),SW 2
9 ASSY SUB-PCB CONTROL;PS42P2S,D53A,AA95-0 1
10 BRACKET-FILTER BOT,ASSY;AL 6063 EXT,42P2 1 S.N.A
11 SCREW-TAPTITE;RH,+,B,M4,L10,ZPC(YEL),SWR 8
12 SCREW-ASS’Y MACH;WSP,PH,+,M3,L8,ZPC(YEL) 6
13 ASSY SUB-PCB,POWER ON/OFF;SPD-42P2S,D51A 1
14 BRACKET-POWER;,SECC,T1.0 1 S.N.A
15 SCREW-TAPTITE;RH,+,B,M4,L15,ZPC(BLK),SWR 2 S.N.A
16 BRACKET-FILTER SIDE R,ASSY;AL 6063,42P2S 1 S.N.A
17 MIRROR-GLASS;42PDP,MESH,984*584,56%,T3.0 1
18 SPONGE-EMI,FILTER;42P2,SHIELD-FORM,T1.2, 1 S.N.A
19 BRACKET-FILTER,TOP;42P2,AL 5051,T1.5 1 S.N.A
20 SPACER-FILTER;42P2,P/U V0,L,BLK 2 S.N.A
21 SPONGE-EMI,FILTER;42P2,SHIELD-FORM,T1.2, 1 S.N.A
22 COVER-BACK,BOT;42P2,AL,T1.2 1 S.N.A
23 SCREW-TAPTITE;RH,+,B,M4,L15,ZPC(BLK),SWR 27 S.N.A
24 SPACER-FILTER;42P2,P/U V0,L,BLK 2 S.N.A
25 ASSY-PANEL,PDP,SVC;,SPD-42P2S,D51A,300X3 1
26 SCREW-TAPTITE;RH,+,B,M4,L15,ZPC(BLK),SWR 27 S.N.A
27 SPONGE-EMI,BOT(R);PDP,SHELD FROM 1 S.N.A
28 GUIDE-STAND ASSY;42P2S,AL DIECASTING 2 S.N.A
30 BRACKET-LINE,FILTER;SPD-42P2H,SPC,T1.0,N 1 S.N.A
31 ASSY SUB-PCB,LINE FILTER;PS42P2S,D53A,AA 1
32 SCREW-ASS’Y MACH;WSP,PH,+,M3,L8,ZPC(YEL) 6
33 FILTER-EMI AC LINE;250V,10A,UL,CSA,D,N,S 1
34 ASSY-PBA,SMPS;,SPD-42P2S,D51A,42SD,90~26 1
35 ASSY PDP P-PBA,L-MAIN;,S42SD,D51A,D53A,4 1
36 ASSY PCB MISC-TTX SCALER;PDP_PAL_M/TTX,P 1
37 SHIELD-SCALER,BOT;42P2,SPTE,T0.3 1 S.N.A
38 SCREW-ASS’Y MACH;WSP,PH,+,M3,L8,ZPC(YEL) 3
39 ASSY PCB MISC-SOUND;PS-42P2S,D53A,RCA 4P 1
40 ASSY SUB-PCB TERMINAL;PS42P2S,D53A,AA95- 1
41 SPONGE-EMI,BOT(L);PDP,SHELD FROM 1 S.N.A
42 COVER-TERMINAL;42P2,SUS,T0.3,SCRAT 1 S.N.A
43 COVER-BACK,ASSY;42P2S,AL5052,T1.2,KUJU,T 1 S.N.A
44 SCREW-TAPTITE;RH,+,B,M4,L12,ZPC(BLK),SWR 38 S.N.A
45 SCREW-TAPTITE;RH,+,B,M4,L10,ZPC(YEL),SWR 6
46 HANDLE-SET;PDP,ABS,HB,BLK 4 S.N.A
47 SCREW-TAPTITE;RH,+,B,M4,L15,ZPC(BLK),SWR 27 S.N.A
48 CABINET BACK;42P2,HIPS V2,BLK WP1000 1
49 SCREW-TAPPING;-,SWRCH18A,M4,L20,RH,+,2S, 16 S.N.A
50 SCREW-ASS’Y MACH;WP,PH,+,M8,L16,ZPC(BLK) 4

No Code No Description Specification Q’ty Remark S.N.A

You can search for the updated part code through ITSELF web site.
URL : http://itself.sec.samsung.co.kr

Electrical Parts List

Samsung Electronics 8-1

1 BN96-00178B ASSY COVER P-CABINET FRONT;DP,42P2,HIPS
1 BN96-00179B ASSY COVER P-CABINET BACK;DP,42P2,HIPS V
1 0203-001290 TAPE-OPP MASKING;ANT 100C,T0.073,W30,L50
1 6003-000333 SCREW-TAPTITE;RH,+,2S,M3,L10,ZPC(YEL),SW
1 6003-001020 SCREW-TAPTITE;RH,+,B,M4,L10,ZPC(YEL),SWR
1 6003-001026 SCREW-TAPTITE;RH,+,B,M4,L15,ZPC(BLK)
1 6006-001035 SCREW-ASS’Y MACH;WSP,PH,+,M3,L8,ZPC(YEL)
1 6006-001039 SCREW-ASS’Y MACH;WSP,PH,+,M4,L12,ZPC(YEL
1 6006-001112 SCREW-ASS’Y MACH;WP,PH,+,M8,L16,ZPC(BLK)
1 AA60-10050T SCREW-TAPPING;-,SWRCH18A,M4,L20,RH,+,2S,
1 AA60-00110C SPACER-FILTER;42P2,P/U V0,L,BLK
1 AA60-00110D SPACER-FILTER;42P2,P/U V0,L,BLK
1 AA61-00829A BRACKET-PLATE;SPD-42P1S,PBS,T0.2,PRESS
1 AA73-00005B RUBBER-CAP;FLAT,PRJ,SILICONE RUBBER,WHIT
1 BN61-00269A BRACKET-FILTER,TOP;DP,42P2,AA61-01059A
1 BN61-00270A BRACKET-FILTER SIDE R,ASSY;DP,42P2,BN61­1 BN61-00271A BRACKET-FILTER SIDE L,ASSY;DP,42P2,BN61­1 BN61-00272A BRACKET-FILTER BOT,ASSY;DP,42P2,AA61-010
1 BN61-00273A BRACKET-SHIELD,ASSY;DP,42P2,AA61-11012A
1 BN61-00274A GUIDE-STAND,ASSY;DP,42P2,AA61-00340A
1 BN64-00123A KNOB-CONTROL;DP,42P2,AA64-01565B
1 BN72-00315A SPONGE-EMI,BOT(R);PDP,SHELD FROM
1 BN72-00316A SPONGE-EMI,BOT(L);PDP,SHELD FROM
1 AA68-01070A LABEL-MODEL;-,A/P,-,30,20,-,-,-,ALL MODE
1 AA68-50509A LABEL-BOX;A/P 90(G),ALL MODEL,-,WHT,L250
1 BN68-00277A LABEL-RATING;PDP,T/P, ,124,114,PAL
1 AA68-01669A LABEL-BAR,CODE;PDP MODEL,ART PAPER,15,50
1 AA68-50502A LABEL-CONFORMATION;W/P100(G),CTV,ITALY,1
1 BN63-00442B COVER-TERMINAL,TV;DP ,42P2,AA63-00491F
1 AA98-00188A ASSY-PBA,SMPS;,SPD-42P2S,D51A,42SD,90~26
1 BN94-00298K ASSY PCB MISC-SOUND;PS-42P2S,D53A,RCA 4P
1 BN94-00298P ASSY PCB MISC-CONTROL;DP,PS-42P2S,D53A,A
1 BN94-00298Q ASSY PCB MISC-TERMINAL;DP,PS-42P2S,D53A,
1 BN94-00298R ASSY PCB MISC-LINE FILTER;DP,PS-42P2S,D5
1 BN94-00298S ASSY PCB MISC-POWER ON/OFF;DP,PS-42P2S,D
1 BN94-00298U ASSY PCB MISC-TTX SCALER;PS-42P2ST,D53A,
1 BN94-00298V ASSY PCB MISC-REMOCON MODULE;DP,PS-42P2S
1 AA61-20285A HOLDER-BOX;3456,PP,-,-,-,WHT,VO
1 AA63-10007C BAND-PP;-,-,-,W18,-,CLEAR,1G
1 AA69-00744D BAG-SHEET;-,HDPE PE FOAM,T0.015,W1200,H1
1 AA69-00867B CUSHION-SET;42,52P2,EPP C=0.02
1 AA69-01088Q PALLET -SET;42P2S,PAPER,1290,835,130
1 AA69-01480A PAD-TYPE;42P2,DW-2 AB,370,1210,YEL
1 3301-001110 CORE-FERRITE;ZZ,35x19.5x9.0mm,-,­1 3301-001305 CORE-FERRITE;AE,30X15X34(39)MM,1500,2800
1 4301-000103 BATTERY-ALKALINE;1.5V,750mAH,AAA,10.5x44
1 BN68-00337A MANUAL USERS;PS42P2ST,ITA,W/P100G,D53A,B
1 6801-001009 WARRANTY CARD;EUROPE(12),8
1 6801-001017 CARD REGISTRATION;XEC,SPANISH,MOJO100,L1
1 6801-001018 CARD REGISTRATION;XET,ITALY,MOJO100,L150
1 6801-001015 CARD REGISTRATION;XEG,GERMAN,MOJO100
1 6801-001016 CARD REGISTRATION;XEF,FRENCH,MOJO100,L15
1 6801-001019 CARD REGISTRATION;XEN,DUTCH,MOJO100,L150
1 6801-001020 CARD REGISTRATION;XEP,PORTUGAL,MOJO100,L
1 AA39-00034B CABLE RCA;PS42P2S,NON-UL,2P/2P,RED/WHT,R
1 AA39-00199A POWER CORD;SPD-42P1S,LP-34A,NF USE 1181
1 AA39-00288A CBF SIGNAL;HPL5025M,15P/15P,2990,1830MM,
1 AA39-00300A CABLE RCA;PS42P2S,NON-UL,1P/1P,YEL,RCA,R
1 AA39-00311A CBF SIGNAL;PDP,9P/1P,UL2851#28,5000MM,UL
1 AA39-40001E CABLE-S.VHS;-,S.VHS,1500mm,0.12/10,BLK,9
1 AA59-00295A S/W DRIVER;PS50PHT(SCART),INSTALL CD,1.4
1 BN68-00347A MANUAL USERS;PS42P2ST/PS50P2HT,EN/GE/FR/

1 AA69-00862A BAG PE;-,HDPE PE FOAM,T0.03,W400,H240
1 BN59-00308A REMOCON;,TM63,PDP,43,G6671B,TTX,E/X
1 AA69-01319A PACKING CASE-IN;SPD-42P2S,H-3 AB,C3,770,
1 AA69-01327R PACKING CASE-OUT;42P2,H-3 AB,C3,YEL,SESA
1 AA69-01615P PACKING-PROTECT;42P2,H-3 AB,C3,YEL,SESA(
1 AA39-00114F CBF HARNESS;,12P,35155-1200,S,100MM,1007
1 AA39-00267B LEAD CONNECTOR ASSY;PS-42P2SM,UL1007#26,
1 AA39-00274B LEAD CONNECTOR ASSY;PS-42P2SM,UL2835#28,
1 AA39-00301A LEAD CONNECTOR ASSY;PS-42P2S,UL1007#26,U
1 AA63-10002A BAND-TIE;-,NYLON66 V2,-,-,L100,NTR,­1 AA67-00112A MIRROR-GLASS;42INCH,P1S,MESH,55% 0.15OHM
1 BN96-00213A ASSY PDP P-MODULE;M3,3A,42P2S,D51A,S1.0,
1 AA02-00022A TAPE ETC;SESA,T0.3,75,132,BLK
1 BN60-00001A SCREW-CHASSIS;HEX,HEX,-,11,NI PL T,NI PLA
1 6001-000578 SCREW-MACHINE;TH,+,M3,L8,ZPC(YEL),SWRCH1
1 AA68-00340A LABEL-WARRANTY ;-,-,-,WHT,75MM,20
1 AA68-00345A LABEL-TRANSFER WARRANTY;-,TF-53B5D
1 AA68-00344A LABEL-TRANSFER BOX;-,TF-53B
1 6003-000334 (SNA)SREW-TAPTITE;RH+2S,M3,L6,ZPC

8-1 PS42P2STD/BWT

Level Loc. No. Code No. Description ; Specification Remark

8. Electrical Parts List

Level Loc. No. Code No. Description ; Specification Remark

You can search for the updated part code through ITSELF web site.
URL : http://itself.sec.samsung.co.kr

8-2 Samsung Electronics

MEMO

Wiring Diagram

Samsung Electronics 11-1

11. Wirng Diagram

CN601

CN503

CN609

(12P)

(13P )

(6P)

CN301

(31P )

Control

CN606 (5P)

Remocon

CN302 (3P)

Power S/W

LP1

(3P)

CN812

CN603(4P)

Terminal

CN602

(9P)

SOUND

C
A

(5P)

CN601

(12P)

CN4004

(12P )

SXS
Y

Speaker

BUFFER

SL
SA

LD1

(4P)

LA03

(31P)

(13P)

CN5008

CN4005 (13P)

FE3 (3P )EF2

EC5 (40P) EC6 (40P) EC7 (40P)

FE1 (40 P )EF1

CN1 (3 P)

LE0 2LE0 1

LX1

CN5002 LY1 (30P)

EC4 (40P)

EL1 EL2

EC2 (40P)

YLOGICSMPS X SCALER

EC1 (40P) EC3 (40P)

CN5404 CN5007 (12P)

CN5405 CN5006 (12P)

CN5406 CN5001 (13P)

CN5504 CN5005 (12P)

CN5505 CN5004 (12P)

CN5506 CN5003 (13P)

Wiring Diagram

11-2 Samsung Electronics

MENO

TP10

TP11

TP09

12. Schematic Diagrams

Samsung Electronics

Schematic Diagrams

12-1

12-1 SCALER1 SIGNAL INPUT, LVDS OUTPUT

TP09 DTV/PC H-SYNC

TP10 DTV/PC V-SYNC

TP11 DTV/PC B-OUT

Schematic Diagrams

12-2 Samsung Electronics

12-2 SCALER2 VIDEO DECODER MAIN, PROGRESSIVE CON.

TP01 Main-Y IN

TP02 Main-C IN

TP03 VS-OUT

TP04 HS-OUT

TP05 LLC1

TP06 CLK2

TP07 HOUT(IVHS)

TP08 VOUT(IVVS)

TP02

TP01

TP03

TP04

TP05

TP06

TP05

TP06

TP06

TP04

TP03

TP08TP07

Samsung Electronics

Schematic Diagrams

12-3

12-3 SCALER3 VIDEO DECODER PIP, FIRST IN/OUTPUT

Schematic Diagrams

12-4 Samsung Electronics

12-4 SCALER4 VIDEO DA CON.

Samsung Electronics

Schematic Diagrams

12-5

12-5 SCALER5 VIDEO PROCESSOR, SAND CASTLE PULSE GEN.

TP12 HS-OUT

TP13 VS-OUT

TP14 SCP H-BLK

TP15 SCP V-BLK

TP16 SCP CLAMPER

TP17 SCP

TP15

TP12

TP13

TP16

TP14

TP17

Schematic Diagrams

12-6 Samsung Electronics

12-6 SCALER6 ADC(VIDEO)

TP18 HS-OUT

TP19 VHS

TP20 VCLK

TP19 TP20

TP18

Samsung Electronics

Schematic Diagrams

12-7

12-7 SCALER7 ADC(PC)

TP21 MHSYNC

TP22 MHS

TP23 PCLK

TP22 TP23

TP21

Schematic Diagrams

12-8 Samsung Electronics

12-8 SCALER8 PW364

TP20 VCLK

TP23 PCLK

TP24 MCKEXT

TP25 DCKEXT

TP23

TP24

TP25

TP18