SAMSUNG NT-Q46 System Schematic Diagram
COM-22C-015(1996.6.5) REV. 3
SAMSUNG PROPRIETARY
D:/users/mentor/Torino2/SR/T2_SR_0309
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
3
2
1
Table of Contents
D
Page.
Page.
Page.
Page.
Page.
Page.
Page.
TORINO 2
PCB Thinckness:1mm
Page.
Page.
Page.
Page.
CPU :
C
Chip Set :
Remarks :
INTEL MEROM
INTEL 965GM & ICH8-M
w/o INTEL AMT
2 SODIMMs
Page.
Page.
Page.
Page.
Page.
Page.
Page.
Page.
Page.
Page.
Model Name :
TORINO 2
Page.
1
2
3
4
5
6
7
8
9~10
11
12~16
17
18
19
20~23
24~27
28
29
30
31
32
33
Page.
PBA Name :
MAIN
Page.
Page.
PCB Code :
BA41-00727A / 728A
Page.3437
Page.
B
Dev. Step :
Revision :
MP
1.0
Samsung
Page. 39
Page.
Page.
T.R. Date :
2007.03.09
Page.
Page.
Page.
Page.
Page.
DRAW
CHECK
APPROVAL
Confidential
Page.
Page.
-
A
4
-
-
3
Page.
Page.
35
36
38
41
42
43
44
45
46
47
48Page.
49
50
51
52
53Page.
2
COVER
OPERATION BLOCK DIAGRAM
POWER DIAGRAM
POWER SEQUENCE
DIAGRAM
POWER RAIL
CLOCK DISTRIBUTION
BOARD INFORMATION
CLOCK GENERATOR (CK-505)
MEROM
THERMAL MONITOR
CRESTLINE (965GM)
DDR2 SODIMM (TOP)
DDR2 SODIMM (BOTTOM)
DDR2 TERMINATION
DISCRETE GFX (NB8M-SE & GDDR3)
ICH8-M
LCD(LVDS) CONN.
CRT CONN.
HDD & ODD CONNECTOR
MICOM
LAN CONTROLLER (10/100M)
ROBSON
USB PORT, MDC CONN. & BLUETOOTH
MINI CARD SOCKET (WLAN/HSDPA/WIBRO)
CARDBUS CONTROLLER(1) & 4IN1
CARDBUS CONTROLLER(2) & 1394(4P)
PCMCIA SOCKET
AUDIO CODEC
AUDIO AMP40Page.
AUDIO JACK
CHARGER
P3.3V_AUX & P5V_AUX
DDR2 POWER
CPU VRM POWER
P1.25V & P1.05V POWER
GFX CORE & P1.5V POWER
SWITCHED POWER
POWER S/W, DMB, DEBUG & KEYBOARD CONN.
LEDS & TOUCHPAD
MOUNT HOLE
TEST POINTS
REVISION HISTORY
DRAW
CHECK
APPROVAL
MODULE CODE
ZHOU JUN
GUO LEI
KEVIN LEE
DATE
DEV. STEP
REV
LAST EDIT
3/9/2007
TITLE
MP
1.0
TORINO 2
COVER
CONTENTS
March 9, 2007 12:03:21 PM
1
SAMSUNG
PART NO.
PAGE
BA41-00727/8A
ELECTRONICS
531
OF
D
C
B
A
SAMSUNG PROPRIETARY
COM-22C-015(1996.6.5) REV. 3
D:/users/mentor/Torino2/SR/T2_SR_0309
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
3
2
OPERATION BLOCK DIAGRAM
1
PCI
mPGA479M Socket-M
CPU
MEROM-4M
Page 9,10
1299 uFCBGA Type
GMCH
965GM/PM
CRESTLINE
Page 12~16
DMI X4
676 FCBGA Type
ICH
ICH8 - M
82801 HBM
Page 23~26
LPC
800MHz FSB
CHANNEL A
667/533 MHz
CHANNEL B
667/533 MHz
C-Link0
AZALIA
IDE
SATA
SPI
CPU2_THERMDA/DC
(CeleronM:667MHz)
D
CLOCK
GENERATOR
CK-505
TFT_LCD
Page 8
12.1" WIDE
1280 X 800
Page 28
CRT
Page 29
GDDR3 128MB
K4J52324QC-BC14
C
LAN
Transformer
RJ45
3722-001822
1394
4pin
Page 38
MultiMedia Crad
6in1 B’d
Page 37
3301-001629
Page 38
Page 34
Discrete Gfx.
nVidia G3-64 Family
64bit
MS / SD / MMC / xD
NB8M-SE
IEEE1394
PCMCIA
Page 27
LOM
10/100M
Marvell
88E8039
Page 32,33
CardBus
Controller
RICOH R5C843
Page 37,38
PCI-E Lane2
LVDS
VGA
PCI-E X16
PCI-E
USB2.0
Samsung
B
PCMCIA /
EXPRESS CARD
( ALT. )
Page 39
GOLAN / Kerdon
802.11abg/abgn
Page 36
Intel ROBSON
Page 33
HSDPA
/Wibro
Page 36
PCI-E Lane4
PCI-E Lane1
USB PORT 3
PCI-E Lane3
USB PORT 5
USB PORT 6
Confidential
SPI EEPROM
AT25080
Page 24
KBC
H8S - 2110B
Page 31
Space bar
Power S/W Sub-B’D
with MIO, LID S/W
THERMAL
MONITOR
MAX6695
Page 11
AUDIO CODEC
2P
Page 18
On TOP B’D
MDC
Module
Page 35
ALC262
Page 40
RTC
Batt.
HDD
2.5inch
SATA only
FAN CONTROL
Page 11
SODIMM1 (BOTTOM)
Audio AMP
D-Class
MAX9715
Page 41
Page 30
SODIMM0 (TOP)
MAX 2 GB
Page 17
MAX 2 GB
Page 18
EXTERNAL MIC
HEADPHONE
Internal MIC
Page 30
MASTER
ODD
RJ11
JACK
L
R
SPEAKER
D
C
B
KEYBOARD
A
PORT 0
USB (Right)
Page 35
4
PORT 1
USB (Back)
Page 35
DMB Module
PORT 2
Page 48
BLUETOOTH
PORT 4
Page 35
3
CAMERA
PORT 7
PS/2
SYNAPTICS
TOUCHPAD
A
DRAW
CHECK
APPROVAL
MODULE CODE
2
ZHOU JUN
GUO LEI
KEVIN LEE
DATE TITLE
3/9/2007
DEV. STEP
REV
LAST EDIT
MP
1.0
TORINO 2
MAIN
BLOCK DIAGRAM
March 9, 2007 12:03:21 PM
1
SAMSUNG
ELECTRONICS
PART NO.
BA41-00727/8A
253
PAGE
OF
COM-22C-015(1996.6.5) REV. 3
SAMSUNG PROPRIETARY
D:/users/mentor/Torino2/SR/T2_SR_0309
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
3
POWER DIAGRAM
2
1
D
C
ICH8-M
B
A
AC Adapter
19V
Battery DC
11.1V
RTC Battery
3V
ALWAYS ON
VDC
S5 / S4
Rail
+V*Always
State
Full On ON
S3 ON
S4
S5 ON
4
P12.0V_ALW
SWITCHED POWER
P5.0V_ALW
MAX1999
P3.3V_MICOM
MICOM
+V*AUX +V
ON ON
ON
OFF
OFF OFF
SUSPWR PWRON
OFF
KBC3_SUSPWR
P5.0V_AUX P5.0V
DDR2 Power VRM
ICH8-M
P3.3V_AUX
ICH8M
MDC
MINICARD
LOM
P1.8V_AUX
SODIMM (DDR II)
965GM
S3
VRON
HH
H
HL
LL
H
L
L
LON OFF
L
KBC3_PWRON
ICH8-M
USB
CRT
Touchpad
FAN
MICOM
PCMCIA
HDD
P3.3V
965GM
Thermal Sensor
R5C843
ICH8-M
CK505
BlueTooth
MICOM
LEDs
SODIMM
LCD
HDD
MINICARD
SPI
P2.5V
G7xM
P1.5V
MEROM
965GM
ICH8-M
P0.9V
DDR II-Termination
P1.8V
NB8M-SE
GDDR3
P1.25V
965GM
ICH8-M
Samsung
P1.05V
MEROM
965GM
ICH8-M
P1.2V
NB8M-SE
GFX_CORE
NB8M-SE
Confidential
3
KBC3_VRON
CPU_CORE
MEROM
S0
P1.05V
P1.25V
P1.5V
P1.8V_AUX
P3.3V
GFX_CORE
P1.2V
P2.5V
P1.8V
P3.3V
PRTC
P3.3V
P1.5V
P5.0V_AUX
P3.3V_AUX
P5.0V
P1.05V
P1.25V
P3.3V
CPU_CORE
P1.05V
P1.5V
P3.3V
P1.8V_AUX
P0.9V
P1.8V
2
Clock Gen.
3.3V Core
0.8V CPU IO
CPU
Vcc_CORE
VCCP
VCCA
Crestline GM/PM
1.05V MCHCore
1.05V FSB, PEG
1.05V DDRHSIO, DDRDLL
1.05V ME
0.7V~1.25V Vgfx
1.25V DPLL, DMI
1.25V MLINK, HPLL
1.5V VCCDTV/CRT
1.8V DDRIO
1.8V LVDSIO
3.3V TV/CRT IO, PXPBG
DDR2
3.3V SPD
1.8V VDDQ
0.9V Vref, Vtt
Discrete GFX
1.0V~1.1V VDD Core
1.2V PEX Core, IO, PLL
1.2V FBA PLL
1.2V Core Clock PLL Digital
2.5V Core Clock PLL Analog
2.5V VID PLL
1.8V FBVDDQ
1.8V LVDSIO
3.3V VDD3_3
3.3V DAC VDD
3.3V MIO VDDQ
GDDR3
1.8V VDDQ
0.9V VREF
RTC
VccRTC
LAN
VccLAN3_3
VccLAN1_05
VccGLAN3_3
VccGLAN1_5
CL
VccCL3_3
VccCL1_05
VccCL1_5
Resume
V5REF_Sus
VccSus3_3
VccSus1_05
VccSus1_5
Core
V5REF
Vcc3_3
Vcc1_05
Vcc1_5
VccDMI
DRAW
CHECK
APPROVAL
MODULE CODE
LDO
ICH8-M Base
1.05V AUX LDO
1.05V EP LDO
1.5V EP LDO
1.05V Sus LDO
1.5V Sus LDO
ZHOU JUN
GUO LEI
KEVIN LEE
DATE
DEV. STEP
REV
LAST EDIT
LAN100_SLP
INTVRMEN
3/9/2007
P3.3V_AUX
P5.0V
P3.3V
P3.3V_AUX
P3.3V_AUX
P5.0V
P3.3V
VDC
P5.0V
P3.3V_MICOM
P5.0V
P3.3V_AUX
P5.0V
P3.3V
P3.3V
P5.0V
P5.0V
P3.3V
P3.3V
P1.5V
P3.3V_AUX
P3.3V
P3.3V
P1.5V
P3.3V
TITLE
MP
1.0
LOM
HDD / ODD
5V
3.3V
SPI
3.3V VCC
Thermal Sensor
3.3V VCC
FAN
5V VCC
LCD
3.3V VDD
12V Inverter VDC
CRT
5V VCC
MICOM
3.3V VCC
5V VccB
MDC
3.3V VCC
AUDIO
5V AVDD
3.3V DVDD
Bluetooth
3.3V VCC
USB (2 Ports)
5V VCC
DMB
5V
3.3V
MINI CARD
3.3V
1.5V
3.3V AUX
CARDBUS
3.3V
1.8V (Internal VR)
DIAMOND
VDD
AVDD
NAND FLASH
1.8V VCC
P3.3V_AUX
3.3V
CTRL_18
1.8V
CTRL12_25
2.5V
TORINO 2
MAIN
POWER DIAGRAM
March 9, 2007 12:03:21 PM
FET
P3.3V_AUX
P3.3V_MICOM
1
FET
P3.3V
SAMSUNG
PART NO.
PAGE
LEDS
3.3V SCL, NUM, CAP
3.3V WLAN
3.3V POWERON
3.3V ACIN
ELECTRONICS
BA41-00727/8A
D
C
B
A
533
OF
SAMSUNG PROPRIETARY
COM-22C-015(1996.6.5) REV. 3
D:/users/mentor/Torino2/SR/T2_SR_0309
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
3
POWER SEQUENCE
2
Rev. 0.1
1
D
2) VDC
ALWAYS
POWER
POWER S/W
ONTOP B’D
C
P5V_AUX & P3V_AUX
MAX 1999
DDR2 POWER
SC486
B
P1.25V / P1.05V
ISL6227
GFX_CORE
SC470
3) P12V_ALWS
3) P5V_ALWS
3) MICOM_P3V
RST Circuit
4) KBC3_RST*
5) KBC3_CHKPWRSW*
6) KBC3_SUSPWRON
8) SUSPWRGD
11) KBC3_PWRON
13) VCCP_PWRGD
7) P3.3V_AUX
7) P5V_AUX
7) P1.8V_AUX
12) P0.9V
12) P1.25V
12) P1.05V
12) GFX_CORE
PRTC
ICH8-M
22) PLT3_RST*
INTVRMEN
EN
LAN100_SLP
EN
RTCRST#
CK_PWRGD
CPUPWRGD
CL_RST#
PLTRST#
PCIRST#
PRTC
1-1) PRTC_BAT
1-2) CHP3_RTCRST*
18) CLK3_PWRGD*
21) CPU1_PWRGDCPU
16) VCC_CORE
22) CL3_RST*
RES#
10ms Delay
99ms Delay
MICOM
7) P3.3V_AUX
7) P5V_AUX
* KBC3_LANRST# assert 100ms after LAN Power stable
9) KBC3_RSMRST*
20) KBC3_PWRGD
20) KBC3_PWRGDMCH
15) KBC3_VRON
10-1) CHP3_SLPS4*/S5*
10-2) CHP3_SLPS3*
17) VRM3_CPU_PWRGD
IMVP6
SC452
16) VCC_CORE
7) P1.05V_AUX
7) P1.5V_AUX
7) P1.5V_CL
7) P1.05V_CL
7) P1.05V_LAN
RSMRST#
SLP_M#
SLP_S3#
SLP_S4#
S4_STATE#
SLP_S5#
VRMPWRGD
PWROK
CLPWROK
SUS_STAT#
Samsung
RTC
Battery
CLOCK
CK505
PWRGOOD
CPU
RESET#
23) CPU1_CPURST*
CPURST#
PWROK
CLPWROK
CL_RST#
RSTIN#
GMCH
Discrete
GFX.
19) Clock Running
D
C
B
A
P1.5V
SC486
Switched
Power
Switched
Power
4
12) P1.5V
12) P5V
12) P3.3V
12) P2.5V
14) P1.8V
14) P1.2V
Confidential
DRAW
CHECK
APPROVAL
MODULE CODE
3
2
ZHOU JUN
GUO LEI
KEVIN LEE
DATE
DEV. STEP
REV
LAST EDIT
3/9/2007
TITLE
MP
1.0
TORINO 2
MAIN
POWER SEQUENCE
March 9, 2007 12:03:21 PM
1
SAMSUNG
ELECTRONICS
PART NO.
BA41-00727/8A
453
PAGE
A
OF
COM-22C-015(1996.6.5) REV. 3
SAMSUNG PROPRIETARY
D:/users/mentor/Torino2/SR/T2_SR_0309
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
S5
3
Timing Diagram, no ME
S5
S0
S0
Rev. 0.2 Phil 2006-9-21
S0S3
2
S3
S3S3
S4 / S5
G3
1
D
C
B
A
VDC
Px.xV_ALW
P3.3V_MICOM
ADT3_SEL
KBC3_RST*
KBC3_CHKPWRSW#
KBC3_SUSPWRON
Px.xV_AUX
SUSPWRGD
KBC3_LANLOWPWR#
KBC3_RSMRST*
CHP3_SLPS5*
CHP3_SLPS4*
CHP3_S4STATE*
CHP3_SLPS3*
CHP3_SLPM*
KBC3_PWRON
P5.0V / P3.3V / P1.5V
P1.25V / P2.5V
P0.9V
P1.05V
VCCP_PWRGD
P1.8V / P1.2V
KBC3_VRON
VCC_CORE
VRM3_CPU_PWRGD
CLK3_PWRGD
KBC3_PWRGD
KBC3_PWRGDMCH
CL3_RST0*
CHP3_SUSSTAT*
PLT3_RST*
PCI3_RST*
CPU1_CPURST*
SPI Signals
CL0 (MCH-ICH)
DMI
BSEL[2:0]
CHP3_CPUSTP*
CHP3_PCISTP*
CLK0_HOST_CPU
CLK0_HOST_GMCH
4
>= 20ms
>= 16ms, ICH internal debounce
Due to Pull-up to P3.3V_AUX
>= 5ms
Due to enabled wake event, such as PWRBTN#
1 ~ 2 RTCCLK, Refer to D31:F0:A4h bits 5:3
Raise at the same time as SLPS4#
1 ~ 2 RTCCLK
Raise at the same time as SLPS3#
0 ~ 100ns
>= 99ms
Valid
1 ~ 2 RTCCLK
1 ~ 2 RTCCLK
1 ~ 2 RTCCLK
>= 0
>= 3ms
Samsung
>= 0s
32 ~ 38 RTCCLK
2 ~ 3 RTCCLK
>= 1ms
<= 100us
>= 1ms
soft strap read
MCH soft straps
Confidential
0 ~ 1ms
CPU_RST_DONE/ACK
BIOS Boot
BIOS Boot
Toggling (Valid)
Toggling (Valid)
Toggling (Valid)
SMM SLP_EN Write
Sx Entry Req
3
Prepare for ME off
2 ~ 4 RTCCLK
Sx Entry Ack
5 ~ 7 RTCCLK
L2 / L3
0 ~ 100ns after VRM3_PWRGD Low
2 ~ 10 RTCCLK
DRAW
CHECK
APPROVAL
MODULE CODE
2
ZHOU JUN
GUO LEI
KEVIN LEE
DATE
DEV. STEP
REV
LAST EDIT
3/9/2007
TITLE
TORINO 2
MP
1.0
MAIN
TIMING DIAGRAM
March 9, 2007 12:03:21 PM
VDC
Px.xV_ALW
P3.3V_MICOM
ADT3_SEL
KBC3_RST*
KBC3_CHKPWRSW#
KBC3_SUSPWRON
Px.xV_AUX
SUSPWRGD
KBC3_LANLOWPWR#
KBC3_RSMRST*
CHP3_SLPS5*
CHP3_SLPS4*
CHP3_S4STATE*
CHP3_SLPS3*
CHP3_SLPM*
KBC3_PWRON
P5.0V / P3.3V / P1.5V
P1.25V / P2.5V
P0.9V
P1.05V
VCCP_PWRGD
P1.8V / P1.2V
KBC3_VRON
VCC_CORE
VRM3_CPU_PWRGD
CLK3_PWRGD
KBC3_PWRGD
KBC3_PWRGDMCH
CPU1_CPUPWRGDCPU1_CPUPWRGD
CL3_RST0*
CHP3_SUSSTAT*
PLT3_RST*
PCI3_RST*
CPU1_CPURST*
SPI Signals
CL0 (MCH-ICH)
DMI
BSEL[2:0]
CHP3_CPUSTP*
CHP3_PCISTP*
CLK0_HOST_CPU
CLK0_HOST_GMCH
SAMSUNG
PART NO.
PAGE
1
ELECTRONICS
BA41-00727/8A
553
D
C
B
A
OF
SAMSUNG PROPRIETARY
COM-22C-015(1996.6.5) REV. 3
D:/users/mentor/Torino2/SR/T2_SR_0309
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
3
CLOCK DISTRIBUTION
2
Rev. 0.1
1
D
CLK3_PWRGD
BSEL(2:0)
CK505
200 MHz
CLK0_HOST_CPU/CPU#
MEROM
CPU
BSEL
D
FSB
CPU_STP#
C
SEL_LCDCLK#
PCI_STP#
B
Main PLL
SSC
48/96MHz
NO SSC
100MHz
/33MHz
SSC
200 MHz
100 MHz
96 MHz
100 MHz
100 MHz
100 MHz
100 MHz CLK1_MCH3GPLL/3GPLL#
48 MHz
14.318 MHz
33 MHz
100 MHz
CLK0_HOST_GMCH/GMCH#
GMCH3_CLKREQ#
CLK1_MCH3GPLL/3GPLL#
CLK1_DREFCLK/CLK#
CLK1_DREFSSC/SSC#
CLK1_27M
CLK1_27M_SS
CLK1_PCIEGFX/GFX#
PCIE Ext. GFX.
X16 PEG
CLK1_PCIEICH/ICH#
GMCH3_CLKREQ#
CLK3_USB48
CLK3_ICH14
CLK3_PCLKICH
MINIPCIE3_CLKREQ1 / 2#
Samsung
CLK1_MINIPCIE1 / 1#
HPLL
MPLL
965GM / PM
3GPLL
DPLLA
DPLLB
Crestline
GMCH
X4 DMI
PCIEPLL
SATAPLL
USBPLL
ICH8-M
32.768 KHz
OSC
MINI CARD (WLAN)
333/266 MHz
333/266 MHz
333/266 MHz
333/266 MHz
RTC Clock
32.768 KHz
2801-003856
CLK1_MCLK0/0#
CLK1_MCLK1/1#
CLK1_MCLK2/2#
CLK1_MCLK3/3#
MDC3_BCLK
SPI3_CLK
17.86 / 31.25 MHz
HD 24 MHzAUD3_BCLK
667/533 MHz
ON B’D MEM
SODIMM #0
C
MDC
HD Audio
SPI
B
A
ITP_EN
14.318 MHz
2801-003730
4
14 MHz
OSC
100 MHz
100 MHz
100 MHz
Confidential
33 MHz
33 MHz
33 MHz
CLK1_MINIPCIE2 / 2#
LAN3_CLKREQ#
CLK1_PCIELOM/PCIELOM#
CLK1_PEXNAND/FEXNAND#
CLK3_PCLKMICOM
CLK3_PCLKCB
CLK3_DBGLPC
3
MINI CARD (HSDPA)
LAN PHY
ROBSON
MICOM
CARDBUS
DEBUG PORT
10 MHz
1394 Clock
24.576 MHz
2801-003898
25 MHz
2801-003892
OPTION
2
OPTION
DRAW
CHECK
APPROVAL
MODULE CODE
ZHOU JUN
GUO LEI
KEVIN LEE
DATE
DEV. STEP
REV
LAST EDIT
3/9/2007
TITLE
MP
1.0
TORINO 2
MAIN
CLOCK DISTRIBUTION
March 9, 2007 12:03:21 PM
SAMSUNG
PART NO.
653
PAGE
1
A
ELECTRONICS
BA41-00727/8A
OF
COM-22C-015(1996.6.5) REV. 3
SAMSUNG PROPRIETARY
D:/users/mentor/Torino2/SR/T2_SR_0309
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
SCHEMATIC ANNOTATIONS AND BOARD INFORMATION
D
4
3
BOARD INFORMATION
2
1
D
PCI Devices
Devices
Cardbus
Voltage Rails
VDC
CPU_CORE
P1.05V
GFX_CORE
P1.8V_AUX
P0.9V
C
B
P1.8V
P1.2V
P1.5V
P2.5V
P3.3V
P5.0V
P3.3V_AUX
P5V_AUX
PRTC_BAT
P3.3V_MICOM
P5.0V_ALW
P12.0V_ALW
2
I C / SMB Address
Devices
ICH8
SODIMM0 1010 000X
SODIMM1
CK-505 (Clock Generator)
MICOM
BATTERY
EMC2102(Thermal Sensor)
USB PORT Assign
PORT NUMBER
0
1
2
3
4
5
6
7
System Power States
A
CHP3_SLPS1* S1, Powered-On-Suspend(POS) : In this state, all clocks(except the 32.768KHz clock) are stopped.
CHP3_SLPS3* S3, Suspend-To-RAM(STR) : The system context is maintained in system DRAM, but power is shut off to non-critical circuits.
CHP3_SLP4S* S4, Suspend-To-Disk(STD) : The Context of the system is maintained on the disk. All power is then shut off to the system except for the logic required to resume.
CHP3_SLPS5* S5, Soft Off(SOFF) : System context is not maintained. All power is shut off except for the logic required to restart. A full boot is required when waking.
IDSEL#
AD25
Primary DC system power supply (7 to 21V)
Core voltage for Processor (1.308~1.068V)
Processor System Bus(PSB) Termination (1.05V)
GMCH & ICH8 Core Voltage
Core voltage for NB8M-SE (1.0 ~ 1.1V)
1.8V power rail for DDR2 (off in S4-S5)
0.9V switched power rail (off in S3-S5)
1.8V power rail for GDDR3 (off in S3-S5)
1.2V switched power rail (off in S3-S5)
1.5V switched power rail (off in S3-S5)
2.5V switched power rail (off in S3-S5)
3.3V switched power rail (off in S3-S5)
5.0V switched power rail (off in S3-S5)
3.3V power rail (off in S4-S5)
5.0V power rail (off in S4-S5)
3.0V power rail (ALWAYS ON)
3.3V always on power rail for MICOM
5V power rail (Always On)
12V power rail (Always On)
Address
Master
1010 010X
1101 001x
Master
0001 011X
0111 101X
ASSIGNED TO
SYSTEM PORT A
SYSTEM PORT B
DMB CARD
MINIPCI-E
BLUETOOTH
WIBRO SIM CARD
HSDPA
CAMERA
The system context is maintained in system DRAM. Power is maintained to PCI, the CPU, memory controller, memory, and all other criticial subsystems.
Note that this state does not preclude power being removed from non-essential devices, such as disk drives. During this state, CPU can be selected
for either Deep Sleep or Deeper Sleep.
In Deeper Sleep, CPU voltage reduced in this state to reduce the leakage power.
REQ/GNT#
0
Hex
A0h
A4h
D2h
16h
7Ah
Interrupts
E,F,G
Bus
SMBUS Master
-
Clock, Unused Clock Output Disable
Samsung
SMBUS Master
Thermal Sensor
Confidential
Memory is retained, and refreshes continue. All clocks stop except RTC clock.
Externally appears same as S5, but may have different wake events.
4
3
Crystal / Oscillator
TYPE
Crystal
Crystal
Crystal
Crystal
Crystal
FREQUENCY
32.768KHz
10MHz
14.318MHz
24.576MHz
25MHz
CPU Core Voltage Table
Active Mode
VID(6:0)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
1
0
1
0
0
0
0
1
0
0
01
0
0
1
0
0
0
1
0
0
0
01
0
1
1
0
0
0
0
1
0
0
1
0
0
0
1
0
0
0
0
1
0
0
0
1
0
0
0
1
0
0
1
0
1
0
0
1
0
1
0 1
0
1
1
0
1
0
1
0
1
0
0
1
0
1
0
1
1
0
1
0
1
0
0
1
0
1
1
0
0
1
0
0
0
1
0
0
0
1
0
0
0
0
1
0
0
0
1
0
0
0
1
0
0
0
1
0
0
1
0
0
1
DPRSLPVR
DPRSTP*
PSI2*
2
Voltage
0
0
1.5000 V
0
0
0
1.4875 V
1
1.4750 V
0
0
1
1.4625 V
1
0
1
1.4500 V
0
1
0
1.4375 V
1
1
0
1
1.4250 V
1
101
1.4125 V
1
1
0
0
0
1.4000 V
1.3875 V
0
1
0
1.3750 V
0
0
1
1
0
1
1.3625 V
0
1.3500 V
0
1
1
1
0
1.3375 V
1.3250 V 1
1
0
1
1.3125 V
1
1
0
0
0
1.3000 V
1
1.2875 V
0
0
0
0
1
1.2750 V
1
1.2625 V
0
1
1
1.2500 V
0
0
0
1
1
1.2375 V
0
1.2250 V
1
1
1.2125 V
1
1
1
1
1
0
1.2000 V
0
0
0
1.1875 V
0
1
1
0
1.1750 V
0
1
1.1625 V
0
1
0
0
1.1500 V
1
10
1
1.1375 V
0
1
1
1
1.1125 V
1 0
1
1.1000 V
0
0
0
0
0
1
1.0875 V
0
1
0
1.0750 V
0
1
1
1.0625 V
0
1
0
1.0500 V
1
0
1
1.0375 V
1
1
0
1.0250 V
1
1
1
1
1
1.0125 V
Active
0
1
0 or 1
DRAW
CHECK
APPROVAL
MODULE CODE
DEVICE
ICH8-M Real Time Clock
MICOM
CLOCK-Generator
Cardbus Controller
LAN
IMVP-6
Active/Deeper Sleep
Dual Mode Region
VID(6:0)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
DPRSLPVR
DPRSTP*
PSI2*
ZHOU JUN
GUO LEI
KEVIN LEE
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
01.1250 V
0
0
0
0
0
0
0
0
0
0
1
0
0
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
DATE
DEV. STEP
REV
LAST EDIT
0
0
1
0
0
1
0
1
0
1
0
1
1
1
1
1
0
0
0
1
1
1
1
1
1
0
1
1
1
11
1
0
0
00
0
0
0
1
0
1
0
0
0
1
0
1
0
1101
0
0
0
1
0
1
0
0
0
1
1
1
1
0
1
0
0
1
0
0
1
0
1
1
0
0
1
1
1
1
0
0
1
1
1
1
0
1
0
1
1
1
1
1
1
1
1
0
0
0
0
1
0
0
0
0
1
0
0
1
0
0
1
1
0
0
0
1
0
1
0
0
0
1
1
0
1
1
1
1
0
0
0
1
1
0
0
1
0
0
1
1
1
0
1
1
0
0
1
1
1
0
1
1
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
Deeper Slp
1
0
0 or 1
3/9/2007
MP
1.0
USAGE
H8S/2110BV
CK-505
1394
LAN
Voltage
1.0000 V
0.9875 V
0.9750 V
0.9625 V
0.9500 V
0.9375 V
0.9250 V
0.9125 V
0.9000 V
0.8875 V
0.8750 V
0.8625 V
0.8500 V
0.8375 V
0.8250 V
0.8125 V
0.8000 V
0.7875 V1
0.7750 V
0.7625 V
0.7500 V
0.7375 V
0.7250 V
0.7125 V
0.7000 V
0.6750 V
0.6625 V
0.6500 V
0.6375 V
0.6250 V
0.6125 V
0.6000 V
0.5875 V
0.5750 V
0.5625 V
0.5500 V
0.5375 V
0.5250 V
0.5125 V
0.5000 V
TITLE
BOARD INFORMATION
Deeper Sleep/Extended Deeper Sleep
Dual Mode Region
VID(6:0)
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
*"1111111" : 0V power good asserted.
0
1
0
1
0
1
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
0
1
0
1
0
0
0
1
0
1
0
0
1
0
1
1
0
1
1
0
0
00
1
1
0
1
1
0
1
0
1
1
0
1
1
1
0
0
1
1
1
0
0
1
1
1
1
1
1
0
0
0
0
0
1
0
0
0
0
0
1
1
0
1
0
0
0
0
1
0
1
0
1
0
1
0
1
1
1
0
1
0
1
0
1
0
0
1
1
0
1
0
00.6875 V
1
1
1
1
0
1
0
1
0
0
1
1
1
1
0
1
1
1
1
1
1
0
0
0
0
0
0
1
0
1
0
0
1
0
0
1
1
0
0
0
0
0
1
1
1
0
1
0
1
1
1
0
0
1
0
1
010.0000 V
1
0
1
0
0
1
1
0
0
1
1
1
1
0
0
1
1
1
0
1
1
1
0
1
1
1
1
1
TORINO 2
MAIN
March 9, 2007 12:03:21 PM
PAGE
1
Voltage
0.4875 V
0.4750 V
0.4625 V
0.4500 V
0.4375 V
0.4250 V
0.4125 V
0.4000 V
0.3875 V
0.3750 V
0.3625 V
0.3500 V
0.3375 V
0.3250 V
0.3125 V
0.3000 V
0.2875 V
0.2750 V
0.2625 V
0.2500 V
0.2375 V
0.2250 V
0.2125 V
0.2000 V
0.1875 V
0.1750 V
0.1625 V
0.1500 V
0.1375 V
0.1250 V
0.1125 V
0.1000 V
0.0875 V
0.0750 V
0.0625 V
0.0500 V
0.0375 V
0.0250 V
0.0125 V
0.0000 V
0.0000 V
0.0000 V
0.0000 V
0.0000 V
0.0000 V
0.0000 V
SAMSUNG
ELECTRONICS
PART NO.
BA41-00727/8A
753
OF
C
B
A
4
B
2
SAMSUNG PROPRIETARY
D
1
A
COM-22C-015(1996.6.5) REV. 3
D:/users/mentor/Torino2/SR/T2_SR_0309
C
3
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
P3.3V
D
TP15281
CLK3_FM48
CLK3_USB48
CPU1_BSEL0
CPU1_BSEL1
CPU1_BSEL2
CLK3_ICH14
CHP3_CPUSTP#
CHP3_PCISTP#
CLK3_PWRGD
CLK3_PCLKICH
CLK3_PCLKMICOM
SEL_LCDCLK#
0
1
CLK3_PCLKCB
CLK3_DBGLPC
GMCH3_CLKREQ#
CHP3_SATACLKREQ#
CLK3_SMBCLK
CLK3_SMBDATA
Pin21
Pin20
DOT96
DOT96#
SRC0
SRC0#
Pin24
LCDCLK
27MHz
C771
100nF
37-B2
25-A2
10-C4 13-A3
25-A2
25-D2
25-D2
25-B2
25-C3
31-B4
36-A4
49-B4
13-B4
25-B2
8-A2 18-C417-C4
Pin25
LCDCLK#
27MHz_SS
13-A310-C4
13-A310-C4
17-B4 18-B48-A2
C767
100nF
C744
10000nF
6.3V
R189
R188
R190
R199
R200
R201
R192
R194
R196
R197
14.31818MHz
C273
0.033nF
Y500
12
2801-004518
Place 14.318MHz within
500mils of Clock chip
FSB
CPU
FSA
BSEL0
0
0
0
0
1
1
1
1
BSEL1
0
0
1
1
0
0
1
1
FSC
BSEL2
0
1
0
1
0
1
0
1
HOST CLK
266 MHz
333 MHz
200 MHz
400 MHz
133 MHz
100 MHz
166 MHz
RSVD
4
C774
C770
10000nF
100nF
6.3V
5%33
33 5%
5%2.2K
10K 1%
5%
33
100
5%
33
5%33
5%33
33
5%
Samsung
C274
0.033nF
1%10K
1%
10K
EXT_GFX
R195
R918
NO_STUFF
1%10K
1%
10K 1%
10K
INT_GFX
R193
R191
R917
NO_STUFF
PCI2 is multiple used as TME on IDTCV179
IDTCV179 P/N: 1205-003159
Confidential
SMB3_CLK
SMB3_DATA
25-D2
27-C3 35-C1 35-C3
35-C127-C325-D2
U20
SLG8SP513
19
VDD_IO
33
VDD_SRC_IO1
43
VDD_SRC_IO2
52
VDD_SRC_IO3
56
VDD_CPU_IO
27
VDD_PLL3_IO
55
NC
TP15280
17
USB_FS_A
64
FSB_TESTMODE
TP15279
5
REF_FS_C_TEST_SEL
44
CPUSTOP#
45
PCISTOP#
TP15278
63
CLKPWRGD_PWRDN#
TP15277
14
PCIF_5_ITP_EN
TP15282
13
PCI_4_SEL_LCDCLK#
TP15275
12
PCI_3
TP15276
11
PCI_2
TP15272
10
PCI_1_CLKREQ_B#
8
PCI_0_CLKREQ_A#
7
SCL
6
SDA
TP15268
3
XTAL_IN
TP15269
2
XTAL_OUT
18
VSS_48
59
VSS_CPU
22
VSS_IO
15
VSS_PCI
26
VSS_PLL3
1
VSS_REF
30
VSS_SRC1
36
VSS_SRC2
49
VSS_SRC3
1205-003156
SMBUS Address "D2h"
P3.3V
R711
10K
TP1065
1
G
RHU002N06
Q506
35-C3
S
D
3
2
1
G
S
D
3
RHU002N06
Q507
2
SRC11_CLKREQH#
SRC11#_CLKREQG#
SRC7_CLKREQF#
SRC7#_CLKREQE#
SRC3_CLKREQC#
SRC3#_CLKREQD#
LCDCLK#_27M_SS
P3.3V
R754
R753
10K
10K
17-C418-C4 8-C4
17-B418-B4 8-B4
C932
C933
0.33nF 0.33nF
VDD_REF
VDD_48
VDD_PCI
VDD_PLL3
VDD_SRC
VDD_CPU
CPU0
CPU0#
CPU1_MCH
CPU1_MCH#
SRC10
SRC10#
SRC9
SRC9#
SRC8_ITP
SRC8#_ITP#
SRC6
SRC6#
SRC4
SRC4#
SRC2
SRC2#
LCDCLK_27M
SRC0_DOT96
SRC0#_DOT96#
4
16
9
23
46
62
61
60
58
57
40
39
41
42
37
38
54
53
TP16368
51
50
48
47
34
35
31
32
28
29
24
25
20
21
CLK3_SMBCLK
CLK3_SMBDATA
3
INT_GFX
INT_GFX
EXT_GFX
EXT_GFX
INT_GFX
INT_GFX
EXT_GFX
EXT_GFX
2
C772
C743
C742
10nF
10nF
R214
R213
R210
R211
R569
R208
R209
R751
R752
R206
R207
R750
R749
100nF
5%
0
5%
0
0
0
0
0
0
301 1%
301 1%
0
0
0
0
NO_STUFF
CLK REQ
A#
B#
E# MiniCard(WLAN)
F#
DRAW
CHECK
APPROVAL
MODULE CODE
C768
100nF
ZHOU JUN
GUO LEI
KEVIN LEE
C766
100nF
R89
R88
R21
R93
EXT_GFX
EXT_GFX
EXT_GFX
EXT_GFX
Mapping
SRC_2
SRC_4
SRC_6
SRC_8
DATE
DEV. STEP
REV
LAST EDIT
C769
100nF
10-D4
10-D4
12-B2
12-B2
35-C2
35-C2
25-C1
25-C1
33-B4
33-B4
32-D4
32-D4
32-C4
35-C4
35-C4
35-C4
13-C1
13-C1
24-B4
24-B4
13-C1
13-C1
20-B1
20-B1
13-C1
13-C1
20-A4
20-A4
0
1K
0
1K
Device
SATA
GMCH
GbE LAN (100M: N/A)
3/9/2007
MP
1.0
MMZ1608S121AT
B524
C773
10000nF
6.3V
CLK0_HOST_CPU
CLK0_HOST_CPU#
CLK0_HOST_GMCH
CLK0_HOST_GMCH#
CLK1_MINIPCIE2
CLK1_MINIPCIE2#
CLK1_PCIEICH
CLK1_PCIEICH#
CLK1_PEXNAND
CLK1_PEXNAND#
CLK1_PCIELOM
CLK1_PCIELOM#
LAN3_CLKREQ#
MINIPCIE3_CLKREQ1#
CLK1_MINIPCIE1
CLK1_MINIPCIE1#
CLK1_MCH3GPLL
CLK1_MCH3GPLL#
CLK1_SATA
CLK1_SATA#
CLK1_DREFSSCLK
CLK1_DREFSSCLK#
CLK3_27M
CLK3_27M_SS
CLK1_DREFCLK
CLK1_DREFCLK#
CLK1_PCIEGFX
CLK1_PCIEGFX#
P1.05V
TITLE
TORINO 2
MAIN
CLOCK GENERATOR
March 9, 2007 12:03:21 PM
3.3V to 1.2V Translation for G72M
SAMSUNG
PART NO.
PAGE
1
C
B
A
ELECTRONICS
BA41-00727/8A
853
OF
A
B
C
D
4
3
2
1
COM-22C-015(1996.6.5) REV. 3
SAMSUNG PROPRIETARY
D:/users/mentor/Torino2/SR/T2_SR_0309
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D
CPU SOCKET : MEROM
P1.05V
CPU500-1
MEROM-SOCKET
CPU1_A#(16:3)
CPU1_ADSTB0#
CPU1_A#(35:17)
CPU1_ADSTB1#
12-D1
12-C2
12-D1
12-C2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
31
32
33
34
35
1 / 4
J4
A3*
L5
A4*
L4
A5*
K5
A6*
M3
N2
N3
P5
P2
P4
P1
R1
M1
Y2
U5
R3
W6
U4
Y5
U1
R4
T5
T3
W2
W5
Y4
U2
V4
W3
AA4
AB2
AA3
V1
J1
L2
A7*
A8*
A9*
A10*
A11*
A12*
A13*
A14*
A15*
A16*
ADSTB0*
A17*
A18*
A19*
A20*
A21*
A22*
A23*
A24*
A25*
A26*
A27*
A28*
A29*
A30*
A31*
A32*
A33*
A34*
A35*
ADSTB1*
0
ADDR GROUP
1
ADDR GROUP
CONTROL
ICH
ADS*
BNR*
BPRI*
BR0*
DEFER*
DRDY*
DBSY*
IERR*
INIT*
LOCK*
RESET*
RS0*
RS1*
RS2*
TRDY*
HITM*
A20M*
FERR*
IGNNE*
STPCLK*
LINT0
LINT1
SMI*
REQ0*
REQ1*
REQ2*
REQ3*
REQ4*
HIT*
R37
56
H1
E2
G5
F1
H5
F21
E1
TP15292
D20
B3
H4
C1
F3
F4
G3
G2
G6
E4
A6
A5
C4
D5
C6
B4
A3
Samsung
K3
H2
K2
J3
L1
12-C2
CPU1_ADS#
CPU1_BNR#
12-C2
12-C2
CPU1_BPRI#
CPU1_BREQ#
12-C2
12-B2
CPU1_DEFER#
CPU1_DRDY#
12-B2
CPU1_DBSY#
12-B2
24-C2
CPU1_INIT#
CPU1_LOCK#
12-B2
CPU1_CPURST#
12-A2
12-B4
CPU1_RS0#
12-A2
CPU1_RS1#
12-A2
CPU1_RS2#
12-B2
CPU1_TRDY#
CPU1_HIT#
12-B2
CPU1_HITM#
12-B2
24-C2
CPU1_A20M#
CPU1_FERR#
24-C2
24-C2
CPU1_IGNNE#
24-C2
CPU1_STPCLK#
24-C2
CPU1_INTR
24-C2
CPU1_NMI
CPU1_SMI#
24-C2
CPU1_REQ#(4:0)
12-A2
0
1
2
3
4
CPU1_D#(15:0)
CPU1_DSTBN0#
CPU1_DSTBP0#
CPU1_DBI0#
CPU1_D#(31:16)
CPU1_DSTBN1#
CPU1_DSTBP1#
CPU1_DBI1#
12-D4
12-B2
12-B2
12-B2
12-D4
12-B2
12-B2
12-B2
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
2830
29
30
31
CPU500-2
MEROM-SOCKET
2 / 4
E22
D0*
F24
D1*
E26
D2*
G22
D3*
F23
D4*
G25
D5*
E25
D6*
E23
D7*
K24
D8*
G24
D9*
J24
D10*
J23
D11*
H22
D12*
F26
D13*
K22
D14*
H23
D15*
J26
DSTBN0*
H26
DSTBP0*
H25
DINV0*
N22
D16*
K25
D17*
P26
D18*
R23
D19*
L23
D20*
M24
D21*
L22
D22*
M23
D23*
P25
D24*
P23
D25*
P22
D26*
T24
D27*
R24
D28*
L25
D29*
T25
D30*
N25
D31*
L26
DSTBN1*
M26
DSTBP1*
N24
DINV1*
DATA GRP 0
DATA GRP 2
DSTBN2*
DSTBP2*
DATA GRP 1
DATA GRP 3
DSTBN3*
DSTBP3*
D32*
D33*
D34*
D35*
D36*
D37*
D38*
D39*
D40*
D41*
D42*
D43*
D44*
D45*
D46*
D47*
DINV2*
D48*
D49*
D50*
D51*
D52*
D53*
D54*
D55*
D56*
D57*
D58*
D59*
D60*
D61*
D62*
D63*
DINV3*
Y22
AB24
V24
V26
V23
T22
U25
U23
Y25
W22
Y23
W24
W25
AA23
AA24
AB25
Y26
AA26
U22
AE24
AD24
AA21
AB22
AB21
AC26
AD20
AE22
AF23
AC25
AE21
AD21
AC22
AD23
AF22
AC23
AE25
AF24
AC20
CPU1_D#(47:32)
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
12-D4
12-B2
12-B2
12-B2
12-D4
12-B2
12-B2
12-B2
CPU1_DSTBN2#
CPU1_DSTBP2#
CPU1_DBI2#
CPU1_D#(63:48)
CPU1_DSTBN3#
CPU1_DSTBP3#
CPU1_DBI3#
C
B
Confidential
A
DRAW
CHECK
APPROVAL
MODULE CODE
4
3
2
ZHOU JUN
GUO LEI
KEVIN LEE
DATE
DEV. STEP
REV
LAST EDIT
3/9/2007
TITLE
TORINO 2
MP
1.0
MAIN
MEROM(1)
March 9, 2007 12:03:21 PM
1
SAMSUNG
ELECTRONICS
PART NO.
BA41-00727/8A
9
PAGE OF
53
A
D
3
COM-22C-015(1996.6.5) REV. 3
24
B
C
1
SAMSUNG PROPRIETARY
D:/users/mentor/Torino2/SR/T2_SR_0309
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
CPU SOCKET : MEROM
D
P21
VSS_136
VCC_51
VCC_52
VCC_53
VCC_54
VCC_55
VCC_56
VCC_57
VCC_58
VCC_59
VCC_60
VCC_61
VCC_62
VCC_63
VCC_64
VCC_65
VCC_66
VCC_67
VCC_68
VCC_69
VCC_70
VCC_71
VCC_72
VCC_73
VCC_74
VCC_75
VCC_76
VCC_77
VCC_78
VCC_79
VCC_80
VCC_81
VCC_82
VCC_83
VCC_84
VCC_85
VCC_86
VCC_87
VCC_88
VCC_89
VCC_90
VCC_91
VCC_92
VCC_93
VCC_94
VCC_95
VCC_96
VCC_97
VCC_98
VCC_99
VCC_100
VSS_147
VSS_148
T4
U21
R2
P24
VSS_137P3VSS_138P6VSS_139
AE9
AF10
AF12
AF14
AF15
AF17
AF18
AF20
AF9
B10
B12
B14
B15
B17
B18
B20
B7
B9
C10
C12
C13
C15
C17
C18
C9
D10
D12
D14
D15
D17
D18
D9
E10
E12
E13
E15
E17
E18
E20
E7
E9
F10
F12
F14
F15
F17
F18
F20
F7
F9
VSS_144
VSS_145
VSS_146
T1
R5
T23
T26
CPU_CORE
R22
VSS_140
VSS_141
VSS_142
VSS_143
R25
VSS_120
VSS_119
VSS_118
VSS_117
VSS_116
VSS_115
VSS_114
VSS_113
VSS_112
VSS_111
VSS_110
VSS_109
VSS_108
VSS_107
VSS_106
VSS_105
VSS_104
VSS_103
VSS_102
VSS_101
VSS_100
VSS_99
VSS_98
VSS_97
VSS_96
VSS_95
VSS_94
VSS_93
VSS_92
VSS_91
VSS_90
VSS_89
VSS_88
VSS_87
VSS_86
VSS_85
VSS_84
VSS_83
VSS_82
VSS_81
VSS_80
VSS_79
VSS_78
VSS_77
VSS_76
VSS_75
VSS_74
VSS_73
VSS_72
VSS_71
VSS_70
VSS_69
VSS_68
VSS_67
VSS_66
VSS_65
VSS_64
VSS_63
VSS_62
VSS_61
K1
J5
J25
J22
J2
H6
H3
H24
H21
G4
G26
G23
G1
F8
F5
F25
F22
F2
F19
F16
F13
F11
E8
E6
E3
E24
E21
E19
E16
E14
E11
D8
D4
D26
D23
D19
D16
D13
D11
D1
C8
C5
C25
C22
C2
C19
C16
C14
C11
B8
B6
B24
B21
B19
B16
B13
B11
AF8
AF6
AF25
C
B
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
CPU_CORE
A10
A12
A13
A15
A17
A18
A20
AA10
AA12
AA13
AA15
AA17
AA18
AA20
AA7
AA9
AB10
AB12
AB14
AB15
AB17
AB18
AB20
AB7
AB9
AC10
AC12
AC13
AC15
AC17
AC18
AC7
AC9
AD10
AD12
AD14
AD15
AD17
AD18
AD7
AD9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
K23
A7
A9
VSS_163
Y3
Y6
K26
VSS_121
VSS_122K4VSS_123
VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_33
VCC_34
VCC_35
VCC_36
VCC_37
VCC_38
VCC_39
VCC_40
VCC_41
VCC_42
VCC_43
VCC_44
VCC_45
VCC_46
VCC_47
VCC_48
VCC_49
VCC_50
VSS_160
VSS_161
VSS_162
Y21
Y24
L21
L24
L3
L6
M22
M25
VSS_124
VSS_125
VSS_126
VSS_127M2VSS_128
VSS_129
VSS_130M5VSS_131N1VSS_132
CPU500-4
MEROM-SOCKET
4 / 4
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
V5
W1
W4
V22
V25
W23
W26
VSS_151
VSS_152
V2
U6
N23
N26
VSS_133
VSS_134N4VSS_135
VSS_150
VSS_149
U3
U24
CPU500-3
MEROM-SOCKET
A22
CLK0_HOST_CPU
CLK0_HOST_CPU#
CPU1_SLP#
CPU1_DPSLP#
CPU1_DPRSTP#
CPU1_DPWR#
CPU1_PWRGDCPU
CPU1_PSI#
CPU1_VID(6:0)
IF PROCHOT* USED, 56ohm -> 68ohm
CPU2_THERMDA
CPU2_THERMDC
P1.05V
CPU1_THRMTRIP#
CPU1_BSEL2
R148
CPU1_BSEL1
1K
CPU1_BSEL0
1%
CPU_CORE
R147
2K
1%
CPU1_VCCSENSE
CPU1_VSSSENSE
COMP0,2(COMP1,3) should be
connected with Zo=27.4ohm(55ohm)
trace shorter than 1/2" to their
respective Banias socket pins.
GTLREF : Keep the Voltage divider within 0.5"
of the First GTLREF0 with Z0= 55 ohm trace
Minimize coupling of any switching signals to this net
CPU VRM side : 330uF X 6ea
C113
10000nF
6.3V
C102
10000nF
6.3V
C112
10000nF
6.3V
8-C1
8-C1
12-B4
24-C2
13-B1 24-C2
12-B2
24-C2
45-B4
45-B4
CPU1_PROCHOT#
11-C2
11-C2
11-B3 13-B1 24-C2
8-C4 13-A3
10-A3 45-B4
10000nF
6.3V
P1.05V
TP16322
13-A38-C4
13-A38-C4
R136
R137
R132
R131
45-B410-A3
C101
10000nF
6.3V
R36
56
1%
NO_STUFF
NO_STUFF
R7 1K
6
5
4
3
2
1
0
54.9
27.4 1%
54.9
1KR8
1%
C182
10000nF
6.3V
1%
1%
1%27.4
A21
D7
B5
E5
D24
D6
AE6
AE2
AF3
AE3
AF4
AE5
AF5
AD6
D21
A24
B25
C7
C21
B23
B22
TP15067
AD26
TP15063
Y1
TP15064
AA1
TP15065
U26
TP15066
R26
AF7
AE7
TP15073
C23
TP15062
D25
C24
AF26
AF1
A26
C183 C110
10000nF
BCLK0
BCLK1
SLP*
DPSLP*
DPRSTP*
DPWR*
PWRGOOD
PSI*
VID_6
VID_5
VID_4
VID_3
VID_2
VID_1
VID_0
PROCHOT*
THRMDA
THRMDC
THERMTRIP*
BSEL2
BSEL1
BSEL0
GTLREF
COMP3
COMP2
COMP1
COMP0
VCCSENSE
VSSSENSE
TEST1
TEST2
TEST3
TEST4
TEST5
TEST6
H CLK
3 / 4
THERMAL
XDP/ITP SIGNALS
RSVD
Samsung
C107
C104C100
10000nF
10000nF
10000nF
6.3V
6.3V6.3V
6.3V
CPU_CORE
C106
10000nF
6.3V
C105
10000nF
6.3V
C103
10000nF
6.3V
C180
10000nF
6.3V
C181
10000nF
6.3V
C111
10000nF
6.3V
C176
10000nF
6.3V
20mils
C179
10000nF
6.3V
R149
R150
1%100
Confidential
100 1%
45-B4 10-C4
VCCA_1
VCCA_2
VCCP_1
VCCP_2
VCCP_3
VCCP_4
VCCP_5
VCCP_6
VCCP_7
VCCP_8
VCCP_9
VCCP_10
VCCP_11
VCCP_12
VCCP_13
VCCP_14
VCCP_15
VCCP_16
PREQ*
PRDY*
BPM3*
BPM2*
BPM1*
BPM0*
TCK
TDO
TMS
TRST*
DBR*
RSVD_1
RSVD_2
RSVD_3
RSVD_4
RSVD_5
RSVD_6
RSVD_7
RSVD_8
RSVD_9
RSVD_10
10-C445-B4
B26
C26
K6
J6
M6
N6
T6
R6
K21
J21
M21
N21
T21
R21
V21
W21
V6
G21
AC1
AC2
AC4
AD1
AD3
AD4
TP15068
AC5
AA6
TDI
AB3
AB5
AB6
TP15072
C20
D2
F6
D3
D22
M4
N5
T2
V3
B2
C3
CPU1_VCCSENSE
CPU1_VSSSENSE
R151
R134
R135
R133
R38
25V
C4
10nF
P1.5V
P1.05V
27.4
150
40.2
475
0
C5
10000nF
6.3V
EC5
330uF
2.5V
AL
1%
1%
5%
1%
Placed as close as possible to
each of the four VCCA pins.
P1.05V
ITP3_SYSRST#
25-D2
A11
A14
A16
A19
A23
A25
AA11
AA14
AA16
AA19
AA2
AA22
AA25
AA5
AA8
AB1
AB11
AB13
AB16
AB19
AB26
AB4
AB8
AC11
AC14
AC16
AC19
AC21
AC24
AC3
AC6
AC8
AD11
AD13
AD16
AD19
AD2
AD22
AB23
AD25
AD5
AD8
AE1
AE11
AE14
AE16
AE19
AE23
AE26
AE4
AE8
AF11
AF13
AF16
AF19
AF2
AF21
A2
A4
A8
P1.05V
C109
100nF
C114
C108
100nF 100nF
CHECK BULK CAP USING
IF IT DOUBLED
100nF
C99
100nF
4
C178
C177
100nF
A
DATEDRAW
CHECK
APPROVAL
MODULE CODE
3
2
ZHOU JUN
GUO LEI
KEVIN LEE
DEV. STEP
REV
LAST EDIT
3/9/2007
TITLE
TORINO 2
MP
1.0
MAIN
MEROM(2)
March 9, 2007 12:03:21 PM
1
SAMSUNG
PART NO.
10 53
PAGE
ELECTRONICS
BA41-00727/8A
OF
D
COM-22C-015(1996.6.5) REV. 3
2
3
C
SAMSUNG PROPRIETARY
D:/users/mentor/Torino2/SR/T2_SR_0309
B
A
4 1
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D
Thermal Monitor
R778
10K
R781
C806
P3.3V_AUX
R777
R783
10K
10K
0
0.47nF
C807
0.47nF
FAN5_VDD
FAN3_FDBACK#
R779
10K
31-C2
31-B2
25-C2
43-B1
10-C4
10-C4
TP16369
TP15152
C808
20-A1
20-A1
1
EXT_GFX
2.2nF
Place nearby Memory
FAN Control
Line Width = 20 mil
11-C3
11-C3
KBC3_THERM_SMDATA
KBC3_THERM_SMCLK
THERM_ALERT#
THERM_STP#
CPU2_THERMDC
CPU2_THERMDA
GFX3_THERMDN
GFX3_THERMDP
2
MMBT3904
Q505
3
P3.3V
R228
10K
J4
HDR-3P-SMD
1
2
3
4
MNT1
5
MNT2
3711-005853
C
B
P3.3V_AUXP5.0V
C816
C817
10000nF
100nF
6.3V
KBC3_PWRGD
FAN5_VDD
FAN3_FDBACK#
CPU3_THRMTRIP#
25-B2
11-B2
11-B2
11-B3
31-C4 36-A4
TRIP_SET
3.3 * R2 / (R1 + R2) = (T - 75) / 21
So: T = 100’C
CPU1_THRMTRIP#
10-C4 13-B1 24-C2
C804
C805
10000nF
100nF
6.3V
0
R780
P3.3V_AUX
R782
100K
1%
TP15150
R773
56.2K
1%
Samsung
P1.05V P3.3V
R785
2K
1%
TP16370
1
32
MMBT3904
Q508
U507
EMC2102
1
VDD_3V
24
VDD_5V_1
27
VDD_5V_2
14
POWER_OK
TP16317
16
RESET#
TP16318
10
FAN_MODE
25
FAN_1
26
FAN_2
28
TACH
13
THERMTRIP#
TP16319
9
SHDN_SEL
11
TRIP_SET
8
NC_1
15
NC_2
21
NC_3
1209-001718
SMBUS Address "7A"
R784
10K
11-C3
SMDATA
SMCLK
ALERT#
SYS_SHDN#
DN1
DP1
DN2
DP2
DN3
DP3
CLK_SEL
CLK_IN
GND
THRM_PAD
CPU3_THRMTRIP#
22
23
19
12
2
3
4
5
6
7
17
18
20
29
TP15146
TP16316
Confidential
A
DRAW
CHECK
APPROVAL
MODULE CODE
4
3
2
ZHOU JUN
GUO LEI
KEVIN LEE
DATE
DEV. STEP
REV
LAST EDIT
3/9/2007
TITLE
TORINO 2
MP
1.0
MAIN
THERMAL MONITOR
March 9, 2007 12:03:21 PM
1
SAMSUNG
ELECTRONICS
PART NO.
BA41-00727/8A
PAGE OF
5311
B
4
A
D
C
1
2
COM-22C-015(1996.6.5) REV. 3
3
SAMSUNG PROPRIETARY
D:/users/mentor/Torino2/SR/T2_SR_0309
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
CPU1_D#(63:0)
P1.05V
R35
221
1%
TP16371
C98
R34
100
100nF
1%
12-A4
nearby Pin C2
P1.05V
R529
1K
1%
R528
2K
1%
TP16372
C531
100nF
12-A4
nearby Pin A9, B9
CPU1_CPURST#
CPU1_SLP#
GMCH1_HSWING
GMCH1_HVREF
9-C1 9-C2
GMCH1_HSWING
GMCH1_HVREF
P1.05V
9-C3
10-D4
12-C4
12-B4
P1.05V
R587
R588
R530
270uF
EC8
330uF
2.5V
AL
Place on the edge
C579
220nF
16V
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
54.9
54.9
24.9
4
U5
T11
U12
U11
U13
E2
HD*_0
G2
HD*_1
G7
HD*_2
M6
HD*_3
H7
HD*_4
H3
HD*_5
G4
HD*_6
F3
HD*_7
N8
HD*_8
H2
HD*_9
M10
HD*_10
N12
HD*_11
N9
HD*_12
H5
HD*_13
P13
HD*_14
K9
HD*_15
M2
HD*_16
W10
HD*_17
Y8
HD*_18
V4
HD*_19
M3
HD*_20
J1
HD*_21
N5
HD*_22
N3
HD*_23
W6
HD*_24
W9
HD*_25
N2
HD*_26
Y7
HD*_27
Y9
HD*_28
P4
HD*_29
W3
HD*_30
N1
HD*_31
AD12
HD*_32
AE3
HD*_33
AD9
HD*_34
AC9
HD*_35
AC7
HD*_36
AC14
HD*_37
AD11
HD*_38
AC11
HD*_39
AB2
HD*_40
AD7
HD*_41
AB1
HD*_42
Y3
HD*_43
AC6
HD*_44
AE2
HD*_45
AC5
HD*_46
AG3
HD*_47
AJ9
HD*_48
AH8
HD*_49
AJ14
HD*_50
AE9
HD*_51
AE11
Samsung
TP15296
1%
TP15297
1%
TP15298
1%
Confidential
C29
C97
4700nF
2200nF
10V
Place in cavity
AH12
AH13
AJ5
AH5
AJ6
AE7
AJ7
AJ2
AE5
AJ3
AH2
B6
E5
W1
W2
B3
C2
A9
B9
HD*_52
HD*_53
HD*_54
HD*_55
HD*_56
HD*_57
HD*_58
HD*_59
HD*_60
HD*_61
HD*_62
HD*_63
H_CPURST*
H_CPUSLP*
H_SCOMP
H_SCOMP*
H_SWING
H_RCOMP
H_DVREF
H_AVREF
VTT_2
VTT_1
Host Data Bus
VCC_1
AT35
AT34
VTT_3U9VTT_4U8VTT_5U7VTT_6
VCC Core
VCC_2
VCC_3
VCC_4
VCC_5
AH28
AC32
AC31
T10
U1
T13
VTT_7U3VTT_8U2VTT_9
VTT_12
VTT_13T9VTT_14T7VTT_15T6VTT_16T5VTT_17T3VTT_18T2VTT_19
VTT_10
VTT_11
VTT
U504-1
LE88CLGM
1 OF 5
VCC_10
VCC_11
VCC_12
VCC_6
VCC_7
VCC_8
VCC_9
AJ31
AJ28
AF32
AK32
AH31
AH29
AH32
VCC_13
R30
TP15295
TP15294
R3
VTT LF
VTTLF_1F2VTTLF_2
A7
TP15293
3
VTT_20R2VTT_21R1VTT_22
Host Address Bus
VTTLF_3
AH1
16V
16V 470nF
P1.05V
HA*_3
HA*_4
HA*_5
HA*_6
HA*_7
HA*_8
HA*_9
HA*_10
HA*_11
HA*_12
HA*_13
HA*_14
HA*_15
HA*_16
HA*_17
HA*_18
HA*_19
HA*_20
HA*_21
HA*_22
HA*_23
HA*_24
HA*_25
HA*_26
HA*_27
HA*_28
HA*_29
HA*_30
HA*_31
HA*_32
HA*_33
HA*_34
HA*_35
H_ADS*
H_ADSTB*_0
H_ADSTB*_1
H_BNR*
H_BPRI*
H_BREQ*
H_DEFER*
H_DBSY*
H_DPWR*
H_DRDY*
H_HIT*
H_HITM*
H_LOCK*
H_TRDY*
HPLL_CLK
HPLL_CLK*
H_DINV*_0
H_DINV*_1
H_DINV*_2
H_DINV*_3
H_DSTBN*_0
H_DSTBN*_1
H_DSTBN*_2
H_DSTBN*_3
H_DSTBP*0
H_DSTBP*1
H_DSTBP*2
H_DSTBP*3
H_REQ*_0
H_REQ*_1
H_REQ*_2
H_REQ*_3
H_REQ*_4
H_RS*_0
H_RS*_1
H_RS*_2
470nF16V
470nF
C28
C581
C175
J13
B11
C11
M11
C15
F16
L13
G17
C14
K16
B13
L16
J17
B14
K19
P15
R17
B16
H20
L19
D17
M17
N16
J19
B18
E19
B17
B15
E17
C18
A19
B19
N19
G12
H17
G20
C8
E8
F12
D6
C10
H8
K7
E4
C6
G10
B7
AM5
AM7
K5
L2
AD13
AE13
M7
K3
AD2
AH11
L7
K2
AC2
AJ10
M14
E13
A11
H13
B12
E12
D7
D8
2
0
1
2
3
4
DRAW
CHECK
APPROVAL
MODULE CODE
10-D4
9-C3
9-C4
9-B4
9-C3
9-C3
9-C3
9-C3
9-C3
9-C3
9-B3
9-B3
9-C3
9-C3
8-C1
8-C1
9-C2
9-B2
9-C1
9-B1
9-C2
9-B2
9-C1
9-B1
9-C2
9-B2
9-C1
9-B1
9-B3
9-C3
9-C3
9-C3
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
ZHOU JUN
GUO LEI
KEVIN LEE
9-C4
CPU1_ADS#
CPU1_ADSTB0#
CPU1_ADSTB1#
CPU1_BNR#
CPU1_BPRI#
CPU1_BREQ#
CPU1_DEFER#
CPU1_DBSY#
CPU1_DPWR#
CPU1_DRDY#
CPU1_HIT#
CPU1_HITM#
CPU1_LOCK#
CPU1_TRDY#
CLK0_HOST_GMCH
CLK0_HOST_GMCH#
CPU1_DBI0#
CPU1_DBI1#
CPU1_DBI2#
CPU1_DBI3#
CPU1_DSTBN0#
CPU1_DSTBN1#
CPU1_DSTBN2#
CPU1_DSTBN3#
CPU1_DSTBP0#
CPU1_DSTBP1#
CPU1_DSTBP2#
CPU1_DSTBP3#
CPU1_REQ#(4:0)
CPU1_RS0#
CPU1_RS1#
CPU1_RS2#
DATE
3/9/2007
DEV. STEP
MP
REV
1.0
LAST EDIT
CPU1_A#(35:3)
TITLE
TORINO 2
MAIN
965GM(1)
March 9, 2007 12:03:21 PM
1
SAMSUNG
PART NO.
PAGE
ELECTRONICS
BA41-00727/8A
OF
D
C
B
A
5312
2
C
4
1
A
SAMSUNG PROPRIETARY
B
3
D
COM-22C-015(1996.6.5) REV. 3
D:/users/mentor/Torino2/SR/T2_SR_0309
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
GFX1_RXP(15:0)
GFX1_RXN(15:0)
20-C4
20-B4
0
0
2
4
7
6
3
1
2
5
9
8
11
10
12
1
15
13
14
9
5
6
4
7
8
3
10
12
13
15
14
11
C572 100nF
W41
AB50
Y40
AB51
J51
L51
TV VGA
LVDSMISC
TP16377
N47
PEG_RXN_0
PEG_RXN_1
PEG_RXN_2
K33
TP15305
1%
CRT_DDC_CLK
G35
CRT_DDC_DATA
F33
CRT_HSYNC
E33
CRT_VSYNC
H32
CRT_BLUE
G32
CRT_BLUE*
K29
CRT_GREEN
J29
CRT_GREEN*
F29
CRT_RED
E29
CRT_RED*
C32
CRT_TVO_IREF
M35
TV_DCONSEL_0
P33
TV_DCONSEL_1
E27
TVA_DAC
G27
TVB_DAC
K27
TVC_DAC
F27
TVA_RTN
J27
TVB_RTN
L27
TVC_RTN
C37
L_DDC_CLK
D35
L_DDC_DATA
E39
L_CTRL_CLK
E40
L_CTRL_DATA
K40
L_VDD_EN
J40
L_BKLT_CTRL
H39
L_BKLT_EN
G51
LVDSA_DATAN_0
E51
LVDSA_DATAN_1
F49
LVDSA_DATAN_2
G50
LVDSA_DATAP_0
E50
LVDSA_DATAP_1
F48
LVDSA_DATAP_2
D46
LVDSA_CLK*
C45
LVDSA_CLK
G44
LVDSB_DATAN_0
B47
LVDSB_DATAN_1
B45
LVDSB_DATAN_2
E44
LVDSB_DATAP_0
A47
LVDSB_DATAP_1
A45
LVDSB_DATAP_2
D44
LVDSB_CLK*
E42
LVDSB_CLK
L41
LVDS_IBG
L43
LVDS_VBG
N41
LVDS_VREFH
N40
LVDS_VREFL
H35
SDVO_CTRL_CLK
K36
SDVO_CTRL_DATA
G39
CLK_REQ*
G40
ICH_SYNC*
A37
TEST_1
R32
TEST_2
P1.05V
INT_GFX
INT_GFX
INT_GFX
INT_GFX
R113
R145
R130
R144
R129
EXT_GFX
0
0
0
0
0
VGA3_DDCCLK
VGA3_DDCDATA
VGA3_HSYNC
VGA3_VSYNC
VGA3_BLUE
VGA3_GREEN
VGA3_RED
LCD3_EDID_CLK
LCD3_EDID_DATA
LCD3_VDDEN
LCD3_BKLTCTRL
LCD3_BKLTEN
LCD1_ADATA0#
LCD1_ADATA1#
LCD1_ADATA2#
LCD1_ADATA0
LCD1_ADATA1
LCD1_ADATA2
LCD1_ACLK#
LCD1_ACLK
SDVO_CTRL_DATA
GMCH3_CLKREQ#
GMCH3_ICHSYNC#
29-A4
29-A2
29-B4
29-B4
29-C4
29-C4
29-C4
0 ohm@Ext.Gfx.
28-C4
28-C4
28-D2
28-B4
28-C2
28-C4
28-C4
28-C4
28-C4
28-C4
28-C4
28-C4
28-C4
INT_GFX
INT_GFX
P3.3V
16-B1
8-C4
25-B2
R94
R198
R100
R104
R108
R107
R105
R92
R96
150
1%
150
1%
1%
150
1.3K1%
TP16219
TP16218
TP15306
TP15307
2.4K
0
10K 1%
475
20K
TP15308
1%
Int. Gfx. Core Voltage
W49
AD44
T45
T50
PEG_RXN_3
PEG_RXN_4
RSVD_1
RSVD_2
A35
B37
AD40
U40
Y44
PEG_RXN_6
PEG_RXN_7
PEG_RXN_8
PEG_RXN_9
PEG_RXN_5
PEG_RXN_10
PEG_RXN_11
W13
W14
T14
R20
VCC_AXG_3
VCC_AXG_4
VCC_AXG_2
VCC_AXG_1
VCC_AXG_NCTF_26
VCC_AXG_NCTF_27
VCC_AXG_NCTF_28
VCC_AXG_NCTF_25
Y19
Y20
Y21
Y17
Samsung
Confidential
RSVD_8
RSVD_9
RSVD_4
RSVD_5
RSVD_6
RSVD_7
RSVD_3
B34
B36
C34
BJ20
BJ29
BF23
BG23
J50
AG46
PEG_RXN_12
Y12
VCC_AXG_5
VCC_AXG_NCTF_29
Y23
RSVD_10
BK22
L50
AH49
AG45
AG41
PEG_RXP_0
PEG_RXN_13
PEG_RXN_14
PEG_RXN_15
AA20
AA23
AA26
AA28
AB24
AB29
AB21
VCC_AXG_9
VCC_AXG_6
VCC_AXG_7
VCC_AXG_8
VCC_AXG_10
VCC_AXG_11
VCC_AXG_NCTF_30
VCC_AXG_NCTF_31
VCC_AXG_NCTF_32
VCC_AXG_NCTF_33
VCC_AXG_NCTF_34
VCC_AXG_NCTF_35
Y24
Y26
Y28
Y29
AA16
AA17
AB16
RSVD_11
RSVD_12
RSVD_13
RSVD_14
RSVD_20
RSVD_21
BF19
BE24
BK18
BC23
BD24
BH39
BH20
19-B4 18-D4
17-D419-C4
CPU1_BSEL0
CPU1_BSEL1
CPU1_BSEL2
MCH3_CFG(5)
MCH3_CFG(9)
M47
PEG_RXP_1
PEG_RXP_2
AC20
VCC_AXG_12
VCC_AXG_13
VCC_AXG_NCTF_36
VCC_AXG_NCTF_37
AB19
RSVD_22
RSVD_23
BJ18
Y48
AC45
U44
T49
PEG_RXP_3
PEG_RXP_4
AC21
AC23
VCC_AXG_14
VCC_AXG_15
VCC_AXG_NCTF_38
VCC_AXG_NCTF_39
AC16
AC17
RVSD CFG
RSVD_24
RSVD_25
BK20
AW20
MEM1_BMA(14)
MEM1_AMA(14)
8-C4 10-C4
16-B1
16-B1
AC41
T41
W45
PEG_RXP_6
PEG_RXP_7
PEG_RXP_8
PEG_RXP_9
PEG_RXP_5
PEG_RXP_10
PEG_RXP_11
AC24
AC26
AC28
AC29
AD20
AD23
AD24
VCC_AXG_16
VCC_AXG_17
VCC_AXG_18
VCC_AXG_19
VCC_AXG_20
VCC_AXG_21
VCC_AXG_22
VCC_AXG_NCTF_40
VCC_AXG_NCTF_41
VCC_AXG_NCTF_42
VCC_AXG_NCTF_43
VCC_AXG_NCTF_44
VCC_AXG_NCTF_45
VCC_AXG_NCTF_46
AF16
AF19
AC19
AD15
AD16
AD17
AH15
RSVD_26
RSVD_27
RSVD_28
RSVD_29
RSVD_30
RSVD_31
RSVD_32
J12
P36
P37
R35
N35
H10
AR12
10-C48-C4
10-C48-C4
N45
AH47
AG49
AH45
AG42
PEG_RXP_12
PEG_RXP_13
PEG_RXP_14
PEG_RXP_15
PCIE GFX
U504-2
LE88CLGM
AA31
AH20
AH21
AH23
AD28
AF21
AF26
VCC_AXG_25
VCC_AXG_26
VCC_AXG_27
VCC_AXG_28
VCC_AXG_23
VCC_AXG_24
2 OF 5
VCC_AXG_NCTF_52
VCC_AXG_NCTF_47
VCC_AXG_NCTF_48
VCC_AXG_NCTF_49
VCC_AXG_NCTF_50
VCC_AXG_NCTF_51
AJ16
AJ17
AJ19
AK16
AH16
AH17
AH19
RSVD_34
RSVD_35
RSVD_36
RSVD_37
RSVD_38
RSVD_33
AL36
AN13
AR37
AR13
AM36
AM37
AM12
R31
R33
R32
4
6
2
3
4
0
100nFC570
U39
PEG_TXN_0
AH24
VCC_AXG_29
GFX VCC NCTF
VCC_AXG_NCTF_53
AK19
RSVD_39
C48
7
1
5
100nFC564
100nFC567
100nFC610
C571 100nF
C573 100nF
C574 100nF
W46
U47
N51
R50
T42
Y43
PEG_TXN_6
PEG_TXN_7
PEG_TXN_1
PEG_TXN_2
PEG_TXN_3
PEG_TXN_4
PEG_TXN_5
T17
AH26
AD31
AJ20
AN14
VCC_AXG_30
VCC_AXG_31
VCC_AXG_32
VCC_AXG_33
VCC_AXG_34
VCC_AXG_NCTF_1
VCC_AXG_NCTF_54
VCC_AXG_NCTF_55
VCC_AXG_NCTF_56
VCC_AXG_NCTF_57
VCC_AXG_NCTF_58
VCC_AXG_NCTF_59
VCC_AXG_NCTF_60
AL16
AL17
AL19
AL20
AL21
AL23
RSVD_40
RSVD_41
RSVD_42
RSVD_43
RSVD_44
RSVD_45
B44
B51
D47
C44
D20
TP16378
1K
1%
1K
1%
1K
1%
8
9
11
12
10
13
14
100nF
100nFC615
100nFC608
C622 100nF
C612
C618 100nF
C616 100nF
C623 100nF
W38
AD39
AC46
AC49
AC42
AH39
AE49
PEG_TXN_8
PEG_TXN_9
PEG_TXN_10
PEG_TXN_11
PEG_TXN_12
PEG_TXN_13
PEG_TXN_14
T19
T18
T25
U15
T23
T21
T22
VCC_AXG_NCTF_3
VCC_AXG_NCTF_2
VCC_AXG_NCTF_7
VCC_AXG_NCTF_8
VCC_AXG_NCTF_6
VCC_AXG_NCTF_4
VCC_AXG_NCTF_5
VCC_AXG_NCTF_67
VCC_AXG_NCTF_61
VCC_AXG_NCTF_62
VCC_AXG_NCTF_63
VCC_AXG_NCTF_64
VCC_AXG_NCTF_65
VCC_AXG_NCTF_66
AP15
AM15
AM16
AM19
AM20
AM21
AM23
CFG_0
CFG_1
CFG_2
CFG_3
CFG_4
CFG_5
F23
P27
N27
N24
C21
C23
TP16373
TP16379
15
0
3
1
2
100nFC609
100nFC566
100nFC565
C576 100nF
C578 100nF
C575 100nF
M45
T38
T46
N50
AH44
U16
AP16
N23
R51
PEG_TXP_0
PEG_TXP_1
PEG_TXP_2
PEG_TXP_3
PEG_TXN_15
U17
U19
U20
U21
U23
U26
V16
VCC_AXG_NCTF_9
VCC_AXG_NCTF_10
VCC_AXG_NCTF_11
VCC_AXG_NCTF_12
VCC_AXG_NCTF_13
VCC_AXG_NCTF_14
VCC_AXG_NCTF_15
GFX VCC NCTFGFX VCC
VCC_AXG_NCTF_68
VCC_AXG_NCTF_69
VCC_AXG_NCTF_70
VCC_AXG_NCTF_71
VCC_AXG_NCTF_72
VCC_AXG_NCTF_73
VCC_AXG_NCTF_74
AP17
AP19
AP20
AP21
AP23
AP24
AR20
CFG_10
CFG_11
CFG_12
CFG_6
CFG_7
CFG_8
CFG_9
J23
J20
L23
E23
R24
C20
G23
9
8
6
7
4
5
10
11
100nFC614
100nFC568
100nFC569
100nFC613
C577 100nF
C617 100nF
C621 100nF
C620 100nF
AD47
AC50
U43
PEG_TXP_4
V17
VCC_AXG_NCTF_16
VCC_AXG_NCTF_75
AR21
CFG_13
E20
AD43
W42
Y47
Y39
AC38
PEG_TXP_5
PEG_TXP_6
PEG_TXP_7
PEG_TXP_8
PEG_TXP_9
PEG_TXP_10
PEG_TXP_11
V19
V20
V21
V23
V24
Y15
Y16
VCC_AXG_NCTF_17
VCC_AXG_NCTF_18
VCC_AXG_NCTF_19
VCC_AXG_NCTF_20
VCC_AXG_NCTF_21
VCC_AXG_NCTF_22
VCC_AXG_NCTF_23
VCC_AXG_NCTF_81
VCC_AXG_NCTF_82
VCC_AXG_NCTF_76
VCC_AXG_NCTF_77
VCC_AXG_NCTF_78
VCC_AXG_NCTF_79
VCC_AXG_NCTF_80
V29
Y31
V26
V28
AR23
AR24
AR26
CFG_14
CFG_15
CFG_16
CFG_17
CFG_18
CFG_19
CFG_20
L32
L35
K23
N33
M20
M24
18
20
19
DRAW
CHECK
APPROVAL
MODULE CODE
13
14
15
12
100nFC641
100nFC611
C619 100nF
EXT_GFX
EXT_GFX
EXT_GFX
EXT_GFX
EXT_GFX
EXT_GFX
EXT_GFX
EXT_GFX
EXT_GFX
EXT_GFX
EXT_GFX
EXT_GFX
EXT_GFX
EXT_GFX
EXT_GFX
EXT_GFX
EXT_GFX
EXT_GFX
EXT_GFX
EXT_GFX
EXT_GFX
EXT_GFX
EXT_GFX
EXT_GFX
EXT_GFX
EXT_GFX
EXT_GFX
EXT_GFX
EXT_GFXEXT_GFX
EXT_GFX
EXT_GFX
AG39
AE50
AH43
PEG_TXP_12
PEG_TXP_13
PEG_TXP_14
PEG_TXP_15
PCIE GFXDMICLK
VCC_AXG_NCTF_24
MEPMNC
VCC_AXG_NCTF_83
16-C1 16-B1
16-B1
ZHOU JUN
DEV. STEP
GUO LEI
REV
KEVIN LEE
LAST EDIT
GFX1_TXN(15:0)
20-C4
GFX1_TXP(15:0)
20-D4
PEG_COMPI
PEG_COMPO
GFX_VID_0
GFX_VID_1
GFX_VID_2
GFX_VID_3
GFX_VR_EN
DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3
DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3
DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3
DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3
DPLL_REF_CLK
DPLL_REF_CLK*
DPLL_REF_SSCLK
DPLL_REF_SSCLK*
PEG_CLK
PEG_CLK*
CL_CLK
CL_DATA
CL_PWROK
CL_RST*
CL_VREF
PM_BM_BUSY*
PM_DPRSTP*
PM_EXT_TS*_0
PM_EXT_TS*_1
PWROK
RSTIN*
THERMTRIP*
DPRSLPVR
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
NC_16
MCH3_CFG(20:18)
MCH3_CFG(16)
3/9/2007
MP
1.0
N43
M43
E35
A39
C38
B39
E36
AN47
AJ38
AN42
AN46
AM47
AJ39
AN41
AN45
AJ46
AJ41
AM40
AM44
AJ47
AJ42
AM39
AM43
B42
C42
H48
H47
K44
K45
AM49
AK50
AT43
AN49
AM50
G41
L39
L36
J36
AW49
AV20
N20
G36
BJ51
BK51
BK50
BL50
BL49
BL3
BL2
BK1
BJ1
E1
A5
C51
B50
A50
A49
BK2
TITLEDATE
P1.05V
TP15303
1%
10K
R99
100
R143
1%
10K
R98
1%
MCH1_CLVREF
TORINO 2
MAIN
965GM(2)
March 9, 2007 12:03:21 PM
123
R91
24.9
1%
25-D1
25-D1
25-D1
25-C1
25-D1
25-D1
25-D1
25-C1
25-D1
25-D1
25-D1
25-D1
25-D1
25-D1
25-D1
25-D1
25-C1
25-C1
31-C2
25-C1
13-B1
25-D2
10-D424-C2
18-C2
17-C2
31-C2
25-A325-C331-B4
10-C411-B324-C2
45-C4 25-C2
13-B1
DMI1_TXN0
DMI1_TXN1
DMI1_TXN2
DMI1_TXN3
DMI1_TXP0
DMI1_TXP1
DMI1_TXP2
DMI1_TXP3
DMI1_RXN0
DMI1_RXN1
DMI1_RXN2
DMI1_RXN3
DMI1_RXP0
DMI1_RXP1
DMI1_RXP2
DMI1_RXP3
8-B1
CLK1_DREFCLK
8-B1
CLK1_DREFCLK#
8-B1
CLK1_DREFSSCLK
8-B1
CLK1_DREFSSCLK#
8-B1
CLK1_MCH3GPLL
8-B1
CLK1_MCH3GPLL#
CL3_CLK
CL3_DATA
KBC3_PWRGDMCH
CL3_RST#
MCH1_CLVREF
GMCH3_BMBUSY#
CPU1_DPRSTP#
GMCH3_EXTTS0#
GMCH3_EXTTS1#
KBC3_PWRGDMCH
PLT3_RST#
CPU1_THRMTRIP#
CHP3_DPRSLPVR
P3.3V
P1.25V
TP15300
SAMSUNG
PART NO.
PAGE
R603
1K
1%
0.350V
R604
392
1%
ELECTRONICS
BA41-00727/8A
OF
P3.3V
C642
100nF
10V
D
C
B
A
5313
A
B
D
2
1
4
3
C
SAMSUNG PROPRIETARY
COM-22C-015(1996.6.5) REV. 3
D:/users/mentor/Torino2/SR/T2_SR_0309
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
MEM1_ADQ(63:0)
17-D2
7
9
4
3
5
6
1
2
0
8
13
10
12
11
20
18
19
21
24
15
14
16
23
25
26
22
17
33
30
34
32
29
28
27
31
35
39
36
38
37
40
47
41
44
42
43
51
52
53
50
48
45
49
46
60
57
61
62
59
54
56
55
63
58
AM8
AT42
AW47
BB45
BF48
AR45
AY46
AR41
BA45
AR43
BB19
MEM1_ABS0
MEM1_ABS1
MEM1_ABS2
MEM1_ADM(7:0)
MEM1_ADQS#(7:0)
MEM1_ADQS(7:0)
MEM1_AMA(13:0)
MEM1_ACAS#
MEM1_ARAS#
MEM1_AWE#
MEM1_CS0#
MEM1_CS1#
MEM1_CS2#
MEM1_CS3#
MEM1_ODT0
MEM1_ODT1
MEM1_ODT2
MEM1_ODT3
P1.8V_AUX
Route as short as possible
17-C4 19-C2
17-C4 19-C2
19-C2
17-C4
17-B4
17-B4
19-C417-D4
17-C4 19-C2
19-C217-C4
17-C4 19-C2
19-D2
17-C4
19-D217-C4
18-C4 19-C2
19-C218-C4
17-B4 19-C2
19-C217-B4
18-B4 19-C2
19-C218-B4
1% 22.6
1%
22.6
R630
R631
20ohm
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
8
9
10
11
12
13
TP15302
TP15301
P1.8V_AUX
R152
1K
1%
R154
3.01K
1%
R153
1K
1%
C227
10nF
16V
C228
2200nF
C226
10nF
16V
BK19
BD44
BD42
AW38
AW13
BD47
BC41
BA37
BA16
BE48
BB43
BC37
BB16
BD20
BK27
BH28
BK28
BA28
BC19
BE28
BG30
BE18
BA19
AY20
BG20
BK16
BG16
BE13
BH18
BE16
BK14
BK31
C229
2200nF
BF29
AT45
BG8
AY5
AN6
AT47
BH7
BC1
AP2
AT46
BH6
BB2
AP3
BJ19
BL24
BJ27
BJ25
BL28
BJ16
BL17
BJ15
BJ14
BL15
BL31
SA_BS_0
SA_BS_1
SA_BS_2
SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7
SA_DQS*_0
SA_DQS*_1
SA_DQS*_2
SA_DQS*_3
SA_DQS*_4
SA_DQS*_5
SA_DQS*_6
SA_DQS*_7
SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6
SA_DQS_7
SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8
SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
SA_CAS*
SA_RAS*
SA_WE*
SA_RCVEN*
SM_CS*_0
SM_CS*_1
SM_CS*_2
SM_CS*_3
SM_ODT_0
SM_ODT_1
SM_ODT_2
SM_ODT_3
SM_RCOMP
SM_RCOMP*
SM_RCOMP_VOH
SM_RCOMP_VOL
AW44
SA_DQ_6
SA_DQ_7
SA_DQ_5
SA_DQ_3
SA_DQ_4
SA_DQ_2
SA_DQ_0
SA_DQ_1
SYSTEM MEMORY ADDR MUX
Samsung
SB_DQ_5
SB_DQ_6
SB_DQ_4
SB_DQ_2
SB_DQ_3
SB_DQ_0
SB_DQ_1
AV50
AP49
AN50
AN51
AR51
AW50
AW51
Confidential
3
1
5
2
0
4
BG47
SA_DQ_8
SA_DQ_9
SB_DQ_7
SB_DQ_8
AV49
BA50
BB50
7
8
6
BJ45
BB47
BG50
SA_DQ_10
SA_DQ_11
SA_DQ_12
SA_DQ_13
SB_DQ_9
SB_DQ_10
SB_DQ_11
SB_DQ_12
BA49
BE50
BA51
11
10
9
BH49
BE45
AW43
SA_DQ_14
SA_DQ_15
SA_DQ_16
SB_DQ_13
SB_DQ_14
SB_DQ_15
BF50
BF49
AY49
13
14
12
BE44
BG42
BE40
SA_DQ_17
SA_DQ_18
SA_DQ_19
SB_DQ_17
SB_DQ_18
SB_DQ_16
BJ44
BJ43
BJ50
17
16
15
BF44
BH45
BG40
SA_DQ_20
SA_DQ_21
SA_DQ_22
SB_DQ_19
SB_DQ_20
SB_DQ_21
BL43
BK47
BK49
20
18
19
4
3
AY41
AV38
AT38
AV13
AT13
AW41
SA_DQ_29
SA_DQ_30
SA_DQ_28
AW11
SA_DQ_31
SA_DQ_32
SA_DQ_33
SA_DQ_34
BF40
AR40
AW40
SA_DQ_23
SA_DQ_24
AT39
SA_DQ_25
AW36
SA_DQ_26
SA_DQ_27
SYSTEM MEMORY A
U504-3
LE88CLGM
3 OF 5
SYSTEM MEMORY B
SB_DQ_31
SB_DQ_32
SB_DQ_22
SB_DQ_23
SB_DQ_24
SB_DQ_25
SB_DQ_26
BJ41
BJ37
BJ36
BL41
BK43
BK42
26
21
23
22
24
25
Dual Channel
SM_CK(2:0)
SM_CK(2:0)*
SM_CK(5:3)
SM_CK(5:3)*
SM_CS(1:0)*
SM_CKE(1:0)
SM_ODT(1:0) SA_ODT(1:0)
SM_CS(3:2)*
SM_SKE(3:2)
SM_ODT(3:2)
SB_DQ_33
SB_DQ_27
SB_DQ_28
SB_DQ_29
SB_DQ_30
BJ40
BL35
BK37
BK13
BE11
BK41
28
29
31
27
32
30
33
Ch. A (So-DIMM A)
SA_CK(2:0) N/A
SA_CK(2:0)*
N/A
N/A
SA_CS(1:0)*
SA_CKE(1:0)
N/A
N/A
N/A
AV11
AU15
SA_DQ_35
SA_DQ_36
SB_DQ_34
SB_DQ_35
BK11
BC11
34
AT11
BA13
BA11
SA_DQ_37
SA_DQ_38
SA_DQ_39
SB_DQ_36
SB_DQ_37
SB_DQ_38
BE12
BC13
BC12
35
37
36
BE10
BG12
38
AY9
BG10
AW9
BD7
BB9
BD10
BD8
SA_DQ_43
SA_DQ_44
SA_DQ_45
SA_DQ_46
SA_DQ_40
SA_DQ_41
SA_DQ_42
SB_DQ_39
SB_DQ_40
SB_DQ_41
SB_DQ_42
SB_DQ_43
SB_DQ_44
SB_DQ_45
BJ8
BL9
BL5
BK5
BK9
BJ10
BK10
41
42
44
45
43
39
40
Ch. B (So-DIMM B)
N/A
SB_CK(2:0)
SB_CK(2:0)*
N/A
N/A
N/A
SB_CS(3:2)*
SB_CKE(3:2)
SB_ODT(3:2)
BB5
AY7
AT5
SA_DQ_47
SA_DQ_48
SA_DQ_49
SA_DQ_50
SB_DQ_46
SB_DQ_47
SB_DQ_48
SB_DQ_49
BJ6
BF4
BH5
46
47
48
2
AT7
AY6
SA_DQ_51
SA_DQ_52
SB_DQ_50
SB_DQ_51
BC2
BG1
49
50
BB7
AR5
AR8
SA_DQ_53
SA_DQ_54
SA_DQ_55
SB_DQ_52
SB_DQ_53
SB_DQ_54
BK3
BE4
BD3
51
52
53
DRAW
CHECK
APPROVAL
MODULE CODE
AR9
AN3
SA_DQ_58
SA_DQ_56
SA_DQ_57
SB_DQ_55
SB_DQ_56
SB_DQ_57
BJ2
BA3
BB3
54
55
56
AN10
AT9
AN9
SA_DQ_59
SA_DQ_60
SA_DQ_61
SB_DQ_60
SB_DQ_58
SB_DQ_59
AT3
AY2
AR1
57
58
59
AM9
AN11
SA_DQ_62
SA_DQ_63
SB_DQ_61
SB_DQ_62
AT2
AY3
AU2
61
60
62
ZHOU JUN
GUO LEI
KEVIN LEE
SM_VREF_0
SM_VREF_1
SYSTEM MEMORY B DDR MUX
SB_DQ_63
63
SM_CK*0
SM_CK*1
SM_CK*3
SM_CK*4
SM_CK0
SM_CK1
SM_CK3
SM_CK4
SM_CKE0
SM_CKE1
SM_CKE3
SM_CKE4
SB_BS_0
SB_BS_1
SB_BS_2
SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7
SB_DQS*_0
SB_DQS*_1
SB_DQS*_2
SB_DQS*_3
SB_DQS*_4
SB_DQS*_5
SB_DQS*_6
SB_DQS*_7
SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6
SB_DQS_7
SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8
SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13
SB_CAS*
SB_RAS*
SB_WE*
SB_RCVEN*
DATE
3/9/2007
DEV. STEP
REV
LAST EDIT
MP
1.0
AR49
AW4
AW30
BA23
AW25
AW23
AV29
BB23
BA25
AV23
BE29
AY32
BD39
BG37
AY17
BG18
BG36
AR50
BD49
BK45
BL39
BH12
BJ7
BF3
AW2
AU50
BC50
BL45
BK38
BK12
BK7
BF2
AV3
AT50
BD50
BK46
BK39
BJ12
BL7
BE2
AV2
BC18
BG28
BG25
AW17
BF25
BE25
BA29
BC28
AY28
BD37
BG17
BE37
BA39
BG13
BE17
AV16
BC17
AY18
18-D3
TITLE
19-C2 17-C4
19-C2 18-C4
19-C2 18-C4
19-C2 18-C4
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
19-B4 18-D4
0
1
2
3
4
5
6
7
8
9
10
11
12
13
19-C2 18-C4
19-C2 18-C4
19-C2 18-C4
MEM1_BDQ(63:0)
TORINO 2
MAIN
965GM(3)
March 9, 2007 12:03:21 PM
17-C218-C244-B4
17-C4
17-C4
18-C4
18-C4
17-C4
17-C4
18-C4
18-C4
17-C419-C2
18-C419-C2
18-C419-C2
18-B417-B4
18-B4
18-B4
1
MEM1_VREF
CLK1_MCLK0#
CLK1_MCLK1#
CLK1_MCLK2#
CLK1_MCLK3#
CLK1_MCLK0
CLK1_MCLK1
CLK1_MCLK2
CLK1_MCLK3
MEM1_CKE0
MEM1_CKE1
MEM1_CKE2
MEM1_CKE3
MEM1_BBS0
MEM1_BBS1
MEM1_BBS2
MEM1_BDM(7:0)
MEM1_BDQS#(7:0)
MEM1_BDQS(7:0)
MEM1_BMA(13:0)
MEM1_BCAS#
MEM1_BRAS#
MEM1_BWE#
SAMSUNG
PART NO.
PAGE
ELECTRONICS
BA41-00727/8A
D
C
B
A
5314
OF
SAMSUNG PROPRIETARY
1
COM-22C-015(1996.6.5) REV. 3
B
3
C
A
2
D
4
D:/users/mentor/Torino2/SR/T2_SR_0309
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
C91
10nF
100nFC524
P3.3V
R87
0
P1.05V
C95
100nF
R95
0
R101
0
EXT_GFX
EXT_GFX
EXT_GFX
EXT_GFX
R526
0
EXT_GFX
EXT_GFX
P1.05V_PEG
C89
100nF
TP16388
R527
0
TP16390
R27
0
TP16391
TP16392
TP16393
TP16394
TP16395
R109
0
AD51
V49
V50
W50
W51
U51
K50
U48
J41
H42
A41
A43
J32
A33
B33
A30
C25
B25
C27
B27
B28
A28
B49
H49
AL2
AM2
AN2
AJ50
AH50
AH51
C40
B40
M32
L29
N28
R106
0
EXT_GFX
EXT_GFX
P1.05V
R103
EC503
C526
10nF
100nFC220
330uF
2.5V
C639
100nF
C26
100nF
B19
EXCML16A270u
TP15314
C674
10000nF
6.3V
AL
C640
100nF
0
C90
C527
10nF
100nF
NO_STUFF@Int.Gfx.
0
C25
22nF
25V
AL2.5V
22000nF 6.3V
330uF
C88 100nF
EC2
C626
C624 100nF
10000nF
C92
100nF
C673
6.3V
2.5V AL
EC501 330uF
91nH, 20mOhm ESR
P1.25V
B18
P1.8V_AUX
INT_GFX
INT_GFX
INT_GFX
INT_GFX
INT_GFX
INT_GFX
INT_GFX
BLM18PG181SN1
R602
1
TP16385
C672
10000nF
6.3V
L500
1uH
C525
330uF
2.5V
AL
TP16386
R90
NO_STUFF@Ext.Gfx.
P3.3V
INT_GFX
INT_GFX
INT_GFX
INT_GFX
INT_GFX
INT_GFX
P1.25V
100nFC643
B518
B11
B520
B519
INT_GFX
INT_GFX
INT_GFX
INT_GFX
INT_GFX
INT_GFX
B514
BLM18PG181SN1
C528
10000nF
6.3V
NO_STUFF@Ext.Gfx.
MMZ1608S121AT
MMZ1608S121AT
MMZ1608S121AT
MMZ1608S121AT
R146
1
C221
22000nF
6.3V
C644 100nF
P1.05V_PEG
Shared Filtering with VCC_PEG
10
0
B12
100nF
TP15313
C93
R23
100nF
C24
P3.3V
C94
100nF
P1.05V
INT_GFX
INT_GFX
INT_GFXINT_GFX
INT_GFX
P1.5V
13
D4
MMBD301
R110
BLM18PG181SN1
TP15315
NO_STUFF@Ext.Gfx.
P1.05V
U31
U29
T35
AM35
AL35
AL33
AK37
AK36
AP35
AR35
AP36
AR36
VCC_PEG_1
VCC_PEG_2
VCC_PEG_3
VCC_PEG_4
VCC_PEG_5
VCCA_PEG_PLL
VCCA_PEG_BG
VCCD_PEG_PLL
VCCD_LVDS_1
VCCD_LVDS_2
VCCA_LVDS
VCC_TX_LVDS
VCC_SYNC
VCCA_CRT_DAC_1
VCCA_CRT_DAC_2
VCCA_DAC_BG
VCCA_TVA_DAC_1
VCCA_TVA_DAC_2
VCCA_TVB_DAC_1
VCCA_TVB_DAC_2
VCCA_TVC_DAC_1
VCCA_TVC_DAC_2
VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL
VCCA_MPLL
VCCD_HPLL
VCC_DMI
VCC_RXR_DMI_1
VCC_RXR_DMI_2
Samsung
VCC_HV_1
VCC_HV_2
VCCD_CRT
VCCD_TVDAC
VCCD_QDAC
Confidential
PEGLVDSCRTTVPLLDMIHVTV/CRT
VCC_NCTF_1
VCC_SM_1
VCC_SM_2
VCC_SM_3
AU30
AU32
AU33
P1.8V_AUX
VCC_NCTF_2
VCC_NCTF_3
VCC_SM_5
VCC_SM_4
AV33
AU35
VCC_NCTF_5
VCC_NCTF_6
VCC_NCTF_7
VCC_NCTF_4
VCC_SM_6
VCC_SM_7
VCC_SM_8
VCC_SM_9
AY35
BA32
AW33
AW35
EC504
330uF
2.5V
AL
AK35
VCC_NCTF_8
VCC_NCTF_9
VCC_NCTF_10
VCC_SM_10
VCC_SM_11
VCC_SM_12
BA33
BA35
BB33
C676
22000nF
6.3V
AH35
AH33
AF36
AF33
AD36
AD35
AD33
VCC_NCTF_18
VCC_NCTF_19
VCC_NCTF_20
VCC_NCTF_21
VCC_NCTF_22
VCC NCTF
AC36
VCC_NCTF_23
VCC_NCTF_24
AK33
AJ36
AJ35
AJ33
AH37
VCC_NCTF_11
VCC_NCTF_12
VCC_NCTF_13
VCC_NCTF_14
AH36
VCC_NCTF_17
VCC_NCTF_15
VCC_NCTF_16
U504-4
LE88CLGM
4 OF 5
VCC SM VCC SM CK VCC SM LF
VCC_SM_13
VCC_SM_14
VCC_SM_15
VCC_SM_16
VCC_SM_17
VCC_SM_18
VCC_SM_19
VCC_SM_20
VCC_SM_21
VCC_SM_22
VCC_SM_23
VCC_SM_24
VCC_SM_25
VCC_SM_26
BF33
BF34
BE32
BE33
BC33
BC35
C716
22000nF
6.3V
BD32
BD35
BE35
C677
100nF
BG32
L501
1uH
BG33
BG35
BH32
BC32
AC35
AC33
AB37
AB36
AB33
VCC_NCTF_25
VCC_NCTF_26
VCC_NCTF_27
VCC_NCTF_28
VCC_SM_27
VCC_SM_28
VCC_SM_29
VCC_SM_30
BJ32
BJ33
BJ34
BH34
BH35
R629
1
AA35
AA33
Y37
Y36
AA36
VCC_NCTF_31
VCC_NCTF_32
VCC_NCTF_33
VCC_NCTF_29
VCC_NCTF_30
VCC_SM_31
VCC_SM_32
VCC_SM_33
VCC_SM_34
VCC_SM_35
BL33
BK32
BK33
BK34
BK35
TP16396
C680
22000nF
6.3V
Y35
Y33
Y32
V37
V36
VCC_NCTF_34
VCC_NCTF_35
VCC_NCTF_36
VCC_NCTF_37
VCC_NCTF_38
VCC_SM_CK_1
VCC_SM_CK_2
VCC_SM_36
BJ24
BK24
BK23
C678
10000nF
6.3V
V33
V32
U36
VCC_NCTF_39
VCC_NCTF_40
VCC_NCTF_41
VCC_NCTF_42
VCC_SM_CK_3
VCC_SM_CK_4
BJ23
C679
100nF
U35
U33
U32
VCC_NCTF_46
VCC_NCTF_43
VCC_NCTF_44
VCC_NCTF_45
VCC_SM_LF_1
VCC_SM_LF_2
VCC_SM_LF_3
BE39
BC39
BD17
AW45
C210
C208
C209
470nF16V
10000nF
10000nF
6.3V
6.3V
T34
T30
VCC_NCTF_47
VCC_NCTF_48
VCC_NCTF_49
VCC_SM_LF_4
VCC_SM_LF_5
VCC_SM_LF_6
AT6
BD4
AW8
C216
C217
C219
220nF
100nF
220nF
16V
16V
16V
VCC_NCTF_50
VCC AXM NCTFVCC AXM A SMA SM NCTFA SM CKVCC AXD
VCC AXF
VCC_SM_LF_7
C218
100nF16V
P1.05V
EC4
330uF
2.5V
AL
Check Load Transient
VCC_AXM_NCTF_1
VCC_AXM_NCTF_2
VCC_AXM_NCTF_3
VCC_AXM_NCTF_4
VCC_AXM_NCTF_5
VCC_AXM_NCTF_6
VCC_AXM_NCTF_7
VCC_AXM_NCTF_8
VCC_AXM_NCTF_9
VCC_AXM_NCTF_10
VCC_AXM_NCTF_11
VCC_AXM_NCTF_12
VCC_AXM_NCTF_13
VCC_AXM_NCTF_14
VCC_AXM_NCTF_15
VCC_AXM_NCTF_16
VCC_AXM_NCTF_17
VCC_AXM_NCTF_18
VCC_AXM_NCTF_19
VCC_AXM_1
VCC_AXM_2
VCC_AXM_3
VCC_AXM_4
VCC_AXM_5
VCC_AXM_6
VCC_AXM_7
VCCA_SM_1
VCCA_SM_2
VCCA_SM_3
VCCA_SM_4
VCCA_SM_5
VCCA_SM_6
VCCA_SM_7
VCCA_SM_8
VCCA_SM_9
VCCA_SM_10
VCCA_SM_NCTF_1
VCCA_SM_NCTF_2
VCCA_SM_CK_1
VCCA_SM_CK_2
VCC_AXD_1
VCC_AXD_2
VCC_AXD_3
VCC_AXD_4
VCC_AXD_5
VCC_AXD_6
VCC_AXD_NCTF_1
VCC_AXF_1
VCC_AXF_2
VCC_AXF_3
C173
10000nF
6.3V
AL24
AL26
AL28
AL29
AL31
AL32
AM26
AM28
AM29
AM31
AM32
AM33
AP29
AP31
AP32
AP33
AR31
AR32
AR33
AJ23
AJ26
AK23
AK24
AK29
AT31
AT33
AW18
AV19
AU19
AU18
AU17
AT22
AT21
AT19
AT18
AT17
AR17
AR16
BC29
BB29
AU28
AU24
AT30
AT29
AT25
AT23
AR29
B23
B21
A21
C625
10000nF
6.3V
P1.05V
TP16399
C580
1000nF
C96
220nF
16V
C174
220nF
16V
C30
220nF
16V
D
C
P1.25V
EC16
150uF
6.3V
OXI
C214
22000nF
6.3V
C671
22000nF
6.3V
C212
1000nF
6.3V
C670
4700nF
10V
P1.25V
C27
100nF
C669
1000nF
6.3V
C213
1000nF
6.3V
C211
22000nF
6.3V
B
B20
BLM18PG181SN1
C215
C172
1000nF
22000nF
6.3V
6.3V
C529
C530
1000nF
10000nF
6.3V
6.3V
A
DRAW
CHECK
MODULE CODE
4
3
2
ZHOU JUN
GUO LEI
KEVIN LEE
DATE
DEV. STEP
REVAPPROVAL
LAST EDIT
3/9/2007
TITLE
TORINO 2
MP
1.0
MAIN
965GM(4)
March 9, 2007 12:03:21 PM
1
SAMSUNG
PART NO.
15 53
PAGE
ELECTRONICS
BA41-00727/8A
OF
3
C
D
A
4
2
B
SAMSUNG PROPRIETARY
COM-22C-015(1996.6.5) REV. 3
1
D:/users/mentor/Torino2/SR/T2_SR_0309
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
AT27
AT41
AT49
AU1
AU23
AU29
AU3
AU36
VSS_93
VSS_94
VSS_95
VSS_96
VSS
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_15
T27
AP28
AR15
AR19
AR28
AU49
AU51
AV25
AV39
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
T37
V31
V35
U24
U28
AV48
AW1
AW12
AW16
AW24
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_262
VSS_263
VSS_264
VSS_265
VSS_266
VSS_267
VSS_268
VSS_269
VSS_270
VSS_271
VSS_272
VSS_273
VSS_274
VSS_275
VSS_276
VSS_277
VSS_278
VSS_279
VSS_280
VSS_281
VSS_282
VSS_283
VSS_284
VSS_285
VSS_286
VSS_287
VSS
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296
VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305
VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_NCTF_21
VSS_191
BK8
BL11
AW29
AW32
VSS_107
VSS_108
VSS_109
VSS_192
VSS_193
VSS_194
BL13
BL19
AW5
AW7
VSS_110
VSS_111
L24
L28
L3
L33
L49
M28
M42
M46
M49
M5
M50
M9
N11
N14
N17
N29
N32
N36
N39
N44
N49
N7
P19
P2
P23
P29
P3
P50
R49
T39
T43
T47
U41
U45
U50
V2
V3
W11
W39
W43
W47
W5
W7
Y11
Y13
Y2
Y41
Y45
Y49
Y5
Y50
VSS_195
VSS_196
BL22
BL37
AY10
AY24
VSS_112
VSS_113
VSS_197
VSS_198
C12
BL47
AY37
AY42
VSS_114
VSS_115
VSS_200
VSS_199
C19
C16
AY43
AY45
VSS_116
VSS_117
VSS_201
VSS_202
C28
C29
AY47
AY50
VSS_118
VSS_119
VSS_203
VSS_204
T33
C33
B10
VSS_120
VSS_205
VSS_206
T31
T29
VSS_207
VSS_208
R28
C50
VSS_209
VSS_210
C46
C41
VSS
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
B20
B24
B29
B30
B35
B38
B43
B46
B5
B8
BA1
BA17
BA18
BA2
BA24
BB12
BB25
BB40
BB44
BB49
BB8
BC16
BC24
BC25
BC36
BC40
BC51
BD13
BD2
BD28
BD45
BD48
BD5
BE1
BE19
BE23
BE30
BE42
BE51
BE8
BF12
BF16
BF36
BG19
BG2
BG24
BG29
BG39
BG48
BG5
BG51
BH17
BH30
BH44
BH46
BH8
BJ11
BJ13
BJ38
BJ4
BJ42
BJ46
BK15
BK17
BK25
BK29
BK36
BK40
BK44
BK6
** Note
CFG#
CFG(5)
CFG(9)
CFG(16)
CFG(18)
CFG(19)
CFG(20)
SDVO_CTRL_DATA
MCH3_CFG(18)
MCH3_CFG(19)
MCH3_CFG(20)
SDVO_CTRL_DATA
MCH3_CFG(5)
MCH3_CFG(9)
MCH3_CFG(16)
Current Setting
Low
DMIx2
PEG Reversal
Dynamic ODT
Disabled
VCC 1.05V (def.)
DMI Lane Normal
SDVO or PCIE X1
Only(def.)
No SDVO Device
Present (def.)
13-A2
13-A2
13-A2
13-B4
13-A3
13-A3
13-A2
(def. : default Option)
TP16220
TP16221
TP16222
TP16223
TP16401
TP16402
** Note
CFG(17:3)
CFG(20:18)
High
DMIx4 (def.)
Normal
Dynamic ODT
Enabled (def.)
VCC 1.5V
DMI Lane Reversal
SDVO and PCIE X1
Simultaneously
SDVO Device Present
1K
R102
2K
R111
2K 1%
R112
Internal Pull-up
Internal Pull-down
P3.3V
NO_STUFF
1%
NO_STUFF
NO_STUFF
AN43
AN5
AN7
AP4
AP48
AP50
AR11
AR2
AR39
AR44
AR47
AR7
AT10
AM4
AM41
AM45
AN1
AN38
A13
VSS_1
A15
VSS_2
A17
VSS_3
A24
VSS_4
AA21
AA24
AA29
AA32
AB20
AB23
AB26
AB28
AB31
AB32
AC10
AC13
AC39
AC43
AC47
AD21
AD26
AD29
AD32
AD41
AD45
AD49
AD50
AE10
AE14
AF20
AF23
AF24
AF28
AF29
AF31
AG2
AG38
AG43
AG47
AG50
AH40
AH41
AJ11
AJ13
AJ21
AJ24
AJ29
AJ32
AJ43
AJ45
AJ49
AK20
AK21
AK26
AK28
AK31
AK51
AM11
AM13
AM3
AC3
AD1
AD3
AD5
AD8
AE6
AH3
AH7
AH9
AL1
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS
VSSA_PEG_BG
K49
AN39
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
C36
C7
D13
D24
D3
D32
D39
D45
D49
E10
E16
E24
E28
E32
E47
F19
F36
F4
F40
F50
G1
G13
G16
G19
G24
G28
G29
G33
G42
G45
G48
G8
H24
H28
H4
H45
H50
J11
J16
J2
J24
J28
J33
J35
J39
K12
K47
K8
L1
L17
L20
VSS_SCB_4
VSS_SCB_5
VSS_SCB_6
C1
BL51
VSS_83
VSS_211
VSS_212
VSS_213
VSS_214
VSS_215
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222
VSS_223
VSS_224
VSS_225
VSS_226
VSS_227
VSS_228
VSS_229
VSS_230
VSS_231
VSS_232
VSS_233
VSS_234
VSS_235
VSS_236
VSS_237
VSS_238
VSS_239
VSS_240
VSS_241
VSS_242
VSS_243
VSS_244
VSS_245
VSS_246
VSS_247
VSS_248
VSS_249
VSS_250
VSS_251
VSS_252
VSS_253
VSS_254
VSS_255
VSS_256
VSS_257
VSS_258
VSS_259
VSS_260
VSS_261
VSS_NCTF_2
VSS_NCTF_1
AB17
AA19
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS SCB VSS NCTF VSS
VSS_SCB_3
VSS_SCB_1
VSS_SCB_2
VSSA_DAC_BG
VSSA_LVDS
A3
B2
A51
BL1
B32
B41
AT14
VSS_91
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_92
VSS_84
VSS_85
U504-5
LE88CLGM
5 OF 5
VSS
Samsung
Confidential
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
AF17
AF35
AB35
AK17
AD37
AM17
AM24
AP26
AD19
D
C
B
A
DRAW
CHECK
APPROVAL
MODULE CODE
4
3
2
ZHOU JUN
GUO LEI
KEVIN LEE
DATE
DEV. STEP
REV
LAST EDIT
3/9/2007
TITLE
TORINO 2
MP
1.0
MAIN
965GM(5)
March 9, 2007 12:03:21 PM
1
SAMSUNG
PART NO.
PAGE
ELECTRONICS
BA41-00727/8A
OF
5316
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