Samsung np-r610 Schematics
Samsung
Confidential
SRP Sheet Number: 1 of 73
Intel PENRYN
EXCEPT AS AUTHORIZED BY SAMSUNG.
3
A
SAMSUNG PROPRIETARY
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
SAMSUNG ELECTRONICS CO’S PROPERTY.
PCB Code :
Model Name :
Owner :
00
D
1
C
CPU :
SEC Mobile R & D
T.R. Date :
13
MAIN
TPT : BA41-00919A
DRAW
D
Montevina Platform (NB9M)
ISTANBUL
SAMSUNG ELECTRONICS CO’S PROPERTY.
ISTANBUL
4
APPROVAL
4
A
Remarks :
THIS DOCUMENT CONTAINS CONFIDENTIAL
Revision :
THIS DOCUMENT CONTAINS CONFIDENTIAL
4
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
2
1
Intel CANTIGA PM + ICH9M
PV
ELECTRONICS
NAN : BA41-00921A
Chip Set :
C
Dev. Step :
1
X
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
SAMSUNG
4
PROPRIETARY INFORMATION THAT IS
GCE : BA41-00920A
2
2008.07.18
2
CHECK
2
BB
PBA Name :
3
3
PROPRIETARY INFORMATION THAT IS
Signature :
SAMSUNG PROPRIETARY
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
- This Document can not be used without Samsung's authorization -
8. Block Diagram and Schematic
8-1
8-1
8-2
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
- This Document can not be used without Samsung's authorization -
8. Block Diagram and Schematic
2
3
1
4
SPDIF.
PG 48
USB 0,1,2
USB 0,1,2
Direct Media Interface
x4, 1.5V
CLINK
C
PG 30
PG 33
HDMI
LCD
CRT
PG 30
LCD
CRT
OPTION
Ext. PEG
NB9X
PEG x16
External Graphics
Cantiga-PM
MCH-M
1299 FCBGA
PG 13 - 17
PM975
667/800 MT/S
FSB
A
SPKR L
SPKR R
MIC-IN
4
3
80 Port
PG 25
2P
2P
PG 43
PG 41
PG 41
SATA
SATA
HDD
ODD
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SATA 1
SATA 0
3.3V LPC, 33MHz
LPC
HP
PG 25
SPI ROM
SPI
B
High Definition Audio
PG 43
AMP
Aud.
ALC262
Audio
12P
HD Primary
PG 20 - 24
HDAUDIO
PG 50
Camera
OPTION
USB 7
676 BGA
PG 50
ANT
Bluetooth
USB 5
ICH9-M
PG 45
PG 42
PG 48
RJ11
Modem
MDC
Samsung
Samsung
Samsung
PG 48
HD Secondary
PG 8 PG 55
Thermistor
(TBD)
CPU
PG 9
PG 10,11,12
FSB 1067
478pin
L2 Cache : 6/3MB
D
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SAMSUNG ELECTRONICS CO’S PROPERTY.
EXCEPT AS AUTHORIZED BY SAMSUNG.
Clocking
CK-505
PG 9
FAN
Mobile Processor
Penryn-6M
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG PROPRIETARY
LED
2
1
SRP Sheet Number: 2 of 73
PG 51
SAMSUNG
ELECTRONICS
A
PG 49
TMKBC (TBD)
H8S-2110B
MICOM
Touch
KBD
PAD
PG 50
PG 50
PG 28
AU6371
CardBus
PG 39
USB X
2 IN 1
M/S(SD...)
PG 39
OPTION
B
USB X
PCIE x1
Lane X
Express Card
PG 27
PCIE x1
USB 6
Lane 4
PG 40
52P
Mini Card 2
PG 40
Mini Card 1
PG 48
PCIE x1
Lane 1
52P
ANT
PG 47
PCIE x1
Lane 3
8055
RJ45
Channel A (Reverse)
Channel B (Reverse)
Dual channel
DDR III 1067/800
DDR III 1067/800
DC/DC
IMVP-6
CPU
PG 57
ON BOARD
Module
PG 55
PG 56
D
Charging
Circuit
Battery
DC/DC
Smart
DDR III
SODIMM 1
DDR III
SODIMM 0
Termination
PG 18,19
PG 19
PG 18
VCCP / DC-DC
DDR III Power
PG 53
PG 54
C
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
2
4
3
1
- This Document can not be used without Samsung's authorization -
8. Block Diagram and Schematic
A
PORT #
USB PORT Assign
NC
NC
Mini PCI Express 2
SYSTEM PORT 1
ASSIGNED TO
SYSTEM PORT 0
NC
Camera
Bluetooth
SYSTEM PORT 2
4
3
NC
PORT #
4
5
NC
Mini Card 2 (ROBSON or DVB-T)
PCI Express Assign
3
0
1
2
NC
Mini Card 1 (WLAN)
NC
LOM
ASSIGNED TO
Confidential
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B
P5.0V_AUX
P0.9V
P3.3V
P1.8V
P1.05V (VCCP)
P3.3V_AUX
P3.3V_MICOM
P5.0V
P1.5V
VCC_CORE
P5.0V_ALW
5.0V always power rail
5.0V switched on power rail (off in S4-S5)
5.0V switched power rail (off in S3-S5)
Samsung
Samsung
Samsung
GFX_CORE
P1.8V_AUX
VDC
VTT for CPU, Crestline & ICH8-M
1.8V switched power rail (off in S3-S5)
0.9V power rail for DDR (off in S3-S5)
1.5V switched power rail (off in S3-S5)
1.8V power rail for DDR (off in S4-S5)
3.3V switched on power rail (off in S4-S5)
Core Voltage for CPU
3.3V always power rail (for Micom)
3.3V switched power rail (off in S3-S5)
Primary DC system power supply (7 to 21V)
Core Voltage for GPU
C C
Voltage Rails
GLAN
-
-
F
A B
C
L
i
n
k
-
-
LPC bridge/IDE/AC97/SMBUS
Internal MAC
USB
Hub to PCI
AD30(internal)
AD24(internal)
AD29(internal)
AD31(internal)
-
-
-
-
USB2.0 #3 (USB5) : E
USB2.0 #0 (USB0) : A
-
B
USB2.0 #1 (USB1) : D
USB2.0 #4 (EHCI) : H
E
USB2.0 #2 (USB4) : C
Cardbus
AD25
3
A,B,C
D
PCI Devices
e
iv
ec
s
I
D
ES
#L
REQ/GNT#
Interrupts
D
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SAMSUNG ELECTRONICS CO’S PROPERTY.
EXCEPT AS AUTHORIZED BY SAMSUNG.
PROPRIETARY INFORMATION THAT IS
SCHEMATIC ANNOTATIONS AND BOARD INFORMATION
SAMSUNG PROPRIETARY
2
1
SRP Sheet Number: 3 of 73
SAMSUNG
ELECTRONICS
REVISION HISTORY
See rev notes for more information.
A
CK-505M (Clock Generator) 1101 001x
D2h
Clock, Unused Clock Output Disable
B
SODIMM0
I C / SMB Address
D
Thermal Sensor on SODIMM1
SODIMM1
ICH8-m
CPU Thermal Sensor
Thermal Sensor on SODIMM0
e
v
i
c
e
0011 000x
1010 010x
0011 010x
0111 101x
1010 000x
Master
dAs
d
r
e
s
s
-
A0h
34h -
A4h
Hex
7Ah
30h
SMBUS Master
Thermal Sensor
-
-
Bus
-
LCD Pannel Detect
Devices
Resolution
(TBD)
PANNEL_DETECT_0
Crystal
25MHz
LAN
Intel LAN
Crystal
Crystal / Oscillator
Crystal
Crystal
TYPE
32.768KHz
14.318MHz
10MHz
FREQUENCY
M
CLOCK-Generator
DEVICE
ICH8-M
I
C
O
M
H
CK-505
USAGE
Real Time Clock
D
F46
2
961
/
612
0
BOARD INFORMATION
D
8-3
8-4
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
- This Document can not be used without Samsung's authorization -
8. Block Diagram and Schematic
1
4
3
2
AC Adapter
D
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THIS DOCUMENT CONTAINS CONFIDENTIAL
SAMSUNG ELECTRONICS CO’S PROPERTY.
EXCEPT AS AUTHORIZED BY SAMSUNG.
PROPRIETARY INFORMATION THAT IS
SAMSUNG PROPRIETARY
A
Power On/Off Table by S-state
+V* (CORE)
+V*AUX
+V
ON
ON
ON
4
ON
+1.8V_AUX
+0.9V
ON
ON
+V*A(LWS)
+V*LAN
ON
ON
ON
ON
State
Rail
S0
S3
S4
S5
B
C
Battery DC
VDC
P3.3V_ALW
P5.0V_ALW
P12.0V_ALW
S5-S4
Confidential
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3
P1.2V_LAN
P1.8V_LAN
P2.5V_LAN
LAN
LAN
S3
Samsung
Samsung
Samsung
P3.3V_AUX
ICH8-M
MDC
LAN
BT
P3.3V_MICOM
MICOM
P5V_AUX
P0.9V
OPTION FOR ME
DDR III-Termination
It should be updated
P1.5V_AUX
ICH9-M
SODIMM (DDR III)
Cantiga
P1.5V_AUX
(CHP3_S4_STATE*)
P1.05V_AUX
KBC3_SUSPWR
2
1
SRP Sheet Number: 4 of 73
SAMSUNG
ELECTRONICS
POWER DIAGRAM
MDC
P3.3V
PEG
SPI
LEDs
PCMCIA
M_PCI
B
ICH8-M
CRESTLINE
Thermal Sensor
SODIMM
MICOM
EGFX_CORE
nVidia (TBD)
P1.25V
P1.2V
ICH8-M
CRESTLINE
PEG
S0
LCD
A
P1.5V
ICH8-M
CRESTLINE
IGFX_CORE
P5.0V
MICOM
CRT
CRESTLINE
HEATSINK
PEG
MDC
FAN CIRCUIT
AUX DISPLAY
FDD
USB
M_PCI
ICH8-M
PCMCIA
HDD
C
P0.9V
P1.8V
GDDR-3 for PEG
DDR II-Termination
(VCCP)
P1.05V
KBC3_PWRON
(CHP3_SLPS3*)
CRESTLINE
MEROM
ICH8-M
VCC_CORE
MEROM
Rev 0.1
KBC3_VRON
D
PEG
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
- This Document can not be used without Samsung's authorization -
8. Block Diagram and Schematic
1.8V
3.1 A (TBD)
GDDR
( ~ 5.0 W )
5V
B
VDC INV ( TBD A )
PEX IO (TBD A)
VGA CORE (TBD A)
RTC_Battery
0.9V
3.3V
1.8V
1.2V (PEX IO)
1.8V_AUX
1 A (TBD)
3.1 A (TBD)
DDR-3
(Dual slots)
5V
1.0V-1.1V (EGFX CORE)
RTC_Battery
5V_AUX
3.3V
1.5V
3.3V_AUX
5V
Samsung
Samsung
Samsung
6.53 A (TBD)
0.001 A (TBD)
2.4A (TBD)
0.001 A (TBD)
1.75 A (TBD)
0.67 A (TBD)
PEG
5V
17.75 A (TBD)
3.3V
5V
0.209 A (TBD)
0.006 A (TBD)
( ~ 2.0 W )
3.3V
0.374 A (TBD)
ICH9-M
3.3V
1.05V
1.13 A (TBD)
3.3V
C
0.9V( TBD A )
1.05V (VCCP)
3.3V
1.25V
1.5V
1.8V_AUX
0.125 A (TBD)
0.33 A (TBD)
3.79 A (TBD)
4.48 A (TBD)
2.43A (TBD)
(8 - 8.5 W )
Cantiga
GMCH
3.3V
1.05V ( TBD A )
3.3V ( TBD A )
5.0V ( TBD A )
1.8V_AUX ( TBD A )
1.25V ( TBD A )
1.5V ( TBD A )
1.05V (MCH CORE)
1.05V (VCCP)
1.5V
7.7 A (TBD)
0.13 A (TBD)
4.5 A (TBD)
( 35 W )
3.3V_AUX ( TBD A )
5.0V_AUX ( TBD A )
CPU CORE ( TBD A )
CPU CORE
1.05V
0.1 A (TBD)
41 A (TBD)
Penryn-6M
ITP
3.3V
MICOM 3V ( TBD A )
Adapter
1.8V ( TBD A )
Battery
D
EXCEPT AS AUTHORIZED BY SAMSUNG.
220V
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
THIS DOCUMENT CONTAINS CONFIDENTIAL
SAMSUNG ELECTRONICS CO’S PROPERTY.
PROPRIETARY INFORMATION THAT IS
SAMSUNG PROPRIETARY
4
3
A
P1.2V_LAN
P3.3V_AUX
P1.8V/2.5V_LAN
4
0.08 A (TBD)
0.15 A (TBD)
0.29 A (TBD)
LAN (88E8055)
Value by Datasheet/Application notes
3
(Value by measurement)
5V
3.3V (LCD 3V)
19V (VDC INV)
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0.67 A (TBD)
0.5 A (TBD)
LCD
5V
5V
2
1
SRP Sheet Number: 5 of 73
SAMSUNG
ELECTRONICS
A
0.2 A (TBD)
2 A (TBD)
Touch Pad
USB (x 3)
1.5 A (TBD)
0.16 A (TBD)
Audio AMP
FAN
1.5 A (TBD)
0.22 A (TBD)
ODD
SATA HDD
SATA
3.3V_AUX
0.5 A (TBD)
MDC
B
0.06 A (TBD)
0.07 A (TBD)
HD Audio
1.5V
5V
3.3V
3.3V_AUX
0.5 A (TBD)
1.5 A (TBD)
0.75A (TBD)
Mini Card X 2
0.015 A (TBD)
SPI
3.3V
0.1 A (TBD)
SD Card
0.01 A (TBD)
KBD LED
3.3V_AUX
0.6 A (TBD)
LAN
0.2 A (TBD)
KeyBoard
3.3V_AUX
0.25 A (TBD)
CLOCK
3.3V
1.8V
C
Sensor
MICOM 3V
0.1 A (TBD)
PWR LED
0.75 A (TBD)
Thermal
MICOM 3V
3.3V
0.08 A (TBD)
0.08 A (TBD)
KBC
POWER RAILS ANALYSIS
2
Rev. 0.6 (060920)
1
D
8-5
8-6
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
- This Document can not be used without Samsung's authorization -
8. Block Diagram and Schematic
Samsung
Confidential
Samsung
Confidential
Samsung
Confidential
SRP Sheet Number: 6 of 73
PROPRIETARY INFORMATION THAT IS
4
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
PRTC
SC486
MAX 1909
PRTC
LOM
11) VCCP3_PWRGD (GM-model)
12
SAMSUNG ELECTRONICS CO’S PROPERTY.
17) KBC3_PWRGD
10-1) P1.2V
Need to be updated!!
10-1) P3.3V
17) KBC3_PWRGD
6
3
CPU
C
4
Rev. 0.7
10-1) P1.05V
C
D
19
Sheet 20-21
KBC
(Test Option)
10-1) P3.3V
SC4435
10
9) KBC3_PWRON
Sheet 15-19
D
9) KBC3_PWRON
10-1) P3.3V
P5.0V_ALW
Host S5 / ME Boot
2
(SLPS4* = SLPM*) > S4_STATE* > SLPS3*
7
9-1
ADP3209
ICH8-M
THIS DOCUMENT CONTAINS CONFIDENTIAL
ELECTRONICS
7) P1.5V_AUX
FDS6680A
M-2) KBC3_ME_PWRON = 15) KBC3_PWRON
PEG
11) VCCP3_PWRGD
14) VCC_CORE
Devices
LAN100_SLP
13) KBC3_VRON
6-1) P1.8V/P2.5V_LAN
6) P1.8V_AUX
9-1) KBC3_PWRON_INV#
(SLPS4* = S4_STATE*) > SLPM* > SLPS3*
CL_PWROK
6) P1.8V_AUX
15)VRM3_CPU_PWRGD
PWROK
PCIe
P3.3V_MICOM
2) VDC
P3.3V_AUX & P5V_AUX
10) P1.5V
3
15) VRM3_CPU_PWRGD
20) CPU1_CPURST*
B
SAMSUNG
9
1
6) P3.3V_AUX
CL_PWROK
18
19) PCI3_RST*
19) PCI3_RST*
17) KBC3_PWRGD
TPS51124
Sheet 22-25
8
M-1) KBC3_DDR_PWRON (TBD) = 8) KBC3_SUSPWR
CPU
5) KBC3_SUSPWR
9-1
17) KBC3_PWRGD
17
7) P1.05V_AUX
10) P5.0V
Adapter
10) P1.25
19
Host Boot / ME Off
13
10) P1.05V (IGFX_CORE)
POWER SEQUENCE
SAMSUNG PROPRIETARY
3
FDC653N
SC486
20
Sheet 40
2
10-1) P1.8V
11
12)GCORE_PWRGD
9) KBC3_PWRON
13) KBC3_VRON (Back-up)
2-1) P12.0V_ALW
2) VDC
DC/DC B’d
16) CLK3_PWRGD
1
18) CPU1_PWRGDCPU
10-1) P3.3V
6) P1.8V_AUX
15)VRM3_CPU_PWRGD
10-1) P1.5V
10-1) P1.25
10-2) P0.9V
1
Sheet 46-47
17) KBC3_PWRGD
10-1) P1.8V
A
Sheet 46
16-1) Clock Running
B
12)GCORE3_PWRGD (PM-model)
Sheet 8
10) P1.5V
FDS6680A
8) CHP3_SLPS5#/4#/3#
110ms Delay
10) P1.05V (IGFX_CORE)
BCP69
CK-505
4
16
Sheet 10-12
15
6
INTVRMEN
ISL6227
10-1) P1.8V
12) P1.5
6) MEM1_VREF
Host / ME Boot
A
GMCH
PWROK
(SLPS4* = S4_STATE*) > (SLPM* = SLPS3*)
2
VRM
5) KBC3_SUSPWR
6) P3.3V_AUX
CHP3_RTCRST#
VRMPWRGD
6) P1.8V_AUX
2) VDC
10) P5.0V
Marvell
14
11-1) GFX_CORE
10-1) P1.2V
6) P5.0V_AUX
7) KBC3_RSMRST#
4) POWER_SW*
19) PLT3_RST*
5
2) VDC
DDR2 POWER
Memory
10-1) ICH_CORE (P1.05V)
PRTC_BAT
Sheet 50
6-1) P1.2V_LAN
2) VDC
EXCEPT AS AUTHORIZED BY SAMSUNG.
POWER
Sheet 40
10-1) P3.3V
S/W
9-1) KBC3_PWRON_INV#
DDR3
6) P3.3V_AUX
19) PLT3_RST*
10) P1.5V
8) KBC3_SUSPWR
10-2) 0.9V
P3.3V_MICOM
MAX 8734
Battery
Devices
PCI
RTC
12) P1.05V_M
Sheet 40
11) KBC3_PWRON
Battery
AC_DC / Battery
3
PM-model only
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
- This Document can not be used without Samsung's authorization -
8. Block Diagram and Schematic
ITP_EN
MUXMUX
FSB
D
CLK3_PWRGD*
1
200 MHz
CLK0_HOST_CPU/CPU*
CPU
BSEL
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
THIS DOCUMENT CONTAINS CONFIDENTIAL
SAMSUNG ELECTRONICS CO’S PROPERTY.
EXCEPT AS AUTHORIZED BY SAMSUNG.
PROPRIETARY INFORMATION THAT IS
SAMSUNG PROPRIETARY
P3.3V
4
FS(2:0)
3
A
14.318 MHz
PCI_STP*
4
3
Page 8
OSC
14 MHz
33 MHz
Buffer
33 MHz
CLK3_PCLKPORT80
Confidential
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PORT 80
33 MHz
CLK3_PCLKMICOM
KBC
10 MHz
32.768 KHz
RTC Clock
B
CK-505M (w/ CLKREQ* & SSDC)
xSLG8SP513r05)
48MHz PLL
MUX
33 MHz
100 MHz (SRC 2)
14.318 MHz
Samsung
Samsung
Samsung
CLK3_ICH14
CLK3_PCLKICH
32.768 KHz
OSC
CLK1_SATA/SATA*
CHP3_SATACLKREQ*
SATAPLL
USBPLL
48 MHz
CLK1_PCIEICH/ICH*100 MHz (SRC 10)
CLK3_USB48
PCIEPLL
ICH9-M
C
SS(96/100) SEL
SSC
PLL3
Need to be updated!!
100 MHz (SRC 6,8,9)
DPLLB
DMI
100 MHz (SRC4)
100 MHz
96 MHz
CLK1_DREFCLK/CLK*
CLK1_DREFSSC/SSC*
CLK1_MCH3GPLL/3GPLL*
PCIE PLL
DPLLA
MCH3_CLKREQ*
MCH
CPU_STP*
Main PLL
SSC
100 MHz (SRC0)
200 MHz
CLK1_PEG/PEG*
PCI Express Gfx
CLK0_HOST_GMCH/GMCH*
PEG
MPLL
HPLL
Cantiga
2
1
SRP Sheet Number: 7 of 73
SAMSUNG
ELECTRONICS
17.86 MHz
MDC3_BCLK
AUD3_BCLK
MDC
HD 24 MHz
HD Audio
B
EXP3_CLKREQ*
CLK1_EXPCARD#
EXPRESS CARD
25 MHz
LOM3_CLKREQ*
CLK1_PCIELOM/LOM*100 MHz (SRC 9)
PCIE LAN
(Marvell)
100 MHz (SRC 6)
100 MHz (SRC 8)
CLK1_MINI2PCIE/PCIE*
CARD 1
MINI PCIE
CARD 2
MIN3_CLKREQ*
CLK1_MINIPCIE/PCIE*
MINI PCIE
SPI3_CLK
SPI
A
533/400 MHz
CLK1_MCLK4/4#
SODIMM #1
C
533/400 MHz
533/400 MHz
CLK1_MCLK3/3#
CLK1_MCLK1/1#
SODIMM #0
533/400 MHz
CLK1_MCLK0/0#
1067/800 MHz
D
2
CLOCK DISTRIBUTION
1
Rev. 0.1
8-7
8-8
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
- This Document can not be used without Samsung's authorization -
8. Block Diagram and Schematic
Samsung
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Samsung
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Samsung
Confidential
SRP Sheet Number: 8 of 73
A
THIS DOCUMENT CONTAINS CONFIDENTIAL
1
C
3
EXCEPT AS AUTHORIZED BY SAMSUNG.
B
2
A
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
SAMSUNG PROPRIETARY
SAMSUNG
4
B
1
D
2
ELECTRONICS
SAMSUNG ELECTRONICS CO’S PROPERTY.
PROPRIETARY INFORMATION THAT IS
D
C
34
MEM1_CKE3
MEM1_CS0#
MEM1_CS1#
MEM1_CS2#
MEM1_CS3#
MEM1_ODT0
MEM1_ODT1
MEM1_ODT2
MEM1_ODT3
MEM1_VREF
SMB3_CLK
SMB3_DATA
MEM1_ARAS#
MEM1_AWE#
MEM1_BBS(0)
MEM1_BBS(1)
MEM1_BBS(2)
MEM1_BCAS#
MEM1_BDM(7:0)
MEM1_BDQ(63:0)
MEM1_BDQS#(7:0)
MEM1_BDQS(7:0)
MEM1_BMA(14:0)
MEM1_BRAS#
MEM1_BWE#
MEM1_CKE0
MEM1_CKE1
MEM1_CKE2
CLK1_MCLK1#
CLK1_MCLK2
CLK1_MCLK2#
CLK1_MCLK3
CLK1_MCLK3#
MCH3_EXTTS0#
MCH3_EXTTS1#
MEM1_ABS(0)
MEM1_ABS(1)
MEM1_ABS(2)
MEM1_ACAS#
MEM1_ADM(7:0)
MEM1_ADQ(63:0)
MEM1_ADQS#(7:0)
MEM1_ADQS(7:0)
MEM1_AMA(14:0)
MEM1_ODT0
MEM1_ODT1
MEM1_ODT2
MEM1_ODT3
MEM1_VREF
PEG1_RXN(15:0)
PEG1_RXP(15:0)
PEG1_TXN(15:0)
PEG1_TXP(15:0)
PLT3_RST#
SODIMM_DDR2
CLK1_MCLK0
CLK1_MCLK0#
CLK1_MCLK1
MEM1_BCAS#
MEM1_BDM(7:0)
MEM1_BDQ(63:0)
MEM1_BDQS#(7:0)
MEM1_BDQS(7:0)
MEM1_BMA(14:0)
MEM1_BRAS#
MEM1_BWE#
MEM1_CKE0
MEM1_CKE1
MEM1_CKE2
MEM1_CKE3
MEM1_CS0#
MEM1_CS1#
MEM1_CS2#
MEM1_CS3#
MCH1_HVREF
MCH1_HXSWING
MCH3_CLKREQ#
MCH3_EXTTS0#
MCH3_EXTTS1#
MCH3_ICHSYNC#
MEM1_ABS(2:0)
MEM1_ACAS#
MEM1_ADM(7:0)
MEM1_ADQ(63:0)
MEM1_ADQS#(7:0)
MEM1_ADQS(7:0)
MEM1_AMA(14:0)
MEM1_ARAS#
MEM1_AWE#
MEM1_BBS(2:0)
DMI1_RXN_1
DMI1_RXN_2
DMI1_RXN_3
DMI1_RXP_0
DMI1_RXP_1
DMI1_RXP_2
DMI1_RXP_3
DMI1_TXN_0
DMI1_TXN_1
DMI1_TXN_2
DMI1_TXN_3
DMI1_TXP_0
DMI1_TXP_1
DMI1_TXP_2
DMI1_TXP_3
KBC3_PWRGD
CPU1_DSTBN3#
CPU1_DSTBP0#
CPU1_DSTBP1#
CPU1_DSTBP2#
CPU1_DSTBP3#
CPU1_HIT#
CPU1_HITM#
CPU1_LOCK#
CPU1_REQ#(4:0)
CPU1_RS0#
CPU1_RS1#
CPU1_RS2#
CPU1_SLP#
CPU1_THRMTRIP#
CPU1_TRDY#
DMI1_RXN_0
CPU1_BSEL1
CPU1_BSEL2
CPU1_CPURST#
CPU1_D#(63:0)
CPU1_DBI0#
CPU1_DBI1#
CPU1_DBI2#
CPU1_DBI3#
CPU1_DBSY#
CPU1_DEFER#
CPU1_DPRSTP#
CPU1_DPWR#
CPU1_DRDY#
CPU1_DSTBN0#
CPU1_DSTBN1#
CPU1_DSTBN2#
CLK1_MCLK0
CLK1_MCLK0#
CLK1_MCLK1
CLK1_MCLK1#
CLK1_MCLK2
CLK1_MCLK2#
CLK1_MCLK3
CLK1_MCLK3#
CPU1_A#(35:3)
CPU1_ADS#
CPU1_ADSTB0#
CPU1_ADSTB1#
CPU1_BNR#
CPU1_BPRI#
CPU1_BREQ#
CPU1_BSEL0
LOM3_CLKREQ#
MCH3_CLKREQ#
MIN3_CLKREQ#
SMB3_CLK
SMB3_DATA
MCH_CANTIGA_GM_DDR2
CHP3_CL_CLK_0
CHP3_CL_DATA_0
CHP3_CL_RST_0#
CHP3_DPRSLPVR
CHP3_PM_SYNC#
CLK0_HCLK1
CLK0_HCLK1#
CLK1_MCH3GPLL
CLK1_MCH3GPLL#
CLK1_PEG#
CLK1_SATA
CLK1_SATA#
CLK3_DBGLPC
CLK3_FM48
CLK3_GFX_27M
CLK3_GFX_27M_SS
CLK3_ICH14
CLK3_PCLKICH
CLK3_PCLKMICOM
CLK3_PWRGD
CLK3_USB48
CPU1_BSEL0
CPU1_BSEL1
CPU1_BSEL2
EXP3_CLKREQ#
CHP3_SATACLKREQ#
CLK0_HCLK0
CLK0_HCLK0#
CLK0_HCLK1
CLK0_HCLK1#
CLK1_EXPCARD
CLK1_EXPCARD#
CLK1_MCH3GPLL
CLK1_MCH3GPLL#
CLK1_MINIPCIE
CLK1_MINIPCIE#
CLK1_PCIEICH
CLK1_PCIEICH#
CLK1_PCIELOM
CLK1_PCIELOM#
CLK1_PEG
CPU3_THRMTRIP#
FAN3_FDBACK#
FAN5_VDD
GFX3_THERM#
GFX3_THERMDN
GFX3_THERMDP
KBC3_PWRGD
KBC3_THERM_SMCLK
KBC3_THERM_SMDATA
THM3_ALERT#
THM3_STP#
CK_Clock_505M
CHP3_CPUSTP#
CHP3_PCISTP#
CPU1_TDI
CPU1_THRMTRIP#
CPU1_TMS
CPU1_TRDY#
CPU1_TRST#
CPU1_VCCSENSE
CPU1_VID(6:0)
CPU1_VSSSENSE
CPU2_THERMDA
CPU2_THERMDC
ITP3_DBRRESET#
Thermal_Sensor_SMSC_Emc2102
CPU1_THRMTRIP#
CPU2_THERMDA
CPU2_THERMDC
CPU1_HITM#
CPU1_IGNNE#
CPU1_INIT#
CPU1_INTR
CPU1_LOCK#
CPU1_NMI
CPU1_PSI#
CPU1_PWRGDCPU
CPU1_REQ#(4:0)
CPU1_RS0#
CPU1_RS1#
CPU1_RS2#
CPU1_SLP#
CPU1_SMI#
CPU1_STPCLK#
CPU1_TCK
CPU1_DBSY#
CPU1_DEFER#
CPU1_DPRSTP#
CPU1_DPSLP#
CPU1_DPWR#
CPU1_DRDY#
CPU1_DSTBN0#
CPU1_DSTBN1#
CPU1_DSTBN2#
CPU1_DSTBN3#
CPU1_DSTBP0#
CPU1_DSTBP1#
CPU1_DSTBP2#
CPU1_DSTBP3#
CPU1_FERR#
CPU1_HIT#
CPU1_ADSTB1#
CPU1_BNR#
CPU1_BPRI#
CPU1_BREQ#
CPU1_BSEL0
CPU1_BSEL1
CPU1_BSEL2
CPU1_CPURST#
CPU1_D#(15:0)
CPU1_D#(31:16)
CPU1_D#(47:32)
CPU1_D#(63:48)
CPU1_DBI0#
CPU1_DBI1#
CPU1_DBI2#
CPU1_DBI3#
CLK3_GFX_27M
CLK3_GFX_27M_SS
PEG1_RXN(15:0)
PEG1_RXP(15:0)
PEG1_TXN(15:0)
PEG1_TXP(15:0)
GFX3_THERMDN
GFX3_THERMDP
GFX3_THERM#
CPU_Penryn_MV_SV
CLK0_HCLK0
CLK0_HCLK0#
CPU1_A#(16:3)
CPU1_A#(35:17)
CPU1_A20M#
CPU1_ADS#
CPU1_ADSTB0#
MEM1_CKE0
MEM1_CKE1
MEM1_CKE2
MEM1_CKE3
MEM1_CS0#
MEM1_CS1#
MEM1_CS2#
MEM1_CS3#
MEM1_ODT0
MEM1_ODT1
MEM1_ODT2
MEM1_ODT3
MEM1_VREF
SMB3_CLK
SMB3_DATA
CLK1_PEG
CLK1_PEG#
MEM1_ABS(1)
MEM1_ABS(2)
MEM1_ACAS#
MEM1_ADM(7:0)
MEM1_ADQ(63:0)
MEM1_ADQS#(7:0)
MEM1_ADQS(7:0)
MEM1_AMA(14:0)
MEM1_ARAS#
MEM1_AWE#
MEM1_BBS(0)
MEM1_BBS(1)
MEM1_BBS(2)
MEM1_BCAS#
MEM1_BDM(7:0)
MEM1_BDQ(63:0)
MEM1_BDQS#(7:0)
MEM1_BDQS(7:0)
MEM1_BMA(14:0)
MEM1_BRAS#
MEM1_BWE#
CPU3_THRMTRIP#
FAN3_FDBACK#
FAN5_VDD
KBC3_PWRGD
KBC3_THERM_SMCLK
KBC3_THERM_SMDATA
THM3_ALERT#
THM3_STP#
CLK1_MCLK0
CLK1_MCLK0#
CLK1_MCLK1
CLK1_MCLK1#
CLK1_MCLK2
CLK1_MCLK2#
CLK1_MCLK3
CLK1_MCLK3#
MCH3_EXTTS0#
MCH3_EXTTS1#
MEM1_ABS(0)
CPU1_IGNNE#
CPU1_INIT#
CPU1_INTR
CPU1_LOCK#
CPU1_NMI
CPU1_PSI#
CPU1_PWRGDCPU
CPU1_REQ#(4:0)
CPU1_RS0#
CPU1_RS1#
CPU1_RS2#
CPU1_SLP#
CPU1_SMI#
CPU1_STPCLK#
CPU1_TCK
CPU1_TDI
CPU1_THRMTRIP#
CPU1_TMS
CPU1_TRDY#
CPU1_TRST#
CPU1_VCCSENSE
CPU1_VID(6:0)
CPU1_VSSSENSE
CPU2_THERMDA
CPU2_THERMDC
ITP3_DBRRESET#
CPU1_THRMTRIP#
CPU2_THERMDA
CPU2_THERMDC
CPU1_DEFER#
CPU1_DPRSTP#
CPU1_DPSLP#
CPU1_DPWR#
CPU1_DRDY#
CPU1_DSTBN0#
CPU1_DSTBN1#
CPU1_DSTBN2#
CPU1_DSTBN3#
CPU1_DSTBP0#
CPU1_DSTBP1#
CPU1_DSTBP2#
CPU1_DSTBP3#
CPU1_FERR#
CPU1_HIT#
CPU1_HITM#
CLK0_HCLK0#
CPU1_A#(16:3)
CPU1_A#(35:17)
CPU1_A20M#
CPU1_ADS#
CPU1_ADSTB0#
CPU1_ADSTB1#
CPU1_BNR#
CPU1_BPRI#
CPU1_BREQ#
CPU1_BSEL0
CPU1_BSEL1
CPU1_BSEL2
CPU1_CPURST#
CPU1_D#(15:0)
CPU1_D#(31:16)
CPU1_D#(47:32)
CPU1_D#(63:48)
CPU1_DBI0#
CPU1_DBI1#
CPU1_DBI2#
CPU1_DBI3#
CPU1_DBSY#
CLK1_SATA#
CLK3_DBGLPC
CLK3_FM48
CLK3_ICH14
CLK3_PCLKICH
CLK3_PCLKMICOM
CLK3_PWRGD
CLK3_USB48
CPU1_BSEL0
CPU1_BSEL1
CPU1_BSEL2
EXP3_CLKREQ#
LOM3_CLKREQ#
MCH3_CLKREQ#
MIN3_CLKREQ#
SMB3_CLK
SMB3_DATA
CLK0_HCLK0
CLK1_EXPCARD
CLK1_EXPCARD#
CLK1_MCH3GPLL
CLK1_MCH3GPLL#
CLK1_MINIPCIE
CLK1_MINIPCIE#
CLK1_PCIEICH
CLK1_PCIEICH#
CLK1_PCIELOM
CLK1_PCIELOM#
CLK1_SATA
MEM1_BDM(7:0)
MEM1_BDQ(63:0)
MEM1_BDQS#(7:0)
MEM1_BDQS(7:0)
MEM1_BMA(14:0)
MEM1_BRAS#
MEM1_BWE#
MEM1_CKE0
MEM1_CKE1
MEM1_CKE2
MEM1_CKE3
MEM1_CS0#
MEM1_CS1#
MEM1_CS2#
MEM1_CS3#
MEM1_ODT0
MEM1_ODT1
MEM1_ODT2
MEM1_ODT3
MEM1_VREF
PLT3_RST#
CHP3_CPUSTP#
CHP3_PCISTP#
CHP3_SATACLKREQ#
CLK0_HCLK0
CLK0_HCLK0#
CLK0_HCLK1
CLK0_HCLK1#
DMI1_TXP_0
DMI1_TXP_1
DMI1_TXP_2
DMI1_TXP_3
KBC3_PWRGD
MCH1_HVREF
MCH1_HXSWING
MCH3_CLKREQ#
MCH3_EXTTS0#
MCH3_EXTTS1#
MCH3_ICHSYNC#
MEM1_ABS(2:0)
MEM1_ACAS#
MEM1_ADM(7:0)
MEM1_ADQ(63:0)
MEM1_ADQS#(7:0)
MEM1_ADQS(7:0)
MEM1_AMA(14:0)
MEM1_ARAS#
MEM1_AWE#
MEM1_BBS(2:0)
MEM1_BCAS#
DMI1_RXN_1
DMI1_RXN_2
DMI1_RXN_3
DMI1_RXP_0
DMI1_RXP_1
DMI1_RXP_2
DMI1_RXP_3
DMI1_TXN_0
DMI1_TXN_1
DMI1_TXN_2
DMI1_TXN_3
CPU1_BSEL2
CPU1_CPURST#
CPU1_D#(63:0)
CPU1_DBI0#
CPU1_DBI1#
CPU1_DBI2#
CPU1_DBI3#
CPU1_DBSY#
CPU1_DEFER#
CPU1_DPRSTP#
CPU1_DPWR#
CPU1_DRDY#
CPU1_DSTBN0#
CPU1_DSTBN1#
CPU1_DSTBN2#
CPU1_DSTBN3#
CPU1_DSTBP0#
CPU1_DSTBP1#
CPU1_DSTBP2#
CPU1_DSTBP3#
CPU1_HIT#
CPU1_HITM#
CPU1_LOCK#
CPU1_REQ#(4:0)
CPU1_RS0#
CPU1_RS1#
CPU1_RS2#
CPU1_SLP#
CPU1_THRMTRIP#
CPU1_TRDY#
DMI1_RXN_0
CHP3_CL_CLK_0
CHP3_CL_DATA_0
CHP3_CL_RST_0#
CHP3_DPRSLPVR
CHP3_PM_SYNC#
CLK0_HCLK1
CLK0_HCLK1#
CLK1_MCH3GPLL
CLK1_MCH3GPLL#
CLK1_MCLK0
CLK1_MCLK0#
CLK1_MCLK1
CLK1_MCLK1#
CLK1_MCLK2
CLK1_MCLK2#
CLK1_MCLK3
CLK1_MCLK3#
CPU1_A#(35:3)
CPU1_ADS#
CPU1_ADSTB0#
CPU1_ADSTB1#
CPU1_BNR#
CPU1_BPRI#
CPU1_BREQ#
CPU1_BSEL0
CPU1_BSEL1
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
- This Document can not be used without Samsung's authorization -
8. Block Diagram and Schematic
A
ICH_9M_B
B B
VRM3_CPU_PWRGD
THM3_ALERT#
SAT1_RXN1
SAT1_RXP0
SAT1_RXP1
VRM3_CPU_PWRGD
THM3_ALERT#
SAT1_RXN0
SAT1_RXN1
SAT1_RXP0
SAT1_RXP1
PEX1_GLAN_RXP4
PEX1_MINIRXN1
PEX1_MINIRXP1
SAT1_RXN0
PEX1_GLAN_RXP4
PEX1_MINIRXN1
PEX1_MINIRXP1
PEX1_EXPCARDRXN3
PEX1_EXPCARDRXP3
PEX1_GLAN_RXN4
MCH3_ICHSYNC#
KBC3_WAKESCI#
KBC3_WAKESCI#
MCH3_ICHSYNC#
PEX1_EXPCARDRXN3
PEX1_EXPCARDRXP3
PEX1_GLAN_RXN4
KBC3_PWRBTN#
KBC3_RSMRST#
KBC3_EXTSMI#
KBC3_PWRGD
KBC3_EXTSMI#
KBC3_PWRBTN#
KBC3_PWRGD
KBC3_RSMRST#
ITP3_DBRRESET#
HDA3_HDMI_SDI2
HDA3_MDC_SDI1
HDA3_AUD_SDI0
HDA3_HDMI_SDI2
HDA3_AUD_SDI0
HDA3_MDC_SDI1
ITP3_DBRRESET#
4
Confidential
Confidential
Confidential
PEX1_EXPCARDTXN3
PEX1_EXPCARDTXP3
PEX1_GLAN_TXN4
PEX1_GLAN_TXP4
PEX1_MINITXN1
PEX1_MINITXP1
SAT1_TXN0
SAT1_TXN1
SAT1_TXP0
SAT1_TXP1
PLT3_RST#
SPI3_CS0#
SPI3_CLK
Samsung
Samsung
Samsung
HDA3_HDMI_SYNC
HDA3_HDMI_BCLK
HDA3_HDMI_RST#
HDA3_MDC_SYNC
HDA3_MDC_BCLK
HDA3_AUD_SYNC
HDA3_MDC_SDO
LPC3_LFRAME#
KBC3_RUNSCI#
HDA3_MDC_RST#
HDA3_HDMI_SDO
HDA3_AUD_SDO
HDA3_AUD_BCLK
HDA3_AUD_RST#
DMI1_TXP_2
DMI1_TXP_3
DMI1_TXN_3
DMI1_TXP_0
DMI1_TXP_1
DMI1_TXN_0
DMI1_TXN_1
DMI1_TXN_2
CPU1_PWRGDCPU
CPU1_STPCLK#
CPU1_SMI#
CPU1_NMI
CPU1_INTR
3
CPU1_INTR
CPU1_NMI
CPU1_PWRGDCPU
CPU1_SMI#
CPU1_STPCLK#
DMI1_TXN_0
SAT1_TXN0
SAT1_TXN1
SAT1_TXP0
SAT1_TXP1
PEX1_MINITXP1
PEX1_EXPCARDTXN3
PEX1_EXPCARDTXP3
PLT3_RST#
SPI3_CLK
SPI3_CS0#
MICOM_Renesas2110_100p
KBC3_THERM_SMCLK
KBC3_USBPWRON#
KBC3_WAKESCI#
KBC3_SPKMUTE
KBC5_KSO(8:15)
LID3_SWITCH#
KBC5_KSO(8:15)
2
LID3_SWITCH#
KBC5_KSO(0:7)
KBC3_VRON
KBC3_VRON
KBC3_WAKESCI#
KBC5_KSO(0:7)
KBC3_RUNSCI#
KBC3_SUSPWR
KBC3_SCLED#
KBC3_USBPWRON#
KBC3_SUSPWR
KBC3_THERM_SMCLK
KBC3_SCLED#
KBC3_SPKMUTE
PEX1_MINITXN1
KBC3_RSMRST#
KBC3_RFOFF#
KBC3_PWRON
KBC3_PWRON
KBC3_RFOFF#
KBC3_RSMRST#
KBC3_RUNSCI#
LPC3_LFRAME#
PEX1_GLAN_TXN4
PEX1_GLAN_TXP4
VRM3_CPU_PWRGD
THM3_ALERT#
PEX3_WAKE#
THM3_STP#
PLT3_RST#
LPC3_LFRAME#
PEX3_WAKE#
PLT3_RST#
THM3_ALERT#
THM3_STP#
VRM3_CPU_PWRGD
KBC3_LED_CHARGE#
KBC3_LED_POWER#
KBC3_PWRBTN#
KBC3_NUMLED#
KBC3_PRECHG
KBC3_PWRGD
KBC3_PRECHG
KBC3_LED_POWER#
KBC3_NUMLED#
KBC3_PWRBTN#
KBC3_PWRGD
HDA3_HDMI_SYNC
HDA3_MDC_BCLK
HDA3_MDC_RST#
HDA3_MDC_SDO
HDA3_MDC_SYNC
KBC3_RUNSCI#
CLK3_PCLKMICOM
CHP3_SUSSTAT#
LPC3_LFRAME#
KBC3_PWRSW#
CHP3_SLPS5#
KBC5_KSI(0:7)
KBC5_KSI(0:7)
CHP3_SLPS4#
CHP3_SLPS5#
CHP3_SUSSTAT#
CLK3_PCLKMICOM
KBC3_PWRSW#
KBC3_LED_ACIN#
KBC3_CAPSLED#
KBC3_CPURST#
KBC3_EXTSMI#
KBC3_CHG4.2V
KBC3_CHGEN
KBC3_CHG4.2V
KBC3_CHGEN
KBC3_CPURST#
KBC3_EXTSMI#
KBC3_LED_ACIN#
KBC3_LED_CHARGE#
HDA3_AUD_SYNC
HDA3_HDMI_BCLK
HDA3_HDMI_RST#
HDA3_HDMI_SDO
BAT3_DETECT#
CHP3_SLPS3#
CHP3_SLPS4#
ADT3_SEL#
ADT3_SEL#
BAT3_DETECT#
CHP3_SLPS3#
KBC3_BKLTON
CHP3_SERIRQ
KBC3_A20G
KBC3_CAPSLED#
CHP3_SERIRQ
KBC3_A20G
KBC3_BKLTON
HDA3_AUD_SDO
KBC3_THERM_SMDATA
DMI1_TXP_0
DMI1_TXP_1
DMI1_TXP_2
DMI1_TXP_3
HDA3_AUD_BCLK
HDA3_AUD_RST#
KBC3_BLCKPWRSW#
KBC3_CHKPWRSW#
KBC3_RST#
KBC3_SMCLK#
KBC3_SMDATA#
KBC5_TCLK
KBC5_TDATA
LPC3_LAD(0:3)
PCI3_CLKRUN#
DMI1_TXN_1
DMI1_TXN_2
DMI1_TXN_3
KBC3_BLCKPWRSW#
KBC3_CHKPWRSW#
KBC3_RST#
KBC3_SMCLK#
KBC3_SMDATA#
KBC3_THERM_SMDATA
KBC5_TCLK
KBC5_TDATA
LPC3_LAD(0:3)
PCI3_CLKRUN#
DMI1_RXP_2
DMI1_RXP_3
DMI1_RXP_3
DMI1_RXP_1
DMI1_RXP_2
CPU1_DPSLP#
CPU1_IGNNE#
CPU1_INIT#
CPU1_IGNNE#
CPU1_INIT#
DMI1_RXN_3
DMI1_RXP_0
DMI1_RXP_1
DMI1_RXN_2
DMI1_RXN_3
DMI1_RXP_0
CPU1_DPRSTP#
CLK3_PWRGD
CPU1_A20M#
CPU1_A20M#
CPU1_DPRSTP#
CPU1_DPSLP#
C C
CPU1_THRMTRIP#
DMI1_RXN_0
DMI1_RXN_1
DMI1_RXN_2
CPU1_THRMTRIP#
DMI1_RXN_0
DMI1_RXN_1
CHP3_SUSSTAT#
CHP3_SLPS4#
CHP3_SLPS5#
CHP3_SLPS4#
CHP3_SLPS5#
CHP3_SUSSTAT#
CLK3_PWRGD
CLK3_PCLKICH
CPU1_FERR#
CLK3_USB48
CLK3_ICH14
CLK3_PCLKICH
CLK3_USB48
CPU1_FERR#
CHP3_SATACLKREQ#
CHP3_PM_SYNC#
CHP3_SATALED#
CHP3_SLPS3#
CHP3_SATACLKREQ#
CHP3_SATALED#
CHP3_SLPS3#
CLK1_PCIEICH#
CLK1_PCIEICH
CLK1_SATA#
CLK3_ICH14
CLK1_SATA
CLK1_PCIEICH
CLK1_PCIEICH#
CLK1_SATA
CLK1_SATA#
CHP3_DPRSLPVR
CHP3_CPUSTP#
CHP3_PCISTP#
AUD3_SPKR
AUD3_SPKR
CHP3_CPUSTP#
CHP3_DPRSLPVR
CHP3_PCISTP#
CHP3_PM_SYNC#
HDD_IF_Conn
CHP3_BIOSWP#
CHP3_BIOS_CRI#
CHP3_CL_CLK_0
CHP3_CL_DATA_0
CHP3_CL_RST_0#
CHP3_GPIO18
CHP3_GPIO20
CHP3_INTRUDER#
CHP3_ME_RTCRST#
CHP3_RTCRST#
CHP3_SERIRQ
KBC3_A20G
KBC3_CPURST#
LPC3_LAD(3:0)
PCI3_CLKRUN#
PEX3_WAKE#
PLT3_RST_ORG#
SMB3_ALERT#
SMB3_CLK
SMB3_DATA
SPI3_MISO
SPI3_MOSI
USB3_P0+
USB3_P0USB3_P10+
USB3_P10-
USB3_P2+
USB3_P2-
USB3_P3+
USB3_P3-
USB3_P4+
USB3_P4-
USB3_P5+
USB3_P5-
USB3_P6+
USB3_P6-
USB3_P8+
USB3_P8-
SAT1_TXN0
SAT1_TXP0
SAT1_TXN0
SAT1_TXP0
SAT1_RXN0
SAT1_RXP0
SAT1_RXN0
SAT1_RXP0
SAT1_TXN1
SAT1_TXP1
CHP3_BIOSWP#
CHP3_BIOS_CRI#
CHP3_CL_CLK_0
CHP3_CL_DATA_0
CHP3_CL_RST_0#
CHP3_GPIO18
CHP3_GPIO20
CHP3_INTRUDER#
CHP3_ME_RTCRST#
CHP3_RTCRST#
CHP3_SERIRQ
KBC3_A20G
KBC3_CPURST#
LPC3_LAD(3:0)
PCI3_CLKRUN#
PEX3_WAKE#
PLT3_RST_ORG#
SMB3_ALERT#
SMB3_CLK
SMB3_DATA
SPI3_MISO
SPI3_MOSI
USB3_P0+
USB3_P0USB3_P10+
USB3_P10USB3_P2+
USB3_P2USB3_P3+
USB3_P3USB3_P4+
USB3_P4USB3_P5+
USB3_P5USB3_P6+
USB3_P6USB3_P8+
USB3_P8-
USB_2Port
USB3_P6-
USB3_P8+
USB_1Port
USB3_P0+
USB3_P6+
USB3_P0-
USB3_P6-
USB3_P0+
USB3_P0-
USB3_P6+
USB3_P8- T_R_BUTTON#
D D
KBC3_USBPWRON#
USB3_P2+
USB3_P2-
KBC3_USBPWRON#
USB3_P2+
USB3_P2-
KBC3_USBPWRON#
KBC3_USBPWRON#
USB3_P5+
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
THIS DOCUMENT CONTAINS CONFIDENTIAL
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EXCEPT AS AUTHORIZED BY SAMSUNG.
PROPRIETARY INFORMATION THAT IS
SAMSUNG PROPRIETARY
4
3
USB3_P5-
2
1
SRP Sheet Number: 9 of 73
SAMSUNG
ELECTRONICS
USB3_P8-
PLT3_RST#
Other_Debug_80
PLT3_RST#
CLK3_DBGLPC
CLK3_DBGLPC
LPC3_LAD(0)
LPC3_LAD(1)
LPC3_LAD(2)
LPC3_LAD(3)
LPC3_LFRAME#
LPC3_LAD(0)
LPC3_LAD(1)
LPC3_LAD(2)
LPC3_LAD(3)
LPC3_LFRAME#
LED_Switch
KBC3_NUMLED#
KBC3_SCLED#
WLON_LED#
KBC3_NUMLED#
KBC3_SCLED#
WLON_LED#
KBC3_LED_CHARGE#
KBC3_LED_POWER#
KBC3_LED_ACIN#
KBC3_CAPSLED#
CHP3_SATALED#
CHP3_SATALED#
KBC3_CAPSLED#
KBC3_LED_ACIN#
KBC3_LED_CHARGE#
KBC3_LED_POWER#
KBD_IF_Conn
KBC5_KSI(0:7)KBC5_KSO(0:15)
KBC5_KSI(0:7)KBC5_KSO(0:15)
LID_Switch
MIO_Switch
LID3_SWITCH#
LID3_SWITCH#
KBC3_PWRSW#
KBC3_PWRSW#
ODD_IF_Conn
SAT1_TXP1
SAT1_RXP1
SAT1_TXN1
SAT1_RXN1
SAT1_RXN1
SAT1_RXP1
Camera_IF_Conn
T_L_BUTTON#
KBC5_TDATA
KBC5_TCLK
KBC5_TCLK
KBC5_TDATA
Touchpad_IF_Conn
USB3_P8+
T_L_BUTTON#
T_R_BUTTON#
USB3_P5+
USB3_P5-
Bluetooth_IF_Conn
SPI_BIOS_ROM
SPI3_MOSI
SPI3_MOSI
SPI3_CS0#
SPI3_CLK
SPI3_CS0#
CHP3_BIOSWP#
SPI3_CLK
CHP3_BIOSWP#
1
SPI3_MISO
SPI3_MISO
A
8-9
8-10
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
- This Document can not be used without Samsung's authorization -
8. Block Diagram and Schematic
Samsung
Confidential
Samsung
Confidential
Samsung
Confidential
SRP Sheet Number: 10 of 73
SAMSUNG
ELECTRONICS
A
B B
A
C C
D D
4
4
3 1
13
2
2
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
WDQSA(4)
WDQSA(5)
WDQSA(6)
WDQSA(7)
WEA#
MCLKA1
MCLKA1#
ODT
RASA#
RDQSA(0)
RDQSA(1)
RDQSA(2)
RDQSA(3)
RDQSA(4)
RDQSA(5)
RDQSA(6)
RDQSA(7)
WDQSA(0)
WDQSA(1)
WDQSA(2)
WDQSA(3)
DQMA(0)
DQMA(1)
DQMA(2)
DQMA(3)
DQMA(4)
DQMA(5)
DQMA(6)
DQMA(7)
MAA(12:0)
MAB(2)
MAB(3)
MAB(4)
MAB(5)
MCKEA
MCLKA0
MCLKA0#
PEX1_MINITXN1
PEX1_MINITXP1
PEX3_WAKE#
PLT3_RST#
WLON_LED#
Graphics_Memory_Nvidia
BAA0
BAA1
BAA2
CASA#
CSA0#
DQA(15:0)
DQA(31:16)
DQA(47:32)
DQA(63:48)
HDA3_AUD_SDO
HDA3_AUD_SYNC
KBC3_SPKMUTE
SPK5_L+
SPK5_L-
SPK5_R+
SPK5_R-
PCIE_Minicard_Slot
CLK1_MINIPCIE
CLK1_MINIPCIE#
KBC3_RFOFF#
MIN3_CLKREQ#
PEX1_MINIRXN1
PEX1_MINIRXP1
AUD5_HP_O_RIGHT
AUD5_LINE_O_LEFT
AUD5_LINE_O_RIGHT
AUD5_MIC1_LEFT
AUD5_MIC1_RIGHT
AUD5_MIC1_VREF_LEFT
AUD5_MIC1_VREF_RIGHT
AUD5_MIC2_LEFT
AUD5_MIC2_RIGHT
AUD5_MIC2_VREF
AUD5_SENS_A
AUD5_SENS_HP#
AUD5_SENS_MIC#
HDA3_AUD_BCLK
HDA3_AUD_RST#
HDA3_AUD_SDI0
PEG3_TX1P_HDMI
PEG3_TX2N_HDMI
PEG3_TX2P_HDMI
PEG3_TXCN_HDMI
PEG3_TXCP_HDMI
PEG5_HDMI_CLK
PEG5_HDMI_DATA
HDA_Codec_Alc262
AUD3_BEEP
AUD3_GPIO0#
AUD3_GPIO1#
AUD3_SHDN#
AUD3_SPKR
AUD5_HP_O_LEFT
LCD1_BCLK#
LCD1_BDATA0
LCD1_BDATA0#
LCD1_BDATA1
LCD1_BDATA1#
LCD1_BDATA2
LCD1_BDATA2#
LCD3_BKLTON
LCD3_BRIT
LCD3_EDID_CLK
LCD3_EDID_DATA
PEG3_BKLTEN
PEG3_HPD_HDMI
PEG3_LCDVDDON
PEG3_TX0N_HDMI
PEG3_TX0P_HDMI
PEG3_TX1N_HDMI
CRT3_VSYNC
CRT5_DDCCLK
CRT5_DDCDATA
CRT5_HSYNC
CRT5_VSYNC
KBC3_BKLTON
LCD1_ACLK
LCD1_ACLK#
LCD1_ADATA0
LCD1_ADATA0#
LCD1_ADATA1
LCD1_ADATA1#
LCD1_ADATA2
LCD1_ADATA2#
LCD1_BCLK
WEA#
HDA_Modem
HDA3_MDC_BCLK
HDA3_MDC_RST#
HDA3_MDC_SDI1
HDA3_MDC_SDO
HDA3_MDC_SYNC
Graphics_IF_CRT
CRT3_BLUE
CRT3_DDCCLK
CRT3_DDCDATA
CRT3_GREEN
CRT3_HSYNC
CRT3_RED
PEG3_HPD_HDMI
PEG3_LCDVDDON
PEG3_TX0N_HDMI
PEG3_TX0P_HDMI
PEG3_TX1N_HDMI
PEG3_TX1P_HDMI
PEG3_TX2N_HDMI
PEG3_TX2P_HDMI
PEG3_TXCN_HDMI
PEG3_TXCP_HDMI
PEG5_HDMI_CLK
PEG5_HDMI_DATA
PLT3_RST#
RASA#
RDQSA(0:7)
WDQSA(0:7)
MAB(2)
MAB(3)
MAB(4)
MAB(5)
MCKEA
MCLKA0
MCLKA0#
MCLKA1
MCLKA1#
ODT
PEG1_RXN(15:0)
PEG1_RXP(15:0)
PEG1_TXN(15:0)
PEG1_TXP(15:0)
PEG3_BKLTEN
LCD1_BDATA2#
LCD3_BRIT
LCD3_EDID_CLK
LCD3_EDID_DATA
MAA(0)
MAA(1)
MAA(10)
MAA(11)
MAA(12)
MAA(2)
MAA(3)
MAA(4)
MAA(5)
MAA(6)
MAA(7)
MAA(8)
MAA(9)
HDA3_HDMI_SYNC
LCD1_ACLK
LCD1_ACLK#
LCD1_ADATA0
LCD1_ADATA0#
LCD1_ADATA1
LCD1_ADATA1#
LCD1_ADATA2
LCD1_ADATA2#
LCD1_BCLK
LCD1_BCLK#
LCD1_BDATA0
LCD1_BDATA0#
LCD1_BDATA1
LCD1_BDATA1#
LCD1_BDATA2
GFX3_I2CSDATA
GFX3_ROMSCLK
GFX3_ROMSI
GFX3_ROMSO
GFX3_STRAP0
GFX3_STRAP1
GFX3_STRAP2
GFX3_THERM#
GFX3_THERMDN
GFX3_THERMDP
GFX3_VOLTID_0
GFX3_VOLTID_1
HDA3_HDMI_BCLK
HDA3_HDMI_RST#
HDA3_HDMI_SDI2
HDA3_HDMI_SDO
CRT3_DDCCLK
CRT3_DDCDATA
CRT3_GREEN
CRT3_HSYNC
CRT3_RED
CRT3_VSYNC
CSA0#
DQA(63:0)
DQMA(7:0)
GFX3_HCLK
GFX3_HDATA
GFX3_I2CBCLK
GFX3_I2CBDATA
GFX3_I2CECLK
GFX3_I2CEDATA
GFX3_I2CSCLK
LCD1_BDATA1
LCD1_BDATA1#
LCD1_BDATA2
LCD1_BDATA2#
Gfx_External_Nvidia_Nb9x_64bit
BAA0
BAA1
BAA2
CASA#
CLK1_PEG
CLK1_PEG#
CLK3_GFX_27M
CLK3_GFX_27M_SS
CRT3_BLUE
CRT3_HSYNC
CRT3_GREEN
CRT3_DDCDATA
CRT3_DDCCLK
CRT3_BLUE
CLK3_GFX_27M_SS
CLK3_GFX_27M
CLK1_PEG#
CLK1_PEG
CASA#
BAA2
BAA1
BAA0
LCD1_BCLK
LCD1_BCLK#
LCD1_BDATA0
LCD1_BDATA0#
LCD1_BDATA1
LCD1_BDATA1#
LCD1_BDATA2
LCD1_BDATA2#
LCD1_BCLK
LCD1_BCLK#
LCD1_BDATA0
LCD1_BDATA0#
HDA3_HDMI_SYNC
HDA3_HDMI_SDO
HDA3_HDMI_SDI2
HDA3_HDMI_RST#
HDA3_HDMI_BCLK
GFX3_VOLTID_1
GFX3_VOLTID_0
GFX3_THERMDP
GFX3_THERMDN
GFX3_THERM#
GFX3_STRAP2
GFX3_STRAP1
GFX3_STRAP0
GFX3_ROMSO
GFX3_ROMSI
GFX3_ROMSCLK
GFX3_I2CSDATA
GFX3_I2CSCLK
GFX3_I2CEDATA
GFX3_I2CECLK
GFX3_I2CBDATA
GFX3_I2CBCLK
GFX3_HDATA
GFX3_HCLK
DQMA(7:0)
DQA(63:0)
CSA0#
CRT3_VSYNC
CRT3_RED
MAA(11)
MAA(10)
MAA(1)
MAA(0)
LCD3_EDID_DATA
LCD3_EDID_CLK
LCD3_BRIT
LCD1_ADATA2#LCD1_ADATA2LCD1_ADATA1#LCD1_ADATA1LCD1_ADATA0#LCD1_ADATA0
LCD1_ACLK#
LCD1_ACLK
PEG3_BKLTEN
PEG1_TXP(15:0)
PEG1_TXN(15:0)
PEG1_RXP(15:0)
PEG1_RXN(15:0)
ODT
MCLKA1#
MCLKA1
MCLKA0#
MCLKA0
MCKEA
MAB(5)
MAB(4)
MAB(3)
MAB(2)
MAA(9)
MAA(8)
MAA(7)
MAA(6)
MAA(5)
MAA(4)
MAA(3)
MAA(2)
MAA(12)
WDQSA(1)
WDQSA(2)
WDQSA(3)
WDQSA(4)
WDQSA(5)
WDQSA(6)
WDQSA(7)
WEA#WEA#
WDQSA(0:7)
RDQSA(0:7)
RASA#
PLT3_RST#
PEG5_HDMI_DATA
PEG5_HDMI_CLK
PEG3_TXCP_HDMI
PEG3_TXCN_HDMI
PEG3_TX2P_HDMI
PEG3_TX2N_HDMI
PEG3_TX1P_HDMI
PEG3_TX1N_HDMI
PEG3_TX0P_HDMI
PEG3_TX0N_HDMI
PEG3_LCDVDDON
PEG3_HPD_HDMI
MCKEA
MCLKA0
MCLKA0#
MCLKA1
MCLKA1#
ODT
RASA#
RDQSA(0)
RDQSA(1)
RDQSA(2)
RDQSA(3)
RDQSA(4)
RDQSA(5)
RDQSA(6)
RDQSA(7)
WDQSA(0)
CSA0#
DQA(15:0)
DQA(31:16)
DQA(47:32)
DQA(63:48)
DQMA(0)
DQMA(1)
DQMA(2)
DQMA(3)
DQMA(4)
DQMA(5)
DQMA(6)
DQMA(7)
MAA(12:0)
MAB(2)
MAB(3)
MAB(4)
MAB(5)
SPK5_LSPK5_R+
SPK5_R-
CLK1_MINIPCIE
CLK1_MINIPCIE#
KBC3_RFOFF#
MIN3_CLKREQ#
PEX1_MINIRXN1
PEX1_MINIRXP1
PEX1_MINITXN1
PEX1_MINITXP1
PEX3_WAKE#
PLT3_RST#
WLON_LED#
PEG3_BKLTEN
PEG3_HPD_HDMI
PEG3_LCDVDDON
BAA0
BAA1
BAA2
CASA#
AUD3_SPKR
AUD5_HP_O_LEFT
AUD5_HP_O_RIGHT
AUD5_LINE_O_LEFT
AUD5_LINE_O_RIGHT
AUD5_MIC1_LEFT
AUD5_MIC1_RIGHT
AUD5_MIC1_VREF_LEFT
AUD5_MIC1_VREF_RIGHT
AUD5_MIC2_LEFT
AUD5_MIC2_RIGHT
AUD5_MIC2_VREF
AUD5_SENS_A
AUD5_SENS_HP#
AUD5_SENS_MIC#
HDA3_AUD_BCLK
HDA3_AUD_RST#
HDA3_AUD_SDI0
HDA3_AUD_SDO
HDA3_AUD_SYNC
KBC3_SPKMUTE
SPK5_L+
PEG3_TX0P_HDMI
PEG3_TX1N_HDMI
PEG3_TX1P_HDMI
PEG3_TX2N_HDMI
PEG3_TX2P_HDMI
PEG3_TXCN_HDMI
PEG3_TXCP_HDMI
PEG5_HDMI_CLK
PEG5_HDMI_DATA
HDA3_MDC_BCLK
HDA3_MDC_RST#
HDA3_MDC_SDI1
HDA3_MDC_SDO
HDA3_MDC_SYNC
AUD3_BEEP
AUD3_GPIO0#
AUD3_GPIO1#
AUD3_SHDN#
CRT3_BLUE
CRT3_DDCCLK
CRT3_DDCDATA
CRT3_GREEN
CRT3_HSYNC
CRT3_RED
CRT3_VSYNC
CRT5_DDCCLK
CRT5_DDCDATA
CRT5_HSYNC
CRT5_VSYNC
KBC3_BKLTON
LCD1_ACLKLCD1_ACLK#
LCD1_ADATA0
LCD1_ADATA0#
LCD1_ADATA1
LCD1_ADATA1#
LCD1_ADATA2
LCD1_ADATA2#
LCD3_BKLTON
LCD3_BRIT
LCD3_EDID_CLK
LCD3_EDID_DATA
PEG3_TX0N_HDMI
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
- This Document can not be used without Samsung's authorization -
8. Block Diagram and Schematic
VRM_ISEN1
VRM_ISEN2
VRM_PRM
VRM_VSUM
D D
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
THIS DOCUMENT CONTAINS CONFIDENTIAL
SAMSUNG ELECTRONICS CO’S PROPERTY.
EXCEPT AS AUTHORIZED BY SAMSUNG.
PROPRIETARY INFORMATION THAT IS
SAMSUNG PROPRIETARY
4
3
VRM_ISEN1
VRM_ISEN2
VRM_PRM
VRM_VSUM
A A
4
Confidential
Confidential
Confidential
KBC3_CHG4.2V
KBC3_PRECHG
KBC3_CHGEN
3
PWR_MV_Charger_ISL6256
KBC3_CHG4.2V
KBC3_CHGEN
KBC3_PRECHG
BAT3_SMCLK#
BAT3_SMDATA#
KBC3_SMCLK#
KBC3_SMDATA#
VDC_SGATE
BAT3_DETECT#
ADT3_SEL#
ADT3_SEL#
BAT3_DETECT#
B
KBC3_SUSPWR
AUX_PG
PWR_MV_MeMory
AUX_PG
KBC3_SUSPWR
MEM1_VREF
MEM1_VREF
Samsung
Samsung
Samsung
KBC3_PWRON VCCP3_PWRGD
BAT3_SMCLK#
BAT3_SMDATA#
KBC3_SMCLK#
KBC3_SMDATA#
VDC_SGATE
PWR_MV_3V_5V
AUX_PGKBC3_SUSPWR
AUX_PGKBC3_SUSPWR
PWR_MV_Cantiga
KBC3_PWRON VCCP3_PWRGD
C
PWR_CPU_MV_ISL6262
GCORE3_PWRGD
P1.1V_PWRGD
KBC3_VRON
CPU1_VSSSENSE
GCORE3_PWRGD
KBC3_VRON
P1.1V_PWRGD
CPU1_VSSSENSE
CPU1_VID(3)
CPU1_VID(4)
CPU1_VID(5)
CPU1_VID(6)
CPU1_VID(3)
CPU1_VID(4)
CPU1_VID(5)
CPU1_VID(6)
CPU1_VID(1)
CPU1_VID(2)
CPU1_VID(0)
CPU1_VID(1)
CPU1_VID(2)
CPU1_VCCSENSE
CPU1_DPRSTP#
CPU1_VID(0)
CPU1_PSI#
CHP3_DPRSLPVR
CPU1_DPRSTP#
CPU1_PSI#
CPU1_VCCSENSE
VRM3_CPU_PWRGD
CHP3_DPRSLPVR
VRM3_CPU_PWRGD
2
1
SRP Sheet Number: 11 of 73
SAMSUNG
ELECTRONICS
GFX3_VOLTID_0
GFX3_VOLTID_1
VCCP3_PWRGD
KBC3_PWRON
PWR_Gfx_MV_Ext
GFX3_VOLTID_1
KBC3_PWRON
VCCP3_PWRGD
GCORE3_PWRGDGFX3_VOLTID_0
P1.1V_PWRGD
GCORE3_PWRGD
P1.1V_PWRGD
B
KBC3_PWRON_INV#
KBC3_SUSPWR
PWR_MV_DisCharger
KBC3_PWRON_INV#
KBC3_SUSPWR
C
2
1
8-11
8-12
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
- This Document can not be used without Samsung's authorization -
8. Block Diagram and Schematic
A
4
3
5.00 mm H
5.00 mm H
75.00 mm
34.00 mm W
75.00 mm L
EXPRESS CARD
INSERT
X
X
X
Confidential
Confidential
Confidential
75.00 mm L
X
54.00 mm W
THIS SIDE UP
75.00 mm
EXPRESS CARD
INSERT
THIS SIDE UP
3709-001491
MNT12MNT2
34.00 mm 54.00 mm
1
EXPRESS-26P-FRAME
J10
B
EXP3_CLKREQ#
PEX1_EXPCARDRXN3
PEX1_EXPCARDRXP3
PEX1_EXPCARDTXN3
Type 1 module
Type 2 module
PEX1_EXPCARDTXP3
CLK1_EXPCARD#
CLK1_EXPCARD
22
PERN021PERP0
PETN024PETP025REFCLK+19REFCLK-
RESERVED_15RESERVED_2
MNT1
MNT2
27
28
6
EXP3_CPPE#
17
18
CLKREQ#16CPPE#
GND_11GND_220GND_323GND_4
EXPRESS CARD
3711-006496
Samsung
Samsung
Samsung
EXP3_PERST#
PEX3_WAKE#
SMB3_DATA
nostuff
nostuff
R670
R710
0
0
11
13
WAKE#
PERST#
+1.5V_1
+1.5v_2
10
9
26
C
EXP3_CPUSB#
SMB3_CLK
USB3_P4+
USB3_P4-
nostuff
R669
0
4
2
CPUSB#
SMB_CLK7SMB_DATA8USB_D+3USB_D-
+3.3V_AUX
+3.3V_114+3.3V_2
15
12
P3.3V
R709
10K
J9
EDGE-XPRESS-26P
100nF
10V
C774
100nF
C773
10V
C772
10V
100nF
C771
10V
100nF
P3.3V_EXP
P3.3V_AUX_EXP
P1.5V_EXP
D
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
THIS DOCUMENT CONTAINS CONFIDENTIAL
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EXCEPT AS AUTHORIZED BY SAMSUNG.
PROPRIETARY INFORMATION THAT IS
SAMSUNG PROPRIETARY
4
3
2
1
SRP Sheet Number: 12 of 73
SAMSUNG
ELECTRONICS
CHP3_SLPS3#
PLT3_RST#
17
19
18
12
CPUSB*
16
EXP3_CPUSB#
RCLKEN20SHDN*
PERST*
CPPE*
10
9
8
SHORT503
0
EXP3_CPPE#
EXP3_PERST#
AUXIN
AUXOUT
15
14
1.5VIN_1
1.5VIN_2
1.5VOUT_1
1.5VOUT_2
11
13
3.3VIN_2
3.3VOUT_2
6
1205-002807
STBY*1SYSRST*
OC*
THERMAL
NC_5
GND
7
21
A
B
2
4
U519
R5538D001-TR-F
3.3VIN_1
3.3VOUT_1
3
5
C
C769
100nF
10V
P3.3V_AUX P1.5V_EXP
10V
100nF
C770
P1.5V
C729
100nF
10V
P3.3V
P3.3V_EXP
P3.3V_AUX_EXP
D
2
1
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
- This Document can not be used without Samsung's authorization -
8. Block Diagram and Schematic
A
4
Confidential
Confidential
Confidential
3
B
Place the resistor as close as possible
to prevent 48MHz stub
nostuff
nostuff
nostuff
nostuff
nostuff
nostuff
2801-004666
12MHz
2
1
R289
47K
29
CFD8_SDD4_XDD0
CFD4_SDD0
CFD5_SDD1
CFD6_SDD2
CFD7_SDD3
35
36
37
38
39
MCD3_SDDATA1
MCD3_SDDATA2
MCD3_SDDATA0
MCD3_SDDATA3
R297
Y4
R296
1M
0
PLT3_RST#
R295
330
8
2
XI7XO
CFAD1_MSCLK_XDCLE
CFAD0_SDCLK_MSBS
CFD0_MSD0_SDCMD
CFD1_MSD1_XDWP#
CFD3_MSD3_XDRB#
CFD2_MSD2_SDWP
31
32
33
34
28
27
30
R279
33
MCD3_SDWP
MCD3_SDCLK
MCD3_SDCMD0
USB3_P10+
USB3_P10-
4
DM5DP
CFRESET_XDWR#
CFWR#_XDRD#
CFRD#_XDCE#
CFAD2_XDALE
25
23
24
26
10K
1%
R290
C483
0.018nF
50V
C485
0.018nF
50V
CLK3_FM48
Add for AU6372
(2008.02.29)
R298
0
Samsung
Samsung
Samsung
0904-002225
NC_111NC_212READER_EN16RESET#47REXT
GND6GNDH17GND_U9GND_VDD48GPON6
CFD10_SDD6_XDD2
CFD11_SDD7_XDD3
CFD9_SDD5_XDD1
CFD15_XDD7
CFD12_XDD4
CFD13_XDD5
CFD14_XDD6
CFWT#
46
44
45
40
41
42
43
EMC Solution(’07.10.18)
C467
50V
0.022nF
nostuff
50V
nostuff
0.022nF
C468
C876
1000nF
6.3V
6.3V
1000nF
C484
C481
10V
100nF 100nF
10V
C480
C475
100nF
10V
10
1
VDD_U
V1813VCC3VDD
SMCD#
XDCD#
SDCD#
CFCD#
22
21
19
20
MCD3_SDCD#
14
VDDH
CARD_POWER
MS_INS
18
15
C
10V
10V
AU6371
U15
100nF
10V
100nF
100nF
C476
C474
C482
P3.3V
P3.3V_MCD
40mil trace
D
2 IN 1 CARD
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
THIS DOCUMENT CONTAINS CONFIDENTIAL
SAMSUNG ELECTRONICS CO’S PROPERTY.
EXCEPT AS AUTHORIZED BY SAMSUNG.
PROPRIETARY INFORMATION THAT IS
SAMSUNG PROPRIETARY
4
3
1
SRP Sheet Number: 13 of 73
SAMSUNG
ELECTRONICS
MCD3_SDDATA2
MCD3_SDDATA3
MCD3_SDDATA1
MCD3_SDDATA0
MCD3_SDCMD0
MCD3_SDCD#
MCD3_SDCLK
MCD3_SDWP
R864
R863
R862
R861
49.9
49.9
49.9
49.9
6.3V
3
1%
1
2
CD_DAT3
J515
EDGE-SD-9P
10000nF
C831
P3.3V_MCD
2-in-1 Socket
A
3709-001492
MNT2
12
13
MNT1
WRITE_PROTECT
1%
1%
1%
11
10
7
9
CARD_DETECT
DAT08DAT1
DAT2
6
VSS2
CLK5CMD
VDD4VSS1
8-13
8-14
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
- This Document can not be used without Samsung's authorization -
8. Block Diagram and Schematic
A
NO_STUFF @ 88E8040
CTRL_12 CTRL18_25
Confidential
Confidential
Confidential
34
NO_STUFF @ 88E8040
2
NO_STUFF @ 88E8040
4.7K
R21
10V
100nF
C63
C34
4700nF
10V 6.3V
6.3V
20%
22000nF-X5R
C33
1
C14
10000nF
4700nF
10V
C15
10V
100nF
C13
R533
4.7K
C534
10V
4700nF
C533
100nF
10V
1
10000nF
6.3V
C532
C531
4700nF
10V
100nF
C21
10V
LAN3_VPDDATA
LAN3_VPDCLK
P3.3V_AUX
B8
BLM18PG181SN1
3
U2
BCP69-16
2 4
P1.2V_LAN
P3.3V_AUX
B505
BLM18PG181SN1
U507
BCP69-16
3
2 4
P1.8V_P2.5V_LAN
88E8040: 2.5V
88E8055: 1.8V
B
Place Nearby Pin39, Pin64
4.7uF @ 88E8040
C530
6.3V
10000nF
C528
100nF
10V
100nF
10V
C41
100nF
10V
C529
100nF
10V
C19
23
51
64
Pin Compatible with 88E8040 (1205-003399)
1205-003091|sqfn64e-therm
AVDD
NC_AVDDL_4
NC_VDD25
Samsung
Samsung
Samsung
THERMAL
RSET
65
88E8040: 2Kohm
88E8055: 4.99Kohm
R16
1%
6.3V
10V
10V
10V
P1.8V_P2.5V_LAN
10V10V
28
22
19
32
57
52
AVDD_AVDDL_1
AVDD_AVDDL_2
AVDD_AVDDL_3
NC_AVDDL_1
NC_AVDDL_2
NC_AVDDL_3
RESERVED_HSDDACP
RESERVED_HSDACN
RESERVED_TSTPT
TESTMODE
25
24
29
16
46
4.99K
2801-004668
C16
0.015nF
50V
1 2
50V
0.015nF
C17
It must be placed on bottom side
10000nF
100nF
100nF
100nF
100nF
100nF
58
XTALO
14
25MHz
Y1
C23
C35
C40
C44
C38
C24
13
7
VDD_6
VDD_72VDD_8
VDD_5
XTALI
15
100nF
10V
10V
100nF
10V
100nF
10V
100nF
P1.2V_LAN
48
44
39
VDD_1
VDD_2
VDD_333VDD_4
LOM_DISABLE_DISABLE#
VMAIN_AVLBL
10
47
R22
R23
4.7K
0
C18
C20
C22
C25
C61
C39
C36
C37
61
8
1
AVDDH_VDDO_TTL
VDDO_TTL_3
VDDO_TTL_4
SWITCH_VCC
VAUX_AVLBL
12
11
R17
0
P3.3V_AUX
P3.3V
100nF
100nF
100nF
100nF
C
P3.3V_AUX
LAN3_VPDDATA
LAN3_VPDCLK
P3.3V_AUX
45
40
41
VDDO_TTL_1
VDDO_TTL_2
VPD_CLK38VPD_DATA
CTRL18_CTRL25
SWITCH_VAUX
CTRL12
4
9
CTRL_12
CTRL18_25
10V
10V
10V
10V
LOM3_CLKREQ#
STUFF @ 88E8040
nostuff
R24
4.7K
42
43
37
36
35
34
CLKREQ#_PU_VDDO_TTL
RESERVED_PU_VDDO_TTL
SPI_CLK_NC
SPI_CS#_NC
SPI_DI_NC
SPI_DO_NC
LED_LINK10_100#_LED_SPEED#
LED_LINK1000#_NC
LED_ACTIVE#
LED_LINK#
3
59
63
62
60
NO_STUFF @ 88E8040
Place nearby LOM chip
49.9
1%
R510
1%
49.9
R511
49.9
1%
R512
1%
49.9
R513
49.9
1%
R514
1%
49.9
R515
49.9
1%
R516
1%
49.9
R517
10V
10
12
2603-000107
TCT4
TD4-
MCT4
MX4+
MX4-
13
14
15
PEX1_GLAN_RXN4
PEX1_GLAN_RXP4
PEX1_GLAN_TXN4
PEX1_GLAN_TXP4
CLK1_PCIELOM#
CLK1_PCIELOM
R18
C43
C42
100nF
100nF
4.7K
10V
10V
54
53
55
56
49
50
RX+_PCIE_RXP
RX-_PCIE_RXN
REFCLK+
REFCLK-
TX+_PCIE_TXP
TX-_PCIE_TXN
MDI+1_RXP
MDI+0_TXP
MDI-1_RXN
MDI-0_TXN
MDI+2_NC26MDI+3_NC
MDI-2_NC
21
27
18
17
20
LAN3_MDI0P
LAN3_MDI1P
LAN3_MDI2P
LAN3_MDI0N
LAN3_MDI1N
LAN3_MDI2N
C514
C515
10V
100nF
100nF
7
8
9
TCT3
TD2-6TD3+
TD3-11TD4+
MCT3
MX3+
MX2+
MX2-
MX3-
19
17
16
18
20
PEX3_WAKE#
PLT3_RST#
5
6
PERST#
WAKE#
88E8055
U503
MDI-3_NC
30
31
LAN3_MDI3P
LAN3_MDI3N
C516
10V
100nF
4
2
3
TCT1
TCT2
TD1+
TD1-5TD2+
MCT1
MCT2
MX1+
MX1-
21
23
22
P3.3V
C517
10V
100nF
1
LFE9261A-R
LT500
24
D
P1.8V_P2.5V_LAN
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
THIS DOCUMENT CONTAINS CONFIDENTIAL
SAMSUNG ELECTRONICS CO’S PROPERTY.
EXCEPT AS AUTHORIZED BY SAMSUNG.
PROPRIETARY INFORMATION THAT IS
SAMSUNG PROPRIETARY
4
3
2
1
SRP Sheet Number: 14 of 73
SAMSUNG
ELECTRONICS
75 1%
R4
75
1%
R5
1%
75
R6
1%75
R7
P3.3V_AUX
4.7K
R519
4.7K
R518
6
8
7
AT24C08AN-10SU-2.7
U504
SCL
SDA5VCC
WP
1103-001333
GND
A13A2
A0
4
1
2
A
B
3KVC61nF
Need at least 2.5mm or more clearance
from conductive material
1nFC83KV
1nFC73KV
C
JACK-MODULE-10P
3
1
2
J502
RD+
TD+
TD-4TERM15TERM2
1
B4
CIC21J601NE
B3
CIC21J601NE
10
6
7
8
3722-001692
RD-
RING
TERM3
TERM49TIP
3711-000541
1
2
HDR-2P-SMD
J504
D
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
Samsung
Confidential
Samsung
Confidential
Samsung
Confidential
SRP Sheet Number: 15 of 73
Switched Power On (P3.3V & 1.8V)
C
Audio Power (nostuff)
Add for EMI(2008.04.29)
LAST EDIT
Add for SI(2008.03.07)Add for SI(2007.12.6)
3
MODULE CODE
12
Add for EMC(’08.01.16)
5th Layer
Add for EMI(2008.04.26)
B
1
Place near to
D
SAMSUNG PROPRIETARY
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
2
THIS DOCUMENT CONTAINS CONFIDENTIAL
D:/users/mobile62/mentor/istanbul/istanbul-pv_080718
ELECTRONICS
DRAW
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
APPROVAL
CHECK
A
3
Place near to
SAMSUNG
Switched Power On (P5.0V)
4
PART NO.
B
EXCEPT AS AUTHORIZED BY SAMSUNG.
C
A
D
4
COM-22C-015(1996.6.5) REV. 3
undefined
EGFX_CORE
C888
1nF
50V
C404
10V
C400
10V
100nF
50V
P1.1V
100nF100nF
C550
C889
1nF
P5.0V_AUD
P5.0V_AUX
P5.0V_AUX_USB
10V
P1.8V
10V
C883
100nF
P1.1V
EGFX_CORE
100nF
C882
10V10V
C881
100nF100nF
C880
10V
P1.1V
Q20
RHU002N06
3
D
G
1
S
2
P3.3V
P3.3V
10V
C879
100nF
470K
R203
1%
10V
C549
100nF
100nF
C535
10V
P1.1V
P1.8V
C892
1nF
50V 50V
1nF
C885
100nF
C884
10V
P1.8V
50V
1nF
C891
P1.1V
C523
10V
P1.1V
P1.8V
P5.0V_AUX
P12.0V_ALW
100nF
C854
2200nF
10V
P1.1V
B506
HU-1M2012-121JT
100nF
C878
10V
P1.1V
10nF
C853
25V
R806
0
P1.1V
P1.8V
P1.8V_AUX
3
S3
P5.0V_AUX_USB
P5.0V
50V
C800
1nF
AP6680AGM
Q19
D1
5 6D27D38
D4
4
G
S1
1S22
50V
1nF
C890
P5.0V_AUX_USB
P1.1V
EGFX_COREP1.8V
SHORT514
0
10V
C285
100nF
1nF
C504
50V
P1.8V_AUX
2
S
B509
HU-1M2012-121JT
nostuff
RHU002N06
Q523
D
3
1
G
C832
10V
nostuff
100nF
P5.0V_AUX
6.3V
C804
10000nF
P5.0V_AUX_USB
P5.0V_AUX
EGFX_CORE
nostuff
P1.1V
EGFX_CORE
P1.8V
10V
C893
100nF
50V
1nF
C887
50V
C341
22nF
50V
10V
C415
100nF
P1.8V
P1.8V_AUX
EGFX_CORE
C886
1nF
2S23
S3
50V
C509
1nF
D1
8
7
D2
D36D4
5
G4S1
1
P5.0V_AUX_USB
AP4435GM
Q535
P5.0V_AUX_USB
25V
C803
10nF
RHU002N06
Q530
D
3
1
G
2
S
P5.0V_AUX_USB
nostuff
1%
R200
50V
C507
1nF
200K
1%
P5.0V_AUX_USB
470K
R199
100K
R758
1%
nostuff
30.1K
nostuff
0
R201
0
1%
R802
P3.3V
R808
3
1
G
2
S
100nF
C512
10V
EGFX_CORE
P5.0V_AUX_USB
RHU002N06
Q21
D
5
D1 D26D37D4
8
G
4
1
S12S2 S3
3
EGFX_CORE
P1.8V_AUX
100nF
C342
10V
Q28
AP6680AGM
10nF
C830
50V
P12.0V_ALW
100nF
C895
10V
P5.0V_AUX
R809
1%
200K
0
P3.3V_AUX
R801
100nF
10V
C810
RHU002N06
Q29
D
3
1
G
2
S
P5.0V_AUX
470K
R278
1%
100nF
1
D1
D2
2
D3
5
6
D4G
3
4
S
P5.0V_AUX
C809
10V
P12.0V_ALW
nostuff
Q524
FDC653N
10V
C674
100nF
P1.8V_AUX
P12.0V_ALW
10V
C464
2200nF
1nF
C511
50V
50V
C508
1nF
Q527
D
3
1
G
2
S
P3.3V
P5.0V_AUX_USB
P1.8V
P5.0V_AUX_USB
RHU002N06
P5.0V_AUX
R202
0
P5.0V_AUD
10V
C896
100nF100nF
C894
10V
P5.0V_AUX
10V
C506
100nF
KBC3_PWRON
KBC3_PWRON_INV#
KBC3_PWRON_INV#
KBC3_PWRON
P1.1V_PWRGD
VCCP3_PWRGD
- This Document can not be used without Samsung's authorization -
8. Block Diagram and Schematic
8-15
8-16
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
- This Document can not be used without Samsung's authorization -
8. Block Diagram and Schematic
COM-22C-015(1996.6.5) REV. 3
Top Side
Add for EMC (’08.01.16)
4
3
2
SRP Sheet Number: 16 of 73
SAMSUNG
ELECTRONICS
A
VDC
C56
50V
1nF
1nF
50V
C289
C679
25V
100nF
C92
100nF
25V
C51
100nF
25V
Add for EMC (’08.03.05)
C388
50V
1nF
VDC
1nF
50V
C68
VDC
C93
50V
1nF
VDC
1nF
C88
50V
VDC
Confidential
Confidential
Confidential
P3.3V
C286
10V
100nF
P3.3V
C665
50V
1nF
P3.3V P3.3V
C617
50V
1nF
50V
1nF
C616
P3.3V
50V
1nF
C31
P3.3V
1nF
C654
50V
RMNT-25-70-1P
MT2004
RMNT-25-90-1P
MT4 MT5
RMNT-25-90-1P
VDC
10V
VDC
10V
VDC
10V
VDC
10V
C91
100nF
10V
C212
10V
100nF
10V
100nF
C78
C405
100nF
10V
10V
100nF
C83
C565
100nF
10V
C409
10V
100nF
Board
Keyboard
B
Add for EMC (’08.01.16)
5th Layer
P1.8V_AUX
100nF
C138
P1.05V
C107
100nF
P1.05V
100nF
C66
P1.05V
C132
100nF
Samsung
Samsung
Samsung
Add for EMC (’08.01.16)
Bottom Side
P3.3V
C609
10V
P3.3V
P3.3V
P3.3V
P3.3V
P3.3V
P3.3V
100nF
C581
10V
100nF
C578
100nF
10V
RMNT-30-100-1P
MT6
RMNT-30-100-1P
MT2
100nF
10V
C548
10V
100nF
C556
C554
100nF
10V
C536
10V
100nF
100nF
10V
C537
P5.0V_AUX
P5.0V_AUX
P5.0V_AUX
P5.0V_AUX
P5.0V_AUX
P5.0V_AUX
P5.0V_AUX
P5.0V_AUX
VDC
25V
C57
100nF
P1.8V_AUX
C603
10V
100nF
P1.8V_AUX
100nF
10V
C94
P1.8V_AUX
C577
10V
100nF
P1.8V_AUX
100nF
10V
C340
RMNT-35-100-1P
MT500
RMNT-30-100-1P
MT9
C C
3711-005753
nostuff
nostuff
nostuff
P5.0V
10V
C904
100nF
P5.0V
10V
100nF
C905
P5.0V
C906
10V
100nF
P5.0V
100nF
10V
C907
Add for EMC (’08.06.09)
Bottom Side
MNT1
MNT2
8
9
7
11
12
R794
R795
1K
1K
1%
1%
AUX_PG
VRM3_CPU_PWRGD
CPU1_PWRGDCPU
CPU1_CPURST#
VCCP3_PWRGD
Add for EMC (’08.04.22)
VDC
C909
100nF
25V
VDC
C910
25V
100nF
VDC
25V
100nF
C911
VDC
100nF
C912
25V
Add for EMC (’08.06.09)
4th Layer
HDR-10P-1R-SMD
J13
11023456
VDC
P1.8V
P3.3V
P5.0V
CONTACT-PLATE-EMI
EMI503
CONTACT-PLATE-EMI
EMI504
10V
100nF
10V
100nF
10V
100nF
10V
100nF
10V
100nF
10V
100nF
100nF
10V
C897
C898
C899
C900
C901
C902
C903
EMI
EMI
P1.5V
P1.5V P1.5V
P1.5V
P1.5V
P1.5VP1.5V
System
RMNT-30-100-1P
MT7
RMNT-30-100-1P
MT8
RMNT-30-100-1P
MT3
RMNT-30-100-1P
MT501
RMNT-30-100-1P
MT502
RMNT-30-100-1P
MT1
2
1
3
MMBT3904
U9
2
1
3
MMBT3904
Q12
nostuff
nostuff
nostuff
2
1
3
MMBT3904
U8
D
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
THIS DOCUMENT CONTAINS CONFIDENTIAL
SAMSUNG ELECTRONICS CO’S PROPERTY.
EXCEPT AS AUTHORIZED BY SAMSUNG.
PROPRIETARY INFORMATION THAT IS
SAMSUNG PROPRIETARY
4
ICT PORT
3 2
For Debugging
1
A
B
D
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
- This Document can not be used without Samsung's authorization -
8. Block Diagram and Schematic
KBC3_USBPWRON#
3
4 1
5
1205-002596
EN1*
EN2*
OC2*
OUT2
GND
6
USB3_P3+
6
45MNT1
MNT2
8
IN2OC1*
OUT1
7
USB3_P3-
HDR-4P-SMD
123
C C
TPS2062
J3
U528
C869
100nF
10V
P5.0V_AUX
B525
HU-1M2012-121JT
A A
4
Confidential
Confidential
Confidential
3
50V
0.1nF
C574
0.01nF
0.5pF
50V
C572
50V
0.018nF
C570
C576
0.022nF
50V
C573
0.027nF
0.047nF
50V
C571
50V
50V
50V50V
50V50V
0.5pF
0.1nF
0.01nF
0.018nF
0.022nF
0.027nF
0.047nF
C105
C104
C102
C99
C103
B
Samsung
Samsung
Samsung
C101
3711-000922
D D
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
THIS DOCUMENT CONTAINS CONFIDENTIAL
SAMSUNG ELECTRONICS CO’S PROPERTY.
EXCEPT AS AUTHORIZED BY SAMSUNG.
PROPRIETARY INFORMATION THAT IS
SAMSUNG PROPRIETARY
4
Sub Board Connector (Istanbul Only)
3
2
1
SRP Sheet Number: 17 of 73
SAMSUNG
ELECTRONICS
50V
2 3
REV1
1
1
N.C.
1-2
2-3
0.0033nF
C100
NO CONNECTION
PCB REVISION CONTROL ( ICT )
DATE(YY/MM/DD)
REVISION STEP
B
nostuff
nostuff
nostuff
1%
100K
2
S
nostuff
nostuff
1
G
KBC3_USBPWRON#
3
D
R855
3
D
Q544
RHU002N06
2
S
1K
1%
R850
1
G
Q545
BSS84
2
P5.0V_AUX
R851
1K
1%
1
0.0033nF
C575
50V50V
10 1-2-3
5
432
678
9
N.C.
1-2
2-3
3-1
3-1
1-2-3
8-17
8-18
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
- This Document can not be used without Samsung's authorization -
8. Block Diagram and Schematic
A A
4
G_USB
RMNT-25-65-1P
Right side USB Board
Confidential
Confidential
Confidential
G_USB G_USB
3
G_USB
MT2005
B524
ACM2012-900-2P-T
2
3
nostuff
D522
PGB1010603NR
21
nostuff
D523
PGB1010603NR
1
2
8
3722-002729
MNT44PWR
B B
USB3_P3+_SUB
USB3_P3-_SUB
R853
R854
1
0
0
4
nostuff
nostuff
Samsung
Samsung
Samsung
G_USB
3
1
5
7
J516
JACK-USB-4P
DATA+2DATA-
GND
MNT1
MNT26MNT3
P5.0V_AUX_SUB
100uF
EC527
AD
6.3V
100nF
10V
C870
C871
50V
0.047nF
G_USB
3711-000922
C
MNT2
MNT1
4
5
6
HDR-4P-SMD
1
2
3
USB3_P3-_SUB
USB3_P3+_SUB
J518
P5.0V_AUX_SUB
D D
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
THIS DOCUMENT CONTAINS CONFIDENTIAL
SAMSUNG ELECTRONICS CO’S PROPERTY.
EXCEPT AS AUTHORIZED BY SAMSUNG.
PROPRIETARY INFORMATION THAT IS
SAMSUNG PROPRIETARY
4
Sub Board (Istanbul only)
3
2
1
SRP Sheet Number: 18 of 73
SAMSUNG
ELECTRONICS
Main board side
RMNT-25-65-1P
G_ODD
ODD I/F Board
G_ODD
MT2006
RMNT-25-65-1P
MT2007
G_ODD
G_ODD
ODD side
0191882900
3710-002634
G_ODD
J519
CDROM-SATA-13P
GND_1
GND_2
GND_3
GND_4
GND_5
MNT115MNT2
5V_1P35V_2
RX+
TX+
RX-
TX-
DP
P2
P1
S1
S4
S7
P5
P6
P4MD14
C872
100nF
10V
nostuff
P3DPP1
15
GND_4P5GND_5P6MDP4MNT114MNT2
5V_1P25V_2
P5.0V_SUB
P5.0V_SUB
S7
GND_3
C
S6
S5
SATA Signal
S4
S5
GND_2
RX-S3TX+S6TX-
S2
S3
S1
S2
J517
CDROM-SATA-13P
GND_1
RX+
2
1
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
Samsung
Confidential
Samsung
Confidential
Samsung
Confidential
SRP Sheet Number: 19 of 73
ELECTRONICS
SAMSUNG
B B
AA
C C
4
DD
4 3
3 2
2
1
1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
P5.0V
P1.5V
P1.5V
TP2515
P5.0V
P5.0V_AUX_USB
VDC
VDC
P5.0V_AMP
P4.75V_AUD
P1.5V
P0.9V
G_P1.05V
VDC_INV
G_CPU
P1.5V_EXP
EGFX_CORE
P3.3V
TP2516
GROUND
GROUND
VDC_ADPT
VREF
P3.3V_AUX GROUND
P3.3V_AUX_EXP
GROUND
VREF
GROUND
TP2518
P3.3V_AUX
P3.3V_AUX
P3.3V_MICOM
P5.0V
P1.8V_AUX
P3.3V_AUX
V5FILT
P5.0V_AUD
P1.8V_AUX
GROUND
P5.0V_AUX
P0.9V
P5.0V_AUX
VDC
CPU_CORE
CPU_CORE
VCC_CRT
P1.05V
VDC
P1.05V_PEG
GROUND
GROUND
VDC_INV
P1.05V
VDC_INV
P1.05V
G_P3.3V
VDC_CHG
VDC_INV
P1.2V_LAN
P3.3V
TP2507
P1.8V_P2.5V_LAN
P1.2V_LAN
P1.1V
P3.3V
P1.1V
GROUND
TP2505
VREF
TP2514
GROUND
P1.5V_EXP
P12.0V_ALW
P1.5V
P1.8V
P5.0V_AUX
P1.1V
G_CHG
P1.1V
P3.3V
P1.2V_LAN
PRTC_BAT
TP2509
P5.0V
P1.05V
P5.0V_ALW
P1.8V
P1.2V_LAN
P3.3V_EXP
TP2504
G_MIC
P0.9V
P3.3V_MCD
P1.8V
TP2506
TP2525
P1.8V_AUX
TP2502
EGFX_CORE
TP2527
EGFX_CORE
TP2508
G_AUD
P1.5V_EXP
P1.5V_EXP
P1.8V
TP2503
VREF
TP2526
EGFX_CORE
P1.8V_AUX
G_DDR
LCD_VDD3V
P0.9V
TP2517
CPU_CORE
P5.0V_AUX
CPU_CORE
CHP3_INTRUDER#
CLK3_PCLKMICOM
CPU1_THRMTRIP#
CPU3_THRMTRIP#
HDA3_HDMI_BCLK
HDA3_HDMI_RST#
HDA3_HDMI_SDI2
HDA3_HDMI_SYNC
ITP3_DBRRESET#
KBC3_CHKPWRSW#
KBC3_LED_ACIN#
LCD3_EDID_DATA
PEG5_HDMI_DATA
VRM3_CPU_PWRGD
AUD5_HP_O_RIGHT
AUD5_MIC1_RIGHT
AUD5_MIC2_RIGHT
CHP3_ME_RTCRST#
KBC3_BLCKPWRSW#
KBC3_LED_POWER#
KBC3_PWRON_INV#
AUD5_LINE_O_LEFT
CHP3_SATACLKREQ#
KBC3_LED_CHARGE#
KBC3_THERM_SMCLK
AUD5_LINE_O_RIGHT
KBC3_THERM_SMDATA
AUD5_MIC1_VREF_LEFT
AUD5_MIC1_VREF_RIGHT
CPU1_DPSLP#
CPU1_DEFER#
CHP3_SUSSTAT#
CPU1_PWRGDCPU
CPU1_VCCSENSE
CPU1_VSSSENSE
HDA3_AUD_BCLK
HDA3_AUD_RST#
HDA3_AUD_SDI0
HDA3_AUD_SYNC
HDA3_HDMI_SDO
HDA3_MDC_BCLK
HDA3_MDC_RST#
HDA3_MDC_SDI1
HDA3_MDC_SYNC
KBC3_CAPSLED#
KBC3_WAKESCI#
LCD3_EDID_CLK
PEG5_HDMI_CLK
MCH3_ICHSYNC#
PEG3_LCDVDDON
PEG5_HDMI_CLK
PLT3_RST_ORG#
PEG3_HPD_HDMI
AUD5_HP_O_LEFT
AUD5_MIC1_LEFT
AUD5_MIC2_LEFT
AUD5_MIC2_VREF
AUD5_SENS_MIC#
CHP3_BIOS_CRI#
CHP3_CL_DATA_0
CHP3_CL_RST_0#
KBC3_RUNSCI#
KBC3_SMDATA#
KBC3_SPKMUTE
KBC5_KSO(10)
KBC5_KSO(11)
KBC5_KSO(12)
KBC5_KSO(13)
KBC5_KSO(14)
KBC5_KSO(15)
LAN3_VPDDATA
LID3_SWITCH#
LOM3_CLKREQ#
LPC3_LFRAME#
MCD3_SDDATA0
MCD3_SDDATA1
MCD3_SDDATA2
MCD3_SDDATA3
MCH1_HXSWING
MCH3_CLKREQ#
MCH3_EXTTS0#
MCH3_EXTTS1#
MIN3_CLKREQ#
PCI3_CLKRUN#
AUD5_SENS_HP#
CHP3_CL_CLK_0
CHP3_DPRSLPVR
CHP3_PM_SYNC#
CHP3_SATALED#
AUD3_SHDN#
WLON_LED#
VRM_ISEN2
VRM_ISEN1
LPC3_LAD(2)
LPC3_LAD(3)
MCD3_SDCMD0
PEG3_BKLTEN
SMB3_ALERT#
THM3_ALERT#
T_L_BUTTON#
T_R_BUTTON#
VCCP3_PWRGD
BAT3_DETECT#
BAT3_SMDATA#
CHP3_BIOSWP#
CHP3_CPUSTP#
CHP3_PCISTP#
CHP3_RTCRST#
CLK3_PCLKICH
CPU1_CPURST#
CPU1_DPRSTP#
CPU1_STPCLK#
CPU2_THERMDA
CPU2_THERMDC
CRT3_DDCDATA
CRT5_DDCDATA
EXP3_CLKREQ#
FAN3_FDBACK#
HDA3_AUD_SDO
HDA3_MDC_SDO
KBC3_CPURST#
KBC3_EXTSMI#
KBC3_NUMLED#
KBC3_PWRBTN#
KBC3_RSMRST#
CRT5_DDCCLK
EXP3_CPUSB#
EXP3_PERST#
KBC3_BKLTON
KBC3_PRECHG
KBC3_PWRSW#
KBC3_RFOFF#
KBC3_SCLED#
KBC3_SMCLK#
KBC3_SUSPWR
KBC5_KSI(0)
KBC5_KSI(1)
KBC5_KSI(2)
KBC5_KSI(3)
KBC5_KSI(4)
KBC5_KSI(5)
KBC5_KSI(6)
KBC5_KSI(7)
KBC5_KSO(0)
KBC5_KSO(1)
KBC5_KSO(2)
KBC5_KSO(3)
KBC5_KSO(4)
KBC5_KSO(5)
KBC5_KSO(6)
KBC5_KSO(7)
KBC5_KSO(8)
KBC5_KSO(9)
LAN3_VPDCLK
LCD3_BKLTON
LPC3_LAD(0)
LPC3_LAD(1)
CRT3_VSYNC
CRT5_HSYNC
CRT5_VSYNC
EXP3_CPPE#
KBC3_CHGEN
KBC3_PWRGD
KBC3_PWRON
KBC5_TDATA
MCD3_SDCD#
MCD3_SDCLK
MCH1_HVREF
PEX3_WAKE#
AUD3_GPIO0#
AUD3_GPIO1#
AUD5_SENS_A
BAT3_SMCLK#
CHP3_GPIO18
CHP3_GPIO20
CHP3_SERIRQ
CHP3_SLPS3#
CHP3_SLPS4#
CHP3_SLPS5#
CLK3_DBGLPC
CPU1_IGNNE#
CPU1_VID(0)
CPU1_VID(1)
CPU1_VID(2)
CPU1_VID(3)
CPU1_VID(4)
CPU1_VID(5)
CPU1_VID(6)
CRT3_DDCCLK
KBC3_A20G
KBC3_RST#
KBC3_VRON
KBC5_TCLK
LCD3_BRIT
MCD3_SDWP
MEM1_VREF
PLT3_RST#SMB3_DATA
SPI3_CS0#
SPI3_MISO
SPI3_MOSI
THM3_STP#
CLK3_ICH14
CLK3_PWRGD
CLK3_USB48
CPU1_A20M#
CPU1_BPRI#
CPU1_BREQ#
CPU1_BSEL0
CPU1_BSEL2
CPU1_DBSY#
CPU1_DPWR#
CPU1_DRDY#
CPU1_FERR#
CPU1_HITM#
CPU1_INIT#
CPU1_LOCK#
CPU1_TRDY#
CPU1_TRST#
CRT3_GREEN
CRT3_HSYNC
AUX_PG
CTRL_12
SPK5_L+
SPK5_L-
SPK5_R+
SPK5_R-
VRM_PRM
CPU1_NMI
CPU1_TCK
CPU1_TDI
CPU1_TMS
CRT3_RED
FAN5_VDD
SMB3_CLK
SPI3_CLK
VRM_VSUM
ADT3_SEL#
AUD3_BEEP
AUD3_SPKR
CLK3_FM48
CPU1_ADS#
CPU1_BNR#
CPU1_HIT#
CPU1_INTR
CPU1_PSI#
CPU1_RS0#
CPU1_RS1#
CPU1_RS2#
CPU1_SLP#
CPU1_SMI#
CRT3_BLUE
CTRL18_25
- This Document can not be used without Samsung's authorization -
8. Block Diagram and Schematic
8-19
8-20
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
- This Document can not be used without Samsung's authorization -
8. Block Diagram and Schematic
Samsung
Confidential
Samsung
Confidential
Samsung
Confidential
SRP Sheet Number: 20 of 73
2
ELECTRONICS
RSVD
SRC4
CLK REQ E
BSEL2
SAMSUNG PROPRIETARY
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
1
A
VDD_PCI
0
1
FSB
PROPRIETARY INFORMATION THAT IS
0
100 MHz
266 MHz
0
A
0
27M & 27M_SS
166 MHz
SRC8
CLK REQ A
GMCH
Silego : 1205-003156
Spectra Linear : 1205-003533
1
0
FSC
VDD_SRC_IO
C
Place 14.318MHz within
500mils of CK-505
1
DOT_96/DOT_96#
SAMSUNG
27MHz
DEVICE
VDD_CPU_IO
Pin 24/25
SRC_0/SRC_0#
LOM3_CLKREQ#
CLK REQ
SEL_LCDCLK*
BSEL0
1
SATA
D
0
C
4
VDD_CPU
VDD_IO
CLK REQ B
VDD_48
400 MHz
4
SRC6
EXCEPT AS AUTHORIZED BY SAMSUNG.
THIS DOCUMENT CONTAINS CONFIDENTIAL
LOW
VDD_SRC
1
1
1
1
100MHz
HOST CLK
200 MHz
BSEL1
Pin 20/21
1
IDT : 1205-003159
333 MHz
SRC PORT
VDD_PLL3
SRC2
1
0
3 2
133 MHz0
MINI CARD
B
HIGH
VDD_PLL3_IO
PEG_CLK/PEG_CLK#
0
D
0
VDD_REF
SAMSUNG ELECTRONICS CO’S PROPERTY.
3
FSA
1
This part is 64pin QFN package.
B
0
1
CLK REQ F
0
1
1%
nostuff
R266
10K
10V
C730
4700nF
33
R267
nostuff
10000nF
C410
1%
6.3V
2.2K
R268
1
VSS_REF30VSS_SRC1
36
VSS_SRC249VSS_SRC3
3
XTAL_IN
XTAL_OUT
2
27
4
VDD_REF
46
VDD_SRC
33
VDD_SRC_IO1
43
VDD_SRC_IO2
52
VDD_SRC_IO3
VSS_48
18
59
VSS_CPU22VSS_IO15VSS_PCI26VSS_PLL3
54
SRC8_ITP
37
SRC9
38
SRC9#
17
USB_FS_A
16
VDD_48
62
VDD_CPU
56
VDD_CPU_IO19VDD_IO
9
VDD_PCI
23
VDD_PLL3
VDD_PLL3_IO
SRC2
29
SRC2#
32
SRC3#_CLKREQD#
31
SRC3_CLKREQC#
SRC4
34
SRC4#
35
48
SRC6
47
SRC6#
50
SRC7#_CLKREQE#
51
SRC7_CLKREQF#
53
SRC8#_ITP#
13
PCI_4_SEL_LCDCLK#5REF_FS_C_TEST_SEL
7
SCL6SDA
21
SRC0#_DOT96#
20
SRC0_DOT96
41
SRC10
42
SRC10#
39
SRC11#_CLKREQG#
40
SRC11_CLKREQH#
28
44
CPUSTOP#64FSB_TESTMODE
25
LCDCLK#_27M_SS
24
LCDCLK_27M
55
NC
14
PCIF_5_ITP_EN45PCISTOP#
8
PCI_0_CLKREQ_A#
10
PCI_1_CLKREQ_B#
11
PCI_212PCI_3
U14
1205-003159
IDTCV179BNLG
63
CLKPWRGD_PWRDN#
61
CPU0
60
CPU0#
58
CPU1_MCH
57
CPU1_MCH#
R271
22.6 1%
10000nF
C445
2801-004667
1
2
6.3V
100nF
C440
Y3
14.31818MHz
10V
10V100nF
C425
P3.3V
1%
P1.5V
33
R260
475
R262
1%
0
R259
R265
10K
1%
100nF
C442
10V
R275
10K
nostuff
R270
22.6
1%
R273
10K
1%
B34
BLM18PG181SN1
1%
R269
33 1%
nostuff
C424
10V100nF
1%10K
R276
10V100nF
C731
R261
475
R263
22.6
1%
BLM18PG181SN1
B521
1%
C734
10000nF
6.3V
P3.3V
10V
C441
100nF
C444
100nF 10V
10V
C443
100nF
10V
R264
22.6 1%
C438
100nF
P3.3V
50V
C462
0.018nF
4700nF
C437
50V
C463
0.018nF
10V
BLM18PG181SN1
B32
C422
10000nF
6.3V
10V100nF
C732
R274
10K 1%
10V100nF
C423
nostuff
1%22.6
R277
10V100nF
C439
CLK3_GFX_27M
CLK3_GFX_27M_SS
CLK1_PEG#
CLK1_PEG
CLK3_48MHZ_R
EXP3_CLKREQ#
CLK3_PCI2_R
CLK1_PCIEICH#
CLK1_PCIEICH
CLK3_PCI4_R
CLK3_14MHZ_R
CLK1_EXPCARD
CLK1_EXPCARD#
LOM3_CLKREQ#
CLK1_PCIELOM#
CLK1_MCH3GPLL#
CLK1_MCH3GPLL
CHP3_SATACLKREQ#
CLK3_PCLKMICOM
MCH3_CLKREQ#
CLK3_DBGLPC
MIN3_CLKREQ#
CLK1_PCIELOM
CLK0_HCLK1
CLK0_HCLK0#
CLK0_HCLK0
CLK3_USB48
SMB3_CLK
SMB3_DATA
CLK3_PWRGD
CHP3_CPUSTP#
CHP3_PCISTP#
CPU1_BSEL2
CPU1_BSEL0
CLK3_ICH14
CLK3_PCLKICH
CLK3_FM48
CLK1_MINIPCIE
CLK1_MINIPCIE#
CLK1_SATA
CLK1_SATA#
CPU1_BSEL1
CLK3_PCIF_R
CLK0_HCLK1#
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
Samsung
Confidential
Samsung
Confidential
Samsung
Confidential
SRP Sheet Number: 21 of 73
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
PROPRIETARY INFORMATION THAT IS
External : stuff
1
A
Opposite side of CPU.
THERMAL SENSOR & FAN CONTROL
R2
10mil width and 10mil spacing.
EXCEPT AS AUTHORIZED BY SAMSUNG.
C
M6
RHE Support (Top)
THIS DOCUMENT CONTAINS CONFIDENTIAL
B
C
4
TRIP_SET pin voltage = (T-75)/21
2
Line Width = 20 mil
SAMSUNG ELECTRONICS CO’S PROPERTY.
D
SAMSUNG PROPRIETARY
1
A
Internal : nostuff
SMBUS Address 7Ah
R1
3
3.3 * [R2/(R1+R2)] = (T-75)/21
D
3
B
SAMSUNG
2
ELECTRONICS
4
93 degree C
50V
2.2nF
C564
1%
R70
10K
P3.3V_AUXP3.3V_AUX
TP2475
TP2477
P3.3V_AUX
TP2497
49.9
R53
1%
P1.05V
DIA
HEAD
LENGTH
M1
DIA
HEAD
LENGTH
R56
10K
M2
BA61-01090A
1%
MMBT3904
Q510
1
3
2
2
nostuff
MMBT3904
Q11
1
3
R71
20K
6.3V
C64
10000nF
1%
R54
10K
P3.3V
1%
HDR-4P-1R-SMD
J507
3711-000456
123
4
TP2473
P5.0V
TP2476
TP2472
50V
0.47nF
C81
1%1%51.1K
R69
50V
200K
R68
C80
2.2nF
27
VDD_5V_2
M6
BA61-01090A
DIA
HEAD
LENGTH
16
RESET#
9
SHDN_SEL
SMCLK
23
22
SMDATA
12
SYS_SHDN#
28
TACH13THERMTRIP#
THRM_PAD
29
11
TRIP_SET
1
VDD_3V24VDD_5V_1
DP15DP27DP3
25
FAN_126FAN_210FAN_MODE
20
GND
8
NC_115NC_2
NC_3
21
14
POWER_OK
19
ALERT#
CLK_IN
18
17
CLK_SEL
2
DN14DN26DN3
3
100nF
C82
U7
EMC2102
1209-001718
10V
nostuff
0
R67
6.3V
C62
10000nF
10K
R55
1%
nostuff
C79
100nF
10V
R58
0
M4
BA61-01090A
DIA
HEAD
LENGTH
P3.3V
M3
DIA
HEAD
LENGTH
R57
10K
nostuff
1%
R72
2K
1%
KBC3_PWRGD
FAN5_VDD
FAN3_FDBACK#
CPU1_THRMTRIP#
CPU3_THRMTRIP#
FAN5_VDD
FAN3_FDBACK#
THM3_ALERT#
CPU2_THERMDC
CPU2_THERMDA
KBC3_THERM_SMCLK
KBC3_THERM_SMDATA
THM3_STP#
CPU3_THRMTRIP#
GFX3_THERMDP
GFX3_THERMDN
GFX3_THERM#
- This Document can not be used without Samsung's authorization -
8. Block Diagram and Schematic
8-21
8-22
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
- This Document can not be used without Samsung's authorization -
8. Block Diagram and Schematic
Samsung
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Confidential
SRP Sheet Number: 22 of 73
1 / 4
ADDR GROUP
ICH
0
ADDR GROUP
1
CONTROL
2 / 4
DATA GRP 0
DATA GRP 2
DATA GRP 1
DATA GRP 3
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
D
BB
A
ELECTRONICS
A
3
D
4
C
2
4
CPU Mount
2 1
C
PROPRIETARY INFORMATION THAT IS
SAMSUNG PROPRIETARY
3 1
THIS DOCUMENT CONTAINS CONFIDENTIAL
EXCEPT AS AUTHORIZED BY SAMSUNG.
CPU Socket : 3704-001153
SAMSUNG ELECTRONICS CO’S PROPERTY.
SAMSUNG
23
11
8
37
19020
62
5
30
444839
3
213417
33
9
54
29
9
14
16
32
30
16
21422
43
36
28
3
15
0
45
19
32
M5
SUPLECODE
1
MNT1
MNT2
2
3
MNT3
MNT4
4
F4
RS2#
G3
SMI#
A3
STPCLK#
D5
TRDY#
G2
41
46
C6
LINT1
B4
LOCK#
H4
K3
REQ0#H2REQ1#K2REQ2#J3REQ3#L1REQ4#
RESET#
C1
RS0#F3RS1#
BR0#
F1
DBSY#
E1
DEFER#
H5
DRDY#
F21
FERR#
A5
HIT#
G6
HITM#
E4
IERR#
D20
IGNNE#
C4
INIT#
B3
LINT0
A4#L5A5#L4A6#K5A7#M3A8#N2A9#
J1
ADS#
H1
ADSTB0#
M1
ADSTB1#
V1
BNR#
E2
BPRI#
G5
T3
A27#W2A28#W5A29#
Y4
A3#
J4
A30#U2A31#V4A32#W3A33#
AA4
A34#
AB2
A35#
AA3
A17#Y2A18#U5A19#R3A20#
W6
A20M#
A6
A21#U4A22#Y5A23#U1A24#R4A25#T5A26#
0143854500
CPU500-1
PENRYN
A10#N3A11#P5A12#P2A13#L2A14#P4A15#P1A16#
R1
2
60
35
33
56246353
4
R177
56
13
7
5
52
31341227
31
2
14
27
28
47
13
P1.05V
6
57
29
26 55
1
58
15
11
3
50
18
59
38
10
25 22
4
23
10
42
40
20
26
8
6
24
51
DSTBN1#
L26
DSTBN2#
Y26
DSTBN3#
AE25
DSTBP0#
H26
DSTBP1#
M26
DSTBP2#
AA26
DSTBP3#
AF24
17
AD23
D62#
AF22
D63#
AC23
D7#
E23
D8#
K24
D9#
G24
DINV0#
H25
DINV1#
N24
DINV2#
U22
DINV3#
AC20
DSTBN0#
J26
D52#
AB21
D53#
AC26
D54#
AD20
D55#
AE22
D56#
AF23
D57#
AC25
D58#
AE21
D59#
AD21
D6#
E25
D60#
AC22
D61#
D42#
Y23
D43#
W24
D44#
W25
D45#
AA23
D46#
AA24
D47#
AB25
D48#
AE24
D49#
AD24
D5#
G25
D50#
AA21
D51#
AB22
Y22
D33#
AB24
D34#
V24
D35#
V26
D36#
V23
D37#
T22
D38#
U25
D39#
U23
D4#
F23
D40#
Y25
D41#
W22
D23#
M23
D24#
P25
D25#
P23
D26#
P22
D27#
T24
D28#
R24
D29#
L25
D3#
G22
D30#
T25
D31#
N25
D32#
D13#
F26
D14#
K22
D15#
H23
D16#
N22
D17#
K25
D18#
P26
D19#
R23
D2#
E26
D20#
L23
D21#
M24
D22#
L22
0143854500
CPU500-2
PENRYN
D0#
E22
D1#
F24
D10#
J24
D11#
J23
D12#
H22
TP2496
35
18
49
12
7
61
25
CPU1_DSTBN2#
CPU1_DSTBN3#
CPU1_DSTBP2#
CPU1_DSTBP3#
1
CPU1_DBI2#
CPU1_DBI3#
CPU1_SMI#
CPU1_STPCLK#
CPU1_TRDY#
CPU1_NMI
CPU1_LOCK#
CPU1_CPURST#
CPU1_RS0#
CPU1_RS1#
CPU1_RS2#
CPU1_BNR#
CPU1_BPRI#
CPU1_BREQ#
CPU1_DBSY#
CPU1_DEFER#
CPU1_DRDY#
CPU1_FERR#
CPU1_HIT#
CPU1_HITM#
CPU1_IGNNE#
CPU1_INIT#
CPU1_INTR
CPU1_DBI0#
CPU1_A20M#
CPU1_ADS#
CPU1_DSTBP1#
CPU1_DSTBN1#
CPU1_D#(47:32)
CPU1_D#(63:48)CPU1_D#(31:16)
CPU1_D#(15:0)
CPU1_DSTBP0#
CPU1_DSTBN0#
CPU1_DBI1#
CPU1_A#(16:3)
CPU1_REQ#(4:0)
CPU1_A#(35:17)
CPU1_ADSTB1#
CPU1_ADSTB0#
- 이 문서는 삼성전자의 기술 자산으로 승인자만이 사용할 수 있습니다 -
Samsung
Confidential
Samsung
Confidential
Samsung
Confidential
SRP Sheet Number: 23 of 73
3 / 4
RSVD
THERMAL
H CLK
XDP/ITP SIGNALS
0
1
1
266M
166M
0
0
0
0
1
CPU Socket : 3704-001153
0
1
1
0
1
FSC
1
0.1000 V
1
0
1
0
1
1
0
1
1
0
1
0
0
1
0
1
1
0
0
0
0
1
0
0
0
0
0
1
0
0
0.7250 V
Route the VCC/VSSsense as a Zo=55ohm traces with equal length.
0.9750 V
1
1
0
0
0
1
1
0
1
0.1875 V
0.1750 V
1
1
FSA
200M
00
0.8625 V
1
0
DPRSTP*
1
FRQ
1
1
0
0
0
1.4250 V
1
1
0.1250 V
0
0
1
1
*Yonah Processor (2.33 GHz / 800 MHz : TBD)
1.3375 V
DPRSLPVR
0.6625 V
1
Voltage
0
1
1
1.1750 V
1
1
1
0
0
1
0
1
1
0
1
1
0
1.0625 V
1.3500 V
0
1
1
0
1
0
0
1
0
0
1
1
1
1
0
FSB
0
0
1
0
1111
0
1
0
0
0
0
0
0.9500 V
0
0
0.7500 V
1
0
THIS DOCUMENT CONTAINS CONFIDENTIAL
0
1
0
0
1
1
0
0
1
0
0
1
1
0
SAMSUNG PROPRIETARY
0
0
0
1
0
1
1
0
1
0
1
0
0
1
0
0
0
1
0
1
0
0
0.2000 V
0
CPU Core Voltage Table
1
1
DPRSLPVR
1
of the first GTLREF0 pin with Zo=55ohm trace.
1
1
1
0
1.3750 V
1
1
0
0.4375 V
1
1
1
1
GND test points within 100mil of the VCC/VSSsense at the end of the line.
0
0
1
VID(6:0)
1
0
10
1
1
0
0
1
0
000
1
0
Voltage
0.0000 V
trace shorter than 1/2" to their respective Banias socket pins.
1
0
1
1 1
0.8000 V
0
1
1
1
1
0
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
0
1
1.2000 V
1
0
0
0
0
0.0000 V
1
1 0.4875 V
111
1
3
0.5625 V
VID(6:0)
0 0.2125 V
1
0
1
1
1
1
0
0
0
1.2375 V
0
0
0
1
1
1
1
1
0
1
0
0
1
0.9250 V
1.3875 V
1
1
0.0000 V
0
1
1
1
0
1
1
1
1
1
1
0
0
0.6750 V
1
0
1
1
0
0
0
0
1
1.1000 V
0
0
1
from each of the VCC/VSS test point vias.
0
1
0
1
0
EXCEPT AS AUTHORIZED BY SAMSUNG.
0
1
1
0
0
0.4250 V
0
0
1
1
0 or 1
0
1
0
0
0
0.9000 V
1
0
0
1 0.9875 V
1
1
0
0
1
1
1
1.2875 V
1
0
0
0
1
1
0
0
1
1
1
0
Dual Mode Region
1
0
1
0
4
0
1
0
1
1
1
1
1
0
1
1
0
0
1
1
1
1
1 0.3000 V
0
1
1
1
0
1
0
1
1.3250 V
1
1
0
0.9625 V
1
1
0
0
0
1.2500 V
0
1
1
0
1
1
1.4000 V
0.0500 V
0.3625 V
1
0
1
0
1
0
A
0
0
1
00.7375 V
0
11
1
1
1
1
1.0125 V
1
1
0
0
1
1.3625 V
1
0.5750 V
1
0
0
1.0000 V
0
1
1
0
0
1
1.0250 V
0
1
1
0
0
0
1
0
0
0
1
1
GTLREF : Keep the Voltage divider within 0.5"
1
1
1
0
1.4750 V
1
1
0
1
1.1125 V
1
1
1
0
0.3375 V
1.4500 V
11
D
PROPRIETARY INFORMATION THAT IS
0 1
D
00
0
1
1
1
1
Active/Deeper Sleep
C
0
1.1250 V
1
0
1
0
0.3125 V
0
1
1
IMVP-6
0
1
0
1
0
1
0
1
1
0
1
0
PSI2*
1
1
1
0
1.4125 V
Deeper Slp
1
0
0.1125 V
0
0
0.3875 V0
1
0
0
1
0.4625 V
1
1
0.5875 V
0
1.1375 V
0
1
B
1
0
1.2125 V
0
10.6250 V
1
0
0
0
0
1
0
1
1
1.4375 V
1
0
1.4875 V 0
0
0
1
1
0
0
1
0.7875 V
1
1
0
0
0
0 1
0
1
0
1.0500 V
0
1
0
0
0
1
1
0.9375 V
0
0
1
1
0
1
1
0
0
1
0
1
1
0.7750 V
1
0
0
1
1
0
1 1.1500 V
1.0875 V
Active Mode
0
1
0
1
C
0
1
0
1.2625 V
0
0
0
1
0
0
0.3250 V
1
0.0625 V
0.9125 V
1
0
1
1
1
0
1
1.0750 V
0
0.7625 V
0
1
0.0125 V
Deeper Sleep/Extended Deeper Sleep
1
1
0
0
0
1
0.0875 V
1
1
0
0
0
1
0
0
0
1
0
1
0
0
1
0
0
0
0
1
0
0
0.1375 V
1
0.0000 V
1
1
0.0000 V
0
0.4000 V
1
0.0000 V
1
0
0
0
0
1
1
1
DPRSTP*
1
1
1
1
0.2750 V
1
0
0
1
1
0.7000 V
1
0
0
1
0
0.6875 V
1.2750 V
0
1
0
1
2
0
0.0000 V
0
1
0
110
0
1
0
0.6500 V
1
0.8375 V
0
01
0
0
1
1
0
Dual Mode Region
0
1
0
0
4
0
1
1
1
0
0.3500 V
1
1
0
0
0
0
0
1
1
1
0.4500 V
0
0.2625 V
0
0
1
0
1.0375 V
0.0250 V
0
1.1875 V
1
1
1
0
PSI2*
1
1
1
1
1
0
1
0
0.2250 V
1
0.1500 V
1
0
Voltage
0
0
1
1
1
0
0
1
0
0
0
1
0
1
0
1
0
0
1
1
0
1
0.1625 V0
0
0.6000 V
1
1
1
1
0
1
0
0
0.7125 V
1
0
1
0
0.8500 V
1
0
0
1
0
1
0 or 1
0
1
1
0
0
0
0
1
1
SAMSUNG
0
0
0
0
0
0
1
1
0
0
1
0
0.6375 V
1
0
0
0.5250 V
0
1
1
1.2250 V
0
1
0
0
1
1
1
0
(preferred 50mil) from any other signal. And GND via 100mil away
0
0.4750 V
0
near the CPU
0
0
1
0
0
0
0
0
1
1
0
0
0
0
1
1
0
0
0
1
1
0
0.8125 V
0
0
1
1
1
0
1
0
0
1
0
0.0750 V
1
1
1
1
0
1
1
1
1
1
0.5000 V
1
1
1
0.6125 V
1
0.2375 V
1
0
0.0000 V
0
1
0
1
1
1
1
1
0.5125 V1
0
1
0
0.2500 V
0
1
1
Active
1
1
1
A
0
COMP0,2(COMP1,3) should be connected with Zo=27.4ohm(55ohm)
1
1
0
1
1
0
0
0
1
0
1
Minimize coupling of any switching signals to this net.
0
0
0
0
0
0
0
1
1
0
0
1
1
0.5500 V
0
1
0.0375 V
0
0
1
0
1
0
1
0
0
000
1
0.8875 V
1
0
0
0
0
1
1
1
0
0.8250 V
1
1.5000 V
1
1
SAMSUNG ELECTRONICS CO’S PROPERTY.
1
0
1
1
3
0
0
1
1
0
1
0
1
0
0
0
1
1
0
1
1
0
0
1
0
0
0
1
1
1
0
Observe 3:1 spacing b/w VCC/VSSsense lines and 25mil away
0
0
1
2
0
1
1
0
0
1
0
1
0
0
1
ELECTRONICS
0
0
0
1
0.4125 V
1.3000 V
1
0
1
0
0
1
0.2875 V
1
1
1
1
0
0.8750 V
0.5375 V
0
0
0.3750 V
1
0
0
0
VID(6:0)
*"1111111" : 0V power good asserted.
0
1
1
1.3125 V
1
1.4625 V
0
1
1.1625 V
1
0
1
0
1
1
1
0
EC12
220uF
2.5V
AD
#311-D38-C1
10V
C244
100nF
TP2495
P1.05V
6
P1.5V
4
56
R176
R244
1%27.4
P1.05V
0
5
27.4 1%
R165
100nF
C243
10V
P1.05V
R590
54.9
1%
P1.05V
1%
R592
54.9
2
6.3V
1
C586
10000nF
1%
R162
1K
100nF
C245
10V
8-C1 11-C3 #3
R589
54.9 1%
R591
54.9
nostuff
R167
1K 1%
10V
C360
100nF
1%
R245
54.9
25V
C587
10nF
1%54.9
AE7
VSSSENSE
R164
J21
VCCP_8
M21
VCCP_9
AF7
VCCSENSE
VID_0
AD6
VID_1
AF5
VID_2
AE5
VID_3
AF4
VID_4
AE3
VID_5
AF3
VID_6
AE2
R21
VCCP_12
V21
VCCP_13
W21
VCCP_14V6VCCP_15
G21
VCCP_16
J6
VCCP_2M6VCCP_3N6VCCP_4T6VCCP_5R6VCCP_6
K21
VCCP_7
C7
THERMTRIP#
THRMDA
A24
THRMDC
B25
AB5
TMS
AB6
TRST#
B26
VCCA_1
C26
VCCA_2K6VCCP_1
N21
VCCP_10
T21
VCCP_11
AA6
TDI
AB3
TDO
C23
TEST1
TEST2
D25
C24
TEST3
AF26
TEST4
AF1
TEST5
A26
TEST6C3TEST7
RSVD_1M4RSVD_2N5RSVD_3T2RSVD_4V3RSVD_5B2RSVD_6D2RSVD_7
D22
RSVD_8D3RSVD_9
F6
D7
SLP#
AC5
TCK
DBR#
C20
E5
DPRSTP#B5DPSLP#
D24
DPWR#
AD26
GTLREF
PRDY#
AC2
PREQ#
AC1
D21
PROCHOT#
AE6
PSI#D6PWRGOOD
AD3
BPM2#
AD1
BPM3#
AC4
BSEL0
B22
BSEL1
B23
BSEL2
C21
R26
COMP0
U26
COMP1
COMP2
AA1
Y1
COMP3
0143854500
CPU500-3
PENRYN
BCLK0
A22
BCLK1
A21
BPM0#
AD4
BPM1#
35-C1
1%
R163
2K
nostuff
1%1K
R166
3
100nF
C359
10V
CPU1_TCK
CPU1_TDI
CPU1_TMS
CPU1_TRST#
ITP3_DBRRESET#
CPU1_TCK
CPU1_TDI
CPU1_TMS
CPU1_TRST#
CPU1_BSEL0
CPU1_BSEL1
CPU1_BSEL2
10V
C358
100nF
CPU1_VCCSENSE
CPU1_PSI#
CPU1_DPWR#
CPU1_THRMTRIP#
CPU2_THERMDC
CPU2_THERMDA
CPU1_DPRSTP#
CPU1_VSSSENSE
CPU1_SLP#
CPU1_DPSLP#
CPU1_PWRGDCPU
CLK0_HCLK0#
CLK0_HCLK0
CPU1_VID(6:0)
- This Document can not be used without Samsung's authorization -
8. Block Diagram and Schematic
8-23
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