4
SAMSUNG PROPRIETARY
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
EXCEPT AS AUTHORIZED BY SAMSUNG.
4 1
HABANA-C
CPU :
Chip Set :
Remarks :
Model Name :
PBA Name :
PCB Code :
Dev. Step :
Revision :
T.R. Date :
DRAW
DS.JIANG
Intel Dothan -2M
RC410MD & SB450
Mobility Platform
HABANA-C
MAIN
BA41-00615A
PRR
1.0
2005.12.26
CHECK
DJ.XU
APPROVAL
KEVINLEE
3 1
3
2
2
Table of Contents
Sheet 1. COVER
Sheet 2 - 7. DIAGRAM (Block/Power) & ANNOTATIONS
Sheet 8. CLOCK GENERATOR
Sheet 9 - 11. DOTHAN
Sheet 12. THERMAL SENSOR / FAN CONTROL
Sheet 13 - 17. RC410MD
Sheet18. DDR II SODIMM
Sheet19. DDR TERMINATION
Sheet20 - 23. SB450
Sheet24. SB450 STRAPS
Sheet25. FWH
Sheet26. LCD
Sheet27. CRT AND TV CONN
Sheet28-29. CARDBUS
Sheet30. EXPRESS CARD
Sheet31. MINIPCI
Sheet32-34. AUDIO
Sheet35. HDD AND ODD
Sheet36. MICOM
Sheet37. S I/O
Sheet38-39. LAN
Sheet40. LAN AND MDC CONN
Sheet41. BOARD CONN
Sheet42. CHARGE
Sheet43. P3.3V _AUX AND P5V_AUX
Sheet44. P1.2V AND VCCP
Sheet45. DDR2 POWER
Sheet46. CPU VRM
Sheet47. SWITCH POWER
Sheet48. P1.8V_ALW
Sheet49. POWER STRAPS
Sheet50. 1394 BOARD
Sheet51. USB BOARD
Sheet52. TOUCH PAD BOARD
Sheet53-55. TP
D
D
C
C
B
B
Owner :
4
4
SESC R & D
Signature :
A
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4
D
C
PG 27
PG 27
CRT/TV
CRT
TV
SVHS / HDTV
PG 26
LCD
LVDS
30P
CPU
Thermal
Sensor
PG 12
Internal Graphics
Clocking
CK-410M
64 PIN
PG 8
3
FAN
PG 12
Mobile Processor
Dothan - 2M
(533MHz)
L2 Cache : 2 MB
PG 9,10,11
478pin
PSB
667 MT/S
GMCH-M
RC410MD
707 FCBGA
PG 13 ~ 17
Direct Media Interface
x4/x2, 1.5V
CPU
VRM
IMVP-5
PG 46
Single channel
2
DDR II 667/533
Wireless LAN
CONN.
Mini PCI
PG 31
33MHz, 3.3V PCI
ANT
DDR II
Thermistor
PG 16
DDR II
SODIMM 0
DDR II
SODIMM 1
PG 18
PG 18
PG 28 ~ 29
CARDBUS Module
Charging
Circuit
PG 42
DDR II
VRM
PG 45
CARDBUS
R5C841
R5532V002
1
Switche PWR
PG 47
SD/xD/MS
CardBus
EEPROM
1394
4 pin
PG 30
PG 30
PG 30
PG 29
D
C
PG 41
PG 38
AUDIO
USB 0,1,2,3
ANT
Audio
AMP
PG 33
B
PG 34
AZALIA
Codec
AD1986B
PG 32
HP & SPDIF.
MIC-IN
RJ11
PG 40
AZALIA
MDC
Modem
12P
PG 40
USB 0,1,2,3
AZALIA Primary
AZALIA Secondary
SB450
564 BGA
PG 20 ~ 23
PCIE x1
USB 4
PCI
Lane 2
26P
PG 36
Express Card
BCM
5751(4401)
PG 38~39
PG 30
RJ45
PG 40
B
FWH
2P
2P
Pri. IDE slave
3
SATA
PATA
3.3V LPC, 33MHz
HDD
PG 35
S-ATA
SPKR R
HDD
PG 35
SPKR L
U-ATA 100
A
Pri. IDE master
CD-ROM
PG 35
4
SST49LF008A
PG 25
MICOM
Hitachi H8S
HD64F2169/2160
PG 36
2
PG 52
Touch
PAD
KBD
PG 41
A
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Power Diagram
1
D
KBC3_SUSPWRON
KBC3_PWRON
AC Adapter
VDC
P12V_ALWS
P5V_ALWS
P3.3V_ALWS
P1.5V
P1.8V P1.8V_AUX
KBC3_VRON
YONAH
P1.05V
(VCCP)
NB
SB
VCCP3_PWRGD
VCC_CORE
YONAH
D
Battery DC
C
MICOM_P3V
P1.8V_ALW
P5V_AUX
KBC3_LANPWRON
P3.3V_LAN
P3.3V_AUX
B
P0.9V
P5V
P3.3V
P2.5V_LAN
C
B
P1.2V_LAN
Rail
+V*Always
State
Full On ON
ON H
S3
S4
ON
ON OFF
S5
A
+V*AUX
ON
ON OFF
ON
OFF
4
+V
SUSPWR
ON
HH
OFF L
H
L
PWRON
L
L
S5 / S4
VRON
H
L
L
L
S0
VCC_NB
P1.2V
A
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P1.2V
S3
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3
POWER SEQUENCE
2
D
ADT3_SEL
MICOM_P3V
KBC3_RST*
P1.8V_ALW
P5V_ALWS
PRTC_BAT
T1=
T2=
T3=
T4=
T5=
T6=
D
KBC3_PWRSW*
VDC
KBC3_LANPWRON
P3.3V_LAN
KBC3_SUSPWRON
C
P5V_AUX/P3.3V_AUX/P1.8V_AUX
KBC3_RSMRST*
MEM1_VREF
KBC3_PWRBTN*
CHP3_SLPS5*
CHP3_SLPS3*
KBC3_PWRON
P5V/P1.8V/P1.5V/P0.9V
KBC3_VRON
VCCP
B
A
P1.2V/VCC_NB
VCCP3_PWRGD
VCC_CORE
VRM3_CPU_PWRGD
KBC3_CLKPWRGD*
KBC3_NBPWRGD
KBC3_SBPWRGD
CPU1_PWRGDCPU
CHP3_ALINK_RST*
PCI3_RST*
CPU1_CPURST*
T7=112ms
T8=444us
T9=504us
T10=32us
T11=380uS
T12=776us
T13=120.8ms
T15=130ms
T16=174ms
T14=130ms
T24=15.12ms
T25=25.04ms
T26=136ms
T17=158.4us
T18=21.4ms
T19=1.5ms
T20=1.86ms
T21=2.34ms
T22=3.88ms
T29=188ms
T29=188ms
C
B
T23=5.02ms
T27=184ms
T28=187.2ms
A
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3
2
POWER RAILS ANALYSIS
1
D
C
ADAPTER
220V
19V
MAX1909ETI+T
BATTERY
MMBT3904
MAX1999EEI+T
P12V_ALWS
P5V_ALWS
SS338A
MAX8550ETI+T
P3.3V_LAN
P1.8V_AUX
P1.5V
P0.9V
FDS6680A
FDS6680A
D
C
P1.8V
P3.3V
P3.3V_AUX
P5V_AUX
B
ISL6227CAZ-T
SI4435DY
P5V
LTC3735
VCCP
VCC_CORE
B
P1.2V
VCC_NB
P3V_ALWS
MICOM_P3V
MIC5219B
P1.8V_ALW
A
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ELECTRONICS
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3 2
1
D
CLK0_HCLK0
CLK0_HCLK0*
DOTHAN
D
CLK0_HCLK1
CLK0_HCLK1*
CLK1_PCIEICH
CLK1_PCIEICH*
RC410MD
CLK3_NB14M
CLK3_33M_MIN
CLK1_PCIERCLK
C
CLK1_PCIERCLK*
CLK3_USB48
RS450
CLK3_ICH14
CLOCK GENERATOR
CLK1_PCIELOM
CLK1_PCIELOM*
BCM5751
(BCM4401)
CLK3_PCLKLAN
CLK3_PCLKCB
CLK3_PCLKSIO_DS
CLK3_PCLKSIO
CLK3_PCLKFWH
CLK3_PCLKMICOM
25MHz
25MHz
MINIPCI
BCM5751
R5C843
LPC
FWH
MICOM
C
10MHz
CLK1_EXPCARD
B
CLK1_EXPCARD*
EXP CARD
B
EXP3_CLKREQ*
CLK3_FM48
CLK3_SIO14
A
4
14.318 MHz
3
R5C843
LPC47N
24.576MHz
2
A
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PROPRIETARY INFORMATION THAT IS
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SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
3
3
SCHEMATIC ANNOTATIONS AND BOARD INFORMATION
D
D
PCI Devices
Devices
Cardbus
LAN
MINIPCI
USB
Hub to PCI
LPC bridge/IDE/AC97/SMBUS
Internal MAC
AC Link
IDSEL# REQ/GNT#
AD24
AD21
AD23 2
AD30(internal)
AD31(internal)
AD31(internal)
AD31(internal)
-- -
0
1
-
-
-
-
-
Voltage Rails
VCC_CORE
VCCP
VCC_NB
C
C
B
B
P1.2V
P1.5V
P1.8V
P0.9V
P5V
P3.3V
P2.5V_LAN
P1.2V_LAN
P5V_AUX
P3.3V_LAN
P3.3V_AUX
P12V_ALWS
P5V_ALWS
P3.3V_ALWS
MICOM_P3V
P1.8V_ALW
VDC
2
I C / SMB Address
Devices
SB450
EMC6N300(CPU Thermal Sensor)
SODIMM0
SODIMM1
CK-408 (Clock Generator)
CPU
CPU RC410MD SB450
RC410MD
RC410MD VCC_NB
CPU EXPCARD
RC410MD SB450 R5C843
DDR2
FAN THERMAL CRT SB450 R5C483 MINIPCI AD1986B HDD ODD MICOM USB TOUCH-PAD VCC_CORE
SYSTEM POWER
BCM5751
BCM5751
DDR2 P1.8V RC410MD P1.8V_AUX
THERMAL LCD P1.2V P5V
LCD BCM5751 P3.3V
MDC MICOM MINIPCI EXP-CARD SB450 THERMAL
VCC_NB P1.5V P3.3V P1,8V
P3.3V DDR2-PWR
MICOM_P3V
THERMAL SB450 MICOM LED P1.8V_ALWS
SB450
Primary DC system power supply (7 to 21V)
Address
Master
1001 110X
1010 0000
1010 001X
1101 001x
Hex
9Ch
A0h
A2h
D2h
USB PORT Assign
PORT NUMBER
0
1,2
4
ASSIGNED TO
SYSTEM PORT A
SYSTEM PORT B
SYSTEM PORT C 3
EXPRESS CARD
Interrupts
E,F,G
C
A,B
-
-
-
-
--
-
Bus
SMBUS Master
Thermal Sensor
-
Clock, Unused Clock Output Disable
2
2
Crystal / Oscillator
TYPE
Crystal
Crystal CLOCK-Generator
Crystal LAN
FREQUENCY
32.768KHz
10MHz Crystal
14.318MHz
24.576MHz Crystal Cardbus Controller 1394
25MHz
DEVICE
SB450
MICOM
CPU Core Voltage Table
VID(5:0)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
0
0
1
0
0
0
01
0
-
0
1
1
0
0
0
1
0
0
0
1
0
0
0
0
1
0
0
1
0
1
0
0
1
1
0
1
0
1
0
0
1
0
1
10
0
00
0
1
0
0
0
1
0
0
0
0
0
1
10
0
0
1
1
0
0
11
0
0
1
1
0
1
0
1
00
1
0
1
1
00
01
1
0
1
0
1
1
0
1
1
01
1
1
1
0
1
1
1
1
0
1
1
Voltage
1.708 V
0
0
1.692 V
0
1
1.676 V
1
0
1
1
1.660 V
0
1.644 V
0
0
1.628 V
1
0
1
1.612 V
1.596 V
1
1
1
1
0
0
1.580 V
1
1.564 V
0
1
0
1.548 V
1.532 V
1
1
1.516 V
0
0
1
1.500 V
0
1
1.484 V
0
1
1.468 V
1
0
0
1.452 V
0
1.436 V
1
101.420 V
0
1
1.404 V
1
1.388 V
0
0
1.372 V
1
0
1.356 V
0
1
1
1.340 V
1
1
1
1.324 V
0
0
1
0
1.308 V
0
1
1.292 V
1 1.276 V
1
1.260 V
0
0
1
1.244 V
1
0
1.228 V
1.212 V
1
1
HFM Voltage
770:1.26V->1.372V
730,740,750,760:1.26->1.356V
VID(5:0)
0
1
0
1
0
1
0
1
0
1
0
1
1
0
-
1
0
1
0
1
0
1
1
0
1
0
0
1
0
1
0
1
0
1
1
1
1 1
1
1
1
1
1 1
1 1
1
1
1
1
1 1
1
1
1 1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0 0
0
0
0
0 0
1
1
1
1 0
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
1
1
1
1
1
0
0
0
0
1
1
1
1
USAGE
Real Time Clock
HD64F2169/2160
CK-410M
LOM
0
0
1
0
0
1
1
1
0
0
1
0
1
0
1
1
0
0
1
0
1
0
1
1
0
0
1
0
1
0
1
1
1
0
0
1
1
1 1
0
1
0
0 1
1
1
1
0
1
0
101
0
0 1
0
1
1
0
1
1
Voltage
1.196 V
1.180 V
1.164 V
1.148 V
1.132 V
1.116 V
1.100 V
1.084 V 1
1.068 V
1.052 V
1.036 V
1.020 V
1.004 V
0.988 V
0.972 V
0.956 V
0.940 V
0.924 V
0.908 V
0.892 V
0.876 V
0.860 V
0.844 V
0.828 V
0.812 V
0.796 V
0.780 V
0.764 V
0.748 V
0.732 V
0.716 V
0.700 V
1
1
Lowest Freq.
D
D
C
C
B
B
System Power States
A
A
CHP3_SLPS1* S1, Powered-On-Suspend(POS) : In this state, all clocks(except the 32.768KHz clock) are stopped.
CHP3_SLPS3* S3, Suspend-To-RAM(STR) : The system context is maintained in system DRAM, but power is shut off to non-critical circuits.
CHP3_SLP4S* S4, Suspend-To-Disk(STD) : The Context of the system is maintained on the disk. All power is then shut off to the system except for the logic required to resume.
CHP3_SLPS5* S5, Soft Off(SOFF) : System context is not maintained. All power is shut off except for the logic required to restart. A full boot is required when waking.
The system context is maintained in system DRAM. Power is maintained to PCI, the CPU, memory controller, memory, and all other criticial subsystems.
Note that this state does not preclude power being removed from non-essential devices, such as disk drives. During this state, CPU can be selected
for either Deep Sleep or Deeper Sleep.
In Deeper Sleep, CPU voltage reduced in this state to reduce the leakage power.
Memory is retained, and refreshes continue. All clocks stop except RTC clock.
Externally appears same as S5, but may have different wake events.
3
4
4
3
A
A
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1
FSA
D
CPU
BSEL0 BSEL1
0
0
0
0
1
1
1
1
FSB
400MHz
533MHz R121,R141,R113
FSC
FSB
BSEL2
0
0
1
0
1
0
1
1
0
0
0
1
0
1
1
1
STUFF
R119,R141,R113
R119,R140,R112
C
B
HOST CLK
266 MHz
333 MHz
200 MHz
400 MHz
133 MHz
100 MHz
166 MHz
RSVD
R121,R140,R112
NO STUFF
TP377
R201
2
14.31818MHz
Y1
C247
0.022nF
R197
R196
R195
R194
R192
R191
R223
R221
R228
R226
R232
R229
R199
R198
33
1%
GIGA_MODEL
P3.3V
100nF
C210
NO_STUFF
NO_STUFF
NO_STUFF
NO_STUFF
1%
33
33
1%
1%
33
1%
33
33
1%
33
1%
1%
33
1%
33
GIGA_MODEL
33
1%
1%
33
1%
33
1%
33
1%
33
P3.3V
B20
C186
MMZ1608S121AT
10000nF
6.3V
Route all CLK1 signal as different pair rule
R238
R237
R233
R168
1%
1%
1%
1%
49.9
R225
49.9
R227
1%
49.9
R222
49.9
R224
49.9
R230
1%
49.9
R231
4.7K
4.7K
R162
4.7K
10-D3
CLK0_HCLK0
10-D3
CLK0_HCLK0*
16-B4
CLK0_HCLK1
16-B4
CLK0_HCLK1*
CLK1_PCIEICH
14-B3
CLK1_PCIEICH*
14-B3
CLK1_PCIERCLK
20-D3
38-D3
38-D3
30-C3
30-C3
30-C4
29-B? 54-B3
10-C3 54-D2 14-B4 10-D1
37-B2 54-B2
23-C3 54-B2
1%
1%
CLK1_PCIERCLK*
CLK1_PCIELOM
CLK1_PCIELOM*
CLK1_EXPCARD
CLK1_EXPCARD* CHP3_CPUSTP*
EXP3_CLKREQ*
CLK3_FM48
CPU1_BSEL2
CPU1_BSEL1
CLK3_NB14M
CLK3_SIO14
CLK3_ICH14
55-B3 20-D3
33
1%
1%
33
R200
R167
1%
1%
1%
1%
1%
49.9
49.9
49.9
49.9
49.9
R163
R165
R164
R161
R160
1%
49.9
R166
16-C1 10-C3 10-D1 54-D2
33
33
NO_STUFF
54-A2 23-D2
54-B2 16-B4
Pt decoupling CAPS close to ICS951411 power pin
100nF
100nF
100nF
100nF
100nF
C208
C209
C187
C245
C211
P3.3V
B28
MMZ1608S121AT
C246
100nF
16V
TP382
1M
1%
1
C214
0.022nF
KBC3_CLKPWRGD*
SMB3_CLK
SMB3_DATA CLK3_USB48
36-C1 36-B2
20-B3 46-C4 55-B4
#8
R235
#8
R236
R193
475
1%
U15
ICS951411BG
45
VDDCPU
35
VDD_SRC
32
VDD_SRC1
21
VDD_SRC2
14
VDD_SRC3
3
VDD_48
51
VDD_PCI
56
VDD_REF
44
VSS_CPU
36
VSS_SRC
31
VSS_SRC1
26
VSS_SRC2
20
VSS_SRC3
15
VSS_SRC4
5
VSS_48
49
VSS_PCI
55
VSS_REF
1
XIN
2
XOUT
6
VTTPWRGD*_PD
48
CPU_STP*
TP378
7
0
SCLK
8
0
SDATA
37
IREF
PCIF0_CK410*
100nF
100nF
C213
C212
VDDA
VSSA
CPUT0
CPUC0
CPUT1
CPUC1
CPUT2
CPUC2
SRCT0
SRCC0
SRCST0
SRCSC0
SRCST1
SRCSC1
SRCT1
SRCC1
SRCT2
SRCC2
SRCT3
SRCC3
SRCT4
SRCC4
SRCT5
SRCC5
CLKREQ0
CLKREQ1
USB_48
FSC
REF1_FSB
REF0_FSA
REF2
MMZ1608S121AT
B24
C207
10000nF
6.3V
39
38
47
46
43
42
41
40
34
33
30
29
27
28
24
25
22
23
18
19
16
17
12
13
10
11
4
50
9
53
54
52
D
C
B
Place all te serias termination resistor as clos as ICS951411 as possible
A
SAMSUNG
ELECTRONICS
4
3
2
1
A
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
3
2
1
D
D
VCCP
R78
HIT*
54-B3
56.2
C61
220pF
NO_STUFF
CPU1_D*(15:0)
CPU1_DBI0*
CPU1_DSTBN0*
CPU1_DSTBP0*
CPU1_D*(31:16)
CPU1_DSTBN1*
CPU1_DSTBP1*
13-C3 54-B3
N2
L1
54-D2
J3
N4
A7
M2
L4
H2
K3
54-B3
K4
A4
B5
J2
M3
B11
L2
K1
H1
C2
D3
A3
D1
D4
B4
C6
220pF C64 50V
220pF C63 50V
220pF C50 50V
13-C3
13-C3 54-B3
13-B3 54-D2
13-C3 54-C255-D4
13-C3
13-C3 54-C2
13-B3
13-B3 54-C2
10-A2 54-C2 20-A3
13-C3 54-C2113-C3 54-C2
13-B3 55-B4
13-B3 54-B3
13-B3 54-B3
13-B3 54-B3
10-A2 20-A3 54-A2
10-A2 20-A3 54-C2
10-A2 20-A3 55-D4
10-A2 20-A3 54-B3
10-A2 20-A3 54-C4
10-A2 20-A3
220pF C49 50V
220pF C65 50V
NO_STUFF
220pF C62
CPU1_ADS*
CPU1_BNR*
CPU1_BPRI*
CPU1_BREQ*
CPU1_DBSY*
CPU1_DEFER*
CPU1_DRDY*
CPU1_HIT*
CPU1_HITM*
CPU1_INIT*
CPU1_LOCK*
CPU1_TRDY*
CPU1_CPURST*
CPU1_RS2*
CPU1_RS1*
CPU1_RS0*
CPU1_A20M*
CPU1_FERR*
CPU1_IGNNE*
CPU1_INTR
CPU1_NMI
CPU1_SMI*
10-A2 20-A3 55-D3
CPU1_STPCLK*
13-D1
13-D1
13-D1
13-D1
13-D1
13-C1
13-C1
13-C1
15
14
13
12
11
10
9
8
7
6
5
4
3
2
0
31
30
29
28
27
26
25
23
22
21
20
19
18
17
16
CPU600-1
DOTHAN_YONAH
CPU1_A*(16:3)
CPU1_ADSTB0*
C
CPU1_REQ*(4:0)
CPU1_A*(31:17)
CPU1_ADSTB1*
13-D3
13-D3
13-D3
13-D3
13-C3 13-A1
16
15
14
13
12
11
10
9
8
7
6
5
4
3
4
3
2
1
0
31
30
29
28
27
26
25 24
24
23
22
21
20
19
18
17
AA2
AA3
AF1
AE1
AF3
AD6
AE2
AD5
AC6
AB4
AD2
AE4
AD3
AC3
AC7
AC4
AF4
AE5
1 / 4
A16*
Y3
A15*
A14*
U1
A13*
Y1
A12*
Y4
A11*
W2
A10*
T4
A9*
W1
A8*
V2
A7*
R3
A6*
V3
A5*
U4
A4*
P4
A3*
U3
ADSTB0*
T1
REQ4*
P1
REQ3*
T2
REQ2*
P3
REQ1*
R2
REQ0*
A31*
A30*
A29*
A28*
A27*
A26*
A25*
A24*
A23*
A22*
A21*
A20*
A19*
A18*
A17*
ADSTB1*
BPRI*
DBSY*
DEFER*
DRDY*
ADDR GROUP 0
HITM*
IERR*
LOCK*
TRDY*
RESET*
A20M*
FERR*
IGNNE*
LINT0
ADDR GROUP 1
LINT1
LEGENCY CPU
STPCLK*
ADS*
BNR*
BR0*
DBR*
INIT*
RS2*
RS1*
RS0*
SMI*
B
CPU600-2
DOTHAN_YONAH
2 / 4
C25
D15*
E23
D14*
B23
D13*
C26
D12*
E24
D11*
D24
D10*
B24
D9*
C20
D8*
B20
D7*
A21
D6*
B26
D5*
A24
D4*
B21
D3*
A22
D2*
A25
D1*
A19
D0*
D25
DINV0*
C23
DSTBN0*
C22
DSTBP0*
K25
D31*
N25
D30*
H26
D29*
M25
D28*
N24
D27*
L26
D26*
J25
D25*
M23
D24*
J23
D23*
G24
D22*
F25
D21*
H24
D20*
M26
D19*
L23
D18*
G25
D17*
H23
D16*
J26
DINV1*
K24
DSTBN1*
L24
DSTBP1*
DATA GRP 2
DATA GRP 0 DATA GRP 1
DINV2*
DSTBN2*
DSTBP2*
DATA GRP 3
DINV3*
DSTBN3*
DSTBP3*
D47*
D46*
D45*
D44*
D43*
D42*
D41*
D40*
D39*
D38*
D37*
D36*
D35*
D34*
D33*
D32*
D63*
D62*
D61*
D60*
D59*
D58*
D57*
D56*
D55*
D54*
D53*
D52*
D51*
D50*
D49*
D48*
Y25
AA26
Y23
V26
U25
V24
U26
AA23
R23
R26
R24
V23
U23
T25
AA24
Y26
T24
W25
W24
AF26
AF22
AF25
AD21
AE21
AF20
AD24
AF23
AE22
AD23
AC25
AC22
AC20
AB24
AC23
AB25
AD20
AE24
AE25
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
13-D1
13-B1
13-B1
13-B1
13-D1
13-A1
13-A1
CPU1_D*(47:32)
CPU1_DBI2*
CPU1_DSTBN2*
CPU1_DSTBP2*
CPU1_D*(63:48)
CPU1_DBI3* CPU1_DBI1*
CPU1_DSTBN3*
CPU1_DSTBP3*
C
B
FOR NOISE REDUCTION
**NOTE
MT610
RMNT-25-45-1P
MT613
RMNT-25-45-1P
RHE SUPPORTER
MT609
RMNT-25-45-1P
A
4
MT612
RMNT-25-45-1P
A
SAMSUNG
ELECTRONICS
2
1 3
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D
CPU1_PWRGDCPU
4
VCCP
R68
200
55-B3 20-A3
CLK0_HCLK0
CLK0_HCLK0*
CPU1_SLP*
CPU1_DPSLP*
CPU1_DPRSTP*
CPU1_DPWR*
CPU1_VID(5:0)
8-C1
8-C1
10-A2 20-A3 54-B3
10-B2 55-B4
THERTRIP* should connect to ICH6M & Alviso w/o T-ing
CPU1_PROCHOT*
CPU2_THERMDA
VCCP
CPU2_THERMDC
46-C4
CPU1_THRMTRIP*
CPU1_BSEL1
CPU1_BSEL2
200 R69
0.5’’ max length
NO_STUFF
NO_STUFF
VCCP
R116
1K
CPU1_PSI*
1%
TP434
C
R117
2K
1%
1%
54.9
1%
27.4
1%
54.9
27.4
1%
1K
1K
12-A3 55-B3
12-C2 55-D3
8-B1 10-D1 16-C1 54-D2
B
Std Voltage Dothan with 533MHz FSB updates
VCC(High Frequence Mode) = 1.26 V - 1.356 V(VID values)
TDP(High Frequence Mode) = 27W (no charge)
VCC(Lowest Frequence Mode) = 1.052V(VID value)
TDP(Lowest Frequence Mode) = 13.8W
GND test points within 100mil of the VCC/VSS sense at the end of the line
Route the VCC/VSS sense as a Z0=55ohm trace with equal length
A
Observe 3:1 spacing b/w VCC/VSS sense lines and 25mil away
(prefered 50mil) from any other signal. And GND Via 100mil away
from each of the VCC/VSS test point vias
R67
R66
R119
R118
R74
R120
3
2
1
P1.5V
CPU600-3
DOTHAN_YONAH
3 / 4
B15
BCLK0
B14
BCLK1
A16
ITP_CLK0
A15
ITP_CLK1
A6
SLP*
B7
55-D4 20-B3 10-A2
54-C2 13-C3
55-D4 46-B1 46-A2
55-D3 12-C2
55-B3 12-A4
54-D2 14-B4 10-D1 8-B1
1%
1%
54.9
54.9
DPSLP*
G1
DPRSTP*
C19
DPWR*
E4
PWRGOOD
5
H4
VID5
4
G4
VID4
3
G3
VID3
2
F3
VID2
1
F2
VID1
0
E2
VID0
B17
PROCHOT*
B18
THERMDA
A18
THERMDC
C17
THERMTRIP*
C14
BSEL1
C16
BSEL0
E1
PSI*
AD26
GTLREF0
AB1
COMP3
AB2
COMP2
P26
COMP1
P25
COMP0
AE7
VCCSENSE
AF6
VSSSENSE
B2
NC1_RSVD1
C3
RSVD2
AF7
RSVD3
AC1
RSVD4
E26
RSVD5
C5
TEST1
F23
TEST2
HCLK PWR MGMT VID THERM MISC
MAX. 100MIL LENGTH
R64
R65
NO_STUFF
NO_STUFF
NO_STUFF
NO_STUFF
NO_STUFF
NO_STUFF
NO_STUFF
NO_STUFF
NO_STUFF
R49
1%
56
390
390
200
1%
390
390
390
390
390
1%
200
CHP3_DPRSLPVR
VCCP
R70
R77
R75
R93
R71
R73
R76
R72
R79
R90
VCCA3
VCCA2
VCCA1
VCCA VCCP XDP/ITP
VCCA0
VCCP1
VCCP2
VCCP3
VCCP4
VCCP5
VCCP6
VCCP7
VCCP8
VCCP9
VCCP10
VCCP11
VCCP12
VCCP13
VCCP14
VCCP15
VCCP16
VCCP17
VCCP18
VCCP19
VCCP20
VCCP21
VCCP22
VCCP23
VCCP24
VCCP25
VCCQ1
VCCQ0
PREQ*
PRDY*
BPM3*
BPM2*
BPM1*
BPM0*
TRST*
TP1179
470
55-C3 46-B2 20-A3
TDO
TMS
TCK
TDI
AC26
N1
B1
F26
D10
D12
D14
D16
E11
E13
E15
F10
F12
F14
F16
K6
L5
L21
M6
M22
N5
N21
P6
P22
R5
R21
T6
T22
U21
W4
P23
B10
A10
C9
A9
B8
C8
A13
C12
A12
C11
B13
VCCP
R51
470
TP1180
3
1
2
54-C2 20-A3 9-C3
54-B3 10-D3 20-A3
54-B3 9-B3 20-A3
54-B3 9-B3 20-A3
55-D4 9-B3 20-A3
BC13
BC12
100nF
10000nF
6.3V
VCCP
10V
one 0.1uF & 10uF cap for each VCCA pin.
VCCP
11-D4 54-C4
11-C4 54-C2
55-B4 10-C2
9-B3 20-A3 54-C2
9-C3
CPU1_TCK
CPU1_TDI
CPU1_TDO
CPU1_TMS
CPU1_TRST*
ITP I/F Signal
0
CPU1_FERR*
CPU1_INIT*
CPU1_A20M*
CPU1_SLP*
CPU1_INTR
CPU1_NMI
CPU1_SMI*
CPU1_STPCLK*
CPU1_IGNNE*
CPU1_DPSLP*
CPU1_DPRSTP*
54-C4 11-C4
54-C4 11-C4
54-C4 11-C4
R50
Q23
MMBT3904
20-A3 54-A2
20-A3 54-C4 9-B3
20-A3 55-D3 9-B3
20-B3 55-D4 10-D3
CPU1_BSEL1
10-C3 16-C1 54-D2 8-B1
CPU1_BSEL2
10-C3 14-B4 54-D2 8-B1
GTLREF : Keep the Voltage divider within 0.5"
of the First GTLREF0 with Z0= 55 ohm trace
Minimize coupling of any switching signals to this net
COMP 0 , 2 <(COMP 1,3) should be connected
Z0=27.4 ohm (55 ohm) trace shorter than
1/2 " to their respective Banias Pins
CPU Core Voltage Table
VID(5:0)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
1
0
0
0
0
0
0
1
0
0
1 0
0
1
0
0
0
1
0
0
0
0
0
1
0
0
1
0
0
1
1
0
1
0
1
00
0
1
0
1
0
0
1
1
0
1
0
0
0
1
0
0
0
1
0
0
1
0
0
0
0
1
1
0
1
0
1
1
0
0
1
1
0
0
11
1
0
1
0
0
1
0
0
1
1 0
0
1
1
0
0
1
1
1
0
1
1
1
0
11
1
1
0
1
1
Voltage
1.708 V
0
0
0
1
1.692 V
0
1.676 V
1
1
1.660 V
1
1.644 V
0
0
1
1.628 V
0
0
1.612 V
1
1.596 V
1
1
1
1
1.580 V
0
0
1.564 V
0
1
1.548 V
1
0
1
1
1.532 V
1.516 V
0
0
1.500 V
1
1
1.484 V
0
1.468 V
1
1
0
0
1.452 V
1
0
1.436 V
0
111.420 V
1
1.404 V
1
1.388 V
0
0
1
1.372 V
0
1
0
1.356 V
1
1
1.340 V
1
1
1.324 V
0
0
1
1.308 V
0
1.292 V
0
1
1
1
1.276 V
0
0
1.260 V
1
1.244 V
0
1.228 V
0
1
1.212 V
1
1
HFM Voltage
770:1.26V->1.372V
730,740,750,760:1.26->1.356V
NO_STUFF
VID(5:0)
0
1
0
1
0
1
0
1
1
0
0
1
0
1
0
-
1
1
0
1
0
1
1
0
1
0
0
1
1
0
1
0
1
0
1
1
1
1
1
1
1 1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
R87
R106
NO_STUFF
0
0
00
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0 0
0
0
0
0
1
1
1
1
1
1
1
R85
0
For 400MHz
1K 1%
R107
0
0
0
0
0
1
1
0
0
1
0
1
1
1
1
1
1
1
0
0
0
0
0
1
1 1.020 V
0
1
0
1
0
1
1
1
1
0
0
0
0
1
0
1
0
1
0
1
0
1
1
1
1
1
0
0
0
0
0
1
0
111
0
1
1
01 11
1
1
1
VCCP
1% 1K
For 400 and 533MHz
For 533MHz
Voltage
0
1.196 V
1.180 V
1
1.164 V
0
1.148 V
1
1.132 V
0
1.116 V
1
0
1.100 V
1.084 V
1
0
1.068 V
1
1.052 V
0
1.036 V
1
0
1.004 V
1
0.988 V
0
0.972 V
0.956 V
1
0
0.940 V
1
0.924 V
0
0.908 V
0.892 V
1
0.876 V
0
0.860 V
1
0.844 V
0
0.828 V
1
0.812 V
0
0.796 V
0.780 V
0
0.764 V
0 1
0.748 V
0.732 V
0.716 V
0
0.700 V
1
SAMSUNG
D
C
B
Lowest Freq.
A
ELECTRONICS
4
3
2
1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
2 3
1
VCCP
NO_STUFF
1%
1%
1%
150 R86
54.9 R88
39.2 R91
10-C2 54-C4
10-C2 54-C4
CPU1_TDI
CPU1_TDO
CPU1_TMS
CPU1_TCK
CPU1_TRST*
54-C4 10-C2
1%
27.4 R92
R89 680
54-C4 10-C2
54-C2 10-C2
C
VCC_CORE
C173
C178
C177
C176
C162
6.3V
10000nF
C45
C164
6.3V
10000nF
C174
C163
6.3V
10000nF
C175
C128
6.3V
10000nF
C44
C124
6.3V
10000nF
C48
C127
6.3V
10000nF
C47
C125
6.3V
10000nF
C46
C126
6.3V
10000nF
C113
C156
6.3V
10000nF
C112
C154
6.3V
10000nF
C60
C155
6.3V
10000nF
C59
C115
6.3V
10000nF
C118
6.3V
10000nF
C114
6.3V
10000nF
C117
6.3V
10000nF
C116
6.3V
10000nF
C170
6.3V
10000nF
C153
6.3V
10000nF
C169
6.3V
10000nF
C172
6.3V
10000nF
B
6.3V
6.3V
10000nF
6.3V
10000nF
10000nF
6.3V
6.3V
10000nF
6.3V
10000nF
6.3V
10000nF
10000nF
6.3V
6.3V
10000nF
6.3V
10000nF
6.3V
10000nF
6.3V
10000nF
10000nF
6.3V
10000nF
6.3V
10000nF
6.3V
10000nF
A2
VSS1
A5
VSS2
A8
VSS3
A11
VSS4
A14
VSS5
A17
VSS6
A20
VSS7
A23
VSS8
A26
VSS9
B3
VSS10
B6
B9
B12
B16
B19
B22
B25
C1
C4
C7
C10
C13
C15
C18
C21
C24
D2
D5
D7
D9
D11
D13
D15
D17
D19
D21
D23
D26
E3
E6
E8
E10
E12
E14
E16
E18
E20
E22
E25
F11
F13
F15
F17
F19
F21
F24
G2
G6
G22
VCC_CORE VCC_CORE
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
F1
VSS50
F4
VSS51
F5
VSS52
F7
VSS53
F9
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VCCP
AD1
AD4
VSS161
VSS129
AA6
AA8
AD15
AD17
AD19
AD7
AD9
AD11
AD13
VSS167
VSS168
VSS162
VSS130
VSS169
VSS163
VSS164
VSS165
VSS166
CPU600-4
DOTHAN_YONAH
4 / 4
D6
VCC1
D8
VCC2
D18
VCC3
D20
VCC4
D22
VCC5
E5
VCC6
E7
VCC7
E9
VCC8
E17
VCC9
E19
VCC10
E21
VCC11
F6
VCC12
F8
VCC13
F18
VCC14
F20
VCC15
F22
VCC16
G5
VCC17
G21
VCC18
H6
VCC19
H22
VCC20
J5
VCC21
J21
VCC22
K22
VCC23
U5
VCC24
V6
VCC25
V22
VCC26
W5
VCC27
W21
VCC28
Y6
VCC29
Y22
VCC30
AA5
VCC31
AA7
VCC32
AA9
VCC33
AA11
VCC34
AA13
VCC35
AA15
VCC36
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
AA10
AA12
AA14
AA16
AA18
AA20
AA22
AD22
AD25
VSS170
VSS138
AB3
AA25
AE3
AE6
VSS171
VSS172
VSS140
VSS139
AB5
AB7
AE8
VSS173
VSS174
VSS141
VSS142
AB9
AE10
VSS175
VSS143
AB11
AE12
AE14
VSS176
VSS144
AB13
AB15
AE16
AE18
VSS177
VSS178
VSS145
VSS146
AB17
AB19
AE23
AE20
VSS179
VSS180
VSS147
VSS148
AB21
AB23
AE26
AF2
VSS181
VSS182
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
VCC72
VSS149
VSS150
AC2
AB26
AF5
AF9
VSS183
VSS184
VSS152
VSS151
AC5
AC8
AF11
AF13
VSS185
VSS186
AA17
AA19
AA21
AB6
AB8
AB10
AB12
AB14
AB16
AB18
AB20
AB22
AC9
AC11
AC13
AC15
AC17
AC19
AD8
AD10
AD12
AD14
AD16
AD18
AE9
AE11
AE13
AE15
AE17
AE19
AF8
AF10
AF12
AF14
AF16
AF18
VSS153
VSS154
AC10
AC12
AF15
AF17
VSS187
VSS188
VSS155
VSS156
AC14
AC16
AF19
AF21
VSS189
VSS190
VSS157
VSS158
AC18
AC21
AF24
VSS191
VSS192
VSS159
VSS160
AC24
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
G23
G26
H3
H5
H21
H25
J1
J4
J6
J22
J24
K2
K5
K21
K23
K26
L3
L6
L22
L25
M1
M4
M5
M21
M24
N3
N6
N22
N23
N26
P2
P5
P21
P24
R1
R4
R6
R22
R25
T3
T5
T21
T23
T26
U2
U6
U22
U24
V1
V4
V5
V21
V25
W3
W6
W22
W23
W26
Y2
Y5
Y21
Y24
AA1
AA4
D D
C
B
EC9
220uF
4V
AL
C157
100nF
16V
C120
100nF
16V
C159
100nF
4 1
100nF
16V 16V
C161 C122
100nF
16V
100nF
16V 16V
C119 C123
100nF
C158
100nF
16V
3
C121
100nF
C160
100nF
16V 16V
2
SAMSUNG
ELECTRONICS
A A
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
D
Q634
RHU002N06
KBC3_SBPWRGD
36-C4 28-A4 23-D3
C
PLACE NEAR TO DDR2 SODIMM
B
VCCP
R792
56
1%
CPU1_THRMTRIP*
A
CPU1_THRMTRIP*
10-C3 55-B3
VCCP
R122
2K
1%
TP1170
55-B3 10-C3
P3.3V_AUX
1
P3.3V_AUX
R787
100K
1%
TP1168
D
3
G
1
S
2
KBC5_CAL_THRM*
VCCP
R791
2K
1%
TP1152
R123
10K
1%
55-C2
3
Q26
MMBT3904
2
KBC3_RSMRST*
KBC3_CHKPWRSW*
CPU3_THRMTRIP*
THRM_ALERT*
P3.3V_AUX
R786
10K
1%
3
Q633
1
MMBT3904
2
23-D3
P5V
R785
10K
1%
55-A3
36-D4
12-C4 55-A3
CHP3_SBTHRMTRIP*
P3.3V_AUX
10K
1%
R788
36-C2 23-A4
36-B1
41-C1 48-D3 55-D4
55-A3 12-B4
36-D1 36-C4
P5V_AUX
ERTJ1VG103FA
TH1
TP1163
G
1
CPU3_THRMTRIP*
P3.3V_AUX
D
S
MICOM_P3V
R789
10K
1%
TP1161
R803
2K
1%
C803
2.2nF
12
3
Q632
RHU002N06
2
CPU1_PROCHOT*
CPU / DDR2 Thermal Sensor
MICOM_P3V
P3.3V_AUX
P3.3V_AUX
U612
49.9
1%
U613
C805
100nF
U611
EMC6N300
10
+RTC_PWR3V
5
+3V_PWROK*
11
VSUS_PWRGD
21
POWER_SW*
6
THERMTRIP1*
7
THERMTRIP2*
8
THERMTRIP3*
13
SMBADDRSEL
14
HW_LOCK*12INTRUDER*
9
ATF_INT*
23
VCP
1209-001531
REM_DIOD2_N
REM_DIOD2_P
REM_DIOD1_N
REM_DIOD1_P
THERMTRIP_SIO
THERM_STP*
THDAT_SMB
+3VSUS
VSET
THCLK_SMB
RESERVED
VSS
4
22
1
2
17
18
19
20
15
16
24
3
Vset = (Tp-75)/16 Where Tp=75 to 106 degree C
Set Trip point = 105degreeC
Vset = (105-75)/16 = 1.875V
Guardian Temp-torelance = +/- 3 degree C
TH1:
Panasonic 1% 0603 10K ohm @ 25 degree C.P/N: ERTJ1VG103FA
Mitsubishi 1% 0603 10K ohm @ 25 degree C.P/N: TH11-3H103FT
VCP voltage = 5V * TH1/(TH1+2.21K)
When TH1 is 10Kohm, VCP is 4.1V.
If TH1 is 1Kohm, VCP is 1.56V.
VCCP
R707
75
10-D3
1%
55-B3
R710
TP1153
475
1%
10K
1%
10V
TP1158
C782
2.2nF
PLACE THIS AT THE OPPSITE SIDE OF CPU
P3.3V
R708
10K
3
1
2
1%
23-D3 36-B2 23-C1
Q625
MMBT3904LT1G
R709
1.5K
1%
TP1154
3
1
2
Q626
MMBT3904LT1G
R806
10K
1%
C781
2.2nF
55-C3 13-A3
NO_STUFF
R807
10K
1%
55-C2
55-C2 36-A2
55-D3 10-C3
13-B3 55-C3
43-B1 36-B2
CPU3_ALERT*
NO_STUFF
NO_STUFF
NO_STUFF
NO_STUFF
2 3
36-C2
10-C3 55-D3
MCH2_THERMDC
MCH2_THERMDA
KBC3_FANCTRL
KBC3_THERM_SMDATA
KBC3_THERM_SMCLK
CPU2_THERMDC
CPU2_THERMDA
THERM_STP*
36-D2
1
Refer To Thermal Sensor Layout Guidelines.
- Place the Thermal Sensor close to a remote diode.
- Keep traces away from high voltage (+12V bus)
- Keep traces away from fast data buses and CRT signal.
- Use recommended trace widths and spacings (10mil)
- Place a ground plane under the traces.
- Use guard traces flanking DXP and DXN and connecting to GND
P3.3V_AUX
R805
30.1K
1%
R804
C804
30K
2.2nF
5%
TP1162
R802
10K
1%
FAN Control Logic
P5V
R647
R646
100K
1%
Line Width = 20 mil
C637
D604
10000nF
21
6.3V
Q609
SI3456DV
4
S
D1
D2
3
FAN3_FDBACK*
D3
D4 G
TP1160
1%
100
MBR0540T1
L600
TP1169
1
2
5
6
10uH
P3.3V
U601
55-D3 36-B2
10K
1%
D603
MMBD4148
13
TP1155
TP1159
J604
HDR-4P-1R-SMD
1
2
3
4
3711-000456
SAMSUNG
ELECTRONICS
D
C
B
A
4
3
2
1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
D
C
CHP3_SUSSTAT*
B
M4
RMNT-30-50-1P
M3
RMNT-30-50-1P
A
CHP3_NBRST*
P3.3V_AUX
23-D3 36-A2 37-C2
20-C1
VCCP
R83
49.9
1%
R82
C57
100
1000nF
1%
6.3V
PLACE CLOSE TO NB
USE 10/10MIL WIDTH/SPACE
R716
4.7K
BAT54A
D611
12
C109
220pF
P1.8V_AUX
3
3
CPU1_A*(31:3)
CPU1_REQ*(4:0)
CPU1_ADSTB0*
CPU1_ADSTB1*
CPU1_ADS*
CPU1_BNR*
CPU1_BPRI*
CPU1_DEFER*
CPU1_DRDY*
CPU1_DBSY*
CPU1_DPWR*
CPU1_LOCK*
CPU1_TRDY*
CPU1_HITM*
CPU1_HIT*
CPU1_RS0*
CPU1_RS1*
CPU1_RS2*
R112
CPU1_BREQ*
27K
CPU1_CPURST*
NO_STUFF
KBC3_NBPWRGD
R95
330K
P1.8V
B14
HH-1M1608-600JT
C98
1000nF
6.3V
Place THERMDA and THERMDC as differential pair
9-C4 9-D4
9-C4
9-C4
9-B4
9-D3 54-B3
9-C3 55-D4
9-C3 54-C2
9-C3 54-C2
9-C3 54-C2
9-C3 54-C2
9-C3 54-B3
9-C3 54-B3
9-C3 54-B3
9-C3 55-B4
16-B1 36-B2
VCCP
MCH2_THERMDA
MCH2_THERMDC
2
1
U609-1
R53
4.7K
RC410MB
G28
CPU_A3*
H26
CPU_A4*
G27
CPU_A5*
G30
CPU_A6*
G29
CPU_A7*
G26
CPU_A8*
H28
CPU_A9*
J28
CPU_A10*
H25
CPU_A11*
K28
CPU_A12*
H29
CPU_A13*
J29
CPU_A14*
K24
CPU_A15*
K25
CPU_A16*
F29
CPU_REQ0*
G25
CPU_REQ1*
F26
CPU_REQ2*
F28
CPU_REQ3*
E29
CPU_REQ4*
H27
CPU_ADSTB0*
M28
CPU_A17*
K29
CPU_A18*
K30
CPU_A19*
J26
CPU_A20*
L28
CPU_A21*
L29
CPU_A22*
M30
CPU_A23*
K27
CPU_A24*
M29
CPU_A25*
K26
CPU_A26*
N28
CPU_A27*
L26
CPU_A28*
N25
CPU_A29*
L25
CPU_A30*
N24
CPU_A31*
L27
CPU_ADSTB1*
F25
CPU_ADS*
F24
CPU_BNR*
E23
CPU_BPRI*
E25
CPU_DEFER*
G24
CPU_DRDY*
F23
CPU_DBSY*
G22
CPU_DPWR*
E27
CPU_LOCK*
F22
CPU_TRDY*
E24
CPU_HITM*
D26
CPU_HIT*
E26
CPU_RS0*
G23
CPU_RS1*
D23
CPU_RS2*
D25
RESERVED0
C11
CPU_CPURSET*
E11
RESERVED1
AH14
SUS_STAT*
A3
SYSRESET*
E3
POWERGOOD
B11
CPU_COMP_P
D11
CPU_COMP_N
H21
CPVDD
H20
CPVSS
H22
CPU_VREF
AH13
THERMALDIODE_P
AJ13
THERMALDIODE_N
C4
TESTMODE
1 / 5
CPU_D0*
CPU_D1*
CPU_D2*
CPU_D3*
CPU_D4*
CPU_D5*
CPU_D6*
CPU_D7*
CPU_D8*
CPU_D9*
CPU_D10*
CPU_D11*
CPU_D12*
CPU_D13*
CPU_D14*
CPU_D15*
CPU_DBI0*
CPU_DSTB0N*
CPU_DSTB0P*
CPU_D16*
CPU_D17*
CPU_D18*
CPU_D19*
CPU_D20*
CPU_D21*
CPU_D22*
CPU_D23*
CPU_D24*
CPU_D25*
CPU_D26*
CPU_D27*
CPU_D28*
CPU_D29*
CPU_D30*
CPU_D31*
CPU_DBI1*
CPU_DSTB1N*
CPU_DSTB1P*
CPU_D32*
CPU_D33*
CPU_D34*
CPU_D35*
CPU_D36*
CPU_D37*
CPU_D38*
CPU_D39*
CPU_D40*
CPU_D41*
CPU_D42*
CPU_D43*
CPU_D44*
CPU_D45*
CPU_D46*
CPU_D47*
CPU_DBI2*
CPU_DSTB2N*
CPU_DSTB2P*
CPU_D48*
CPU_D49*
CPU_D50*
CPU_D51*
CPU_D52*
CPU_D53*
CPU_D54*
CPU_D55*
CPU_D56*
CPU_D57*
CPU_D58*
CPU_D59*
CPU_D60*
CPU_D61*
CPU_D62*
CPU_D63*
CPU_DBI3*
CPU_DSTB3N*
CPU_DSTB3P*
E28
D28
D29
C29
D30
C30
B29
C28
C26
B25
B27
C25
A27
C24
A24
B26
C27
A28
B28
C19
C23
C20
C22
B22
B23
C21
B24
E21
B21
B20
G19
F21
B19
E20
D21
A21
D22
E22
C18
F19
E19
A18
D19
B18
C17
B17
E17
B16
C15
A15
B15
F16
G18
F18
C16
D18
E18
E16
D16
C14
B14
E15
D15
C13
E14
F13
B13
A12
C12
E12
D13
D12
B12
E13
F15
G15
0
1
2
3
4
5
6
7
8
9
10
11
12
13 16
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
3
4
5
6
7
8
9
10
11
12
13
14
15
0
1
2
3
4
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
54-B3 9-C3
54-D2 9-C3
54-C2 9-C3
54-C2 10-D3
54-B3 9-C3
54-D2 9-C3
49.9
12-C2 55-C3
55-C3 12-C2
1%
24.9 1%
R60
R61
9-C2 9-D1 9-D2 9-C1
9-C2
9-C2
9-C2
9-B2
9-B2
9-B2
9-C1
9-C1
9-C1
9-B1
9-B1
9-B1
CPU1_D*(63:0)
CPU1_DBI0*
CPU1_DSTBN0*
CPU1_DSTBP0*
CPU1_DBI1*
CPU1_DSTBN1*
CPU1_DSTBP1*
CPU1_DBI2*
CPU1_DSTBN2*
CPU1_DSTBP2*
CPU1_DBI3*
CPU1_DSTBN3*
CPU1_DSTBP3*
D
C
B
A
SAMSUNG
ELECTRONICS
4
3
2
1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
3 4
2
1
D
J5
GFX_RX0P
J4
GFX_RX0N
K4
GFX_RX1P
L4
GFX_RX1N
L6
GFX_RX2P
L5
GFX_RX2N
M5
GFX_RX3P
M4
GFX_RX3N
N4
GFX_RX4P
P4
GFX_RX4N
P6
GFX_RX5P
P5
GFX_RX5N
R5
GFX_RX6P
R4
GFX_RX6N
T4
GFX_RX7P
T3
GFX_RX7N
U6
GFX_RX8P
U5
GFX_RX8N
V5
GFX_RX9P
V4
GFX_RX9N
W4
GFX_RX10P
C
38-D3
38-D3
20-D3
20-D3
20-D3
20-D3
8-C1
8-C1
30-C3
30-C3
PEX1_EXPRXN4
P3.3V
R81
4.7K
R80
4.7K
PEX1_LANRXP1
PEX1_LANRXN1
PEX1_ARX0P
PEX1_ARX0N
PEX1_ARX1P
PEX1_ARX1N
CLK1_PCIEICH
CLK1_PCIEICH* CPU1_BSEL2
VCCP
NO_STUFF
For FSB SEL
B
CHP3_BMREQ*
MMBT3904
Q21
20-A4
R42
4.7K
For 400MHz
1
54-D2 10-D1 10-C3 8-B1
3 2
54-A2
NO_STUFF
For 533MHz
W3
GFX_RX10N
Y6
GFX_RX11P
Y5
GFX_RX11N
AA5
GFX_RX12P
AA4
GFX_RX12N
AB4
GFX_RX13P
AB3
GFX_RX13N
AC6
GFX_RX14P
AC5
GFX_RX14N
AD5
GFX_RX15P
AD4
GFX_RX15N
AF8
GPP_RX0P_SB_RX2P
AG8
GPP_RX0N_SB_RX2N
AG6
GPP_RX1P_SB_RX3P
AG7
GPP_RX1N_SB_RX3N
AK7
GPP_RX2P
AJ7
GPP_RX2N
AG4
GPP_RX3P
AH4
GPP_RX3N
AG9
SB_RX0P
AG10
SB_RX0N
AE9
SB_RX1P
AF10
SB_RX1N
K2
SB_CLKP
L2
SB_CLKN
M2
GFX_CLKP
M1
GFX_CLKN
H2
BMREQ*
U609-2
RC410MB
2 / 5
GPP_TX0P_SB_TX2P
GPP_TX0N_SB_TX2N
GPP_TX1P_SB_TX3P
GPP_TX1N_SB_TX3N
GFX_TX0P
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
GFX_TX2N
GFX_TX3P
GFX_TX3N
GFX_TX4P
GFX_TX4N
GFX_TX5P
GFX_TX5N
GFX_TX6P
GFX_TX6N
GFX_TX7P
GFX_TX7N
GFX_TX8P
GFX_TX8N
GFX_TX9P
GFX_TX9N
GFX_TX10P
GFX_TX10N
GFX_TX11P
GFX_TX11N
GFX_TX12P
GFX_TX12N
GFX_TX13P
GFX_TX13N
GFX_TX14P
GFX_TX14N
GFX_TX15P
GFX_TX15N
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N
SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
PCE_TXSET
PCE_ISET
PCE_PCAL
PCE_NCAL
N1
N2
P2
R2
R1
T1
T2
U2
V2
V1
W1
W2
Y2
AA2
AA1
AB1
AB2
AC2
AD2
AD1
AE1
AE2
AF2
AG2
AG1
AH1
AH2
AJ2
AJ3
AJ4
AK4
AJ5
AJ8
AJ9
AE6
AF6
AJ6
AK6
AE4
AF4
AJ10
AJ11
AK9
AK10
AK13
AJ12
AH12
AG12
NO_STUFF
NO_STUFF
C130
C129
C165
C166
C715
C716
C713
C714
R110
R109
R108
R94
100nF
100nF
100nF
10V 100nF
PEX1_EXPTXP4 PEX1_EXPRXP4
30-C3
10V 100nF
PEX1_EXPTXN4
30-C3
10V
PEX1_LANTXP1
38-D3
10V
PEX1_LANTXN1
38-D3
10V 100nF
PEX1_ATX0P
20-D3
10V
PEX1_ATX0N
20-D3
10V 100nF
PEX1_ATX1P
20-D3
10V 100nF
PEX1_ATX1N
20-D3
10K
1%
10K
1%
150
100
P1.2V
1%
1%
D
C
B
A
SAMSUNG
ELECTRONICS
4 3
2
1
A
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
D
C
B
A
MEM1_AMA(14:0)
MEM1_ADM(7:0)
MEM1_ARAS*
MEM1_ACAS*
MEM1_AWE*
MEM1_ADQS(7:0)
MEM1_ADQS*(7:0)
CLK1_MCLK0*
CLK1_MCLK0
CLK1_MCLK1*
CLK1_MCLK1
CLK1_MCLK3*
CLK1_MCLK3
CLK1_MCLK4*
CLK1_MCLK4
MEM1_CKE0
MEM1_CKE1
MEM1_CKE2
MEM1_CKE3
MEM1_CS0*
MEM1_CS1*
MEM1_CS2*
MEM1_CS3*
MEM1_ODT0
MEM1_ODT1
MEM1_ODT2
MEM1_ODT3
18-D2 18-D4 19-D3
MEM1_ABS0
MEM1_ABS1
MEM1_ABS2
18-B2 18-B4
18-C2 18-C4 19-C4 54-B2
18-A2 18-A4
18-C4
18-C4
18-C4
18-C4
18-C2
18-C2
18-C2
18-C2
18-C4 19-D4
18-C2 19-D4
18-C4 19-D4
18-C2 19-D4
18-B2 19-C4
18-B4 19-C4
54-B2 19-C4 18-B4 18-B2
19-C4 18-B4 18-B2
18-B4 18-B2
19-D4 18-C4
19-D4 18-C2
19-D4 18-C4
19-D4 18-C2
19-C4 18-B4
19-C4 18-B2
3
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
18-C2 18-C4 19-C4
18-C2 18-C4 19-C4
0
1
2 21
3
4
5
6
7
0
1
3
4
5
6
7
0
1
2 44
3
4
5
6
7
AK27
MEM_A0
AJ27
MEM_A1
AH26
MEM_A2
AJ26
MEM_A3
AH25
MEM_A4
AJ25
MEM_A5
AH24
MEM_A6
AH23
MEM_A7
AJ24
MEM_A8
AJ23
MEM_A9
AH27
MEM_A10
AH22
MEM_A11
AJ22
MEM_A12
AF28
MEM_A13
AJ21
MEM_A14
AG27
MEM_A15
AJ28
MEM_A16
19-C4 18-C4 18-C2
AH21
MEM_A17
AJ17
MEM_DM0
AG15
MEM_DM1
AE20
MEM_DM2
AF25
MEM_DM3
Y27
MEM_DM4
AB28
MEM_DM5
R26
MEM_DM6
R28
MEM_DM7
AJ29
MEM_RAS*
AG28
MEM_CAS*
AH30
MEM_WE*
AJ18
MEM_DQS0P
AE14
MEM_DQS1P
AF22
MEM_DQS2P
AE25
MEM_DQS3P
W27
MEM_DQS4P
AB29
MEM_DQS5P
P25
MEM_DQS6P
R29
MEM_DQS7P
AH17
MEM_DQS0N
AF15
MEM_DQS1N
AE22
MEM_DQS2N
AF26
MEM_DQS3N
W26
MEM_DQS4N
AB30
MEM_DQS5N
R25
MEM_DQS6N
R30
MEM_DQS7N
AC26
MEM_CK0N
AC25
MEM_CK0P
AF16
MEM_CK1N
AE16
MEM_CK1P
V29
MEM_CK2N
V30
MEM_CK2P
AC24
MEM_CK3N
AC23
MEM_CK3P
AG17
MEM_CK4N
AF17
MEM_CK4P
W29
MEM_CK5N
W28
MEM_CK5P
AH20
MEM_CKE0
AJ20
MEM_CKE1
AE24
MEM_CKE2
AE21
MEM_CKE3
AH29
MEM_CS0*
AG29
MEM_CS1*
AH28
MEM_CS2*
AF29
MEM_CS3*
AG30
MEM_ODT0
AE28
MEM_ODT1
AC30
MEM_ODT2
Y30
MEM_ODT3
U609-3
3 / 5
RC410MB
MEM_COMPN
MEM_COMPP
MEM_VMODE
MEM_DQ0
MEM_DQ1
MEM_DQ2
MEM_DQ3
MEM_DQ4
MEM_DQ5
MEM_DQ6
MEM_DQ7
MEM_DQ8
MEM_DQ9
MEM_DQ10
MEM_DQ11
MEM_DQ12
MEM_DQ13
MEM_DQ14
MEM_DQ15
MEM_DQ16
MEM_DQ17
MEM_DQ18
MEM_DQ19
MEM_DQ20
MEM_DQ21
MEM_DQ22
MEM_DQ23
MEM_DQ24
MEM_DQ25
MEM_DQ26
MEM_DQ27
MEM_DQ28
MEM_DQ29
MEM_DQ30
MEM_DQ31
MEM_DQ32
MEM_DQ33
MEM_DQ34
MEM_DQ35
MEM_DQ36
MEM_DQ37
MEM_DQ38
MEM_DQ39
MEM_DQ40
MEM_DQ41
MEM_DQ42
MEM_DQ43
MEM_DQ44
MEM_DQ45
MEM_DQ46
MEM_DQ47
MEM_DQ48
MEM_DQ49
MEM_DQ50
MEM_DQ51
MEM_DQ52
MEM_DQ53
MEM_DQ54
MEM_DQ55
MEM_DQ56
MEM_DQ57
MEM_DQ58
MEM_DQ59
MEM_DQ60
MEM_DQ61
MEM_DQ62
MEM_DQ63
MEM_CAP2
MEM_CAP1
MEM_VREF
MPVDD
MPVSS
AJ16
AH16
AJ19
AH19
AH15
AK16
AH18
AK19
AF13
AF14
AE19
AF19
AE13
AG13
AF18
AE17
AF20
AF21
AG23
AF24
AG19
AG20
AG22
AF23
AD25
AG25
AE27
AD27
AE23
AD24
AE26
AD26
AA25
Y26
W24
U25
AA26
Y25
V26
W25
AC28
AC29
AA29
Y29
AD30
AD29
AA30
Y28
U27
T27
N26
M27
U26
T26
P27
P26
U29
T29
P29
N29
U28
T28
P28
N27
AE29
AJ15
N30
AJ14
AB27
AD28
AB26
AA27
R111
2
R99
R98
HH-1M1608-600JT
61.9
61.9
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
22
23
24
25
26
27
28
29
30
31
32
33
34
35 2
36
37
38
39
40
41
42
43
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
P1.8V_AUX
1%
1%
P1.8V_AUX
1%
1K
P1.8V
B617
C150
1000nF
6.3V
18-D2 18-D4
P1.8V_AUX
C151
100nF
10V
C152
100nF
10V
MEM1_ADQ(63:0)
R97
1K
1%
R100
1K
1%
NO_STUFF
R96
POWER FOR PLL
1
D
C
B
MEM1_VREF
0
A
SAMSUNG
ELECTRONICS
4
3 1
2
4
SAMSUNG PROPRIETARY
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
EXCEPT AS AUTHORIZED BY SAMSUNG.
Put the AVDD,AVDDI,AVDDQ,PLVDD
D
decoupling CAPS on the botom side close to BALLS
C
C
4 2
RESET resistor R715 need 10mil trace with at lest
10mils spacing at AVSSQ HF cap
CRT3_RED
CRT3_GREEN
CRT3_BLUE
B
B
27-D4
27-C4
R29
R31
150
150
1%
1%
AVDDQ
AVSSQ
PLLVDD
PLLVSS
R28
150
1%
SMB3_CLK
SMB3_DATA
C54
100nF
10V
C78
100nF
10V
VGA3_VSYNC
VGA3_HSYNC
CLK3_NB14M
CLK0_HCLK1
CLK0_HCLK1*
AVDD_NB
C55
1000nF
6.3V
AVSSN
P1.8V
C53
100nF
10V
AVSSDI
CLOSE TO CRT CONN
16-D1 26-A4 54-C2
54-C2 26-A4 16-C1
PLLVSS
54-B2 8-B1
8-C1
8-C1
23-C3 18-B4 18-B2 8-B3 23-D4 30-C3 38-B2 54-C3
0
R728
0
R729
NO_STUFF
NO_STUFF
R59
R56
10K
1%
3
3
P3.3V
B13
C52
C51
HH-1M1608-600JT
1000nF
100nF
10V
6.3V
U609-4
RC410MB
G4
VDDR3_1
G5
VDDR3_2
C9
AVDD
C10
AVSSN
D8
AVDDDI
C8
AVSSDI
B8
AVDDQ
B9
AVSSQ
H10
PLLVDD
H9
PLLVSS
J2
TMDS_HPD
H3
DDC_DATA
B3
DACVSYNC
C3
715
1%
DACHSYNC
B10
RSET
F10
RED
E10
GREEN
D10
BLUE
G1
OSCIN
J1
CPU_CLKP
K1
CPU_CLKN
G2
TVCLKIN
F1
OSCOUT
D2
I2C_CLK
54-B2 38-B2 30-D3 23-C4 8-B3 18-B2 18-B4 23-C3
C1
I2C_DATA
4 / 5
TXOUT_U0N
TXOUT_U0P
TXOUT_U1N
TXOUT_U1P
TXOUT_U2N
TXOUT_U2P
TXOUT_U3N
TXOUT_U3P
TXOUT_L0N
TXOUT_L1N
TXOUT_L2N
TXOUT_L3N
LVDDR18A_1
LVDDR18A_2
LVDS_DIGON
LVDS_BLON
LVDS_BLEN
STRP_DATA
TXOUT_L0P
TXOUT_L1P
TXOUT_L2P
TXOUT_L3P
LPVDD
LPVSS
LVSSR_1
LVSSR_2
LVSSR_3
LVDDR18D
TXCLK_UP
TXCLK_UN
TXCLK_LP
TXCLK_LN
COMP
DACSCL
DACSDA
B4
A4
B5
C6
B6
A6
B7
A7
E5
F5
D5
C5
E6
D6
E7
E8
J8
J7
H7
H8
G7
G8
G9
C7
E2
G3
F2
F8
F7
F6
G6
D9
C
F9
Y
E9
B2
C2
D1
R52
0
55-C3 26-C4
26-C4 55-C4
55-C3 26-C4
26-C4 55-C4
55-C3 26-C4
26-C4 55-C4
26-D2 27-D4
54-B2
55-B3 26-A2
55-C4 36-B4
54-D2 26-C4
54-B2 26-C4
55-D4 27-A2
27-B2
2
LCD1_ADATA0*
LCD1_ADATA0
LCD1_ADATA1*
LCD1_ADATA1
LCD1_ADATA2*
LCD1_ADATA2
LCD3_VDDEN
LCD3_BKLTCTRL
LCD3_BKLTEN
LCD1_ACLK
LCD1_ACLK*
CRT3_DDCCLK
CRT3_DDCDATA
P3.3V
R730
4.7K
R46
150
1%
VGA3_VSYNC
VGA3_HSYNC
BC7
100nF
10V
R47
R48
150
150
1%
1%
NO_STUFF
For 400MHz
BC10
100nF
10V
BC11
100nF
10V
P3.3V
R57
4.7K
54-C2 26-A4 16-C4
P3.3V
R45
4.7K
16-C4 26-A4 54-C2
R44
4.7K
BC606
BC605
1000nF
10000nF
6.3V
10V
LPVSS
BC8
BC604
1000nF
10000nF
6.3V
10V
LVSSR
TVO3_C
27-C2
TVO3_Y
27-D2
TVO3_COMP
27-C2
3
10K
1
10K
Q24
2
KSR1102
1
1
VCCP
FOR FSB AUTO SEL
R43
4.7K
1
54-D2 10-D1 10-C3 8-B1
32
MMBT3904
Q22
P1.8V
B614
HH-1M1608-600JT
P1.8V
B12
HH-1M1608-600JT
BC9
1000nF
6.3V
LVSSR
P3.3V
U8
5
7SZ14
2 4
+
-
3
NO_STUFF
CPU1_BSEL1
13-B3 36-B2
KBC3_SBPWRGD
D
D
CC
B
B
0
R62
B10
AVDD_NB
AVSSN
4
4
C43
10000nF
10V
P1.8V
B11
HH-1M1608-600JT
AVSSQ
C42
10000nF
10V
P1.8V
B612
HH-1M1608-600JT
PLLVDD AVDDQ
C687
10000nF
10V
PLLVSS
3
3
R712
P3.3V
HH-1M1608-600JT
A
A
R58
AVSSN
0
AVSSQ
0
AVSSDI
R711
R732
R744
0
PLLVSS
0
LVSSR
0
LPVSS
R731
4.7K
NO_STUFF
A
A
SAMSUNG
ELECTRONICS
2
2
1D1
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
3
2
1
D
3
P1.8V_AUX
C148
C139
1000nF 1000nF
6.3V 6.3V
6.3V
C145
C108
1000nF
1000nF 1000nF
6.3V
6.3V
C137
C143
1000nF
1000nF
6.3V
6.3V
C103
C102
1000nF
1000nF
6.3V 6.3V
C106
C107
1000nF 1000nF
6.3V
6.3V
C99
C105
1000nF
1000nF 1000nF
6.3V
6.3V
2
B15
MMZ1608S121AT
VCCP
P1.8V
VCC_NB
M13
VDD_CORE_1
M15
VDD_CORE_2
M17
C95
6.3V
C100
22000nF
6.3V
C86
100nF 22000nF
10V
C90
10V
C88
100nF
10V 10V
C136
100nF
C92
10V
C138
100nF 100nF
10V
C96
100nF
C142
100nF
10V 10V
100nF 100nF
10V
C84
100nF
10V
C82
100nF
10V
C140
100nF
10V
C94
100nF
10V
C87
100nF
10V
C83
100nF
10V
C97
100nF
10V
C91
C
P1.8V
B16
MMZ1608S121AT
C134
C131
C132
C135
1000nF
6.3V
P1.2V
B
C66
22000nF
C70
1000nF
6.3V
C71
1000nF
6.3V
1000nF
1000nF
1000nF
6.3V
6.3V 6.3V
C74
C76
1000nF 1000nF
6.3V 6.3V 6.3V
C67
C77
1000nF 1000nF
6.3V
6.3V
C69
C68
1000nF
1000nF
6.3V
6.3V
C73
1000nF
6.3V
C72
1000nF
6.3V
C75
1000nF
6.3V
M19
N12
N14
N16
N18
P13
P15
P17
P19
R12
R14
R16
R18
T13
T15
T17
T19
U12
U14
U16
U18
V13
V15
V17
V19
W12
W14
W16
W18
AB8
AC10
AC9
AD10
AE11
AF11
AG11
AB7
AC7
AC8
AD9
U7
U8
Y7
Y8
H4
H5
J6
K6
L7
L8
M7
M8
P7
P8
T7
T8
W7
W8
VDD_CORE_3
VDD_CORE_4
VDD_CORE_5
VDD_CORE_6
VDD_CORE_7
VDD_CORE_8
VDD_CORE_9
VDD_CORE_10
VDD_CORE_11
VDD_CORE_12
VDD_CORE_13
VDD_CORE_14
VDD_CORE_15
VDD_CORE_16
VDD_CORE_17
VDD_CORE_18
VDD_CORE_19
VDD_CORE_20
VDD_CORE_21
VDD_CORE_22
VDD_CORE_23
VDD_CORE_24
VDD_CORE_25
VDD_CORE_26
VDD_CORE_27
VDD_CORE_28
VDD_CORE_29
VDD_CORE_30
VDD_CORE_31
VDD_CORE_32
VDDA_18_1
VDDA_18_2
VDDA_18_3
VDDA_18_4
VDDA_18_5
VDDA_18_6
VDDA_18_7
VDDA_18_8
VDDA_18_9
VDDA_18_10
VDDA_18_11
VDDA_12_1
VDDA_12_2
VDDA_12_3
VDDA_12_4
VDDA_12_5
VDDA_12_6
VDDA_12_7
VDDA_12_8
VDDA_12_9
VDDA_12_10
VDDA_12_11
VDDA_12_12
VDDA_12_13
VDDA_12_14
VDDA_12_15
VDDA_12_16
VDDA_12_17
VDDA_12_18
A13
VSS_1
VSS_41
AK18
A16
A19
VSS_2
AG5
AH10
VSS_42
AK2
AK22
VSS_3
AA3
AA7
AA8
AB5
AB6
AC3
AD3
AD7
AD8
AE8
AF3
AF5
AF7
AF9
AH3
AH5
AH6
AH7
AH8
AH9
M3
N5
N6
N7
N8
R3
R7
R8
U3
W5
W6
VSS_43
A9
A29
A2
A25
A22
VSS_7
VSS_4
VSS_6
VSS_5
RC410MB
VSSA_1
VSSA_2
VSSA_3
VSSA_4
VSSA_5
VSSA_6
VSSA_7
VSSA_8
VSSA_9
VSSA_10
VSSA_11
VSSA_12
VSSA_13
VSSA_14
VSSA_15
VSSA_16
VSSA_17
VSSA_18
VSSA_19
VSSA_20
VSSA_21
VSSA_22
K5
VSSA_23
L3
VSSA_24
VSSA_25
VSSA_26
VSSA_27
VSSA_28
VSSA_29
P3
VSSA_30
VSSA_31
VSSA_32
VSSA_33
T5
VSSA_34
T6
VSSA_35
VSSA_36
V3
VSSA_37
V7
VSSA_38
V8
VSSA_39
VSSA_40
VSSA_41
Y3
VSSA_42
VSS_44
VSS_45
VSS_46
VSS_47
B1
B30
D14
AK25
AK29
AA23
AA28
AC11
AA24
VSS_8
VSS_9
VSS_11
VSS_10
U609-5
5 / 5
VSS_48
VSS_49
VSS_50
VSS_51
D17
D20
D24
D27
AC12
AC14
AC15
AC17
VSS_12
VSS_13
VSS_14
VSS_15
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_52D3VSS_53D4VSS_54
VSS_55F3VSS_56
F27
AC18
AC20
VSS_16
VSS_17
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_57
F4
F30
AC27
AD11
VSS_18
VSS_19
VSS_58
VSS_59
H15
G10
AD12
AD14
VSS_20
VSS_21
M18
M23
M24
M26
N13
N15
N17
N19
P12
P14
P16
P18
R13
R15
R17
R19
R23
R24
R27
T12
T14
T16
T18
T30
U13
U15
U17
U19
U23
U24
V12
V14
V16
V18
V27
V28
W13
W15
W17
W19
W23
W30
VSS_60
VSS_61
J23
H18
AD15
AD17
VSS_22
VSS_23
VSS_62
VSS_63
J24
J27
AD18
AD20
AE30
VSS_24
VSS_25
VSS_26
VSS_64J3VSS_65
VSS_66
J30
K23
AF12
AF27
AG14
VSS_27
VSS_28
VSS_29
VSS_67K8VSS_68
VSS_69
M12
M14
VDD_MEM_1
VDD_MEM_2
VSS_30
VDD_MEM_3
VDD_MEM_4
VDD_MEM_5
VDD_MEM_6
VDD_MEM_7
VDD_MEM_8
VDD_MEM_9
VDD_MEM_10
VDD_MEM_11
VDD_MEM_12
VDD_MEM_13
VDD_MEM_14
VDD_MEM_15
VDD_MEM_16
VDD_MEM_17
VDD_MEM_18
VDD_MEM_19
VDD_MEM_20
VDD_MEM_21
VDD_MEM_22
VDD_CPU_1
VDD_CPU_2
VDD_CPU_3
VDD_CPU_4
VDD_CPU_5
VDD_CPU_6
VDD_CPU_7
VDD_CPU_8
VDD_CPU_9
VDD_CPU_10
VDD_CPU_11
VDD_CPU_12
VDD_CPU_13
VDD_CPU_14
VDD_CPU_15
VDD_CPU_16
VDD_CPU_17
VDD_CPU_18
VDD_CPU_19
VDD_CPU_20
VDD_CPU_21
VDD_CPU_22
VDD_CPU_23
VDD_CPU_24
VDD_CPU_25
VDD_18_1
VDD_18_2
VDD_18_3
VDD_18_4
VSS_70
VSS_71
M16
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
AB23
AB24
AC13
AC16
AC19
AC21
AC22
AD13
AD16
AD19
AD21
AD22
AD23
AK21
AK24
AK28
T23
T24
V23
V24
Y23
Y24
A10
F11
F12
F17
G11
G12
G13
G14
G16
G17
G20
H11
H12
H13
H14
H16
H17
H19
H23
H24
L23
L24
N23
P23
P24
AB22
AB9
J22
J9
AG16
AG18
AG21
AG24
AG26
AH11
AJ1
AJ30
AK12
AK15
P3.3V
C133
1000nF
1
C101
1000nF
6.3V 6.3V
D9
BAV99LT1
3
C81
1000nF
C79
22000nF
2
C146
1000nF
6.3V 6.3V
EC8
100uF
6.3V
AL
C104
1000nF
6.3V
C144
6.3V
C93
1000nF
6.3V
C89
1000nF
6.3V
C147
1000nF
C149
6.3V
C141
1000nF 1000nF
6.3V
C85
1000nF
6.3V 6.3V
C56
1000nF
6.3V
C80
6.3V
D10
BAV99LT1
1
D
C
B
A A
SAMSUNG
ELECTRONICS
4
3
2 1