Samsung np-r408 Schematics
COM-22C-015(1996.6.5) REV. 3
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
3
2
1
Table of Contents
D
Page.
Page.
Page.
Page.
Page.
Page.
Page.
XI’AN-MVI
Page.
Page.
PCB Thinckness:1.1mm
Page.
Page.
Page.
CPU :
INTEL MEROM/PENRYN
Page.
Page.
C
Chip Set :
Remarks :
INTEL Montevina Platform
GM45 INTERNAL GFX
2 SODIMMs DDR2
Page.
Page.
Page.
Page.
Page.
Page.
Model Name :
PBA Name :
PCB Code :
Dev. Step :
B
Revision :
T.R. Date :
XIAN-MVI
MAIN
BA41-00964/5/6A
MP
Samsung
1.0
2008.08.26
Page.
Page.
Page.
Page.
Page.
Page.
Page.
Page.
Page.
Page.
Page.
Page.
Page.
Page.
Page.
DRAW
CHECK
APPROVAL
Confidential
Page.
Page.
Page.
Page.
-
-
-
Page.
1
2
3
4
5
6
7
8~9
10
COVER
OPERATION BLOCK DIAGRAM
POWER DIAGRAM
POWER SEQUENCE
POWER RAIL
CLOCK DISTRIBUTION
BOARD INFORMATION
BLOCKS
CLOCK GENERATOR
11~1253PENRYN
13
14~18
19~21
22~25
26
27~31
THERMAL MONITOR
MCH (PM45)
DDR2 SODIMMS
DISCRETE GFX (NB9M)
GFX MEMORY GDDR3
ICH9M
32Page. BIOS ROM
33
34
35
36
37
38
39
40
41
42
43~45
46
47
48
49
50
51
HDMI REPEATER
LCD(LVDS) CONN.
CRT CONN.
HDD & ODD CONNECTOR
MICOM
LAN CONTROLLER (10/100M)
CAMERA, MDC CONN. & BLUETOOTH
MINI CARD SOCKET (WLAN)
MEMORY CARD (4IN1)
EXPRESS CARD SOCKET
HD AUDIO
CHARGER
P3.3V_AUX & P5V_AUX
DDR2 POWER
CPU VRM POWER
P1.1V & P1.05V POWER
EXT GFX POWER
52 SWITCHED POWER & P1.5V
SUB, DEBUG & KEYBOARD CONN.
54
55
56
57
58~59
LEDS & TOUCHPAD
DISCHARGE
MOUNT HOLE
TEST POINTS
SUB BOARD
D
DIAGRAM
C
B
A
A
DRAW
CHECK
APPROVAL
MODULE CODE
4
3
2
ZHOU JUN
GUO LEI
BC LEE
DATE
DEV. STEP
REV
LAST EDIT
11/26/2007
TITLE
PV
1.0
XI’AN-EXT
COVER
CONTENTS
April 17, 2008 11:19:23 AM
1
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D:/users/mentor/XiAn/INTEL/PV/XIAN_MV_0417
SRP Sheet Number: 1 of 53
OF
SAMSUNG PROPRIETARY
COM-22C-015(1996.6.5) REV. 3
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
3
2
OPERATION BLOCK DIAGRAM
1
D
GDDR3
128MB / 256MB
K4J10324QD
TFT_LCD
14.1" WIDE
1280 X 800
LVDS
CLOCK
GENERATOR
SLG8SP513
PCIE X 16
CRT
HDMI
C
JACK
Internal MIC
L
R
SPEAKER
RJ11
B
RTC
Batt.
EXTERNAL MIC
HEADPHONE
Audio AMP
TPA6017A2
2P
VGA
HDMI
DISCRETE GFX
NB9M-GE-S
AUDIO CODEC
ALC262-VC2
MDC
Module
DELPHI MDC 1.5
AZALIA
Samsung
Samsung
Samsung
SATA1
mPGA479M Socket-P
1299 uFCBGA Type
INTEL PM45
E888CTPM
DMI X4
676 FCBGA Type
INTEL ICH9M
82801IBM
CPU
PENRYN
1066MHz FSB
MCH
ICH
CLINK0
CPU2_THERMDA/DC
CHANNEL A
667/800 MHz
CHANNEL B
667/800 MHz
PCI-E
USB2.0
PCI-E Lane4
PCI-E Lane3
USB PORT 4
PCI-E Lane1
USB PORT 9
THERMAL
MONITOR
EMC2102
LOM
1000M
Marvell
88E8055
EXPRESS CARD
EXPRESS CARD
INSERT
THIS SIDE UP
WLAN
802.11abg/abgn
FAN CONTROL
LAN
Transformer
D
SODIMM0
MAX 2 GB
SODIMM1
MAX 2 GB
C
RJ45
B
A
SATA0
SATA
ODD
HDD
Confidential
Confidential
Confidential
2.5inch
SATA only
LPC
KBC
H8S - 2110B
SPI
SPI EEPROM
MX25L1605A
PS/2
SYNAPTICS
Space bar
LID SWITCH
POWER BUTTON
4
3
KEYBOARD
TOUCHPAD
USB PORT 10
USB PORT 0
USB PORT 1
DRAW
CHECK
APPROVAL
MODULE CODE
2
ALCOR
AU6371
USB (UP)
USB (Down)
ZHOU JUN
GUO LEI
BC LEE
DATE
DEV. STEP
REV
LAST EDIT
SD / MMC
USB PORT 6
USB (Right)
TITLE
11/26/2007
PV
1.0
MultiMedia Crad
2in1 SOCKET
USB PORT 8
WEB CAMERA
XI’AN-EXT
MAIN
BLOCK DIAGRAM
April 17, 2008 11:19:23 AM
1
USB PORT 5
BLUETOOTH
SAMSUNG
ELECTRONICS
PART NO.
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PAGE
D:/users/mentor/XiAn/INTEL/PV/XIAN_MV_0417
SRP Sheet Number: 2 of 53
OF
A
COM-22C-015(1996.6.5) REV. 3
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
3
POWER DIAGRAM
2
1
D
ALWAYS ON
AC Adapter
19V
Battery DC
11.1V
C
RTC Battery
3V
ICH9M
B
VDC
P12.0V_ALW
SWITCHED POWER
VRMs
P3.3V_MICOM
MICOM
P5.0V_ALW
KBC3_SUSPWR
P5.0V_AUX P5.0V
DDR2 Power VRM
VRMs
USB Ports
P3.3V_AUX
ICH9M
MDC
MINICARD
LOM
THERMAL
EXPCARD
P1.8V_AUX
SODIMM (DDR II)
MCH
Samsung
Samsung
Samsung
KBC3_PWRON
CAMERA
ICH9M
TOUCHPAD
CRT
MICOM
FAN
HDD
P3.3V
MCH
THERMAL SENSOR
ICH9M
AU6371
BLUETOOTH
CLOCK
MICOM
LEDs
LCD
SODIMM
MINICARD
HDD
SPI
P0.9V
DDR II-Termination
EGFX_CORE
NB9M
P1.8V
NB9M
GDDR3
P1.5V
MINICARD
EXPCARD
ICH9M
CLOCK
P1.1V
NB9M
P1.05V
PENRYN
MCH
ICH9M
KBC3_VRON /
VCCP3_PWRGD
CPU_CORE
PENRYN
Rail
+V*Always +V*AUX +V SUSPWR PWRON
State
Full On ON ON ON H H
S3 ON ON OFF H L
S4 ON OFF H L
S5 ON OFF OFF
OFF
L L
VRON
H
L
L
L
D
C
B
S5 / S4
4
S3
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3
S0
DRAW
CHECK
APPROVAL
2
ZHOU JUN
GUO LEI
BC LEE
DATE
DEV. STEP
REV
LAST EDITMODULE CODE
11/26/2007
TITLE
PV
1.0
XI’AN-EXT
MAIN
POWER DIAGRAM
April 17, 2008 11:19:23 AM
1
SAMSUNG
ELECTRONICS
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SRP Sheet Number: 3 of 53
603
OF
AA
SAMSUNG PROPRIETARY
COM-22C-015(1996.6.5) REV. 3
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
3
POWER SEQUENCE
2
Rev. 0.1
1
D
3) P12.0V_ALWS
2) VDC
POWER S/W
C
B
ALWAYS
POWER
P5V_AUX & P3V_AUX
TPS51120
DDR2 POWER
SC486
P1.1V / P1.05V
SC415
EGFX_CORE
SC471
3) P5.0V_ALWS
3) P3.3V_MICOM
RST Circuit
5) KBC3_CHKPWRSW#
6) KBC3_SUSPWRON
8) SUSPWRGD (NC)
11) KBC3_PWRON
13) VCCP_PWRGD
7.1) P3.3V_AUX
7.1) P5V_AUX
7.2) P1.8V_AUX
12.2) P0.9V
12.6) P1.1V
12.6) P1.05V
12.3) EGFX_CORE
PRTC
ICH8-M
22) PLT3_RST#
INTVRMEN
EN
LAN100_SLP
EN
RTCRST#
SRTCRST#
CK_PWRGD
CPUPWRGD
CL_RST#
PLTRST#
PCIRST#
PRTC
17) CHP3_CLK_PWRGD
20) CPU1_PWRGDCPU
4) KBC3_RST#
RES#
10ms Delay
110ms Delay
MICOM
Samsung
Samsung
Samsung
9) KBC3_RSMRST*
19) KBC3_PWRGD
14) KBC3_VRON(NC)
16) VRM3_CPU_PWRGD
IMVP6
ISL6266
7) P3.3V_AUX
7) P5V_AUX
10.1/2) CHP3_SLPS5#/S4#
10.3) CHP3_SLPS3#
15) CPU_CORE
7) P1.05V_AUX
7) P1.5V_AUX
7) P1.5V_CL
7) P1.05V_CL
7) P1.05V_LAN
RSMRST#
SLP_M#
SLP_S3#
SLP_S4#
S4_STATE#
SLP_S5#
VRMPWRGD
PWROK
CLPWROK
SUS_STAT#
1.1) PRTC_BAT
1.2) CHP3_RTCRST#
1.2) CHP3_ME_RTCRST#
15) VCC_CORE
21) CHP3_CL_RST0#
RTC
Battery
CLOCK
CK505
PWRGOOD
CPU
RESET#
23) CPU1_CPURST#
CPURST#
PWROK
CLPWROK
CL_RST#
RSTIN#
GMCH
Discrete
GFX.
18) Clock Running
D
C
B
A
P1.5V
SC486
Switched
Power
4
12.4) P1.5V
12.1) P5.0V
12.2) P3.3V
12.5) P1.8V
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DRAW
CHECK
APPROVAL
MODULE CODE
3
2
ZHOU JUN
GUO LEI
BC LEE
DATE
DEV. STEP
REV
LAST EDIT
11/26/2007
TITLE
PV
1.0
XI’AN-EXT
MAIN
POWER SEQUENCE
April 17, 2008 11:19:23 AM
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ELECTRONICS
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SRP Sheet Number: 4 of 53
OF
A
COM-22C-015(1996.6.5) REV. 3
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
3
Timing Diagram, Power ON
2
Rev. 0.1 Phil 2008-04-15
1
S5 S5 S3 S0S0
D
VDC
P12.0V_ALW
P5.0V_ALW
P3.3V_MICOM
KBC3_RST#
KBC3_CHKPWRSW#
KBC3_SUSPWRON
P5.0V_AUX
P3.3V_AUX
P1.8V_AUX
SUSPWRGD
KBC3_RSMRST#
C
B
4
CHP3_SLPS5#
CHP3_SLPS4#
CHP3_SLPS3#
KBC3_PWRON
P5.0V
P3.3V
EGFX_CORE
P1.8V
P1.5V
P1.1V
P1.05V
VCCP_PWRGD
CPU_CORE
VRM3_CPU_PWRGD
CHP3_CLK_PWRGD
Samsung
Samsung
Samsung
KBC3_PWRGD
CPU1_CPUPWRGD
CHP3_CL_RST0#
CHP3_SUSSTAT#
PLT3_RST#
CPU1_CPURST#
SPI Signals
CL0 (MCH-ICH)
DMI
BSEL[2:0]
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CHP3_CPUSTP#
CHP3_PCISTP#
CLK0_HOST_CPU
CLK0_HOST_GMCH
200ms
3
S3
D
100ms
Tr 2ms
Tr 2ms
Tr 300us
~1.6ms
15.26ms
97.85ms
30.5us
61us
3.6ms
Tr 37us
Tr 48us
Tr 86us
Tr 913us
Tr 210us
Tr 985us
Tr 1.1ms
170us
Tr 372us
170us
300ns
117.5ms
1.038ms
139.8us
61us
1.182ms
>=1ms
>= 1ms
soft strap read
MCH soft straps
CPU_RST_DONE/ACK
Valid
0 ~ 1ms
Toggling (Valid)
Toggling (Valid)
Toggling (Valid)
2
BIOS Boot
BIOS Boot
DRAW
CHECK DEV. STEP
APPROVAL
MODULE CODE
ZHOU JUN
GUO LEI
BC LEE
DATE
REV
LAST EDIT
11/26/2007
TITLE
PV
1.0
XI’AN-EXT
MAIN
TIMING DIAGRAM
April 17, 2008 11:19:23 AM
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SRP Sheet Number: 5 of 53
C
B
AA
COM-22C-015(1996.6.5) REV. 3
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
3
CLOCK DISTRIBUTION
2
Rev. 0.1
1
D
CHP3_CLK_PWRGD
BSEL(2:0)
CK505
266 MHz
CLK0_HCLK0 / HCLK0#
PENRYN
CPU
BSEL
D
FSB
CPU_STP#
C
SEL_LCDCLK#
PCI_STP#
B
ITP_EN
Main PLL
SSC
48/96MHz
NO SSC
100MHz
/33MHz
SSC
266 MHz
100 MHz
100 MHz
100 MHz
100 MHz
48 MHz
14.318 MHz 17.86 / 31.25 MHz
33 MHz
Samsung
Samsung
Samsung
100 MHz
100 MHz
100 MHz
CLK0_HCLK1 / HCK1#
MCH3_CLKREQ#
CLK1_MCH3GPLL / 3GPLL#
CLK1_27M
CLK1_27M_SS
CLK1_PEG / PEG#
CLK1_PCIEICH / ICH#
CHP3_SATACLKREQ#
CLK1_SATA / SATA#
CLK3_USB48
CLK3_ICH14
CLK3_PCLKICH
MIN3_CLKREQ#
CLK1_MINIPCIE / MINIPCIE#
EXP3_CLKREQ#
CLK1_EXPCARD / EXPCARD#
LOM3_CLKREQ#
CLK1_PCIELOM / PCIELOM#
NB9M
X16 PEG
HPLL
MPLL
PM45
3GPLL
Cantiga
MCH
X4 DMI
PCIEPLL
SATAPLL
USBPLL
ICH9-M
32.768 KHz
OSC
MINI CARD (WLAN)
EXPRESS CARD
LOM
25 MHz
2801-004668
333/400 MHz
333/400 MHz
333/400 MHz
333/400 MHz
RTC Clock
32.768 KHz
2801-000111
CLK1_MCLK0/0#
CLK1_MCLK1/1#
CLK1_MCLK2/2#
CLK1_MCLK3/3#
HDA3_MDC_BCLK
HDA3_AUD_BCLK
HD 24 MHz
HDA3_HDMI_BCLK
SPI3_CLK
667/800 MHz
SODIMM A
SODIMM B
C
MDC
HD Audio
NB9M
SPI
B
A
14.318 MHz
2801-004667
4
14 MHz
OSC
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33 MHz
48 MHz
33 MHz
CLK3_PCLKMICOM
CLK3_FM48
CLK3_DBGLPC
3
MICOM
AU6371
DEBUG PORT
10 MHz
2801-004665
12 MHz
2801-004666
DRAW
CHECK
APPROVAL
MODULE CODE
2
ZHOU JUN
GUO LEI
BC LEE
DATE
DEV. STEP
REV
LAST EDIT
11/26/2007
TITLE
PV
1.0
XI’AN-EXT
MAIN
CLOCK DISTRIBUTION
April 17, 2008 11:19:23 AM
1
SAMSUNG
ELECTRONICS
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OFPAGE
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SRP Sheet Number: 6 of 53
A
COM-22C-015(1996.6.5) REV. 3
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
SCHEMATIC ANNOTATIONS AND BOARD INFORMATION
D
4
3
BOARD INFORMATION
2
1
D
PCI Devices
Devices
-
Voltage Rails
VDC
VCC_CORE
P1.05V
P1.8V_AUX
P0.9V
C
B
P1.8V
P1.1V
P1.5V
P3.3V
P5.0V
P3.3V_AUX
P5V_AUX
PRTC_BAT
P3.3V_MICOM
P5.0V_ALW
P12.0V_ALW
2
I C / SMB Address
Devices
ICH
SODIMM0
SODIMM1
CK-505 (Clock Generator)
MICOM
BATTERY
EMC2102(Thermal Sensor)
USB PORT Assign
PORT NUMBER
0
1
4
5
6
8
9
10
System Power States
A
CHP3_SLPS1* S1, Powered-On-Suspend(POS) : In this state, all clocks(except the 32.768KHz clock) are stopped.
CHP3_SLPS3* S3, Suspend-To-RAM(STR) : The system context is maintained in system DRAM, but power is shut off to non-critical circuits.
CHP3_SLP4S* S4, Suspend-To-Disk(STD) : The Context of the system is maintained on the disk. All power is then shut off to the system except for the logic required to resume.
CHP3_SLPS5* S5, Soft Off(SOFF) : System context is not maintained. All power is shut off except for the logic required to restart. A full boot is required when waking.
IDSEL#
-
Primary DC system power supply (7 to 21V)
Core voltage for Processor (1.308~1.068V)
Processor System Bus(PSB) Termination (1.05V)
GMCH & ICH8 Core Voltage
1.8V power rail for DDR2 (off in S4-S5)
0.9V switched power rail (off in S3-S5)
1.8V power rail for GDDR3 (off in S3-S5)
1.1V power rail for GFX (off in S3-S5)
1.5V power rail for ICH (off in S3-S5)
3.3V switched power rail (off in S3-S5)
5.0V switched power rail (off in S3-S5)
3.3V power rail (off in S4-S5)
5.0V power rail (off in S4-S5)
3.0V power rail (ALWAYS ON)
3.3V always on power rail for MICOM
5V power rail (Always On)
12V power rail (Always On)
Address
Master
1010 000X
1010 010X
1101 001x
Master
0001 011X
0111 101X
ASSIGNED TO
SYSTEM PORT A
SYSTEM PORT B
EXPRESS CARD
BLUETOOTH
SYSTEM PORT C
CAMERA
MINIPCI-E (WLAN)
MEMORY CARD
The system context is maintained in system DRAM. Power is maintained to PCI, the CPU, memory controller, memory, and all other criticial subsystems.
Note that this state does not preclude power being removed from non-essential devices, such as disk drives. During this state, CPU can be selected
for either Deep Sleep or Deeper Sleep.
In Deeper Sleep, CPU voltage reduced in this state to reduce the leakage power.
REQ/GNT#
-
Hex
A0h
A4h
D2h
16h
7Ah
Interrupts
-
Bus
SMBUS Master
-
Clock, Unused Clock Output Disable
Samsung
Samsung
Samsung
SMBUS Master
Thermal Sensor
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Memory is retained, and refreshes continue. All clocks stop except RTC clock.
Externally appears same as S5, but may have different wake events.
4
3
Crystal / Oscillator
TYPE
Crystal
Crystal
Crystal
Crystal
Crystal
FREQUENCY
32.768KHz
10MHz
14.318MHz
12MHz
25MHz
CPU Core Voltage Table
Active Mode
VID(6:0)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
1
0
0
0
0
1
0
0
0
1
0
0
1
0
0
0
0
1
0
0
0
1
0
0
1
0
0
1
0
0
1
0
0
0
0
1
0
0
1
0
0
0
0
1
0
0
1
0
0
0
0
1
0
0
1
1
0
0
0
0
1
0 1
1
0
1
0
0
1
0
1
1
0
1
0
1
0
0
1
1
0
0
1
0
1
1
0
0
1
0
1
0
0
1
1 0
0
0
0
1
0
0
1
0
0
0
0
1
0
0
1
0
0
0
0
0
0
1
0
0
1
1
0
DPRSLPVR
DPRSTP*
PSI2*
2
Voltage
1.5000 V
0
0
0
0
1
0
1.4875 V
1.4750 V
1 0
0
1
0
1
1.4625 V
0
0
1
1.4500 V
0
1
1
1.4375 V
1.4250 V
1
0
1
1.4125 V
1
1
1
1
1
0
1.4000 V
0
0
1
1.3875 V
0
0
1.3750 V
0
0
1
1
1
1.3625 V
0
0
1
0
1.3500 V
1.3375 V
0
1
1
1
1.3250 V
1
0
1.3125 V
1
1
1
0
0
1.3000 V
0
0
1.2875 V
1
0
0
1.2750 V
0
1
0
1
1
1.2625 V
1
1.2500 V
0
0
1
1
0
1.2375 V
1
1.2250 V
1
0
1
1
1
1.2125 V
1
1
0
0
1.2000 V
0
1
0
1.1875 V
0
0
0
1.1750 V
1
1
0
1
1.1625 V
1.1500 V
1
0
0
1
1 0
1.1375 V
1
1
0
1 0
1
1.1125 V
1
0
0
00
1.1000 V
0
0
1
1.0875 V
0
0
1
1.0750 V
1
0
1
1.0625 V
0
0
1
1.0500 V
1
0
1
1.0375 V
1
1
0
1.0250 V
1
1
1
1
1
1.0125 V
Active
0
1
0 or 1
DRAW
CHECK
APPROVAL
MODULE CODE
DEVICE
ICH Real Time Clock
MICOM
CLOCK-GENERATOR
MEMORY CARD
LAN
IMVP-6
Active/Deeper Sleep
Dual Mode Region
VID(6:0)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
DPRSLPVR
DPRSTP*
PSI2*
ZHOU JUN
GUO LEI
BC LEE
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
01.1250 V
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
1
1
0
0
0
1
0
0
1
1
0
0
1
1
1
0
1
0
1
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
DATE
DEV. STEP
REV
LAST EDIT
0
1
1
1
0
1
1
0
1
1
1 1
1
1
1
0
0 0
0
0
0
0
0
1
1
0
0
0
0
0
1
1
0
0
1
0
0
1
1
0
0
0
1
1
1
1
0
1
1
0
0
0
0
1 0
1
0
0
1
1
0
1
1
1
0
1
1
0
1
1
1
0
1
1
1
0
1
1
1
1
1
1
0
0
0
0
0
0
0
1
0
0
0
1
0
1
0
1
0
0
1
0
0
1
1
0
0
0
1
1
1
1
1
0
0
0
1
0
0
0
1
1
1
0
1
0
1
0
1
1
0
1
0
1
1
1
0
1
1
1
0
1
1
1
1
1
1
1
0
0
0
0
0
0
Deeper Slp
1
0
0 or 1
11/26/2007
PV
1.0
USAGE
H8S/2110BV
ICS951461
MEMORY CARD
LAN
Voltage
1.0000 V
0.9875 V
0.9750 V
0.9625 V
0.9500 V
0.9375 V
0.9250 V
0.9125 V
0.9000 V
0.8875 V
0.8750 V
0.8625 V
0.8500 V
0.8375 V
0.8250 V
0.8125 V
0.8000 V
0.7875 V
0.7750 V
0.7625 V
0.7500 V
0.7375 V
0.7250 V
0.7125 V
0.7000 V
0.6875 V
0.6750 V
0.6625 V
0.6500 V
0.6375 V
0.6250 V
0.6125 V
0.6000 V
0.5875 V
0.5750 V
0.5625 V
0.5500 V
0.5375 V
0.5250 V
0.5125 V
0.5000 V
TITLE
BOARD INFORMATION
Deeper Sleep/Extended Deeper Sleep
Dual Mode Region
VID(6:0)
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
*"1111111" : 0V power good asserted.
0
0
1
0
1
1
0
0
0
1
0
1
1
0
1
0
1
1
0
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
0
0
1
1
0
1
0
1
0
1
1
0
0
1
0
0
1
0
1
1
0
0
1
0
1
1
1
1
0
1
0
1
1
0
1
1
1
1
0
1
1
1
1
0
0
0
0
1
0
0
0
0
0
1
0
0
0
1
1
1
0
0
0
1
0
0
1
0
0
1
1
0
1
1
1
1
0
0
0
1
0
0
1
1
0
0
1
1
1
1
0
1
1
0
1
0
0
1
1
1
0
1
1
1
1
1
1
1
0
0
0
0
0
1
0
0
0
0
1
1
1
0
0
1
0
0
0
1
0
1
0
0
1
0
1
1
1
1
0
1
1
0
0
0
0
0
1
1
1
0
0
1
0
1
1
1
1
1
0
0
1
1
0
1
1
0
1
1
1
1
1
1
XI’AN-EXT
MAIN
April 17, 2008 11:19:23 AM
PAGE OF
1
D:/users/mentor/XiAn/INTEL/PV/XIAN_MV_0417
SRP Sheet Number: 7 of 53
Voltage
0.4875 V
0.4750 V
0.4625 V
0.4500 V
0.4375 V
0.4250 V
0.4125 V
0.4000 V
0.3875 V
0.3750 V
0.3625 V
0.3500 V
0.3375 V
0.3250 V
0.3125 V
0.3000 V
0.2875 V
0.2750 V
0.2625 V
0.2500 V
0.2375 V
0.2250 V
0.2125 V
0.2000 V
0.1875 V
0.1750 V1
0.1625 V
0.1500 V
0.1375 V
0.1250 V
0.1125 V
0.1000 V
0.0875 V
0.0750 V
0.0625 V
0.0500 V
0.0375 V
0.0250 V
0.0125 V
0.0000 V
0.0000 V
0.0000 V
0.0000 V
0.0000 V
0.0000 V
0.0000 V
0.0000 V
SAMSUNG
ELECTRONICS
PART NO.
BA41-00926/7A
7 60
C
B
A
COM-22C-015(1996.6.5) REV. 3
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
CPU1_D#(15:0)
CPU1_D#(31:16)
CPU1_D#(47:32)
D
CPU1_D#(63:48)
CPU1_DBI0#
CPU1_DBI1#
CPU1_DBI2#
CPU1_DBI3#
CPU1_DBSY#
CPU1_DRDY#
CPU1_DSTBN0#
CPU1_DSTBN1#
CPU1_DSTBN2#
CPU1_DSTBN3#
CPU1_DSTBP0#
CPU1_DSTBP1#
CPU1_DSTBP2#
CPU1_DSTBP3#
CPU1_ADS#
CPU1_BNR#
CPU1_BREQ#
CPU1_HIT#
CPU1_HITM#
CPU1_LOCK#
CPU1_A20M#
CPU1_BPRI#
CPU1_DEFER#
CPU1_FERR#
CPU1_IGNNE#
C
B
CPU1_INIT#
CPU1_INTR
CPU1_NMI
CPU1_RS0#
CPU1_RS1#
CPU1_RS2#
CPU1_SMI#
CPU1_TRDY#
CHP3_CPUSTP#
CHP3_PCISTP#
CHP3_CLK_PWRGD
CLK1_BSEL0
CLK1_BSEL1
CLK1_BSEL2
EXP3_CLKREQ#
LOM3_CLKREQ#
MCH3_CLKREQ#
MIN3_CLKREQ#
CHP3_SATACLKREQ#
CLK3_SMBCLK
CLK3_SMBDATA
CLK3_USB48
CLK3_FM48
CLK3_DBGLPC
CLK3_PCLKICH
CLK3_PCLKMICOM
CLK3_ICH14
4
CPU1_D#(15:0)
CPU1_D#(31:16)
CPU1_D#(47:32)
CPU1_D#(63:48)
CPU1_DBI0#
CPU1_DBI1#
CPU1_DBI2#
CPU1_DBI3#
CPU1_DBSY#
CPU1_DRDY#
CPU1_DSTBN0#
CPU1_DSTBN1# CLK1_BSEL0
CPU1_DSTBN2#
CPU1_DSTBN3#
CPU1_DSTBP0#
CPU1_DSTBP1#
CPU1_DSTBP2#
CPU1_DSTBP3#
CPU1_ADS#
CPU1_BNR#
CPU1_BREQ#
CPU1_HIT#
CPU1_HITM#
CPU1_LOCK#
CPU1_A20M#
CPU1_BPRI#
CPU1_DEFER#
CPU1_FERR#
CPU1_IGNNE#
CPU1_INIT#
CPU1_INTR
CPU1_NMI
CPU1_RS0#
CPU1_RS1#
CPU1_RS2#
CPU1_SMI#
CPU1_TRDY#
CPU_Penryn_MV_SV
CHP3_CPUSTP#
CHP3_PCISTP#
CHP3_CLK_PWRGD
CLK1_BSEL0
CLK1_BSEL1
CLK1_BSEL2
EXP3_CLKREQ#
LOM3_CLKREQ#
MCH3_CLKREQ#
MIN3_CLKREQ#
CHP3_SATACLKREQ#
CLK3_SMBCLK
CLK3_SMBDATA
CLK3_USB48
CLK3_FM48
CLK3_DBGLPC
CLK3_PCLKICH
CLK3_PCLKMICOM
CLK3_ICH14
CK_Clock_505M
A
4
CPU1_PWRGDCPU
CPU1_THRMTRIP#
CLK0_HCLK0
CLK0_HCLK0#
CLK0_HCLK1
CLK0_HCLK1#
CLK1_EXPCARD
CLK1_EXPCARD#
CLK1_MCH3GPLL
CLK1_MCH3GPLL#
CLK1_MINIPCIE
CLK1_MINIPCIE#
CLK1_PCIEICH
CLK1_PCIEICH#
CLK1_PCIELOM
CLK1_PCIELOM#
CLK1_SATA
CLK1_SATA#
CLK1_DREFSSCLK
CLK1_DREFSSCLK#
CLK1_DREFCLK
CLK1_DREFCLK#
CPU1_REQ#(4:0)
CPU1_A#(16:3)
CPU1_A#(35:17)
CPU1_ADSTB0#
CPU1_ADSTB1#
CPU1_BSEL0
CPU1_BSEL1
CPU1_BSEL2
CLK1_BSEL1
CLK1_BSEL2
MCH1_BSEL0
MCH1_BSEL1
MCH1_BSEL2
CLK0_HCLK0
CLK0_HCLK0#
CPU1_CPURST#
CHP3_SYSRST#
CPU1_DPRSTP#
CPU1_DPSLP#
CPU1_DPWR#
CPU1_SLP#
CPU1_STPCLK#
CPU1_PSI#
CPU2_THERMDA
CPU2_THERMDC
CPU1_VID(6:0)
CPU1_VCCSENSE
CPU1_VSSSENSE
CLK0_HCLK0
CLK0_HCLK0#
CLK0_HCLK1
CLK0_HCLK1#
CLK1_EXPCARD
CLK1_EXPCARD#
CLK1_MCH3GPLL
CLK1_MCH3GPLL#
CLK1_MINIPCIE
CLK1_MINIPCIE#
CLK1_PCIEICH
CLK1_PCIEICH#
CLK1_PCIELOM
CLK1_PCIELOM#
CLK1_SATA
CLK1_SATA#
CLK1_DREFSSCLK
CLK1_DREFSSCLK#
CLK1_DREFCLK
CLK1_DREFCLK#
CPU1_REQ#(4:0)
CPU1_A#(16:3)
CPU1_A#(35:17)
CPU1_ADSTB0#
CPU1_ADSTB1#
CPU1_BSEL0
CPU1_BSEL1
CPU1_BSEL2
CLK1_BSEL0
CLK1_BSEL1
CLK1_BSEL2
MCH1_BSEL0
MCH1_BSEL1
MCH1_BSEL2
CLK0_HCLK0
CLK0_HCLK0#
CPU1_CPURST#
CPU1_PWRGDCPU
CHP3_SYSRST#
CPU1_DPRSTP#
CPU1_DPSLP#
CPU1_DPWR#
CPU1_SLP#
CPU1_STPCLK#
CPU1_PSI#
CPU1_THRMTRIP#
CPU2_THERMDA
CPU2_THERMDC
CPU1_VID(6:0)
CPU1_VCCSENSE
CPU1_VSSSENSE
3
MEM1_VREF
CLK1_MCLK0
CLK0_HCLK1
CLK0_HCLK1#
CLK1_MCH3GPLL
CLK1_MCH3GPLL#
MCH3_CLKREQ#
CLK1_DREFSSCLK
CLK1_DREFSSCLK#
CLK1_DREFCLK
CLK1_DREFCLK#
CPU1_DPRSTP#
CPU1_LOCK#
CPU1_THRMTRIP#
CPU1_BPRI#
CPU1_CPURST#
CPU1_DEFER#
CPU1_DPWR#
CPU1_RS0#
CPU1_RS1#
CPU1_RS2#
CPU1_SLP#
CPU1_TRDY#
CPU1_A#(35:3)
CPU1_ADS#
CPU1_ADSTB0#
CPU1_ADSTB1#
CPU1_BNR#
CPU1_BREQ#
CPU1_D#(63:0)
CPU1_DBI0#
CPU1_DBI1#
CPU1_DBI2#
CPU1_DBI3#
CPU1_DBSY#
CPU1_DRDY#
CPU1_DSTBN0#
CPU1_DSTBN1#
CPU1_DSTBN2#
CPU1_DSTBN3#
CPU1_DSTBP0#
CPU1_DSTBP1#
CPU1_DSTBP2#
CPU1_DSTBP3#
CPU1_HIT#
CPU1_HITM#
CPU1_REQ#(4:0)
MCH1_BSEL0
MCH1_BSEL1
MCH1_BSEL2
PEG1_TXN(3:0)
PEG1_TXP(3:0)
VGA1_HDMI_HPD#
Samsung
Samsung
Samsung
CRT3_DDCCLK
CRT3_DDCDATA
CRT3_HSYNC
CRT3_VSYNC
CRT3_BLUE
CRT3_GREEN
CRT3_RED
LCD3_EDID_CLK
LCD3_EDID_DATA
MCH3_LCDVDDON
MCH3_BKLTEN
LCD3_BRIT
LCD1_ADATA0#
LCD1_ADATA1#
LCD1_ADATA2#
LCD1_ADATA0
LCD1_ADATA1
LCD1_ADATA2
LCD1_ACLK
Confidential
Confidential
Confidential
LCD1_ACLK#
CLK0_HCLK1
CLK0_HCLK1#
CLK1_MCH3GPLL
CLK1_MCH3GPLL#
MCH3_CLKREQ#
CLK1_DREFSSCLK
CLK1_DREFSSCLK#
CLK1_DREFCLK
CLK1_DREFCLK#
CPU1_DPRSTP#
CPU1_LOCK#
CPU1_THRMTRIP#
CPU1_BPRI#
CPU1_CPURST#
CPU1_DEFER#
CPU1_DPWR#
CPU1_RS0#
CPU1_RS1#
CPU1_RS2#
CPU1_SLP#
CPU1_TRDY#
CPU1_A#(35:3)
CPU1_ADS#
CPU1_ADSTB0#
CPU1_ADSTB1#
CPU1_BNR#
CPU1_BREQ#
CPU1_D#(63:0)
CPU1_DBI0#
CPU1_DBI1#
CPU1_DBI2#
CPU1_DBI3#
CPU1_DBSY#
CPU1_DRDY#
CPU1_DSTBN0#
CPU1_DSTBN1#
CPU1_DSTBN2#
CPU1_DSTBN3#
CPU1_DSTBP0#
CPU1_DSTBP1#
CPU1_DSTBP2#
CPU1_DSTBP3#
CPU1_HIT#
CPU1_HITM#
CPU1_REQ#(4:0)
MCH1_BSEL0
MCH1_BSEL1
MCH1_BSEL2
PEG1_TXN(3:0)
PEG1_TXP(3:0)
VGA1_HDMI_HPD#
CRT3_DDCCLK
CRT3_DDCDATA
CRT3_HSYNC
CRT3_VSYNC
CRT3_BLUE
CRT3_GREEN
CRT3_RED
LCD3_EDID_CLK
LCD3_EDID_DATA
MCH3_BKLTEN
LCD3_BRIT
LCD1_ADATA0#
LCD1_ADATA1#
LCD1_ADATA2#
LCD1_ADATA0
LCD1_ADATA1
LCD1_ADATA2
LCD1_ACLK
LCD1_ACLK#
MCH_CANTIGA_PM_DDR3
CLK1_MCLK0#
CLK1_MCLK1
CLK1_MCLK1#
CLK1_MCLK2
CLK1_MCLK2#
CLK1_MCLK3
CLK1_MCLK3#
MEM1_ABS(2:0)
MEM1_ACAS#
MEM1_ADM(7:0)
MEM1_AMA(14:0)
MEM1_ARAS#
MEM1_AWE#
MEM1_BBS(2:0)
MEM1_BCAS#
MEM1_BDM(7:0)
MEM1_BMA(14:0)
MEM1_BRAS#
MEM1_BWE#
MEM1_CKE0
MEM1_CKE1
MEM1_CKE2
MEM1_CKE3
MEM1_CS0#
MEM1_CS1#
MEM1_CS2#
MEM1_CS3#
MEM1_ODT0
MEM1_ODT1
MEM1_ODT2
MEM1_ODT3
MCH3_EXTTS0#
MCH3_EXTTS1#
MEM1_ADQ(63:0)
MEM1_ADQS#(7:0)
MEM1_ADQS(7:0)
MEM1_BDQ(63:0)
MEM1_BDQS#(7:0)
MEM1_BDQS(7:0)
DMI1_TXN_0
DMI1_TXN_1
DMI1_TXN_2
DMI1_TXN_3
DMI1_TXP_0
DMI1_TXP_1
DMI1_TXP_2
DMI1_TXP_3
DMI1_RXN_0
DMI1_RXN_1
DMI1_RXN_2
DMI1_RXN_3
DMI1_RXP_0
DMI1_RXP_1
DMI1_RXP_2
DMI1_RXP_3
PLT3_RST#
CHP3_CL_CLK_0
CHP3_CL_DATA_0
CHP3_CL_RST_0#
MCH3_ICHSYNC#MCH3_LCDVDDON
CHP3_DPRSLPVR
CHP3_PM_SYNC#
KBC3_PWRGD
HDA3_HDMI_BCLK
HDA3_HDMI_SYNC
HDA3_HDMI_RST#
HDA3_HDMI_SDI2
HDA3_HDMI_SDO
MCH3_HDMI_CLK
MCH3_HDMI_DATA
MEM1_VREF
CLK1_MCLK0
CLK1_MCLK0#
CLK1_MCLK1
CLK1_MCLK1#
CLK1_MCLK2
CLK1_MCLK2#
CLK1_MCLK3
CLK1_MCLK3#
MEM1_ABS(2:0)
MEM1_ACAS#
MEM1_ADM(7:0)
MEM1_AMA(14:0)
MEM1_ARAS#
MEM1_AWE#
MEM1_BBS(2:0)
MEM1_BCAS#
MEM1_BDM(7:0)
MEM1_BMA(14:0)
MEM1_BRAS#
MEM1_BWE#
MEM1_CKE0
MEM1_CKE1
MEM1_CKE2
MEM1_CKE3
MEM1_CS0#
MEM1_CS1#
MEM1_CS2#
MEM1_CS3#
MEM1_ODT0
MEM1_ODT1
MEM1_ODT2
MEM1_ODT3
MCH3_EXTTS0#
MCH3_EXTTS1#
MEM1_ADQ(63:0)
MEM1_ADQS#(7:0)
MEM1_ADQS(7:0)
MEM1_BDQ(63:0)
MEM1_BDQS#(7:0)
MEM1_BDQS(7:0)
DMI1_TXN_0
DMI1_TXN_1
DMI1_TXN_2
DMI1_TXN_3
DMI1_TXP_0
DMI1_TXP_1
DMI1_TXP_2
DMI1_TXP_3
DMI1_RXN_0
DMI1_RXN_1
DMI1_RXN_2
DMI1_RXN_3
DMI1_RXP_0
DMI1_RXP_1
DMI1_RXP_2
DMI1_RXP_3
PLT3_RST#
CHP3_CL_CLK_0
CHP3_CL_DATA_0
CHP3_CL_RST_0#
MCH3_ICHSYNC#
CHP3_DPRSLPVR
CHP3_PM_SYNC#
KBC3_PWRGD
HDA3_HDMI_BCLK
HDA3_HDMI_SYNC
HDA3_HDMI_RST#
HDA3_HDMI_SDI2
HDA3_HDMI_SDO
MCH3_HDMI_CLK
MCH3_HDMI_DATA
3
2
2
CLK1_PCIEICH
CLK1_PCIEICH#
CLK1_SATA
CLK1_SATA#
CLK3_ICH14
CLK3_PCLKICH
CLK3_USB48
CHP3_SATACLKREQ#
CPU1_A20M#
CPU1_DPRSTP#
CPU1_DPSLP#
CPU1_IGNNE#
CPU1_INIT#
CPU1_INTR
CPU1_NMI
CPU1_PWRGDCPU
CPU1_SMI#
CPU1_STPCLK#
CPU1_FERR#
CPU1_THRMTRIP#
DMI1_TXN_0
DMI1_TXN_1
DMI1_TXN_2
DMI1_TXN_3
DMI1_TXP_0
DMI1_TXP_1
DMI1_TXP_2
DMI1_TXP_3
DMI1_RXN_0
DMI1_RXN_1
DMI1_RXN_2
DMI1_RXN_3
DMI1_RXP_0
DMI1_RXP_1
DMI1_RXP_2
DMI1_RXP_3
SAT1_TXP0
SAT1_TXN0
SAT1_RXP0
SAT1_RXN0
SAT1_TXP1
SAT1_TXN1
SAT1_RXP1
SAT1_RXN1
CHP3_SATALED#
PEX1_EXPCARDTXN3
PEX1_EXPCARDTXP3
PEX1_EXPCARDRXN3
PEX1_EXPCARDRXP3
PEX1_GLAN_TXN4
PEX1_GLAN_TXP4
PEX1_GLAN_RXN4
PEX1_GLAN_RXP4
PEX1_MINITXN1
PEX1_MINITXP1
PEX1_MINIRXN1
PEX1_MINIRXP1
SPI3_CLK
SPI3_CS0#
SPI3_MISO
SPI3_MOSI
CHP3_BIOSWP#
LPC3_LFRAME#
LPC3_LAD(3:0)
CHECK
APPROVAL
MODULE CODE
CLK1_PCIEICH
CLK1_PCIEICH#
CLK1_SATA
CLK1_SATA#
CLK3_ICH14
CLK3_PCLKICH
CLK3_USB48
CHP3_SATACLKREQ#
CPU1_A20M#
CPU1_DPRSTP#
CPU1_DPSLP#
CPU1_IGNNE#
CPU1_INIT#
CPU1_INTR
CPU1_NMI
CPU1_PWRGDCPU
CPU1_SMI#
CPU1_STPCLK#
CPU1_FERR#
CPU1_THRMTRIP#
DMI1_TXN_0
DMI1_TXN_1
DMI1_TXN_2
DMI1_TXN_3
DMI1_TXP_0
DMI1_TXP_1
DMI1_TXP_2
DMI1_TXP_3
DMI1_RXN_0
DMI1_RXN_1
DMI1_RXN_2
DMI1_RXN_3
DMI1_RXP_0
DMI1_RXP_1
DMI1_RXP_2
DMI1_RXP_3
SAT1_TXP0
SAT1_TXN0
SAT1_RXP0
SAT1_RXN0
SAT1_TXP1
SAT1_TXN1
SAT1_RXP1
SAT1_RXN1
CHP3_SATALED#
PEX1_EXPCARDTXN3
PEX1_EXPCARDTXP3
PEX1_EXPCARDRXN3
PEX1_EXPCARDRXP3
PEX1_GLAN_TXN4
PEX1_GLAN_TXP4
PEX1_GLAN_RXN4
PEX1_GLAN_RXP4
PEX1_MINITXN1
PEX1_MINITXP1
PEX1_MINIRXN1
PEX1_MINIRXP1
SPI3_CLK
SPI3_CS0#
SPI3_MISO
SPI3_MOSI
CHP3_BIOSWP#
LPC3_LFRAME#
LPC3_LAD(3:0)
ICH_9M_B
DATEDRAW
ZHOU JUN
DEV. STEP
GUO LEI
REV
BC LEE
LAST EDIT
11/26/2007
TITLE
XI’AN-EXT
PV
1.0
BLOCKS (1/2)
April 17, 2008 11:19:23 AM
1
USB3_P0+
USB3_P0-
USB3_P1+
USB3_P1-
USB3_P4+
USB3_P4-
USB3_P5+
USB3_P5-
USB3_P6+
USB3_P6-
USB3_P8+
USB3_P8-
USB3_P9+
USB3_P9-
USB3_P10+
USB3_P10-
AUD3_SPKR
CHP3_BATLOW#
CHP3_CLK_PWRGD
CHP3_CPUSTP#
CHP3_DPRSLPVR
CHP3_PCISTP#
CHP3_PM_SYNC#
CHP3_SLPS3#
CHP3_SLPS4#
CHP3_SLPS5#
CHP3_SUSSTAT#
CHP3_SYSRST#
KBC3_PWRBTN#
KBC3_PWRGD
KBC3_RSMRST#
MCH3_ICHSYNC#
THM3_ALERT#
VRM3_CPU_PWRGD
CHP3_SERIRQ
KBC3_A20G
KBC3_CPURST#
KBC3_EXTSMI#
KBC3_WAKESCI#
KBC3_RUNSCI#
PCI3_CLKRUN#
PEX3_WAKE#
PLT3_RST#
CHP3_CL_CLK_0
CHP3_CL_DATA_0
CHP3_CL_RST_0#
SMB3_ALERT#
SMB3_CLK
SMB3_DATA
HDA3_AUD_BCLK
HDA3_AUD_RST#
HDA3_AUD_SDO
HDA3_AUD_SYNC
HDA3_MDC_BCLK
HDA3_MDC_RST#
HDA3_MDC_SDO
HDA3_MDC_SYNC
HDA3_HDMI_BCLK
HDA3_HDMI_RST#
HDA3_HDMI_SDO
HDA3_HDMI_SYNC
HDA3_AUD_SDI0
HDA3_MDC_SDI1
HDA3_HDMI_SDI2
MAIN
1
USB3_P0+
USB3_P0USB3_P1+
USB3_P1USB3_P4+
USB3_P4USB3_P5+
USB3_P5USB3_P6+
USB3_P6USB3_P8+
USB3_P8USB3_P9+
USB3_P9USB3_P10+
USB3_P10-
AUD3_SPKR
CHP3_BATLOW#
CHP3_CLK_PWRGD
CHP3_CPUSTP#
CHP3_DPRSLPVR
CHP3_PCISTP#
CHP3_PM_SYNC#
CHP3_SLPS3#
CHP3_SLPS4#
CHP3_SLPS5#
CHP3_SUSSTAT#
CHP3_SYSRST#
KBC3_PWRBTN#
KBC3_PWRGD
KBC3_RSMRST#
MCH3_ICHSYNC#
THM3_ALERT#
VRM3_CPU_PWRGD
CHP3_SERIRQ
KBC3_A20G
KBC3_CPURST#
KBC3_EXTSMI#
KBC3_WAKESCI#
KBC3_RUNSCI#
PCI3_CLKRUN#
PEX3_WAKE#
PLT3_RST#
CHP3_CL_CLK_0
CHP3_CL_DATA_0
CHP3_CL_RST_0#
SMB3_ALERT#
SMB3_CLK
SMB3_DATA
HDA3_AUD_BCLK
HDA3_AUD_RST#
HDA3_AUD_SDO
HDA3_AUD_SYNC
HDA3_MDC_BCLK
HDA3_MDC_RST#
HDA3_MDC_SDO
HDA3_MDC_SYNC
HDA3_HDMI_BCLK
HDA3_HDMI_RST#
HDA3_HDMI_SDO
HDA3_HDMI_SYNC
HDA3_AUD_SDI0
HDA3_MDC_SDI1
HDA3_HDMI_SDI2
SAMSUNG
ELECTRONICS
PART NO.
BA41-00926/7A
PAGE
D:/users/mentor/XiAn/INTEL/PV/XIAN_MV_0417
SRP Sheet Number: 8 of 53
608
OF
D
C
B
A
COM-22C-015(1996.6.5) REV. 3
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
3
2
1
D D
C C
B B
A
KBC3_PWRGD
THERM_STP#
THM3_ALERT#
CPU1_THRMTRIP#
CPU3_THRMTRIP#
KBC3_THERM_SMCLK
KBC3_THERM_SMDATA
CLK1_MCLK0
CLK1_MCLK0#
CLK1_MCLK1
CLK1_MCLK1#
CLK1_MCLK2
CLK1_MCLK2#
CLK1_MCLK3
CLK1_MCLK3#
MEM1_VREF
MCH3_EXTTS0#
MCH3_EXTTS1#
SMB3_CLK
SMB3_DATA
CLK3_SMBCLK
CLK3_SMBDATA
LOM3_CLKREQ#
CLK1_PCIELOM
CLK1_PCIELOM#
PEX1_GLAN_TXN4
PEX1_GLAN_TXP4
PEX1_GLAN_RXN4
PEX1_GLAN_RXP4
PEX3_WAKE#
PLT3_RST#
CHP3_BIOSWP#
SPI3_CLK
SPI3_CS0#
SPI3_MOSI
SPI3_MISO
KBC3_PWRGD
THERM_STP#
THM3_ALERT#
CPU1_THRMTRIP#
CPU3_THRMTRIP#
KBC3_THERM_SMCLK
KBC3_THERM_SMDATA
Thermal_Sensor_SMSC_Emc2102
MEM1_AMA(14:0)
CLK1_MCLK0
CLK1_MCLK0#
CLK1_MCLK1
CLK1_MCLK1#
CLK1_MCLK2
CLK1_MCLK2#
CLK1_MCLK3
CLK1_MCLK3#
MEM1_VREF
MCH3_EXTTS0#
MCH3_EXTTS1#
SMB3_CLK
SMB3_DATA
CLK3_SMBCLK
CLK3_SMBDATA
SODIMM_DDR2
LOM3_CLKREQ#
CLK1_PCIELOM
CLK1_PCIELOM#
PEX1_GLAN_TXN4
PEX1_GLAN_TXP4
PEX1_GLAN_RXN4
PEX1_GLAN_RXP4
PEX3_WAKE#
PLT3_RST#
LAN_Marvell_8055
CHP3_BIOSWP#
SPI3_CLK
SPI3_CS0#
SPI3_MOSI
SPI3_MISO
SPI_BIOS_ROM_16Mbit
MEM1_ABS(2:0)
MEM1_ACAS#
MEM1_ARAS#
MEM1_AWE#
MEM1_ADQ(63:0)
MEM1_ADM(7:0)
MEM1_ADQS#(7:0)
MEM1_ADQS(7:0)
MEM1_BMA(14:0)
MEM1_BBS(2:0)
MEM1_BCAS#
MEM1_BRAS#
MEM1_BWE#
MEM1_BDQ(63:0)
MEM1_BDM(7:0)
MEM1_BDQS#(7:0)
MEM1_BDQS(7:0)
LAN3_LINK10_100#
4
CPU2_THERMDA
CPU2_THERMDC
FAN3_FDBACK#
FAN5_VDD
MEM1_CKE0
MEM1_CKE1
MEM1_CS0#
MEM1_CS1#
MEM1_ODT0
MEM1_ODT1
MEM1_CKE2
MEM1_CKE3
MEM1_CS2#
MEM1_CS3#
MEM1_ODT2
MEM1_ODT3
CTRL18_25
CTRL_12
LAN3_ACTLED#
LAN3_LINK1000#
LAN3_VPDCLK
LAN3_VPDDATA
CPU2_THERMDA
CPU2_THERMDC
FAN3_FDBACK#
FAN5_VDD
MEM1_AMA(14:0)
MEM1_ABS(2:0)
MEM1_ACAS#
MEM1_ARAS#
MEM1_AWE#
MEM1_ADQ(63:0)
MEM1_ADM(7:0)
MEM1_ADQS#(7:0)
MEM1_ADQS(7:0)
MEM1_CKE0
MEM1_CKE1
MEM1_CS0#
MEM1_CS1#
MEM1_ODT0
MEM1_ODT1
MEM1_BMA(14:0)
MEM1_BBS(2:0)
MEM1_BCAS#
MEM1_BRAS#
MEM1_BWE#
MEM1_BDQ(63:0)
MEM1_BDM(7:0)
MEM1_BDQS#(7:0)
MEM1_BDQS(7:0)
MEM1_CKE2
MEM1_CKE3
MEM1_CS2#
MEM1_CS3#
MEM1_ODT2
MEM1_ODT3
CTRL18_25
CTRL_12
LAN3_ACTLED#
LAN3_LINK1000#
LAN3_LINK10_100#
LAN3_VPDCLK
LAN3_VPDDATA
KBC3_RST#
PCI3_CLKRUN#
CLK3_PCLKMICOM
LPC3_LFRAME#
LPC3_LAD(0:3)
CHP3_SERIRQ
PEX3_WAKE#
PLT3_RST#
KBC3_BLCKPWRSW#
KBC3_CHKPWRSW#
LID3_SWITCH#
KBC3_RSMRST#
CHP3_SLPS3#
CHP3_SLPS4#
CHP3_SLPS5#
KBC3_PWRBTN#
KBC3_SUSPWRON
SUSPWRGD
KBC3_PWRON
KBC3_PWRGD
KBC3_VRON
VRM3_CPU_PWRGD
CHP3_SUSSTAT#
KBC3_A20G
KBC3_CPURST#
KBC3_EXTSMI#
KBC3_RUNSCI# KBC3_SCLED#
KBC3_WAKESCI#
EXP3_CLKREQ# EXP3_CPPE#
CLK1_EXPCARD
CLK1_EXPCARD#
PEX1_EXPCARDTXN3
PEX1_EXPCARDTXP3
PEX1_EXPCARDRXN3
PEX1_EXPCARDRXP3
PEX3_WAKE#
PLT3_RST#
Samsung
Samsung
Samsung
HDA3_AUD_BCLK
HDA3_AUD_RST#
HDA3_AUD_SDO
HDA3_AUD_SYNC
HDA3_AUD_SDI0
KBC3_SPKMUTE
AUD3_GPIO0
AUD3_GPIO1
AUD5_MIC_VREF
AUD3_SPDIF_OUT
AUD3_SPKR
AUD3_PCBEEP
Confidential
Confidential
Confidential
KBC3_RST#
PCI3_CLKRUN#
CLK3_PCLKMICOM
LPC3_LFRAME#
LPC3_LAD(0:3)
CHP3_SERIRQ
PEX3_WAKE#
PLT3_RST#
KBC3_BLCKPWRSW#
KBC3_CHKPWRSW#
LID3_SWITCH#
KBC3_RSMRST#
CHP3_SLPS3#
CHP3_SLPS4#
CHP3_SLPS5#
KBC3_PWRBTN#
KBC3_SUSPWRON
SUSPWRGD
KBC3_PWRON
KBC3_PWRGD
KBC3_VRON
VRM3_CPU_PWRGD
CHP3_SUSSTAT#
KBC3_A20G
KBC3_CPURST#
KBC3_EXTSMI#
KBC3_RUNSCI# KBC3_SCLED#
KBC3_WAKESCI#
MICOM_Renesas2110_100p_Non_Dock
EXP3_CLKREQ# EXP3_CPPE#
CLK1_EXPCARD
CLK1_EXPCARD#
PEX1_EXPCARDTXN3
PEX1_EXPCARDTXP3
PEX1_EXPCARDRXN3
PEX1_EXPCARDRXP3
PEX3_WAKE#
PLT3_RST#
Express_Card
HDA3_AUD_BCLK
HDA3_AUD_RST#
HDA3_AUD_SDO
HDA3_AUD_SYNC
HDA3_AUD_SDI0
KBC3_SPKMUTE
AUD3_GPIO0
AUD3_GPIO1
AUD5_MIC_VREF
AUD3_SPDIF_OUT
AUD3_SPKR
AUD3_PCBEEP
HDA_Codec_Alc262
3
KBC5_TCLK
KBC5_TDATA
KBC5_KSI(0:7)
KBC5_KSO(0:7)
KBC5_KSO(8:15)
KBC3_THERM_SMCLK
KBC3_THERM_SMDATA
KBC3_SMCLK#
KBC3_SMDATA#
THERM_STP#
THM3_ALERT#
ADT3_SEL#
BAT3_TEMPA
KBC3_CHGBIT
KBC3_CHGEN
KBC3_SPKMUTE
KBC3_BKLTON
KBC3_RFOFF#
KBC3_LED_ACIN#
KBC3_LED_CHARGE#
KBC3_LED_POWER#
KBC3_NUMLED#
KBC3_NUMLED_A#
KBC3_CAPSLED#
KBC3_CAPSLED_A#
KBC3_SCLED_A#
EXP3_CPUSB#
EXP3_PERST#
SMB3_CLK
SMB3_DATA
AUD5_LINE_OUT_L
AUD5_LINE_OUT_R
AUD5_INTMIC
AUD5_SPK_L+
AUD5_SPK_L-
AUD5_SPK_R+
AUD5_SPK_R-
HP_OUT_L
HP_OUT_R
JCK_SENS_A
JCK_SENS_HP
JCK_SENS_MIC
USB3_P4+
USB3_P4-
MIC1
MIC2
KBC5_TCLK
KBC5_TDATA
KBC5_KSI(0:7)
KBC5_KSO(0:7)
KBC5_KSO(8:15)
KBC3_THERM_SMCLK
KBC3_THERM_SMDATA
KBC3_SMCLK#
KBC3_SMDATA#
THERM_STP#
THM3_ALERT#
ADT3_SEL#
BAT3_TEMPA
KBC3_CHGBIT
KBC3_CHGEN
KBC3_SPKMUTE
KBC3_BKLTON
KBC3_RFOFF#
KBC3_LED_ACIN#
KBC3_LED_CHARGE#
KBC3_LED_POWER#
KBC3_NUMLED#
KBC3_NUMLED_A#
KBC3_CAPSLED#
KBC3_CAPSLED_A#
KBC3_SCLED_A#
EXP3_CPUSB#
EXP3_PERST#
SMB3_CLK
SMB3_DATA
USB3_P4+
USB3_P4-
AUD5_LINE_OUT_L
AUD5_LINE_OUT_R
AUD5_INTMIC
AUD5_SPK_L+
AUD5_SPK_LAUD5_SPK_R+
AUD5_SPK_RHP_OUT_L
HP_OUT_R
MIC1
MIC2
JCK_SENS_A
JCK_SENS_HP
JCK_SENS_MIC
LCD1_ACLK
LCD1_ACLK#
LCD1_ADATA0
LCD1_ADATA0#
LCD1_ADATA1
LCD1_ADATA1#
LCD1_ADATA2
LCD1_ADATA2#
LCD3_EDID_CLK
LCD3_EDID_DATA
KBC3_BKLTON
LCD3_BKLTON
LCD3_BRIT
MCH3_BKLTEN
MCH3_LCDVDDON
CRT3_RED
CRT3_GREEN
CRT3_BLUE
CRT3_HSYNC
CRT3_VSYNC
VGA5_DDCCLK
VGA5_DDCDATA
CRT3_DDCCLK
CRT3_DDCDATA
MIN3_CLKREQ#
CLK1_MINIPCIE
CLK1_MINIPCIE#
PEX1_MINITXN1
PEX1_MINITXP1
PEX1_MINIRXN1
PEX1_MINIRXP1
USB3_P9+
USB3_P9-
WLON_LED#
KBC3_RFOFF#
PEX3_WAKE#
PLT3_RST#
SMB3_CLK
SMB3_DATA
MCD3_SDCD#
MCD3_SDCLK
MCD3_SDCMD
MCD3_SDDATA0
MCD3_SDDATA1
MCD3_SDDATA2
MCD3_SDDATA3
MCD3_SDWP
USB3_P10+
USB3_P10-
CLK3_FM48
2
LCD1_ACLK
LCD1_ACLK#
LCD1_ADATA0
LCD1_ADATA0#
LCD1_ADATA1
LCD1_ADATA1#
LCD1_ADATA2
LCD1_ADATA2#
LCD3_EDID_CLK
LCD3_EDID_DATA
KBC3_BKLTON
LCD3_BKLTON
LCD3_BRIT
MCH3_BKLTEN
MCH3_LCDVDDON
LCD_IF_14p1
CRT3_RED
CRT3_GREEN
CRT3_BLUE
CRT3_HSYNC
CRT3_VSYNC
VGA5_DDCCLK
VGA5_DDCDATA
CRT3_DDCCLK
CRT3_DDCDATA
Graphics_IF_CRT
MIN3_CLKREQ#
CLK1_MINIPCIE
CLK1_MINIPCIE#
PEX1_MINITXN1
PEX1_MINITXP1
PEX1_MINIRXN1
PEX1_MINIRXP1
USB3_P9+
USB3_P9-
WLON_LED#
KBC3_RFOFF#
PEX3_WAKE#
PLT3_RST#
SMB3_CLK
SMB3_DATA
PCIE_Minicard_Slot
MCD3_SDCD#
MCD3_SDCLK
MCD3_SDCMD
MCD3_SDDATA0
MCD3_SDDATA1
MCD3_SDDATA2
MCD3_SDDATA3
MCD3_SDWP
USB3_P10+
USB3_P10-
CLK3_FM48
Multi_MV_Au6371
DRAW
CHECK
APPROVAL
MODULE CODE
ZHOU JUN
GUO LEI
BC LEE
DATE
DEV. STEP
REV
LAST EDIT
BAT3_TEMPA
KBC3_CHGBIT
KBC3_CHGEN
KBC3_NUMLED#
ADT3_SGATE
BAT3_SMCLK#
BAT3_SMDATA#
KBC3_SMCLK#
KBC3_SMDATA#
KBC3_PWRON
KBC3_SUSPWRON
KBC3_SUSPWRON
CPU1_VID(6:0)
VCCP3_PWRGD
VRM3_CPU_PWRGD
CHP3_DPRSLPVR
CPU1_DPRSTP#
VRM3_VCC_PRM
CPU1_VCCSENSE
CPU1_VSSSENSE
KBC3_SUSPWRON
KBC3_PWRON
VCCP3_PWRGD
KBC3_SUSPWRON
11/26/2007
PV
1.0
ADT3_SEL#
SUSPWRGD
MEM1_VREF
KBC3_VRON
CPU1_PSI#
VRM3_ISEN1
VRM3_ISEN2
VRM3_VSUM
PWRON#
TITLE
ADT3_SEL#
BAT3_TEMPA
KBC3_CHGBIT
KBC3_CHGEN
KBC3_NUMLED#
ADT3_SGATE
BAT3_SMCLK#
BAT3_SMDATA#
KBC3_SMCLK#
KBC3_SMDATA#
PWR_MV_Charger_Isl6256a
KBC3_PWRON
KBC3_SUSPWRON
SUSPWRGD
PWR_MV_3V_5V
KBC3_SUSPWRON
MEM1_VREF
PWR_Memory
CPU1_VID(6:0)
KBC3_VRON
VCCP3_PWRGD
VRM3_CPU_PWRGD
CHP3_DPRSLPVR
CPU1_DPRSTP#
CPU1_PSI#
VRM3_ISEN1
VRM3_ISEN2
VRM3_VCC_PRM
VRM3_VSUM
CPU1_VCCSENSE
CPU1_VSSSENSE
PWR_MV_CPU_Isl6266a
KBC3_SUSPWRON
KBC3_PWRON
VCCP3_PWRGD
PWR_MV_Cantiga
KBC3_SUSPWRON
PWRON#
PWR_MV_DisCharger
XI’AN-EXT
MAIN
BLOCKS (2/2)
April 17, 2008 11:19:23 AM
1
SAMSUNG
ELECTRONICS
PART NO.
BA41-00926/7A
9 60
PAGE OF
D:/users/mentor/XiAn/INTEL/PV/XIAN_MV_0417
SRP Sheet Number: 9 of 53
A
SAMSUNG PROPRIETARY
COM-22C-015(1996.6.5) REV. 3
D:/users/mentor/XiAn/INTEL/PV/XIAN_MV_0417/design_blocks/CK_Clock_505M
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D
FSA FSB
BSEL0
BSEL1
0
0
0
0
1
1
1
1
4
FSC
HOST CLK
BSEL2
0
0
0
1
1
0
0
1
1
266 MHz
1
333 MHz
200 MHz
0
1
400 MHz
0
133 MHz
1
100 MHz
166 MHz
0
1
RSVD
C
CHP3_CPUSTP#
CHP3_PCISTP#
CHP3_CLK_PWRGD
CLK3_PCLKICH
CLK3_DBGLPC
CLK3_PCLKMICOM
MCH3_CLKREQ#
CHP3_SATACLKREQ#
CLK3_SMBCLK
B
CLK REQ DEVICE
CLK REQ A
CLK REQ B
CLK REQ E
A
CLK REQ F
SEL_LCDCLK*
LOW
HIGH
SATA
GMCH
MINI CARD
LOM3_CLKREQ#
Pin 20/21
DOT_96/DOT_96#
SRC_0/SRC_0#
CLK3_SMBDATA
SRC PORT
SRC2
SRC4
SRC6
SRC8
PEG_CLK/PEG_CLK#
4
CLK3_FM48
CLK3_USB48
CLK1_BSEL0
CLK1_BSEL1
CLK1_BSEL2
CLK3_ICH14
Pin 24/25
27M & 27M_SS
VDD_SRC_IO
10V
10V
100nF
100nF
C721
C696
nostuff
R630
R634
R633
R649
R651
R654
R620
R621
R623
R628
CLK3_XTAL_IN_14
Y502
14.31818MHz
1 2
2801-004667
C714
0.022nF
50V
Place 14.318MHz within
500mils of CK-505
10V
6.3V
10000nF
100nF
C693
C740
33
33
2.2K
10K
33
100
22.6 1%
22.6
475
CLK3_XTAL_OUT_14
C717
0.022nF
50V
VDD_REF
VDD_48
VDD_PCI
VDD_PLL3
VDD_SRC
VDD_CPU
CPU0
CPU0#
CPU1_MCH
CPU1_MCH#
SRC10
SRC10#
SRC9
SRC9#
SRC8_ITP
SRC8#_ITP#
SRC6
SRC6#
SRC4
SRC4#
SRC2
SRC2#
LCDCLK_27M
SRC0_DOT96
SRC0#_DOT96#
2
2
P3.3V
4
16
9
23
46
62
61
60
58
57
40
39
41
42
37
38
54
53
51
50
48
47
34
35
31
32
28
29
24
25
20
21
B526
VDD_REF
10V
BLM18PG181SN1
100nF
C722
DRAW
CHECK
APPROVAL
MODULE CODE
VDD_48
10V
100nF
C716
ZHOU JUN
GUO LEI
BC LEE
undefined
4700nF
C738
10V
VDD_PCI
10V
100nF
C694
DATE
DEV. STEP
REV
LAST EDIT
8/12/2006
VDD_SRC
10V
10V
100nF
C718
10V
100nF
100nF
C715
C692
TITLE
XI’AN-EXT
PV
1.0
CK_CLOCK_505M
April 17, 2008 11:19:23 AM
3
P3.3V
nostuff
B527
BLM18PG181SN1
VDD_CPU_IO
1%
1%
1%22.6
1%
1%
VDD_PLL3_IO
10V
100nF
C695
10V
6.3V
10000nF
100nF
C719
C743
nostuff
Samsung
Samsung
Samsung
50V0.5pF0.01nF
50V0.5pF0.01nF
0.033nF 50V
C836
C835
C837
Confidential
Confidential
Confidential
TME : OVER CLOCKING ENABLE
VDD_IO VDD_PLL3
10V
1%10K
R622
1%
10K
R626
100nF
C720
P3.3V
10K 1%
R624
1%
10K
R627
6.3V
10000nF
C742
nostuff
CLK3_48MHZ_R
CLK3_14MHZ_R
CLK3_PCIF_R
CLK3_PCI4_R
CLK3_PCI2_R
6.3V
10000nF
C741
1%10K
nostuff
R625
1%
10K
nostuff
R629
P1.5V
B528
BLM18PG181SN1
U510
SLG8SP513
19
VDD_IO
33
VDD_SRC_IO1
43
VDD_SRC_IO2
52
VDD_SRC_IO3
56
VDD_CPU_IO
27
VDD_PLL3_IO
55
NC
17
USB_FS_A
64
FSB_TESTMODE
5
REF_FS_C_TEST_SEL
44
CPUSTOP#
45
PCISTOP#
63
CLKPWRGD_PWRDN#
14
PCIF_5_ITP_EN
13
PCI_4_SEL_LCDCLK#
12
PCI_3
11
PCI_2
10
PCI_1_CLKREQ_B#
8
PCI_0_CLKREQ_A#
7
SCL
6
SDA
3
XTAL_IN
2
XTAL_OUT
18
VSS_48
59
VSS_CPU
22
VSS_IO
15
VSS_PCI
26
VSS_PLL3
1
VSS_REF
30
VSS_SRC1
36
VSS_SRC2
49
VSS_SRC3
1205-003156
This part is 64pin QFN package.
SRC11_CLKREQH#
SRC11#_CLKREQG#
SRC7_CLKREQF#
SRC7#_CLKREQE#
SRC3_CLKREQC#
SRC3#_CLKREQD#
LCDCLK#_27M_SS
3
1
VDD_CPU
10V
4700nF
C739
CLK0_HCLK0
CLK0_HCLK0#
CLK0_HCLK1
CLK0_HCLK1#
LOM3_CLKREQ#
CLK1_PCIELOM
CLK1_PCIELOM#
CLK1_EXPCARD
CLK1_EXPCARD#
EXP3_CLKREQ#
MIN3_CLKREQ#
CLK1_MINIPCIE
CLK1_MINIPCIE#
CLK1_MCH3GPLL
CLK1_MCH3GPLL#
CLK1_PCIEICH
CLK1_PCIEICH#
CLK1_SATA
CLK1_SATA#
CLK1_DREFSSCLK
CLK1_DREFSSCLK#
CLK1_DREFCLK
CLK1_DREFCLK#
CLOCK
1
SAMSUNG
ELECTRONICS
PART NO.
BA41-00926/7A
10 60
PAGE
OF
SRP Sheet Number: 10 of 53
D
C
B
A
COM-22C-015(1996.6.5) REV. 3
SAMSUNG PROPRIETARY
D:/users/mentor/XiAn/INTEL/PV/XIAN_MV_0417/design_blocks/CPU_Penryn_MV_SV
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
2
13
D
C
CPU1_A#(16:3)
CPU1_ADSTB0#
CPU1_A#(35:17)
CPU1_ADSTB1#
D
CPU SOCKET-P : MEROM / PENTYN
P1.05V
CPU500-1
PENRYN
3
4
5
6
7
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
1 / 4
J4
A3#
L5
A4#
L4
A5#
K5
A6#
M3
A7#
N2
A8#
J1
A9#
N3
A10#
P5
A11#
P2
A12#
L2
A13#
P4
A14#
P1
A15#
R1
A16#
M1
ADSTB0#
Y2
A17#
U5
A18#
R3
A19#
W6
A20#
U4
A21#
Y5
A22#
U1
A23#
R4
A24#
T5
A25#
T3
A26#
W2
A27#
W5
A28#
Y4
A29#
U2
A30#
V4
A31#
W3
A32#
AA4
A33#
AB2
A34#
AA3
A35#
V1
ADSTB1#
0143854500|bga_479p_sock
0
ADDR GROUP
CONTROL
1
ICH
ADDR GROUP
ADS#
BNR#
BPRI#
BR0#
DEFER#
DRDY#
DBSY#
IERR#
INIT#
LOCK#
RESET#
RS0#
RS1#
RS2#
TRDY#
HIT#
HITM#
A20M#
FERR#
IGNNE#
Samsung
Samsung
Samsung
STPCLK#
LINT0
LINT1
SMI#
REQ0#
REQ1#
REQ2#
REQ3#
REQ4#
R196
56
1%
H1
E2
G5
F1
H5
F21
E1
D20
B3
H4
C1
F3
F4
G3
G2
G6
E4
A6
A5
C4
D5
C6
B4
A3
K3
H2
K2
J3
L1
0
1
2
3
4
CPU1_ADS#
CPU1_BNR#
CPU1_BPRI#
CPU1_BREQ#
CPU1_DEFER#
CPU1_DRDY#
CPU1_DBSY#
CPU1_INIT#
CPU1_LOCK#
CPU1_CPURST#
CPU1_RS0#
CPU1_RS1#
CPU1_RS2# CPU1_D#(31:16)
CPU1_TRDY#
CPU1_HIT#
CPU1_HITM#
CPU1_A20M#
CPU1_FERR#
CPU1_IGNNE#
CPU1_STPCLK#
CPU1_INTR
CPU1_NMI
CPU1_SMI#
CPU1_REQ#(4:0)
CPU1_D#(15:0)
CPU1_DSTBN0#
CPU1_DSTBP0#
CPU1_DBI0#
CPU1_DSTBN1#
CPU1_DSTBP1#
CPU1_DBI1#
0
1
2
3
4
5
68
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
CPU500-2
PENRYN
2 / 4
E22
D0#
F24
D1#
E26
D2#
G22
D3#
F23
D4#
G25
D5#
E25
D6#
E23
D7#
K24
D8#
G24
D9#
J24
D10#
J23
D11#
H22
D12#
F26
D13#
K22
D14#
H23
D15#
J26
DSTBN0#
H26
DSTBP0#
H25
DINV0#
N22
D16#
K25
D17#
P26
D18#
R23
D19#
L23
D20#
M24
D21#
L22
D22#
M23
D23#
P25
D24#
P23
D25#
P22
D26#
T24
D27#
R24
D28#
L25
D29#
T25
D30#
N25
D31#
L26
DSTBN1#
M26
DSTBP1#
N24
DINV1#
0143854500|bga_479p_sock
DATA GRP 0
DATA GRP 2
DSTBN2#
DSTBP2#
DATA GRP 1
DATA GRP 3
DSTBN3#
DSTBP3#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
DINV2#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#
DINV3#
Y22
AB24
V24
V26
V23
T22
U25
U23
Y25
W22
Y23
W24
W25
AA23
AA24
AB25
Y26
AA26
U22
AE24
AD24
AA21
AB22
AB21
AC26
AD20
AE22
AF23
AC25
AE21
AD21
AC22
AD23
AF22
AC23
AE25
AF24
AC20
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
CPU1_D#(47:32)
CPU1_DSTBN2#
CPU1_DSTBP2#
CPU1_DBI2#
CPU1_D#(63:48)
CPU1_DSTBN3#
CPU1_DSTBP3#
CPU1_DBI3#
C
BB
A
Confidential
Confidential
Confidential
4 12
3
DRAW
CHECK
APPROVAL
MODULE CODE
ZHOU JUN
GUO LEI
BC LEE
undefined
DATE
DEV. STEP
REV
LAST EDIT
TITLE
11/8/2006
PV
1.0
XI’AN-EXT
CPU
PENRYN (1/2)
April 17, 2008 11:19:23 AM
SAMSUNG
ELECTRONICS
PART NO.
BA41-00926/7A
11 60
PAGE
OF
SRP Sheet Number: 11 of 53
A
SAMSUNG PROPRIETARY
COM-22C-015(1996.6.5) REV. 3
D:/users/mentor/XiAn/INTEL/PV/XIAN_MV_0417/design_blocks/CPU_Penryn_MV_SV
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
34
2
CPU SOCKET-P : MEROM / PENRYN
1
D
CPU500-3
PENRYN
3 / 4
A22
CLK0_HCLK0
CLK0_HCLK0#
CPU1_SLP#
CPU1_DPSLP#
CPU1_DPRSTP#
CPU1_DPWR#
CPU1_PWRGDCPU
CPU1_PSI#
CPU1_VID(6:0)
P1.05V
IF PROCHOT* USED, 56ohm -> 68ohm
CPU1_BSEL2
CPU1_BSEL1
CPU1_BSEL0
CPU1_PROCHOT#
R224
R223
R184
R185
CPU2_THERMDA
CPU2_THERMDC
C
P1.05V
CPU1_THRMTRIP#
R183
1K
1%
R182
2K
1%
CPU1_VCCSENSE
CPU1_VSSSENSE
COMP0,2(COMP1,3) should be
connected with Zo=27.4ohm(55ohm)
trace shorter than 1/2" to their
respective Banias socket pins.
GTLREF : Keep the Voltage divider within 0.5"
of the First GTLREF0 with Z0= 55 ohm trace
Minimize coupling of any switching signals to this net
R195
56
1%
nostuff
nostuff
R187 1K
6
5
4
3
2
1
0
54.9
27.4
54.9
27.4 1%
1KR186
1%
1%
1%
1%
B
CPU_CORE
CPU_CORE
CPU VRM side : 330uF X 6ea
nostuff
nostuff
C206
10000nF
6.3V
C269C267
10000nF
C207
10000nF
6.3V
C310
10000nF
C202
C264
10000nF
10000nF
6.3V
6.3V
C306
10000nF
10000nF
6.3V 6.3V 6.3V
6.3V 6.3V
C205
C203
10000nF
10000nF
6.3V
6.3V
C308
10000nF
10000nF
6.3V 6.3V
BCLK0
A21
BCLK1
D7
SLP#
B5
DPSLP#
E5
DPRSTP#
D24
DPWR#
D6
PWRGOOD
AE6
PSI#
AE2
VID_6
AF3
VID_5
AE3
VID_4
AF4
VID_3
AE5
VID_2
AF5
VID_1
AD6
VID_0
D21
PROCHOT#
A24
THRMDA
B25
THRMDC
C7
THERMTRIP#
C21
BSEL2
B23
BSEL1
B22
BSEL0
AD26
GTLREF
Y1
COMP3
AA1
COMP2
U26
COMP1
R26
COMP0
AF7
VCCSENSE
AE7
VSSSENSE
C23
TEST1
D25
TEST2
C24
TEST3
AF26
TEST4
AF1
TEST5
A26
TEST6
C3
TEST7
0143854500|bga_479p_sock
C270
10000nF
6.3V
20mils
C271
10000nF
H CLK
THERMAL
XDP/ITP SIGNALS
RSVD
Samsung
Samsung
Samsung
C266
C268
10000nF
6.3V
C312C307
10000nF
6.3V
R255
R285
C265
10000nF
10000nF
6.3V
6.3V
100 1%
Confidential
Confidential
Confidential
1%100
VCCA_1
VCCA_2
VCCP_1
VCCP_2
VCCP_3
VCCP_4
VCCP_5
VCCP_6
VCCP_7
VCCP_8
VCCP_9
VCCP_10
VCCP_11
VCCP_12
VCCP_13
VCCP_14
VCCP_15
VCCP_16
PREQ#
PRDY#
BPM3#
BPM2#
BPM1#
BPM0#
TCK
TDO
TMS
TRST#
DBR#
RSVD_1
RSVD_2
RSVD_3
RSVD_4
RSVD_5
RSVD_6
RSVD_7
RSVD_8
RSVD_9
TDI
B26
C26
K6
J6
M6
N6
T6
R6
K21
J21
M21
N21
T21
R21
V21
W21
V6
G21
AC1
AC2
AC4
AD1
AD3
AD4
AC5
AA6
AB3
AB5
AB6
C20
M4
N5
T2
V3
B2
D2
D22
D3
F6
CPU1_VCCSENSE
CPU1_VSSSENSE
R221
R222
R220
R219
R197
C185
10nF
25V
EC10
330uF
2.5V
AL
P1.5V
Placed as close as possible to
each of the four VCCA pins.
Resistance of routing trace < 0.1ohm
C186
10000nF
6.3V
P1.05V
C204
C209
100nF
100nF
P1.05V
54.9
1%
54.9
1%
1%
54.9
1%
54.9
0
C208
100nF
10V10V
CHP3_SYSRST#
C309
100nF
10V
C311
100nF
10V
C313
100nF
10V10V
AA11
AA14
AA16
AA19
AA2
AA22
AA25
AA5
AA8
AB1
AB11
AB13
AB16
AB19
AB26
AB4
AB8
AC11
AC14
AC16
AC19
AC21
AC24
AC3
AC6
AC8
AD11
AD13
AD16
AD19
AD2
AD22
AB23
AD25
AD5
AD8
AE1
AE11
AE14
AE16
AE19
AE23
AE26
AE4
AE8
AF11
AF13
AF16
AF19
AF2
AF21
A11
A14
A16
A19
A2
A23
A25
A4
A8
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
CPU_CORE
AA10
AA12
AA13
AA15
AA17
AA18
AA20
AA7
AA9
AB10
AB12
AB14
AB15
AB17
AB18
AB20
AB7
AB9
AC10
AC12
AC13
AC15
AC17
AC18
AC7
AC9
AD10
AD12
AD14
AD15
AD17
AD18
AD7
AD9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
A10
A12
A13
A15
A17
A18
A20
A7
A9
VSS_163
Y6
K23
K26
VSS_121
VSS_122
VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_33
VCC_34
VCC_35
VCC_36
VCC_37
VCC_38
VCC_39
VCC_40
VCC_41
VCC_42
VCC_43
VCC_44
VCC_45
VCC_46
VCC_47
VCC_48
VCC_49
VCC_50
VSS_161
VSS_162
Y3
Y24
VSS_123K4VSS_124
VSS_160
Y21
L3
M22
L21
L24
VSS_126
VSS_127L6VSS_128M2VSS_129
VSS_125
CPU500-4
PENRYN
4 / 4
0143854500|bga_479p_sock
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_154
V5
W1
W4
V25
W23
W26
M25
VSS_130
VSS_131M5VSS_132N1VSS_133
VSS_151
VSS_152
VSS_153
V2
U6
V22
N23
N26
VSS_134
VSS_150
VSS_149
U3
U24
P21
N4
VSS_136
VSS_135
VCC_51
VCC_52
VCC_53
VCC_54
VCC_55
VCC_56
VCC_57
VCC_58
VCC_59
VCC_60
VCC_61
VCC_62
VCC_63
VCC_64
VCC_65
VCC_66
VCC_67
VCC_68
VCC_69
VCC_70
VCC_71
VCC_72
VCC_73
VCC_74
VCC_75
VCC_76
VCC_77
VCC_78
VCC_79
VCC_80
VCC_81
VCC_82
VCC_83
VCC_84
VCC_85
VCC_86
VCC_87
VCC_88
VCC_89
VCC_90
VCC_91
VCC_92
VCC_93
VCC_94
VCC_95
VCC_96
VCC_97
VCC_98
VCC_99
VCC_100
VSS_147
VSS_148
T4
U21
P24
VSS_137
VSS_138P3VSS_139
VSS_146
VSS_145
T23
T26
P6
VSS_140R2VSS_141
AE9
AF10
AF12
AF14
AF15
AF17
AF18
AF20
AF9
B10
B12
B14
B15
B17
B18
B20
B7
B9
C10
C12
C13
C15
C17
C18
C9
D10
D12
D14
D15
D17
D18
D9
E10
E12
E13
E15
E17
E18
E20
E7
E9
F10
F12
F14
F15
F17
F18
F20
F7
F9
VSS_143
VSS_144
T1
R5
CPU_CORE
R22
VSS_142
R25
VSS_120
VSS_119
VSS_118
VSS_117
VSS_116
VSS_115
VSS_114
VSS_113
VSS_112
VSS_111
VSS_110
VSS_109
VSS_108
VSS_107
VSS_106
VSS_105
VSS_104
VSS_103
VSS_102
VSS_101
VSS_100
VSS_99
VSS_98
VSS_97
VSS_96
VSS_95
VSS_94
VSS_93
VSS_92
VSS_91
VSS_90
VSS_89
VSS_88
VSS_87
VSS_86
VSS_85
VSS_84
VSS_83
VSS_82
VSS_81
VSS_80
VSS_79
VSS_78
VSS_77
VSS_76
VSS_75
VSS_74
VSS_73
VSS_72
VSS_71
VSS_70
VSS_69
VSS_68
VSS_67
VSS_66
VSS_65
VSS_64
VSS_63
VSS_62
VSS_61
K1
J5
J25
J22
J2
H6
H3
H24
H21
G4
G26
G23
G1
F8
F5
F25
F22
F2
F19
F16
F13
F11
E8
E6
E3
E24
E21
E19
E16
E14
E11
D8
D4
D26
D23
D19
D16
D13
D11
D1
C8
C5
C25
C22
C2
C19
C16
C14
C11
B8
B6
B24
B21
B19
B16
B13
B11
AF8
AF6
AF25
D
C
A
R632
R652
R648
1K
1K
1%
1%
1K
CPU1_BSEL1
CPU1_BSEL2
R631
R653
R650
0
0
0
1%
4
CLK1_BSEL0
MCH1_BSEL0CPU1_BSEL0
CLK1_BSEL1
MCH1_BSEL1
CLK1_BSEL2
MCH1_BSEL2
3
DRAW
CHECK
APPROVAL
MODULE CODE
2
ZHOU JUN
GUO LEI
BC LEE
undefined
DATE
DEV. STEP
REV
LAST EDIT
11/8/2006
TITLE
XI’AN-EXT
PV
1.0
CPU
PENRYN (2/2)
April 17, 2008 11:19:23 AM
1
SAMSUNG
PART NO.
12 60
PAGE
ELECTRONICS
BA41-00926/7A
A
OF
SRP Sheet Number: 12 of 53
SAMSUNG PROPRIETARY
D:/users/mentor/XiAn/INTEL/PV/XIAN_MV_0417/design_blocks/Thermal_Sensor_SMSC_Emc2102COM-22C-015(1996.6.5) REV. 3
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D D
24
13
Thermal Monitor
P3.3V_AUX
nostuff
P3.3V_AUXP5.0V
R94
C71
R54
50V
0.47nF
10K
10K
KBC3_THERM_SMDATA
KBC3_THERM_SMCLK
R53
2.2nF
0
C72
50V
THM3_ALERT#
THERM_STP#
CPU2_THERMDC
CPU2_THERMDAFAN5_VDD
2
MMBT3904
1
Q11
3
10K
Place nearby Memory
R124 R125
C83
C82
10000nF
100nF
6.3V
10V
KBC3_PWRGD
C
FAN3_FDBACK#
CPU3_THRMTRIP#
TRIP_SET
3.3 * R2 / (R1 + R2) = (T - 75) / 21
So: T = 100’C
C79
10000nF
6.3V
P3.3V_AUX
R57
100K
1%
R56
56.2K
1%
R58
C73
100nF
10V
U6
EMC2102
1
VDD_3V
24
VDD_5V_1
27
VDD_5V_2
14
POWER_OK
16
0
RESET#
10
FAN_MODE
25
FAN_1
26
FAN_2
28
TACH
13
THERMTRIP#
9
SHDN_SEL
11
TRIP_SET
8
NC_1
15
NC_2
21
NC_3
1209-001718
SMDATA
SMCLK
ALERT#
SYS_SHDN#
DN1
DP1
DN2
DP2
DN3
DP3
CLK_SEL
CLK_IN
GND
THRM_PAD
SMBUS Address "7A"
10K
22
23
19
12
2
3
4
5
6
7
17
18
20
29
C
Samsung
Samsung
Samsung
B
A
4
P1.05V P3.3V
nostuff
R95
1%
1
32
MMBT3904
Q5
Confidential
Confidential
Confidential
R51
10K2K
FAN5_VDD
CPU3_THRMTRIP#CPU1_THRMTRIP#
3
FAN3_FDBACK#
FAN Control
Line Width = 20 mil
DESIGN
CHECK
APPROVAL
MODULE CODE
2
C43
10000nF
6.3V
P3.3V
ZHOU JUN
GUO LEI
BC LEE
R126
10K
1%
DATE
DEV. STEP
REV
LAST EDIT
J505
HDR-4P-1R-SMD
1
2
3
4
5
MNT1
6
MNT2
3711-000456
TITLE
4/15/2008
PV
1.0
XI’AN-EXT
THERMAL SENSOR
THERMAL SENSOR
April 17, 2008 11:19:23 AM
SAMSUNG
PART NO.
13 60
PAGE
1
SRP Sheet Number: 13 of 53
B
A
ELECTRONICS
BA41-00926/7A
OF
COM-22C-015(1996.6.5) REV. 3
D:/users/mentor/XiAn/INTEL/PV/XIAN_MV_0417/design_blocks/MCH_CANTIGA_PM_DDR3
C95
100nF
10V
R140
1K
1%
C103
R141
100nF
2K
10V
1%
nostuff for Cantiga
4
nostuff
CPU1_D#(63:0)
MCH1_HXSWING
MCH1_HVREF
CPU1_CPURST#
CPU1_SLP#
MCH1_HXSWING
MCH1_HVREF
P1.05V
EC6
C149
220uF
2.5V
AD
R138
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
1%24.9
1608
470nF
470nF
470nF
16V
C97
C96
C99
C154
22000nF-X5R
220nF
20%
10V
6.3V
F2
H_D#_0
G8
H_D#_1
F8
H_D#_2
E6
H_D#_3
G2
H_D#_4
H6
H_D#_5
H2
H_D#_6
F6
H_D#_7
D4
H_D#_8
H3
H_D#_9
M9
H_D#_10
M11
H_D#_11
J1
H_D#_12
J2
H_D#_13
N12
H_D#_14
J6
H_D#_15
P2
H_D#_16
L2
H_D#_17
R2
H_D#_18
N9
H_D#_19
L6
H_D#_20
M5
H_D#_21
J3
H_D#_22
N2
H_D#_23
R1
H_D#_24
N5
H_D#_25
N6
H_D#_26
P13
H_D#_27
N8
H_D#_28
L7
H_D#_29
N10
H_D#_30
M3
H_D#_31
Y3
H_D#_32
AD14
H_D#_33
Y6
H_D#_34
Y10
H_D#_35
Y12
H_D#_36
Y14
H_D#_37
Y7
H_D#_38
W2
H_D#_39
AA8
H_D#_40
Y9
H_D#_41
AA13
H_D#_42
AA9
H_D#_43
AA11
H_D#_44
AD11
H_D#_45
AD10
H_D#_46
AD13
H_D#_47
AE12
H_D#_48
AE9
H_D#_49
AA2
H_D#_50
AD8
H_D#_51
AA3
H_D#_52
AD3
Samsung
Samsung
Samsung
H_D#_53
AD7
H_D#_54
AE14
H_D#_55
AF3
H_D#_56
AC1
H_D#_57
AE3
H_D#_58
AC3
H_D#_59
AE11
H_D#_60
AE8
H_D#_61
AG2
H_D#_62
AD6
H_D#_63
C12
H_CPURST#
E11
H_CPUSLP#
C5
H_SWING
E3
H_RCOMP
B11
H_DVREF
A11
H_AVREF
Confidential
Confidential
Confidential
A8
VTTLF_1
AB2
VTTLF_2
L1
VTTLF_3
16V
16V
MCH1_BSEL0
MCH1_BSEL1
MCH1_BSEL2
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D
P1.05V
R136
221
1%
R137
100
1%
C
P1.05V
B B
A
4
3
2
P1.05V
C153
C155
100nF
220nF
10V
10V
T32
AA28
VCC_1
AA33
VCC_2
AA34
VCC_3
AB34
VCC_4
AC26
VCC_5
AC28
VCC_6
AC33
VCC_7
AC34
VCC_8
AE26
VCC_9
AE33
AF23
VCC_10
AF25
AF28
VCC_11
VCC_12
AF33
AG24
VCC_13
VCC_14
AG25
AG26
VCC_15
VCC_16
AG33
AG34
AH23
VCC_17
VCC_18
VCC_19
VCC CORE
AH25
AH28
VCC_20
VCC_21
VCC_22
AJ23
AJ26
VCC_23
AJ33
AK33
VCC_24
VCC_25
AM33
VCC_26
VCC_27
U33
U34
VCC_28
VCC_29
V33
V34
VCC_30
VCC_31
W33
Y33
VCC_32
VCC_33
Y34
VCC_34
VCC_35
T10
VTT_1
T11
T12
VTT_2
T13
VTT_3
VTT_4
T6
VTT_8T7VTT_9
VTT_5T2VTT_6T5VTT_7
T8
T9
VTT_10
U10
U11
VTT_11U1VTT_12
VTT_13
VTT
U12
U13
VTT_14
VTT_15
U6
U7
VTT_16U2VTT_17U3VTT_18U5VTT_19
VTT_20
U504-1
EB88CTGM
1 OF 5
0904-002377
HOST DATA BUS
CFG
VTTLF
CFG_2
CFG_3
CFG_4
CFG_5
CFG_6
CFG_7
CFG_0
CFG_1
T25
R25
CFG_8
CFG_10
CFG_9
P25
P20
P24
E21
C25
N24
C24
C23
M24
9
7
5
6
CFG_11
P21
N21
10
CFG_12
CFG_13
T21
R20
12
13
CFG_14
CFG_15
L21
M20
CFG_17
CFG_16
P29
H21
16
CFG_18
CFG_19
T28
R28
19
VCC_NCTF_1
CFG_20
AA29
20
VCC_NCTF_3
VCC_NCTF_2
VCC_NCTF_4
VCC_NCTF_5
AA32
AA30
AB30
AC29
MCH3_CFG(20:19)
MCH3_CFG(16)
MCH3_CFG(12:13)
MCH3_CFG(9:10)
MCH3_CFG(7:5)
VCC_NCTF_6
VCC_NCTF_7
VCC_NCTF_8
VCC_NCTF_9
AE29
AE30
AC30
AC32
VCC_NCTF_10
VCC_NCTF_11
VCC_NCTF_12
VCC_NCTF_13
AF30
AE32
AG29
AG30
AG32
VCC_NCTF_15
VCC_NCTF_16
VCC_NCTF_14
AH30
AH29
3 1
VCC_NCTF_17
VCC_NCTF_18
VCC_NCTF_19
VCC_NCTF_20
VCC_NCTF_21
AJ29
AJ32
AK23
AK24
AH32
2
NC
VCC_NCTF_25
VCC_NCTF_22
VCC_NCTF_23
VCC_NCTF_24
AK29
AK30
AK25
AK26
AK28
DRAW
CHECK
APPROVAL
MODULE CODE
VCC_NCTF_26
VCC_NCTF_27
VCC_NCTF_28
VCC_NCTF_29
VCC_NCTF_30
AL26
AL28
AL29
AL30
AK32
VCC_NCTF_31
VCC_NCTF_32
VCC_NCTF_33
VCC_NCTF_34
VCC_NCTF_35
U30
U32
AL32
AM30
AM32
ZHOU JUN
GUO LEI
BC LEE
undefined
VCC_NCTF_36
V29
U9
V1
VTT_21U8VTT_22
VTT_23V2VTT_24V3VTT_25
VCC_NCTF_37
VCC_NCTF_38
VCC_NCTF_39
VCC_NCTF_40
VCC_NCTF_41
V30
Y29
W29
W30
W32
DATE
11/8/2006
DEV. STEP
REV
LAST EDIT
C151
C109
470nF
2200nF
16V
10V
HOST ADDRESS BUS
H_ADSTB#_0
H_ADSTB#_1
HOST CONTROL
H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3
H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3
VCC_NCTF_42
VCC_NCTF_43
VCC_NCTF_44
Y30
Y32
TITLE
PV
1.0
H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8
H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31
H_A#_32
H_A#_33
H_A#_34
H_A#_35
H_ADS#
H_BNR#
H_BPRI#
H_BREQ#
H_DEFER#
H_DBSY#
H_DPWR#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_TRDY#
HPLL_CLK
HPLL_CLK#
H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3
H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4
H_RS#_0
H_RS#_1
H_RS#_2
MCH_CANTIGA_PM_DDR2
1
C107
C104
4700nF
4700nF
6.3V
6.3V
A14
C15
F16
H13
C18
M16
J13
10
P16
11
R16
12
N17
13
M13
14
E17
15
P17
16
F17
17
G20
18
B19
19
J16
20
E20
21
H16
22
J20
23
L17
24
A17
25
B17
26
L16
27
C21
28
J17
29
H20
30
B18
31
K17
32
B20
33
F21
34
K21
35
L20
H12
B16
G17
A9
F11
G12
E9
B10
J11
F9
H9
E12
H11
C9
AH7
AH6
J8
L3
Y13
Y1
L10
M7
AA5
AE6
L9
M8
AA6
AE5
0
B15
1
K13
2
F13
3
B13
4
B14
B6
F12
C8
P1.05V
XI’AN-EXT
CANTIGA (1/5)
April 17, 2008 11:19:23 AM
EC5
220uF
2.5V
AD
3
4
5
6
7
8
9
CPU1_A#(35:3)
CPU1_ADS#
CPU1_ADSTB0#
CPU1_ADSTB1#
CPU1_BNR#
CPU1_BPRI#
CPU1_BREQ#
CPU1_DEFER#
CPU1_DBSY#
CPU1_DPWR#
CPU1_DRDY#
CPU1_HIT#
CPU1_HITM#
CPU1_LOCK#
CPU1_TRDY#
CLK0_HCLK1
CLK0_HCLK1#
CPU1_DBI0#
CPU1_DBI1#
CPU1_DBI2#
CPU1_DBI3#
CPU1_DSTBN0#
CPU1_DSTBN1#
CPU1_DSTBN2#
CPU1_DSTBN3#
CPU1_DSTBP0#
CPU1_DSTBP1#
CPU1_DSTBP2#
CPU1_DSTBP3#
CPU1_REQ#(4:0)
CPU1_RS0#
CPU1_RS1#
CPU1_RS2#
SAMSUNG
ELECTRONICS
PART NO.
BA41-00926/7A
6014
OFPAGE
SRP Sheet Number: 14 of 53
D
C
A
D:/users/mentor/XiAn/INTEL/PV/XIAN_MV_0417/design_blocks/MCH_CANTIGA_PM_DDR3
COM-22C-015(1996.6.5) REV. 3
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
CRT3_BLUE
CRT3_GREEN
D
C
CRT3_RED
CRT3_DDCCLK
CRT3_DDCDATA
CRT3_HSYNC
CRT3_VSYNC
CRT3_BLUE
CRT3_GREEN
CRT3_RED
LCD3_EDID_CLK
LCD3_EDID_DATA
MCH3_LCDVDDON
MCH3_BKLTEN
LCD3_BRIT
LCD1_ADATA0#
LCD1_ADATA1#
LCD1_ADATA2#
LCD1_ADATA0
LCD1_ADATA1
LCD1_ADATA2
LCD1_ACLK
LCD1_ACLK#
4
R760
C810
R761
C811
R762
C812
R763
R767
R765
R766
0.012nF 50V
0.012nF 50V
0.012nF
B
R768
HDA3_HDMI_BCLK
HDA3_HDMI_SYNC
HDA3_HDMI_RST#
HDA3_HDMI_SDI2
HDA3_HDMI_SDO
R764
P1.05V
R170
1K
A
0.35V
500 ohm
for Cantiga
1%
R171
511
1%
C150
100nF
10V
MCH1_CLVREF
4 2
150
150
150
1K
75
75
75
2.4K
33
1%
1%
1%
50V
H32
J32
J29
L29
E28
G28
J28
1%
E29
G29
C31
E32
1%
F25
H25
1%
1%
K25
H24
K33
J33
M32
M33
M29
G32
L32
H47
E46
G40
A40
H48
D45
F40
B40
C40
C41
A41
H38
G37
J37
B42
G38
F37
K37
A37
B37
1%
C44
B43
E37
E38
B28
A28
B30
1%
B29
C29
VGA1_HDMI_HPD#
CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_VSYNC
CRT_BLUE
CRT_GREEN
CRT_RED
CRT_TVO_IREF
CRT_IRTN
TV_DCONSEL_0
TV_DCONSEL_1
TVA_DAC
TVB_DAC
TVC_DAC
TV_RTN
L_DDC_CLK
L_DDC_DATA
L_CTRL_CLK
L_CTRL_DATA
L_VDD_EN
L_BKLT_EN
L_BKLT_CTRL
LVDSA_DATA#_0
LVDSA_DATA#_1
LVDSA_DATA#_2
LVDSA_DATA#_3
LVDSA_DATA_0
LVDSA_DATA_1
LVDSA_DATA_2
LVDSA_DATA_3
LVDSA_CLK
LVDSA_CLK#
LVDSB_DATA#_0
LVDSB_DATA#_1
LVDSB_DATA#_2
LVDSB_DATA#_3
LVDSB_DATA_0
LVDSB_DATA_1
LVDSB_DATA_2
LVDSB_DATA_3
LVDSB_CLK
LVDSB_CLK#
LVDS_IBG
LVDS_VBG
LVDS_VREFH
LVDS_VREFL
HDA_BCLK
HDA_SYNC
HDA_RST#
HDA_SDI
HDA_SDO
TV VGA
LVDSHDA
3
0
1
2 3
10V
10V
10V
10V
100nF
100nF
100nF
100nF
C579
C223
C218
C577
L44
L40
N41
P48
N44
T43
U43
H44
J46
PEG_RX#_2
PEG_RX#_0
PEG_RX#_1
PEG_RX#_3
PEG_RX#_4
PEG_RX#_5
PEG_RX#_6
Y43
Y48
PEG_RX#_7
PEG_RX#_8
PEG_RX#_9
PEG_RX#_10
Y36
AA43
AD37
AC47
PEG_RX#_11
PEG_RX#_12
PEG_RX#_13
H43
J44
AD39
PEG_RX_0
PEG_RX#_15
PEG_RX#_14
L43
L41
N40
PEG_RX_1
PEG_RX_2
PEG_RX_3
PEG_RX_4
T42
P47
N43
PEG_RX_7
PEG_RX_5
PEG_RX_6
W47
U42
Y42
PEG_RX_8
PEG_RX_9
PCIE GFX
Y37
AA42
AD36
PEG_RX_10
PEG_RX_11
PEG_RX_12
PEG_RX_13
J41
AC48
AD40
PEG_RX_14
PEG_RX_15
M46
M47
M40
PEG_TX#_0
PEG_TX#_1
PEG_TX#_2
PEG_TX#_3
M42
R48
N38
PEG_TX#_4
PEG_TX#_5
PEG_TX#_6
T40
U37
U40
PEG_TX#_7
PEG_TX#_8
PEG_TX#_9
Y40
AA46
AA37
AA40
PEG_TX#_10
PEG_TX#_11
PEG_TX#_12
U504-2
EB88CTGM
AA15
AA21
AA20
VCC_AXG_1
VCC_AXG_3
VCC_AXG_2
Samsung
Samsung
Samsung
VCC_AXG_NCTF_8
VCC_AXG_NCTF_9
VCC_AXG_NCTF_10
AE16
AE17
AE19
Confidential
Confidential
Confidential
NC_4
NC_3
NC_1
NC_2
NC_5A5NC_6A6NC_7B4NC_8
NC_9
A46
A43
A44
A47
B45
B47
EC524
C819
330uF
22000nF-X5R
6.3V
20%
AL
6.3V
AB25
AA24
AA25
AB15
AB20
AB23
AA23
VCC_AXG_5
VCC_AXG_6
VCC_AXG_7
VCC_AXG_8
VCC_AXG_9
VCC_AXG_4
VCC_AXG_NCTF_12
VCC_AXG_NCTF_13
VCC_AXG_NCTF_14
VCC_AXG_NCTF_15
VCC_AXG_NCTF_16
VCC_AXG_NCTF_11
AF16
AF17
AF19
AH16
AG16
AG17
AG19
NC_11
NC_12
NC_10
NC_13
NC_14
NC_15
B48
BE2
BC1
BD1
BE47
BC48
BD48
C821
10000nF
6.3V
3
AM14
AM15
AN14
T14
T16
T17
U14
AE25
AF15
AF20
AG15
AG21
AH15
AH20
AJ15
AJ21
VCC_AXG_23
VCC_AXG_24
VCC_AXG_25
VCC_AXG_26
AL15
VCC_AXG_30
VCC_AXG_27
VCC_AXG_28
VCC_AXG_29
AC20
AC21
AC23
AC24
VCC_AXG_10
VCC_AXG_11
VCC_AXG_12
VCC_AXG_13
VCC_AXG_14
AE15
AE20
AE21
AE23
VCC_AXG_15
VCC_AXG_16
VCC_AXG_17
VCC_AXG_18
AE24
VCC_AXG_21
VCC_AXG_22
VCC_AXG_19
VCC_AXG_20
GFX VCC
2 OF 5
GFX VCC NCTF
VCC_AXG_NCTF_31
VCC_AXG_NCTF_32
VCC_AXG_NCTF_33
VCC_AXG_NCTF_34
VCC_AXG_NCTF_35
VCC_AXG_NCTF_36
AM19
NC_30
NC_31
BH46
AM20
NC_32
BH47
AM21
BH5
U16
NC_33
NC_34C3NC_35
BH6
VCC_AXG_NCTF_37
U19
U20
NC_36
C46
VCC_AXG_NCTF_21
VCC_AXG_NCTF_22
VCC_AXG_NCTF_23
VCC_AXG_NCTF_24
VCC_AXG_NCTF_25
VCC_AXG_NCTF_26
VCC_AXG_NCTF_27
VCC_AXG_NCTF_28
VCC_AXG_NCTF_29
AK20
NC_23
NC_24
BG45
AK21
NC_25
BG47
AL16
NC_26
BG48
AL19
BH2
VCC_AXG_NCTF_30
AL21
AM17
AM16
NC_27
NC_28
NC_29
BH3
BH44
BH43
VCC_AXG_NCTF_17
VCC_AXG_NCTF_18
VCC_AXG_NCTF_19
VCC_AXG_NCTF_20
AJ19
AJ16
AK16
AK17
AK19
AH17
AH19
NC RSVD
NC_20
NC_21
NC_22
NC_16
NC_17
NC_18
NC_19
BF1
BF3
BG1
BG2
BG4
BF48
BF46
U15
VCC_AXG_31
VCC_AXG_32
VCC_AXG_33
VCC_AXG_34
VCC_AXG_35
VCC_AXG_36
0904-002377
VCC_AXG_NCTF_41
VCC_AXG_NCTF_42
VCC_AXG_NCTF_43
VCC_AXG_NCTF_38
VCC_AXG_NCTF_39
VCC_AXG_NCTF_40
V17
V19
V21
V23
V24
V16
U21
NC_37D2NC_38
NC_39
NC_40
NC_41
NC_42
F1
E1
F48
E48
C48
D47
VCC_AXG_37
VCC_AXG_NCTF_44
NC_43
P1.05V
C822
C826
1000nF
6.3V
470nF
16V
C828
100nF
10V
C829
100nF
10V
Y21
Y24
Y26
V15
Y15
VCC_AXG_40
VCC_AXG_41
VCC_AXG_38
VCC_AXG_39
VCC_AXG_NCTF_45
VCC_AXG_NCTF_46
VCC_AXG_NCTF_47
VCC_AXG_NCTF_48
V25
V26
V28
W16
W17
RSVD_1
RSVD_2
AH10
AH12
AH13
2
10V
10V
10V
10V
2
0
1
3
100nF
100nF
100nF
100nF
C578
C576
C222
C219
J42
L46
AD43
AC46
M48
M39
PEG_TX_0
PEG_TX_1
PEG_TX_2
PEG_TX#_13
PEG_TX#_14
PEG_TX#_15
AB16
AA16
AA19
VCC_AXG_42
VCC_AXG_NCTF_1
VCC_AXG_NCTF_2
GFX VCC NCTF
VCC_AXG_NCTF_50
VCC_AXG_NCTF_51
VCC_AXG_NCTF_52
VCC_AXG_NCTF_53
VCC_AXG_NCTF_54
VCC_AXG_NCTF_55
VCC_AXG_NCTF_49
W19
W20
W21
W23
W24
W25
W26
RSVD10
RSVD13
RSVD11
RSVD12
RSVD_7
RSVD_8
RSVD_9
RSVD_3
RSVD_4
RSVD_5
RSVD_6
B2
AH9
AL34
AY21
AK34
AN35
AM35
Y39
T39
U36
U39
M43
R47
N37
PEG_TX_7
PEG_TX_8
PEG_TX_9
PEG_TX_3
PEG_TX_4
PEG_TX_5
PEG_TX_6
AC17
AC16
AB19
AB17
VCC_AXG_NCTF_7
VCC_AXG_NCTF_6
VCC_AXG_NCTF_5
VCC_AXG_NCTF_4
VCC_AXG_NCTF_3
VCC_AXG_NCTF_60
VCC_AXG_NCTF_56
VCC_AXG_NCTF_57
VCC_AXG_NCTF_58
VCC_AXG_NCTF_59
Y19
Y16
Y17
W28
RSVD_11
RSVD_12
RSVD_13
RSVD_14
RSVD_15
RSVD_10
RSVD_16
M1
B31
K12
BF18
BF23
BH18
BG23
DRAW
CHECK
APPROVAL
MODULE CODE
PEG1_TXN(3:0)
PEG1_TXP(3:0)
Y46
AA36
AA39
PEG_TX_10
PEG_TX_11
PEG_TX_12
PEG_TX_13
RSVD_18
RSVD_19
RSVD_20
RSVD_17
N36
R33
M36
AD42
AD46
PEG_TX_14
PEG_TX_15
PCIE GFX
RSVD_21
RSVD_22
T24
T33
ZHOU JUN
GUO LEI
BC LEE
undefined
DMICLKMEPMMISC
DPLL_REF_CLK
DPLL_REF_CLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
PM_DPRSTP#
PM_EXT_TS#_0
PM_EXT_TS#_1
DDPC_CTRLCLK
DDPC_CTRLDATA
SDVO_CTRLCLK
SDVO_CTRLDATA
DATE
11/8/2006
DEV. STEP
REV
LAST EDIT
PEG_COMPI
PEG_COMPO
GFX_VID_0
GFX_VID_1
GFX_VID_2
GFX_VID_3
GFX_VID_4
GFX_VR_EN
DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3
DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3
DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3
DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3
PEG_CLK
PEG_CLK#
CL_CLK
CL_DATA
CL_PWROK
CL_RST#
CL_VREF
PM_SYNC#
DPRSLPVR
PWROK
RSTIN#
THERMTRIP#
CLKREQ#
ICH_SYNC#
TSATN#
P3.3V
PV
1.0
T37
T36
B33
B32
G33
F33
E33
C34
AE41
AE37
AE47
AH39
AE40
AE38
AE48
AH40
AE35
AE43
AE46
AH42
AD35
AE44
AF46
AH43
B38
A38
E41
F41
F43
E43
AH37
AH36
AN36
AJ35
AH34
R29
B7
R32
AT40
AT11
T20
N33
P32
N28
M28
G36
E36
K36
H36
B12
R159
R165
R161
TITLE
MCH_CANTIGA_PM_DDR2
50 ohm for Cantiga
R166
100
R149
0
R162
0
R164
2.2K
R771
MCH3_TSATN#
56
R142
10K 1%
1%
10K
1%
10K
XI’AN-EXT
CANTIGA (2/5)
April 17, 2008 11:19:23 AM
1
P1.05V
1608
1%
49.9
DMI1_TXN_0
DMI1_TXN_1
DMI1_TXN_2
DMI1_TXN_3
DMI1_TXP_0
DMI1_TXP_1
DMI1_TXP_2
DMI1_TXP_3
DMI1_RXN_0
DMI1_RXN_1
DMI1_RXN_2
DMI1_RXN_3
DMI1_RXP_0
DMI1_RXP_1
DMI1_RXP_2
DMI1_RXP_3
CLK1_DREFCLK
CLK1_DREFCLK#
CLK1_DREFSSCLK
CLK1_DREFSSCLK#
CLK1_MCH3GPLL
CLK1_MCH3GPLL#
CHP3_CL_CLK_0
CHP3_CL_DATA_0
KBC3_PWRGD
CHP3_CL_RST_0#
MCH1_CLVREF
CHP3_PM_SYNC#
CPU1_DPRSTP#
CHP3_DPRSLPVR
KBC3_PWRGD
1%
PLT3_RST#
CPU1_THRMTRIP#
MCH3_EXTTS0#
MCH3_EXTTS1#
P3.3V
MCH3_HDMI_CLK
MCH3_HDMI_DATA
MCH3_CLKREQ#
MCH3_ICHSYNC#
P1.05V
1%
MCH3_EXTTS0#
MCH3_EXTTS1#
MCH3_CLKREQ#
SAMSUNG
PART NO.
PAGE
1
SRP Sheet Number: 15 of 53
ELECTRONICS
BA41-00926/7A
OF
D
C
B
A
6015
COM-22C-015(1996.6.5) REV. 3
SAMSUNG PROPRIETARY
D:/users/mentor/XiAn/INTEL/PV/XIAN_MV_0417/design_blocks/MCH_CANTIGA_PM_DDR3
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
D
4
MEM1_ABS(2:0)
MEM1_ADM(7:0)
MEM1_ADQS#(7:0)
MEM1_ADQS(7:0)
C
MEM1_AMA(14:0)
MEM1_ACAS#
MEM1_ARAS#
MEM1_AWE#
MEM1_CS0#
MEM1_CS1#
MEM1_ODT0
R150
80.6
1%
R151
80.6
1%
MEM1_ODT1
MEM1_CKE0
MEM1_CKE1
CLK1_MCLK0
CLK1_MCLK0#
CLK1_MCLK1
CLK1_MCLK1#
B
P1.8V_AUX
P1.8V_AUX
R176
1K
1%
C158
C157
2200nF
10nF
R175
3.01K
1%
R174
1K
1%
25V
C159
10nF
25V
10V
C160
2200nF
10V
4
MEM1_ADQ(63:0)
0
BD21
1
BG18
2
AT25
0
AM37
1
AT41
2
AY41
3
AU39
4
BB12
5
AY6
6
AT7
AJ5
0
AJ43
1
AT43
2
BA44
3
BD37
4
AY12
5
BD8
6
AU9
7
AM8
0
AJ44
1
AT44
2
BA43
3
BC37
4
AW12
5
BC8
6
AU8
7
AM7
0
BA21
1
BC24
2
BG24
3
BH24
4
BG25
5
BA24
6
BD24
7
BG27
8
BF25
9
AW24
10
BC21
11
BG26
12
BH26
13
BH17
14
AY25
BD20
BB20
AY20
BA17
AY16
BD17
AY17
BC28
AY28
AP24
AR24
AT21
AR21
BG22
BH21
BF28
BH28
Route as short as possible
Teenah
Cantiga
0
2
6
4
1
3 37
AJ38
AJ41
AJ40
AJ36
AM38
AN38
SA_BS_0
SA_BS_1
SA_BS_2
SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7
SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6
SA_DQS_7
SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8
SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
SA_MA_14
SA_CAS#
SA_RAS#
SA_WE#
SA_CS#_0
SA_CS#_1
SA_ODT_0
SA_ODT_1
SA_CKE_0
SA_CKE_1
SA_CK_0
SA_CK#_0
SA_CK_1
SA_CK#_1
SM_RCOMP
SM_RCOMP#
SM_RCOMP_V_OH
SM_RCOMP_V_OL
SM_RCOMP : 20 ohm to VSS
SM_RCOMP# : 20 ohm to P1.8V_AUX
SM_RCOMP : 80 ohm to P1.5V_AUX
SM_RCOMP# : 80 ohm to VSS
SA_DQ_0
SA_DQ_1
SA_DQ_5
SA_DQ_4
SA_DQ_3
SA_DQ_2
SYSTEM MEMORY A
Samsung
Samsung
Samsung
SB_DQ_3
SB_DQ_2
SB_DQ_0
SB_DQ_1
AP46
AP47
AK47
AH46
Confidential
Confidential
Confidential
3
0
44
43
42
AU10
AV9
BA11
SA_DQ_41
SA_DQ_42
SA_DQ_43
455
47
46
BD9
AY8
BA6
SA_DQ_44
SA_DQ_45
SA_DQ_46
2
4819
49
AT9
AV5
AV7
SA_DQ_47
SA_DQ_48
SA_DQ_49
51 56
53
52 57
AN8
AU5
SA_DQ_50
SA_DQ_51
SA_DQ_52
3
13
10 61
16
17
82511
AM42
AM44
SA_DQ_7
SA_DQ_6
9
AN43
AN44
SA_DQ_8
SA_DQ_9
15 58
12
AU40
AT38
AN41
AN39
AU44
AU42
SA_DQ_10
SA_DQ_11
SA_DQ_12
SA_DQ_13
SA_DQ_14
18
AV39
AY44
BA40
SA_DQ_15
SA_DQ_16
SA_DQ_17
21
AY43
BD43
AV41
SA_DQ_18
SA_DQ_19
SA_DQ_20
22
23
BB41
BC40
SA_DQ_21
SA_DQ_22
30
26
24
29
28 40
317
AY37
BD38
AV37
AT36
AY38
BB38
AV36
SA_DQ_23
SA_DQ_24
SA_DQ_25
SA_DQ_26
SA_DQ_27
SA_DQ_28
SA_DQ_29
SA_DQ_30
SYSTEM MEMORY A
33
32
AW36
BD13
AU11
SA_DQ_31
SA_DQ_32
34
BC11
SA_DQ_33
36
35
BA12
AU13
AV13
SA_DQ_34
SA_DQ_35
SA_DQ_36
39
38
BD12
BC12
BB9
SA_DQ_37
SA_DQ_38
SA_DQ_39
41
BA9
SA_DQ_40
U504-3
EB88CTGM
3 OF 5
0904-002377
SYSTEM MEMORY B
SB_DQ_30
SB_DQ_31
SB_DQ_32
SB_DQ_33
SB_DQ_34
SB_DQ_35
SB_DQ_36
SB_DQ_37
SB_DQ_38
BH11
35
BG8
36
BH12
3727
BF11
BF8
BG7
40
SB_DQ_39
SB_DQ_40
SB_DQ_41
AY3
BC5
BC6
43
426
SB_DQ_42
SB_DQ_43
SB_DQ_44
BF6
BF5
AY1
45
46
SB_DQ_45
SB_DQ_46
SB_DQ_47
BA1
AV2
BD3
47
2
SB_DQ_49
SB_DQ_50
SB_DQ_48
AR3
AU3
51
SB_DQ_20
SB_DQ_21
SB_DQ_22
SB_DQ_23
SB_DQ_24
SB_DQ_25
SB_DQ_26
SB_DQ_27
SB_DQ_28
BG38
BF38
26224
BH35
BG35
28
SB_DQ_29
BH34
BH14
BH40
BG34
BG12
BG39
321 9
29
30 39
31
34
33
SB_DQ_10
SB_DQ_11
SB_DQ_12
SB_DQ_13
SB_DQ_14
SB_DQ_15
SB_DQ_16
SB_DQ_17
SB_DQ_18
SB_DQ_5
SB_DQ_4
SB_DQ_6
SB_DQ_7
SB_DQ_8
SB_DQ_9
AJ48
AJ46
5 44
AM48
7
AP48
8
AU47
AU46
10
BA48
11
AY48
12
AT47
AR47
1414182
13716
SB_DQ_19
BF40
BF41
BF43
BE45
BA47
152520 38
BC41
BC47
BC46
BC44
BG43
17 22
19
21 41
3
55
54
AU6
AT5
AN10
SA_DQ_53
SA_DQ_54
SA_DQ_55
SB_DQ_51
SB_DQ_52
SB_DQ_53
AY2
AV1
AN2
53
52
54
DRAW
CHECK
APPROVAL
MODULE CODE
AM11
AM5
AJ9
SA_DQ_56
SA_DQ_57
SB_DQ_54
SB_DQ_55
AL1
AP3
AR1
55
57
5623
6050
5927
AN12
AM13
AJ8
SA_DQ_60
SA_DQ_58
SA_DQ_59
SB_DQ_56
SB_DQ_57
SB_DQ_58
AJ1
AL2
AH1
584 5049
6048
59
6320
62
AJ11
AJ12
SA_DQ_61
SA_DQ_62
SA_DQ_63
SB_DQ_59
SB_DQ_60
SB_DQ_61
AH3
AM2
AM3
61
63
62
ZHOU JUN
GUO LEI
BC LEE
SM_REXT
SM_VREF
SM_DRAMRST#
SM_PWROK
SB_CAS#
SB_RAS#
SB_WE#
SB_CS#_0
SB_CS#_1
SB_ODT_0
SB_ODT_1
SB_CKE_0
SB_CKE_1
SB_CK_0
SB_CK#_0
SB_CK_1
SB_CK#_1
SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7
SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SYSTEM MEMORY B
SB_DQS_4
SB_DQS_5
SB_DQS_6
SB_DQS_7
SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8
SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13
SB_MA_14
SB_BS_0
SB_BS_1
SB_BS_2
SB_DQ_62
SB_DQ_63
AJ3
DATE
11/8/2006
DEV. STEP
REV
LAST EDIT
R152
BF17
AV42
BC36
MCH3_DDR_RST#
AR36
R173
BG16
AU17
BF14
AV16
AR13
BF15
AY13
AY36
BB36
AV24
AU24
AU20
AV20
0
AM47
1
AY47
BD40
3
BF35
4
BG11
5
BA3
6
AP1
7
AK2
0
AL46
1
AV47
2
BH41
3
BH37
4
BG9
5
BC2
6
AT2
7
AN5
0
AL47
1
AV48
2
BG41
3
BG37
4
BH9
5
BB2
6
AU1
7
AN6
0
AV17
1
BA25
2
BC25
3
AU25
4
AW25
5
BB28
6
AU28
7
AW28
8
AT33
9
BD33
10
BB16
11
AW33
12
AY33
13
BH15
14
AU33
0
BC16
1
BB17
2
BB33
MEM1_BDQ(63:0)
TITLE
PV
MCH_CANTIGA_PM_DDR2
1.0
1
MEM1_VREF
1%
499
MEM1_VREF
0
MEM1_BCAS#
MEM1_BRAS#
MEM1_BWE#
MEM1_CS2#
MEM1_CS3#
MEM1_ODT2
MEM1_ODT3
MEM1_CKE2
MEM1_CKE3
CLK1_MCLK2
CLK1_MCLK2#
CLK1_MCLK3
CLK1_MCLK3#
MEM1_BDM(7:0)
MEM1_BDQS#(7:0)
MEM1_BDQS(7:0)
MEM1_BMA(14:0)
MEM1_BBS(2:0)
XI’AN-EXT
CANTIGA (3/5)
April 17, 2008 11:19:23 AM
1
PLACE EACH CAP NEAR AV42 PIN
PART NO.
PAGE
nostuff
nostuff
C191
C190
100nF
100nF
25V
25V
SAMSUNG
ELECTRONICS
BA41-00926/7A
OF
SRP Sheet Number: 16 of 53
D
C
B
AA
6016
COM-22C-015(1996.6.5) REV. 3
SAMSUNG PROPRIETARY
D:/users/mentor/XiAn/INTEL/PV/XIAN_MV_0417/design_blocks/MCH_CANTIGA_PM_DDR3
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
4
P1.8V_AUX
EC7
220uF
2.5V
AD
C156
22000nF-X5R
22000nF-X5R
20%
6.3V
Place the edge
C102
3
20%
6.3V
COULD BE NC FOR DDR2 BD
2
1
DD
D6
BAT54
3
C142
22000nF-X5R
20%
6.3V
C187
100nF
10V
EC526
220uF
2.5V
AD
C558
100nF
10V
P1.05V
1
P1.05V
R169
1
1%
C148
10000nF
6.3V
C817
100nF
10V
R534
1
1%
C548
22000nF-X5R
20%
6.3V
EC3
220uF
2.5V
AD
L513
10uH
R533
R535
1
1%
P1.05V
B20
BLM18PG181SN1
P1.05V
L514
10uH
P1.05V
0
B510
BLM18PG181SN1
C
B
C818
100nF
10V
Cantiga : 1.5V
C188
100nF
10V
C100
100nF
10V
P3.3V
2A routing
EC525
220uF
2.5V
AD
C557
100nF
10V
R158
0
R157
C145
100nF
10V
C143
4700nF
6.3V
C547
4700nF
6.3V
C816
100nF
10V
12.1
1%
AT13
AW13
AW16
BA36
BB21
BB24
BD16
P1.05V
C105
C106
10000nF
1000nF
6.3V
C152
100nF
10V
C813
100nF
10V
C814
100nF
10V
C815
100nF
10V
C831
1nF
50V
C823
10nF
25V
C824
10nF
25V
6.3V
A21
VCC_AXF_1
B21
VCC_AXF_2
B22
C825
10nF
25V
C832
1nF
50V
VCC_AXF_3
AF48
VCC_DMI_1
AG47
VCC_DMI_2
AH47
VCC_DMI_3
AH48
VCC_DMI_4
B27
VCCA_CRT_DAC_1
A26
VCCA_CRT_DAC_2
A25
VCCA_DAC_BG
A24
VCCA_TV_DAC_1
B24
VCCA_TV_DAC_2
M25
VCCD_TVDAC
L28
VCCD_QDAC
J48
VCCA_LVDS
L37
VCCD_LVDS_1
M38
VCCD_LVDS_2
K47
VCC_TX_LVDS VSS_AXG_SENSE
VCC AXG
VCC AXGCRT / TV POWERLVDS POWER
Samsung
Samsung
Samsung
nostuff
P1.05V
0
R172
P3.3V
B534
P1.5V
P1.8V_AUX
BLM18PG181SN1
B535
BLM18PG181SN1
B536
BLM18PG181SN1
C144
100nF
10V
L512
1.0uH
C827
1000nF
6.3V
EC527
100uF
6.3V
AD
C146
10nF
25V
C820
22000nF-X5R
20%
6.3V
C
B
VCC_SM_NC_4
VCC_SM_NC_5
VCC_SM_NC_6
VCC_SM_NC_7
BH31
BH32
VCC_SM_35
VCC_SM_NC_1
VCC_SM_NC_2
VCC_SM_NC_3
BH29
VCC_SM_33
VCC_SM_34
VCC_SM_CKVCC_SM_LF
BF29
BF31
BF32
BG29
BG30
BG31
BG32
VCC_SM_28
VCC_SM_29
VCC_SM_30
VCC_SM_31
VCC_SM_32
VCC_SM_27
EB88CTGM
BC29
BC32
BD29
BD32
VCC_SM_22
VCC_SM_23
VCC_SM_24
VCC_SM_25
VCC_SM_26
VCC_SM
U504-4
4 OF 5
0904-002377
BA32
BB29
BB32
BA29
VCC_SM_19
VCC_SM_20
VCC_SM_21
AY29
AY32
AW32
VCC_SM_15
VCC_SM_16
VCC_SM_17
VCC_SM_18
AV29
AV32
AW29
VCC_SM_12
VCC_SM_13
VCC_SM_14
AT29
AT32
AU29
AU32
VCC_SM_9
VCC_SM_10
VCC_SM_11
AP33
AR29
AR32
VCC_SM_6
VCC_SM_7
VCC_SM_8
VCC_SM_5
VCCA_SMVCCA_SM_CKVCCA_SM_CK_NCTF
AP29
AP32
AN33
VCC_SM_3
VCC_SM_4
AN32
VCC_SM_2
VCC_SM_1
VCC HADVCC_HVPEG POWER
PLL POWER
VCC_AXG_SENSE
AXG SENSE
VCC_HDA
VCC_HV_1
VCC_HV_2
VCC_HV_3
VCC_PEG_1
VCC_PEG_2
VCC_PEG_3
VCC_PEG_4
VCC_PEG_5
VCCA_PEG_BG
VCCA_PEG_PLL
VCCD_PEG_PLL
VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL
VCCA_MPLL
VCCD_HPLL
A32
A35
B35
C35
U46
U47
U48
V47
V48
AD48
AA48
AA47
F47
L48
AD1
AE1
AF1
AJ14
AH14
P1.5V
P1.5V
P1.05V
A
P1.05V
C141
0.1nF
50V
C184
0.1nF
50V
nostuff
C111
BC LEE
20%
6.3V
MCH1_VCC_SENSE
MCH1_VSS_SENSE
EC4
220uF
2.5V
AD
DATE
DEV. STEP
REV
LAST EDIT
P1.05V
11/8/2006
TITLE
PV
1.0
XI’AN-EXT
MCH_CANTIGA_PM_DDR2
CANTIGA (4/5)
April 17, 2008 11:19:23 AM
1
SAMSUNG
PART NO.
PAGE
ELECTRONICS
BA41-00926/7A
OF
A
6017
VCC_SM_LF_7
AY5
AV21
AV44
BA37
BB13
AM10
Confidential
Confidential
Confidential
220nF
10V
1000nF
220nF
10V
470nF 16V
100nF 10V
10V100nF
6.3V1000nF
6.3V
C116
C193
C101
C192
C115
C189
C110
4
AM40
3
BH20
BG20
C117
100nF
10V
BF21
BF20
1.0uH
R153
1
1%
C118
10000nF
6.3V
VCCA_SM_CK_NCTF_8
AM28
L1
VCCA_SM_CK_NCTF_1
VCCA_SM_CK_NCTF_2
VCCA_SM_CK_NCTF_3
VCCA_SM_CK_NCTF_4
VCCA_SM_CK_NCTF_5
VCCA_SM_CK_NCTF_6
VCCA_SM_CK_NCTF_7
AL23
AL24
AL25
AM23
AM24
AM25
AM26
P1.8V_AUX
C147
100nF
VCCA_SM_CK_5
AP28
10V
VCCA_SM_CK_1
VCCA_SM_CK_2
VCCA_SM_CK_3
VCCA_SM_CK_4
AP25
AN24
AN25
AN28
C113
2200nF
10V
nostuff
VCCA_SM_8
VCCA_SM_9
AT16
C98
22000nF-X5R
VCCA_SM_5
VCCA_SM_6
VCCA_SM_7
AP20
AR16
AR17
AR20
P1.05V
20%
6.3V
VCCA_SM_4
VCCA_SM_1
VCCA_SM_2
VCCA_SM_3
AP16
AP17
AN17
AN20
C112
C114
1000nF
6.3V
4700nF
6.3V
DRAW
CHECK
APPROVAL
MODULE CODE
C108
22000nF-X5R
22000nF-X5R
20%
6.3V
ZHOU JUN
GUO LEI
2
VCC_SM_CK_1
VCC_SM_CK_2
VCC_SM_CK_3
VCC_SM_CK_4
VCC_SM_LF_1
VCC_SM_LF_2
VCC_SM_LF_3
VCC_SM_LF_4
VCC_SM_LF_5
VCC_SM_LF_6
SRP Sheet Number: 17 of 53
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