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Approval
TO
DATE
: Asus
: May. 26, 2011
SAMSUNG TFT-LCD
MODEL NO : LTN156HT01-201
NOTE : Extension code [ -2 ]
→ LTN156HT01-2
Surface type [ Anti-Glare ]
Any modification of Spec is not allowed without SEC’s permission
APPROVED BY :
PREPARED BY :
Stan Kim
Application Engineer Group
SAMSUNG ELECTRONICS CO., LTD.
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CONTENTS
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Approval
Revision History
General Description
1. Absolute Maximum Ratings
1.1 Absolute Ratings of environment
1.2 Electrical Absolute Ratings
2. Optical Characteristics
3. Electrical Characteristics
3.1 TFT LCD Module
3.2 Backlight Unit
3.3 LED Driver
4. Block Diagram
4.1 TFT LCD Module
4.2 LED connection and placement
-------------------( 3 )
-------------------( 4 )
-------------------( 5 )
-------------------( 7 )
-------------------( 10 )
-------------------( 13 )
5. Input Terminal Pin Assignment
-------------------( 15 )
5.1 Input Signal & Power
5.2 LVDS Interface
5.3 Timing Diagrams of LVDS For Transmission
5.4 Input Signals, Basic Display Colors and Gray Scale of Each Color.
5.5 Pixel Format in the display
6. Interface Timing
-------------------( 21 )
6.1 Timing Parameters
6.2 Timing Diagrams of interface Signal
6.3 Power ON/OFF Sequence
7. Mechanical Outline Dimension
8. Packing
9. Markings & Others
10. General Precautions
-------------------( 23 )
------------------- ( 25 )
------------------- ( 26 )
-------------------( 28 )
11. EDID
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REVISION HISTORY
Date Revision No. Page
May, 26. 2011 A00 All The Approval specification of LTN156HT01-2 was issued first
Summary
Approval
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GENERAL DESCRIPTION
DESCRIPTION
LTN156HT01-201 is a color active matrix TFT (Thin Film Transistor) liquid crystal display
(LCD) that uses amorphous silicon TFT as switching devices. This model is composed of a
TFT LCD panel, a driver circuit and a backlight system. The resolution of a 15.6" contains
1920 x 1080 pixels and can display up to 262,144 colors. 6 O'clock direction is the Optimum
viewing angle.
FEATURES
• 1920 x 1080 pixels resolution (16:9)
• Fast Response Time
• Low power consumption
• LED BLU Structure
• DE (Data enable) only mode
• 3.3V LVDS Interface
• On board EDID chip
• RoHS compliance
• PVC free compliance
• BFR free compliance
• As free compliance
APPLICATIONS
• Notebook PC
• If the usage of this product is not for PC application, but for others, please contact SEC
GENERAL INFORMATION
Item Specification Unit Note
Display area 344.16 (H) x 193.59 (V) (15.6”diagonal) mm
Driver element a-Si TFT active matrix
Display colors 262,144
Number of pixel 1920 x 1080 pixel
Pixel arrangement RGB vertical stripe
Pixel pitch 0.179 (H) x 0.179 (V) (TYP.) mm
16 : 9
Display Mode Normally white
Surface treatment Haze 25%, Hardness 3H
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Mechanical Information
Item Min. Typ. Max. Unit Note
Horizontal (H) 358.8 359.3 359.8 mm
Module
size
Note (1) Measurement condition of outline dimension
Vertical (V) 209.0 209.5 210.0 mm
Depth (D) - - 5.8 mm (1)
Weight - - 510 g
. Equipment : Vernier Calipers
. Push Force : 500g f (minimum)
1. ABSOLUTE MAXIMUM RATINGS
1.1 ENVIRONMENTAL ABSOLUTE RATINGS
Item Symbol Min. Max. Unit Note
Approval
Storage temperate TSTG -20 60 qC(1)
Operating temperate
(Temperature of glass surface)
Shock ( non-operating ) Snop - 240 G (2),(4)
Vibration (non-operating) Vnop - 2.41 G (3),(4)
Note (1) Temperature and relative humidity range are shown in the figure below.
95 % RH Max. (40 qC t Ta)
Maximum wet - bulb temperature at 39
TOPR 0 50 qC(1)
O
C or less. (Ta ! 40 qC ) No condensation
Relative Humidity ( %RH)
100
90
80
60
40
20
-40 -20 0 20 40 60 80
Operating Range
Storage Range
5
0
Temperature (
O
C)
( 40,90 )
( 50,50.4 )
( 60,27.7 )
(2) 2ms, half sine wave, one time for rX, rY, r Z.
(3) 5 - 500 Hz, random vibration, 30min for X, Y, Z.
(4) At testing Vibration and Shock, the fixture in holding the Module to be tested have to be
hard and rigid enough so that the Module would not be twisted or bent by the fixture.
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1.2 ELECTRICAL ABSOLUTE RATINGS
(1) TFT LCD MODULE
Item Symbol Min. Max. Unit Note
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Approval
DD =3.3V, VSS = GND = 0V
V
Power Supply Voltage V
Logic Input Voltage V
Note (1) Within Ta (25 r 2 qC)
DD VDD – 0.3 VDD + 0.3 V (1)
DD VDD – 0.3 VDD + 0.3 V (1)
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Approval
2. OPTICAL CHARACTERISTICS
The following items are measured under stable conditions. The optical characteristics
should be measured in a dark room or equivalent state with the methods shown in Note (5).
Measuring equipment : TOPCON SR-3
* Ta = 25 r 2 qC, VDD=3.3V, fv= 60Hz, fDCLK = 138.65 MHz, IL = 24 mA
Item Symbol
Contrast Ratio
(5 Points)
Response Time at Ta
( Rising + Falling )
Average Luminance
of White (5 Points)
Red
Color
Green
Chromaticity
( CIE )
Blue
White
Conditio
n
CR
RT - 16 25 msec (1), (3)
T
L,AVE 250 300 - cd/m
Y
Min. Typ. Max Unit Note
500 - - -
2
(1), (2),
IL=24 mA
Normal
R
R
G
G
B
B
W
W
X
Viewing
Angle
Y
X
Y
X
Y
X
Y
I = 0
T = 0
Typ
-0.03
0.613
0.361
0.338
0.603
0.155
0.104
0.313
0.329
Typ
-0.03
-
(5)
(1), (4)
Viewing
Angle
Color Gamut - 60 - %
13 Points
White Variation
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Hor.
Ver.
T
L
T
R
CR t 10
H
I
L
I
L
G
50 - -
50 - -
40 - -
Degrees (1), (5)
SR-3
40 - -
- - 1.7 - (6)
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d
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Note 1) Definition of Viewing Angle : Viewing angle range(10
C/R)
Normal Line
I = 0
o
,
T = 0
o
T L
T R
TL =90
o
I L
x
I H
y
12 O’clock
direction
IH= 90
6 O’clock
direction
IL= 90
o
x'y'
=90
T
R
Note 2) Definition of Contrast Ratio (CR) : Ratio of gray max (Gmax) ,gray min (Gmin)
at 5 points (33, 55, 77, 37, 73)
Approval
o
o
CR(33) + CR(55) + CR(77) + CR(37) + CR(73)
CR =
5
Points : 33, 55, 77, 37, 73 at the figure of Note (6).
Note 3) Definition of Response time :
Display data
White(TFT OFF)
TR
Black(TFT ON)
White(TFT OFF)
TF
100%
90%
Optical
Response
10%
0%
Note 4) Definition of Average Luminance of White : measure the luminance of white at 5 points.
Time
(30%) (50%) (70%)
Average Luminance of White ( Y
L33 + YL55 + YL77 + YL37 + YL73
Y
YL,AVE =
L,AVE )
33
55
73
37
77
5
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VIEW AREA
(30%)
(50%)
(70%)
: test point
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Approval
Note 5) After stabilizing and leaving the panel alone at a given temperature for 30 min , the measurement
should be executed. Measurement should be executed in a stable, windless,and dark room.
30 min after lighting the backlight. This should be measured in the center of screen.
LED current : 24 mA
Environment condition : Ta = 25 r 2 qC
Photo-detector
( TOPCON SR-3 )
= 2q
Field
50 cm
TFT-LCD module
Center of the screen
[ Optical characteristics measurement setup ]
Note 6) Definition of 13 points white variation (G L ), [ ~ ]
Maximum luminance of 13 points
113
G L =
Minimum luminance of 13 points
10mm
25% 50% 75%
10mm
13 12
LCD panel
10mm
11
10
8
5
3
10mm
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4
25%
6
50%
75%
1
: test point
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3. ELECTRICAL CHARACTERISTICS
3.1 TFT LCD MODULE
Item Symbol Min. Typ. Max. Unit Note
Approval
Ta= 25 r 2qC
Voltage of Power Supply V
Differential Input
High V
DD 3.0 3.3 3.6 V
IH --+100mVVCM = +1.2V
Voltage for LVDS
Receiver Threshold
Low V
IL -100 - - mV
Vsync Frequency fv - 60 - Hz
Hsync Frequency f
Main Frequency f
Rush Current I
Current of Power
Supply
White
Mosaic - 750 910 mA (2),(3)*b
H - 124.80 - KHz
DCLK - 138.65 - MHz
RUSH - - 1.5 A (4)
DD
I
- 700 800 mA (2),(3)*a
Note (1) Display data pins and timing signal pins should be connected.( GND = 0V )
V = 60Hz, fDCLK = 138.65 MHZ, VDD = 3.3V , DC Current.
(2) f
(3) Power dissipation pattern
*a) White Pattern *b) Mosaic Pattern
VIEW AREA
Display Brightest Gray Level
Display Darkest Gray Level
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4) Rush current measurement condition
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Approval
CONTROL SIGNAL
(HIGH to LOW)
3.3V
R1
47K
R2
1K
12V
V
R3
C3
1uF
DD rising time is 470us
47K
M1
2SK1059
C2
10000pF
0.9VDD
M2
2SK1399
FUSE
VDD ( LCD INPUT)
C1
1uF
3.3V
GND
0.1VDD
470us
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Approval
3.2 BACK-LIGHT UNIT
Item Symbol Min. Typ. Max. Unit Note
LED Forward Current IF 23.5 24 24.5 mA
LED Forward Voltage VF 3.0 3.2 3.4 V
LED Array Voltage VP 24 - 27.2 V VF X 8 LEDs
Power Consumption P - 5.9 6.5 W IF X VF X 64 LEDs
Ta= 25 r 2 qC
3.3 LED Driver
- LED Driver Manufacturer : Richtek
Item Symbol Min. Typ. Max. Unit Note
Input Voltage V
in 6-24V
Ta= 25 r 2 qC
Output PWM
Frequency
Burst Ratio D
External PWM
Dimming Control
Frequency (BLIM)
Note - Test Equipment : Fluke 45
PWM 500 - 2000 kHz No output PWM
F
BLIM 0.2 1.6 10 KHz
F
5 - 100 %
10 - 100 %
PWM freq :
200Hz~1KHz
PWM freq :
1KHz~10KHz
BLIM=PWM
0V~3.3V
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4. BLOCK DIAGRAM
4.1 TFT LCD Module
Approval
Input Connector
I-PEX 20455-040E
Video Signal
Control Signal
VCOM
Gamma
DVDD
AVDD
Von/Voff
I2 C bus
LVDS
DC-DC
Converter
VCOM
Generator
EDID
EEPROM
LVDS Input/LCDS Output
Timing Controller
Gamma
Generator
SOURCE PCB
LCDS
Source
Driver
IC
15.6” FHD
TFT-LCD Panel
TFT on Glass
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4. BLOCK DIAGRAM
4.2 LED connection and placement
LED Power
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Channel 2
Channel 1
Approval
Channel 7
Channel 8
2
7 81
…
…
2
7 81
…
…
2
7 81
…
2
7 81
…
LED Wiring
LED#2 Channel 7
LED#8 Channel 1
LED#8 Channel 7
LED#8 Channel 8
LED#8 Channel 2
…
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LED#7 Channel 8
LED#7 Channel 7
LED#7 Channel 1
LED#7 Channel 2
…
LED Placement
LED#2 Channel 8
…
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LED#2 Channel 1
LED#2 Channel 2
LED#1 Channel 7
LED#1 Channel 8
…
LED#1 Channel 1
LED#1 Channel 2
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5. INPUT TERMINAL PIN ASSIGNMENT
5.1. Input Signal & Power (LVDS, Connector : I-PEX 20455-040E )
Approval
PIN # Symbol
Description
1NCNC
2 VDD Power Supply, 3.3 V (typical)
3 VDD Power Supply, 3.3 V (typical)
4 V EEDID DDC 3.3V power
5 TEST Panel Self Test
6 Clk EEDID DDC Clock
7 DATA EEDID DDC Data
8 Odd_Rin0- - LVDS differential data input (R0-R5, G0) (odd pixels)
9 Odd_Rin0+ + LVDS differential data input (R0-R5, G0) (odd pixels)
10 VSS Ground – Shield
11 Odd_Rin1- - LVDS differential data input (G1-G5, B0-B1) (odd pixels)
12 Odd_Rin1+ + LVDS differential data input (G1-G5, B0-B1) (odd pixels)
13 VSS Ground – Shield
14 Odd_Rin2- - LVDS differential data input (B2-B5, HS, VS, DE) (odd pixels)
15 Odd_Rin2+
+ LVDS differential data input (B2-B5, HS, VS, DE) (odd
pixels)
16 VSS Ground – Shield
17 Odd_ClkIN- - LVDS differential clock input (odd pixels)
18 Odd_ClkIN+ + LVDS differential clock input (odd pixels)
19 VSS Ground – Shield
20 Even_Rin0- - LVDS differential data input (R0-R5, G0) (odd pixels)
21 Even_Rin0+ + LVDS differential data input (R0-R5, G0) (odd pixels)
22 VSS Ground – Shield
23 Even_Rin1- - LVDS differential data input (G1-G5, B0-B1) (odd pixels)
24 Even_Rin1+ + LVDS differential data input (G1-G5, B0-B1) (odd pixels)
25 VSS Ground – Shield
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5. INPUT TERMINAL PIN ASSIGNMENT
5.1. Input Signal & Power (LVDS, Connector : I-PEX 20455-040E )
PIN # Symbol Description
26 Even_Rin2- - LVDS differential data input (B2-B5, HS, VS, DE) (odd pixels)
27 Even_Rin2+ + LVDS differential data input (B2-B5, HS, VS, DE) (odd pixels)
28 VSS Ground – Shield
29 Even_ClkIN- - LVDS differential clock input (odd pixels)
30 Even_ClkIN+ + LVDS differential clock input (odd pixels)
31 VSSLED Ground – LED
32 VSSLED Ground – LED
33 VSSLED Ground – LED
34 NC NC
35 PWM System PWM Signal Input (+3.3V Swing)
36 LED_EN LED enable pin (+3.3V Input)
37 NC NC
38 VDDLED 7.5V – 21V LED power
39 VDDLED 7.5V – 21V LED power
40 VDDLED 7.5V – 21V LED power
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5.2 LVDS Interface : Transmitter DS90CF363 or Compatible
Pin No. Name RGB Signal Pin No. Name RGB Signal
51 TxIN0 R0 14 TxIN14 G5
52 TxIN1 R1 15 TxIN15 B0
54 TxIN2 R2 19 TxIN18 B1
55 TxIN3 R3 20 TxIN19 B2
56 TxIN4 R4 22 TxIN20 B3
3 TxIN6 R5 23 TxIN21 B4
4 TxIN7 G0 24 TxIN22 B5
Approval
6 TxIN8 G1 27 TxIN24 Hsync
7 TxIN9 G2 28 TxIN25 Vsync
11 TxIN12 G3 30 TxIN26 DE
12 TxIN13 G4 31 TxCLKIN Clock
Graphics controller
18-bit
RED0
RED1
RED2
RED3
RED4
RED5
GREEN0
GREEN1
GREEN2
GREEN3
GREEN4
GREEN5
BLUE0
BLUE1
BLUE2
BLUE3
BLUE4
BLUE5
Hsync
Vsync
Enable
CLOCK
LVDS INTERFACE
DS90CF383 Integrated IC
51
52
54
55
56
3
4
6
7
11
12
14
15
19
20
22
23
24
27
28
30
31
TxOUT0-
TxOUT0+
TxOUT1-
TxOUT1+
TxOUT2-
TxOUT2+
TxCLKOUT-
TxCLKOUT+
I-PEX 20455-040E
48
47
46
45
42
41
40
39
8
9
11
12
14
15
17
18
RxIN0-
100 :
RxIN0+
RxIN1-
100:
RxIN1+
RxIN2-
100 :
RxIN2+
RxCLKIN-
100 :
RxCLKIN+
Note : The LCD Module uses a 100ohm resistor between positive and negative lines of each
receiver input.
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5.3 Timing Diagrams of LVDS For Transmission
LVDS Receiver : Integrated T-CON
TxCLK OUT
RxCLK IN
T/7
Approval
T
Rx IN2
Rx IN1
RxIN0
RxOUT20 RxOUT19 RxOUT17RxOUT18 RxOUT16 RxOUT15 RxOUT14
DE
RxOUT13 RxOUT12 RxOUT10RxOUT11 RxOUT9 RxOUT8 RxOUT7
RxOUT6 RxOUT5 RxOUT3RxOUT4 RxOUT2 RxOUT1 RxOUT0
G0
Vsync B2Hsync B5 B3B4
G4B1 G5B0 G3 G2 G1
R5
R4
R3
R2 R1 R0
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5.4 Input Signals, Basic Display Colors and Gray Scale of Each Color
Approval
Color Display
Black 000000000 000 0 0000 0 -
Blue 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 -
Green 0000001111110 0000 0 -
Basic
Colors
Gray
Scale
Of
Red
Cyan 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 -
Red 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 -
Magenta 1 1 1 1 1 1 0 0 0 0 0 0 1 1 1 1 1 1 -
Yellow 111111111111 00000 0 -
White 1111111111111 11111 -
Black 000000000 000 0 0000 0 R0
Dark 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 R1
n 010000000000000000 R2
: :::::::::::: ::::: :
: :::::::::::: ::::: :
p 101111000 0000 0000 0 R61
Data Signal
Red Green Blue
R0 R1 R2 R3 R4 R5 G0 G1 G2 G3 G4 G5 B0 B1 B2 B3 45 B5
Gray
Scale
Level
R3aR60
Gray
Scale
Of
Green
Gray
Scale
Of
Blue
Light 0 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 R62
Red 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 R63
Black 000000000 000 0 0000 0 G0
Dark 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 G1
n 000000010 0000 0000 0 G2
: :::::::::::: ::::: :
G3aG60
: :::::::::::: ::::: :
p 000000101 1110 0000 0 G61
Light 0 0 0 0 0 0 0 1 1 1 1 1 0 0 0 0 0 0 G62
Green 0 0 0 0 0 0 1 1 1 1 1 1 0 0 0 0 0 0 G63
Black 000000000 000 0 0000 0 B0
Dark 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 B1
n 000000000 0000 1000 0 B2
: :::::::::::: ::::: :
B3aB60
: :::::::::::: ::::: :
p 000000000 0001 0111 1 B61
Light 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 B62
Blue 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 B63
Note 1) Definition of gray :
Rn: Red gray, Gn: Green gray, Bn: Blue gray (n=gray level)
Note 2)Input signal: 0 =Low level voltage, 1=High level voltage
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5.5 Pixel Format in the display
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Approval
Line 1
Line 1080
Pixel 1
RGB RGB
RGB RGB
Pixel 1920
LTN156HT01-201
RGB RGB RGB RGB
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6. INTERFACE TIMING
6.1 Timing Parameters
Signal Item Symbol Min. Typ. Max. Unit Note
Main Clock Frequency 1/TC - 138.65 - MHz -
Frame Frequency Cycle TV - 1111 - Lines -
Approval
Vertical Active
Display Term
One Line
Scanning Time
Horizontal Active
Display Term
Display
Period
Cycle TH - 1040 - Clocks -
Display
Period
TVD - 1080 - Lines -
THD - 960 - Clocks -
6.2 Timing diagrams of interface signal
TVD
DE
TV
TH
DCLK
TC
THD
DE
DATA
SIGNALS
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6.3 Power ON/OFF Sequence
Approval
: To prevent a latch-up or DC operation of the LCD module, the power on/off sequence
should be as the diagram below.
Power Supply VDD
Signals
LED Power (Vin)
0V
0V
0V
0.1 V
0.9 V
DD
DD
T
1
T
2
VALID
0.1 V
T
8
T
10
0.9 V
in
in
T
12
T
9
T
11
0.9 V
in
0.1 V
T
13
0.9 V
DD
0.1 V
DD
T
T
3
in
T
4
7
PWM
0V
T
14
T
B/L Enable
0V
Timing (ms) Remarks
rising time from 10% to 90%
0.5T
0T
0T
500 ≤T
200 ≤T
200 ≤T
0T
10T
10T
0.5T
0.5T
10T
10T
10T
10T
2
3
7
10
11
≤10
1
≤50
≤50
4
5
6
≤10
8
9
≤10
≤10
12
13
14
15
V
DD
Delay from V
to valid data at power ON
DD
Delay from valid data OFF to V
VDDOFF time for Windows restart
Delay from valid data to B/L enable at power ON
Delay from valid data off to B/L disable at power Off
falling time from 90% to 10%
V
DD
Delay from valid data on to LED driver Vin rising time 10%
Delay from LED driver Vin falling time 10% to valid data Off
LED V
LED V
rising time from 10% to 90%
in
falling time from 90% to 10%
in
Delay from LED driver Vin rising time 90% to PWM ON
Delay from PWM Off to LED driver Vin falling time 10%
Delay from PWM ON to B/L Enable ON
Delay from B/L Enable Off to PWM Off
T
5
OFF at power Off
DD
15
T
6
Note : Backlight may flash if interface signal remains floating state at invalid period.
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7. MECHANICAL OUTLINE DIMENSION
It will be attached with PDF file
Approval
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ڳڳ
ڞ
څڅڅڅ
ڭ
ڰڮ
ڌ
ڌڍړ
ڜګګڂڟٻڝڴ
ڮګڠڞډٻکڪ
ڞڣڦڂڟٻڝڴ
ڥډکډڧڠڠ
ڟڠڮڂڟٻڝڴ
ڟڭڜڂکٻڝڴ
ڊ
ۈۈ
ڰکڤگ
ڮڞڜڧڠ
ڎڐڔډڎڋډڐڶڪڰگڧڤکڠڸ
ڏڈڎډڌڋډڎ
ڎڏړډړڶڝڠڵڠڧٻڪګڠکڸ
ڃڎڏڏډڌڑڄڶڜڞگڤڱڠٻڜڭڠڜڸ
ڃڒډڔڑڄ
ڃڌڋڏډڒڐڄ
ڍڋڔډڐڋډڐڶڪڰگڧڤکڠڸ
ڌڔڒډڌڶڝڠڵڠڧٻڪګڠکڸ
ڃڌڔڎډڐڔڄڶڜڞگڤڱڠٻڜڭڠڜڸ
ڃڒډڐڒڄ
ڎڐڌ
ڝ
ڞ
ڝڠڵڠڧٻڪګڠکڤکڢ
ڜڞگڤڱڠٻڜڭڠڜ
ڜ
ڟ
ژ
ڍډڐٻڨڜڳٻڃڮڞڭڠڲٻګڠکڠگڭڜگڤڪکڄ
ڃڒډڔڑڄ
ڃڒډڐڒڄ
ڐډړٻڨڜڳٻڶڨڪڟڰڧڠٻگڣڤڞڦکڠڮڮڸ
ڌڌډڔ
ڋډڎ
ڑڑډڔ
ڋډڎ
ڌڌړډړ
ڋډڎ
ڌړڐډڒ
ڋډڎ
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ڤڪک
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8. PACKING
1. CARTON(Internal Package)
(1) Packing Form
Corrugated Cardboard box and Corrupad form as shock absorber
(2) Packing Method
Approval
Note (1) Total : Approx. 12 Kg
(2) Acceptance number of piling : 22 sets
(3) Carton size : 283(W) X 401(D) X 263(H)
(4) MAX accumulation quantity : 5 cartons
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(3) Packing Material
No Part name Quantity
1 Static electric protective sack 22
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Approval
2
3 Pictorial marking 2 pcs
4 Carton 1 set
Packing case (Inner box)
1 set
included shock absorber
9. MARKINGS & OTHERS
A nameplate bearing followed by is affixed to a shipped product at the
specified location on each product.
(1) Parts number : LTN156HT01-201
(2) Revision : Three letters
(3) Lot number : X X X X XXX XX X 201
SEC Revision Code
Panel Number
Cell ID
Lot ID
Month
Year
Product Code
Line
(4) Nameplate Indication( Following example is only for reference )
Samsung Secret
LTN156HT01
1114
XXXXXXXXXX
MADE IN CHINA
80 mm
Parts name : LTN156HT02
Lot number : XXXXXXXXXX
Inspected work week : 1114(2011year, 14th week)
Product revision Code : 201
201
40 mm
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(6) Packing small box attach
DEVICE : LTN156HT01
TYPE : 201
QUANTITY : 20 PCS
CO6040001
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10. GENERAL PRECAUTIONS
Approval
1. HANDLING
(a) When the module is assembled, It should be attached to the system firmly
using every mounting holes. Be careful not to twist and bend the modules.
(b) Refrain from strong mechanical shock and / or any force to the module. In addition to
damage, this may cause improper operation or damage to the module.
(c) Note that polarizers are very fragile and could be easily damaged. Do not press or scratch
the surface harder than a HB pencil lead.
(d) Wipe off water droplets or oil immediately. If you leave the droplets for a long time,
Staining and discoloration may occur.
(e) If the surface of the polarizer is dirty, clean it using some absorbent cotton or soft cloth.
(f) The desirable cleaners are water, IPA (Isopropyl Alcohol) or Hexane.
Do not use Ketone type materials(ex. Acetone), Ethyl alcohol, Toluene, Ethyl acid or Methyl
chloride. It might permanent damage to the polarizer due to chemical reaction.
(g) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or
mouth . In case of contact with hands, legs or clothes, it must be washed away thoroughly
with soap.
(h) Protect the module from static , it may cause damage to the C-MOS Gate Array IC.
(i) Use fingerstalls with soft gloves in order to keep display clean during the incoming
inspection and assembly process.
(j) Do not disassemble the module.
(k) Do not pull or fold the lamp wire.
(l) Do not adjust the variable resistor which is located on the back side.
(m) Protection film for polarizer on the module shall be slowly peeled off just before use so
that the electrostatic charge can be minimized.
(n) Pins of I/F connector shall not be touched directly with bare hands.
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2. STORAGE
Approval
(a) Do not leave the module in high temperature, and high humidity for a long time.
It is highly recommended to store the module with temperature from 5 to 40 qC and
relative humidity of less than 70%.
(b) Do not store the TFT-LCD module in direct sunlight.
(c) The module shall be stored in a dark place. It is prohibited to apply sunlight or fluorescent
light during the store.
(d) Storage period is recommended not to exceed 1 year
3. OPERATION
(a) Do not connect, disconnect the module in the “ Power On” condition.
(b) Power supply should always be turned on/off by following item 6.3
“ Power on/off sequence “.
(c) Module has high frequency circuits. Sufficient suppression to the electromagnetic
interference shall be done by system manufacturers. Grounding and shielding methods
may be important to minimize the interference.
(d) The standard limited warranty is only applicable when the module is used for general
notebook applications. If used for purposes other than as specified, SEC is not to be
held reliable for the defective operations. It is strongly recommended to contact SEC
to find out fitness for a particular purpose.
4. OTHERS
(a) Ultra-violet ray filter is necessary for outdoor operation.
(b) Avoid condensation of water. It may result in improper operation or disconnection
of electrode.
(c) Do not exceed the absolute maximum rating value. ( the supply voltage variation, input
voltage variation, variation in part contents and environmental temperature, so on)
Otherwise the module may be damaged.
(d) If the module displays the same pattern continuously for a long period of time,it can be
the situation when the image “sticks” to the screen.
(e) This module has its circuitry PCB’s on the rear side and should be handled carefully in
order not to be stressed.
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11. EDID
Approval
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