8. General Precaution ------------------------------------------------------------------------------ (34)
8.1 Handling
8.2 Storage
8.3 Operation
8.4 Operation Condition Guide
8.5 Others
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General Description
Description
LTM230HU01 is a color active matrix liquid crystal display (LCD) that uses amorphous
silicon TFT (Thin Film Transistor) as switching components. This model is composed of
a TFT LCD panel, a driver circuit and a back light unit. The resolution of a 23” is 1920 x
1080 and this model can display up to 16.7 millions colors.
Features
High contrast ratio, high aperture structure
TN (Twisted Nematic) mode
Wide Viewing Angle
High speed response
FHD (1920 x 1080 pixels) resolution
Low power consumption
DE (Data Enable) only mode
LVDS (Low Voltage Differential Signaling) interface (4pixel/clock)
RoHS compliance
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Applications
Workstation & desktop monitors
Display terminals for AV application products
Monitors for Entertainment
Monitors for industrial machine
* If the module is used to other applications besides the above, please contact SEC
in advance.
General Information
Reflection Ratio 4%, GlareSurface Treatment
UnitSpecificationItems
mm0.2655(H) x 0.2655(W)Pixel Pitch
mm509.76(H) x 286.74(V)Active Display Area
colors16.7M (Hi-FRC)Display Colors
pixel1,920 x 1,080Number of Pixels
RGB vertical stripePixel Arrangement
Note
Normally WhiteDisplay Mode
cd/
300(Typ.)Luminance of White
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Mechanical Information
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Module
Max.
534.5
312.2
mm534.0533.5Horizontal (H)
mm311.7311.2Vertical (V)w/o inverter ass’y
NoteUnitTyp.Min.Item
size
Note (1) Mechanical tolerance is
19.5
3,000
·
0.5mm unless there is a special comment.
mm--Depth (D)
LCD module onlyg--Weight
1. Absolute Maximum Ratings
If the condition exceeds maximum ratings, it can cause malfunction or unrecoverable
damage to the device.
Power Supply Voltage
Storage temperature
Center of Glass surface temperature
(Operation)
Shock ( non - operating )
Vibration ( non - operating )
Note (1) Ta= 25 ·2 ¶C
DD
STG
OPR
nop
nop
NoteUnitMax.Min.SymbolItem
(1)V6.5GND-0.5V
60-25T
500T
(2)
(2)
(3)(5)G50-S
(4)(5)G1.5-V
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(2) Temperature and relative humidity range are shown in the figure below.
a. 90 % RH Max. (Ta
b. Maximum wet-bulb temperature at 39
c. No condensation
(3) 11ms, sine wave, one time for
(4) 10-300 Hz, Sweep rate 10min, 30min for X,Y,Z axis
(5) At vibration and shock test, the fixture which holds the module to be tested has to be
hard and rigid enough so that the module would not be twisted or bent by the fixture.
˺39¶
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C)
¶
C or less. (Ta ˺39¶C)
·
X, ·Y, ·Z axis
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(39,90)
(39,90)
(50,50.4)
(50,50.4)
25,5)
((--25,5)
Fig. Temperature and Relative humidity range
(60,27.7)
(60,27.7)
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2. Optical Characteristics
The optical characteristics should be measured in a dark room or equivalent.
Measuring equipment : SR-3, RD-80S (TOPCON),
(Ta = 25
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EZ-Contrast (Eldim)
·2¶
C, VDD=5V, fv= 120Hz, fDCLK= 70 MHz, IL = 7.5mArms)
NoteUnitMax.Typ.Min.ConditionSymbolItem
Contrast Ratio
(Center of screen)
Response
Time(On/Off)
Luminance of White
(Center of screen)
Color
Chromaticity
(CIE 1931)
Red
Green
Blue
White
Red
Rx
-1000700C/R
-3-Tr + TfG/G
L
0.646
0.333Ry
0.304Gx
0.601Gy
-0.030
0.149Bx
Normal
ɂ
ɂ
Viewing
Angle
0.058By
0.313Wx
0.329Wy
-300250Y
+0.030
-0.453-Ru'
-0.528-Rv'
msec
cd/m
2
(3)
SR-3
(5)
RD-80S
(6)
SR-3
(7),(8)
SR-3
-0.122-Gu'
Color
Chromaticity
(CIE 1976)
C.G.L
(ACC ONLY)
* C.G.L : Color Grayscale Linearity
Green
Blue
White
Ƹ
-0.563-Gv'
-0.163-Bu'
-0.187-Bv'
-0.198-Wu'
-0.468-Wv'
u'v'White
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NoteUnitMax.Typ.Min.ConditionSymbolItem
K-6500--Color Temperature
CIE1931%-72--Color Gamut
ɂ
Hor.
Viewing
Angle
Ver.
Brightness Uniformity
(9 Points)
L
ɂ
R
ɂ
U
ɂ
D
uni
Note (1) Test Equipment Setup
The measurement should be executed in a stable, windless and dark room between
30min after lighting the back light at the given temperature for stabilization
of the back light. This should be measured in the center of screen.
Single lamp current : 7.5mA
Environment condition : Ta = 25
Field Photo detector
CR
˻
·2 ¶
10
C
Photo detector
-8070
-8070
Degrees
-8070
-8070
%25--B
(8)
SR-3
(4)
SR-3
SR-3
2
ദ
TFT - LCD Module
Field
The center of the screen
SR-3 : 40
RD-80S : 50
LCD Panel
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G
Note (2) Definition of test point
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192 960 1728
Active Area
6
: Test Point
Note (3) Definition of Contrast Ratio (C/R)
: Ratio of gray max (Gmax) & gray min (Gmin) at the center point
321
G
CR
=
879
max
min
Gmax : Luminance with all pixels white
Gmin : Luminance with all pixels black
Note (4) Definition of 9 points brightness uniformity
Buni
BB
=×
(max min)
100
B
−
max
108
45
540
972
㽶
of the panel
Bmax : Maximum brightness
Bmin : Minimum brightness
Note (5) Definition of Response time : Sum of Tr, Tf
Display Data White(TFT off) Black(TFT on) White(TFT off)
Optical Instruments
Response
100%
90%
10%
0%
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Note (6) Definition of Luminance of White : Luminance of white at center point
Note (7) Definition of Color Chromaticity (CIE 1931, CIE1976)
Color coordinate of Red, Green, Blue & White at center point
Note (8) Definition of Viewing Angle
˻
: Viewing angle range (CR
10)
㽶
㽶
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Note (9) Color Grayscale Linearity
a. Test image : 100% full white pattern with a test pattern as below
b. Test pattern : Squares, 40mm by 40mm in size, filled with 255, 225, 195, 165, 135 and
105 grays steps should be arranged at the center
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ྜྷ
of the screen.
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c. Test method
st
-1
gray step : move a square of 255 gray level should be moved into the center of the
screen and measure luminance and u’ and v’ coordinates.
- Next gray step : Move a 225 gray square into the center and measure both
luminance and coordinates, too.
d. Test evaluation
Δu' v'=(u'- u' ) + (v'- v' )
Where A, B : 2 gray levels found to have the largest color differences between them
i.e. get the largest
AB
ȟ
u’ and ȟv’ of each 6 pair of u’ and v’ and calculate the ȟu’v’.
2
AB
2
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3. Electrical Characteristics
3.1 TFT LCD Module
The connector for display data & timing signal should be connected.
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Ta = 25¶C
NoteUnitMax.Typ.Min.SymbolItem
Voltage of Power Supply
Differential Input
Voltage for LVDS
Receiver Threshold
LVDS skew
LVDS
Input
Differential input
Characteri
stics
Input voltage range
(single-ended)
Common mode
(a) Black
Current of
Power
Supply
voltage
voltage
DD
SKEW
IN
V
CM
I
DD
0+
|VID|/2
1.2
2.4-
|V
(1)V5.55.04.5V
(2)mV+100--High
mV---100Low
(3)ps300-300t
(4)mV600200|VID|
(4)V2.40V
(4)V
|/2
ID
mA-1700-
mA-900-(b) White(5),(6)
mA30001900-(c) Dot
Vsync Frequency
Hsync Frequency
Main Frequency
Rush Current
V
H
DCLK
RUSH
Note (1) The ripple voltage should be controlled under 10% of V
DD
Hz12412092f
kHz175134102f
MHz907052f
(7)A5--I
.
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(2)
Differential receiver voltage definitions and propagation delay and transition time test
circuit
a. All input pulses have frequency = 10MHz, t
b. C
includes all probe and fixture capacitance
L
Note a.
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R
Note b.
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or tF=1ns
(3) LVDS Receiver DC parameters are measured under static and steady conditions
which may not be reflective of its performance in the end application.
T
LVDS Clk
V
= 0V
DIFF
= 0V
V
DIFF
Differential
LVDS Data
RX +/-
t
SKEW
where tskew : skew between LVDS clock & LVDS data,
T : 1 period time of LVDS clock
cf) (-/+) of 300psec means LVDS data goes before or after LVDS clock.
(4) Definition of V
and V
ID
using single-end signals
CM
Differential
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(5) fV=120Hz, fDCLK = 90 MHz, VDD = 5.0V, DC Current.
(6) Power dissipation check pattern (LCD Module only)
a) Black Pattern b) White Pattern c) Dot Pattern
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(7) Measurement Condition
100%
90%
10%
GND
Rush Current I
RUSH
T
=470
RUSH
༕
can be measured when T
. is 470༕.
RUSH
V
DD
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3.2 Back Light Unit
The back light unit is an edge - lighting type with 2 dual CCFTs ( Cold Cathode
Fluorescent Tube ) The characteristics of two dual lamps are shown in the following tables.
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Ta=25 · 2¶C
NoteUnitMax.Typ.Min.SymbolItem
Lamp Current
Lamp Voltage
Lamp Frequency
Asymmetry
Inverter
waveform
Note (1) Specified values are for a single lamp.
Lamp current is measured with current meter for high frequency as shown below.
Refer to the following block diagram of the back light unit for more information.
rate
Distortion
rate
HOT(RED)
COLD(WHITE)
HOT(BLUE)
COLD(GRAY)
L
L
L
I
1
A
I
2
A
LCD Module
HOT(RED)
COLD(WHITE)
HOT(BLUE)
COLD(GRAY)
I
3
A
I
4
A
(1)mArms8.07.54.0I
Vrms-850-V
(2)kHz(80)-40f
(3)Hour--50,000HrOperating Life Time
%10--Wasy
(4)
1.55541.4141.2726Wdis
: 1,840
--VsStartup Voltage
0
(5)Vrms
25: 1,450
INVERTER
(SK1700)
Fig. Measurement point of Lamp Current
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(2) Lamp frequency which may produce interference with horizontal synchronous
frequency may cause line flow on the display. Therefore lamp frequency should be
detached from the horizontal synchronous frequency and its harmonics as far as
possible in order to avoid interference.
(3) Life time (Hr) is defined as the time when brightness of a lamp unit itself becomes
50% or less than its original value at the condition of Ta = 25·2¶C and I
(4) Designing a system inverter intended to have better display performance, power
efficiency and lamp reliability.
They would help increase the lamp lifetime and reduce leakage current.
a. The measurement should be done at typical lamp current.
b. The asymmetry rate of the inverter waveform should be less than 10%.
c. The distortion rate of the waveform should be ˲2 with ·10% tolerance.
- Inverter output waveform had better be more similar to ideal sine wave.
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= 7.5mArms
L
Asymmetry rate
p-p
||II
I
p
I
-p
Fig. Wave form of the inverter
(5) If an inverter has shutdown function, it should keep its output for over 1 second
even if the lamp connector is open. Otherwise the lamps may not be turned on.
Distortion rate
−
I
rms
I
p
||
I
or
rms
× 100
I
-p
||
I
rms
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4. BLOCK DIAGRAM
4.1 TFT LCD Module
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4.2 Back Light Unit
Connector : YEON-HO 35001HS-04L
LAMP(CCFL)
LAMP(CCFL)
LAMP(CCFL)
LAMP(CCFL)
LAMP(CCFL)
LAMP(CCFL)
LAMP(CCFL)
LAMP(CCFL)
1
2
3
4
1
2
3
4
HOT(RED)
COLD(WHITE)
HOT(BLUE)
COLD(Gray)
HOT(RED)
COLD(WHITE)
HOT(BLUE)
COLD(Gray)
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5. Input Terminal Pin Assignment
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5.1. Input Signal & Power ( Connector : JAE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
B_RXO0P
B_RXO1N
B_Negative Transmission Data of Pixel 0 (ODD data)B_RXO0N
B_Positive Transmission Data of Pixel 0 (ODD data)
B_Negative Transmission Data of Pixel 1 (ODD data)
B_Positive Transmission Data of Pixel 1 (ODD data)B_RXO1P
B_Negative Transmission Data of Pixel 2 (ODD data)B_RXO2N
B_Positive Transmission Data of Pixel 2 (ODD data)B_RXO2P
B_Negative Sampling Clock (ODD data)B_RXOCN
B_Positive Sampling Clock (ODD data)B_RXOCP
B_Negative Transmission Data of Pixel 3 (ODD data)B_RXO3N
B_Positive Transmission Data of Pixel 3 (ODD data)B_RXO3P
B_Negative Transmission Data of Pixel 0 (EVEN data)B_RXE0N
B_Positive Transmission Data of Pixel 0 (EVEN data)B_RXE0P
FI-RE51S-HF
FUNCTIONSYMBOLPIN NO
Power GroundGND
Power GroundGND
Power GroundGND
)
16
17
18
19
20
21
22
23
24
25
26
B_Negative Transmission Data of Pixel 1 (EVEN data)B_RXE1N
B_Positive Transmission Data of Pixel 1 (EVEN data)B_RXE1P
B_Negative Transmission Data of Pixel 2 (EVEN data)B_RXE2N
B_Positive Transmission Data of Pixel 2 (EVEN data)B_RXE2P
Power GroundGND
B_Negative Sampling Clock (EVEN data)B_RXECN
B_Positive Sampling Clock (EVEN data)B_RXECP
Power GroundGND
B_Negative Transmission Data of Pixel 3 (EVEN data)B_RXE3N
B_Positive Transmission Data of Pixel 3 (EVEN data)B_RXE3P
Power GroundGND
Continue to the next page27~51
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FUNCTIONSYMBOLPIN NO
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
F_RXO0P
F_RXO1N
F_Negative Transmission Data of Pixel 0 (ODD data)F_RXO0N
F_Positive Transmission Data of Pixel 0 (ODD data)
F_Negative Transmission Data of Pixel 1 (ODD data)
F_Positive Transmission Data of Pixel 1 (ODD data)F_RXO1P
F_Negative Transmission Data of Pixel 2 (ODD data)F_RXO2N
F_Positive Transmission Data of Pixel 2 (ODD data)F_RXO2P
Power GroundGND
F_Negative Sampling Clock (ODD data)F_RXOCN
F_Positive Sampling Clock (ODD data)F_RXOCP
Power GroundGND
F_Negative Transmission Data of Pixel 3 (ODD data)F_RXO3N
F_Positive Transmission Data of Pixel 3 (ODD data)F_RXO3P
Power GroundGND
F_Negative Transmission Data of Pixel 0 (EVEN data)F_RXE0N
F_Positive Transmission Data of Pixel 0 (EVEN data)F_RXE0P
F_Negative Transmission Data of Pixel 1 (EVEN data)F_RXE1N
F_Positive Transmission Data of Pixel 1 (EVEN data)F_RXE1P
F_Negative Transmission Data of Pixel 2 (EVEN data)F_RXE2N
45
46
47
48
49
50
51
F_Positive Transmission Data of Pixel 2 (EVEN data)F_RXE2P
Power GroundGND
F_Negative Sampling Clock (EVEN data)F_RXECN
F_Positive Sampling Clock (EVEN data)F_RXECP
Power GroundGND
F_Negative Transmission Data of Pixel 3 (EVEN data)F_RXE3N
F_Positive Transmission Data of Pixel 3 (EVEN data)F_RXE3P
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Note) Pin number starts from Left side
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PCB
Pin No. 1 Pin No. 51
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#1
#1
Fig. Connector diagram
a. All GND pins should be connected together and also be connected to the
LCD’s metal chassis.
b. All power input pins should be connected together.
c. All NC pins should be separated from other signal or power.
#51
#51
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5.1.1 Timing Diagrams of LVDS For Transmitting
LVDS Receiver : Integrated T-CON
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5.1.2. Input Signal & Power ( Connector : YEONHO, 12505WR-15 )
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Enable Over Drive Function Input pin
PRODUCT INFORMATION
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FUNCTIONSYMBOLPIN NO
1
2
3
4
5
6
7
8
9
10
OD_EN
NC
NC
OD FunctionOD EN Pin
Disable0 (GND )
Enable1 (+3.3V)
NC
NC
Power GroundGND
Power GroundGND
Power GroundGND
Power GroundGND
* CE (For LCD internal use only. Do not Connect )NC
* CTL(For LCD internal use only. Do not connect)NC
Power GroundGND
11
12
13
14
15
Power Supply : +5VVDD
Power Supply : +5VVDD
Power Supply : +5VVDD
Power Supply : +5VVDD
Power Supply : +5VVDD
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5.2 LVDS Interface
(1)
5.2.1 Front _ Odd Pixel Data
LVDS Transmitter (THC63LVD103) Signal Interface
36
F_GO2TD262
Input signalInput pin
Red Odd Pixel Data(LSB)F_RO2TD059
Red Odd Pixel DataF_RO3TD161
Red Odd Pixel DataF_RO4TA033
Red Odd Pixel DataF_RO5TA134
Red Odd Pixel DataF_RO6TA235
Red Odd Pixel DataF_RO7TA3
Red Odd Pixel DataF_RO8TA437
Red Odd Pixel Data(MSB)F_RO9TA538
Green Odd Pixel
Data(LSB)
Green Odd Pixel DataF_GO3TD363
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Output
signal
LTM230HU01 interface
SymbolTerminalFunctionsymbolsymbolNo
37 / 38TD- / TD+
27 / 28TA- / TA+
37 / 38TD- / TD+
F_RXO3N /
F_RXO3P
F_RXO0N /
F_RXO0P
F_RXO3N /
F_RXO3P
27 / 28TA- / TA+Green Odd Pixel DataF_GO4TA640
Green Odd Pixel DataF_GO5TB041
Green Odd Pixel DataF_GO6TB142
Green Odd Pixel DataF_GO7TB244
Green Odd Pixel DataF_GO8TB345
F_GO9TB446
Green Odd Pixel
Data(MSB)
Blue Odd Pixel Data(LSB)F_BO2TD464
Blue Odd Pixel DataF_BO3TD51
Blue Odd Pixel DataF_BO4TB548
Blue Odd Pixel DataF_BO5TB649
Blue Odd Pixel DataF_BO6TC050
Blue Odd Pixel DataF_BO7TC152
Blue Odd Pixel DataF_BO8TC253
29 / 30TB- / TB+
37 / 38TD- / TD+
29 / 30TB- / TB+
31 / 32TC- / TC+
F_RXO0N /
F_RXO0P
F_RXO1N /
F_RXO1P
F_RXO3N /
F_RXO3P
F_RXO1N /
F_RXO1P
F_RXO2N /
F_RXO2P
Blue Odd Pixel Data(MSB)F_BO9TC354
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5.2 LVDS Interface
(1)
5.2.2 Front _ Even Pixel Data
LVDS Transmitter (THC63LVD103) Signal Interface
F_RE9TA538
F_GE2TD262
Input signalInput pin
Red Even Pixel Data(LSB)F_RE2TD059
Red Even Pixel DataF_RE3TD161
Red Even Pixel DataF_RE4TA033
Red Even Pixel DataF_RE5TA134
Red Even Pixel DataF_RE6TA235
Red Even Pixel DataF_RE7TA336
Red Even Pixel DataF_RE8TA437
Red Even Pixel
Data(MSB)
Green Even Pixel
Data(LSB)
Green Even Pixel DataF_GE3TD363
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Output
signal
LTM230HU01 interface
SymbolTerminalFunctionsymbolsymbolNo
50 / 51TD- / TD+
40 / 41TA- / TA+
50 / 51TD- / TD+
F_RXE3N /
F_RXE3P
F_RXE0N /
F_RXE0P
F_RXE3N /
F_RXE3P
40 / 41TA- / TA+Green Even Pixel DataF_GE4TA640
Green Even Pixel DataF_GE5TB041
Green Even Pixel DataF_GE6TB142
Green Even Pixel DataF_GE7TB244
Green Even Pixel DataF_GE8TB345
F_GE9TB446
F_BE2TD464
Green Even Pixel
Data(MSB)
Blue Even Pixel
Data(LSB)
Blue Even Pixel DataF_BE3TD51
Blue Even Pixel DataF_BE4TB548
Blue Even Pixel DataF_BE5TB649
Blue Even Pixel DataF_BE6TC050
Blue Even Pixel DataF_BE7TC152
Blue Even Pixel DataF_BE8TC253
42 / 43TB- / TB+
50 / 51TD- / TD+
42 / 43TB- / TB+
44 / 45TC- / TC+
F_RXE0N /
F_RXE0P
F_RXE1N /
F_RXE1P
F_RXE3N /
F_RXE3P
F_RXE1N /
F_RXE1P
F_RXE2N /
F_RXE2P
F_BE9TC354
Blue Even Pixel
Data(MSB)
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5.3 LVDS Interface
(2)
5.3.1 Back _ Odd Pixel Data
LVDS Transmitter (THC63LVD103) Signal Interface
36
B_GO2TD262
Input signalInput pin
Red Odd Pixel Data(LSB)B_RO2TD059
Red Odd Pixel DataB_RO3TD161
Red Odd Pixel DataB_RO4TA033
Red Odd Pixel DataB_RO5TA134
Red Odd Pixel DataB_RO6TA235
Red Odd Pixel DataB_RO7TA3
Red Odd Pixel DataB_RO8TA437
Red Odd Pixel Data(MSB)B_RO9TA538
Green Odd Pixel
Data(LSB)
Green Odd Pixel DataB_GO3TD363
PRODUCT INFORMATION
PRODUCT INFORMATION
Output
signal
TD- / TD+
LTM230HU01 interface
B_RXO3N /
B_RXO3P
1 / 2TA- / TA+
11 / 12TD- / TD+
B_RXO0N /
B_RXO0P
B_RXO3N /
B_RXO3P
SymbolTerminalFunctionsymbolsymbolNo
1 / 2TA- / TA+Green Odd Pixel DataB_GO4TA640
Green Odd Pixel DataB_GO5TB041
Green Odd Pixel DataB_GO6TB142
Green Odd Pixel DataB_GO7TB244
Green Odd Pixel DataB_GO8TB345
B_GO9TB446
Green Odd Pixel
Data(MSB)
Blue Odd Pixel Data(LSB)B_BO2TD464
Blue Odd Pixel DataB_BO3TD51
Blue Odd Pixel DataB_BO4TB548
Blue Odd Pixel DataB_BO5TB649
Blue Odd Pixel DataB_BO6TC050
Blue Odd Pixel DataB_BO7TC152
Blue Odd Pixel DataB_BO8TC253
3 / 4TB- / TB+
11 / 12TD- / TD+
3 / 4TB- / TB+
5 / 6TC- / TC+
B_RXO0N /
B_RXO0P
B_RXO1N /
B_RXO1P
B_RXO3N /
B_RXO3P
B_RXO1N /
B_RXO1P
B_RXO2N /
B_RXO2P
Blue Odd Pixel Data(MSB)B_BO9TC354
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5.3 LVDS Interface
(2)
5.3.2 Back _ Even Pixel Data
LVDS Transmitter (THC63LVD103) Signal Interface
B_RE7TA336
B_RE9TA538
B_GE2TD262
Input signalInput pin
Red Even Pixel Data(LSB)RE2TD059
Red Even Pixel DataB_RE3TD161
Red Even Pixel DataB_RE4TA033
Red Even Pixel DataB_RE5TA134
Red Even Pixel DataB_RE6TA235
Red Even Pixel Data
Red Even Pixel DataB_RE8TA437
Red Even Pixel
Data(MSB)
Green Even Pixel
Data(LSB)
Green Even Pixel DataB_GE3TD363
PRODUCT INFORMATION
PRODUCT INFORMATION
Output
signal
TD- / TD+
LTM230HU01 interface
B_RXE3N /
B_RXE3P
14 / 15TA- / TA+
24 / 25TD- / TD+
B_RXE0N /
B_RXE0P
B_RXE3N /
B_RXE3P
SymbolTerminalFunctionsymbolsymbolNo
14 / 15TA- / TA+Green Even Pixel DataB_GE4TA640
Green Even Pixel DataB_GE5TB041
Green Even Pixel DataB_GE6TB142
Green Even Pixel DataB_GE7TB244
Green Even Pixel DataB_GE8TB345
B_GE9TB446
B_BE9TC354
Green Even Pixel
Data(MSB)
Blue Even Pixel Data(LSB)B_BE2TD464
Blue Even Pixel DataB_BE3TD51
Blue Even Pixel DataB_BE4TB548
Blue Even Pixel DataB_BE5TB649
Blue Even Pixel DataB_BE6TC050
Blue Even Pixel DataB_BE7TC152
Blue Even Pixel DataB_BE8TC253
Blue Even Pixel
Data(MSB)
16 / 17TB- / TB+
24 / 25TD- / TD+
16 / 17TB- / TB+
18 / 19TC- / TC+
B_RXE0N /
B_RXE0P
B_RXE1N /
B_RXE1P
B_RXE3N /
B_RXE3P
B_RXE1N /
B_RXE1P
B_RXE2N /
B_RXE2P
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5.4 Back Light Unit
Upper
Lower
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PRODUCT INFORMATION
PRODUCT INFORMATION
FunctionColorInputPin No.
High VoltageREDHot11
GroundWhiteCold12
High VoltageBlueHot23
GroundGrayCold24
High VoltageREDHot11
GroundWhiteCold12
High VoltageBlueHot23
Connect
or
Part No.
GroundGrayCold24
YEON-HO 35001HS-04SL
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5.5 Input Signals, Basic Display Colors and Gray Scale of Each Color
COLOR
BASIC
COLOR
DISPLAY
(8bit)
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DATA SIGNAL
0000000000BLUE
PRODUCT INFORMATION
PRODUCT INFORMATION
BLUEGREENRED
GRAY
SCALE
LEVEL
B7B6B5B4B3B2B1B0G7G6G5G4G3G2G1G0R7R6R5R4R3R2R1R0
-000000000000000000000000BLACK
-11111111000000
-000000001111111100000000GREEN
-111111111111111100000000CYAN
-000000000000000011111111RED
GRAY
SCALE
OF
RED
GRAY
SCALE
OF
GREEN
GRAY
SCALE
OF
BLUE
DARK
˦
˨
LIGHT
DARK
˦
˨
LIGHT
DARK
˦
˨
LIGHT
1111111MAGE NTA
::::::::::::::::::
::::::::::::::::::
111101
::::::::::::::::::
::::::::::::::::::
000000
:::::::::::::
:::::
::::::::::::::::::
-11111111000000001
-000000001111111111111111YELLOW
-111111111111111111111111WHITE
R0000000000000000000000000BLACK
R1000000000000000000000001
R2000000000000000000000010
R3~
R252
R253000000000000000011
R254000000000000000011111110
R255000000000000000011111111RED
G0000000000000000000000000BLACK
G1000000000000000100000000
G2000000000000001000000000
G3~
G252
G253000000001111110100
G254000000001111111000000000
G255000000001111111100000000GREEN
B0000000000000000000000000BLACK
B1000000010000000000000000
B2000000100000000000000000
B3~
B252
B253111111010000000000000000
B254111111100000000000000000
B255111111110000000000000000BLUE
Note (1) Definition of Gray :
Rn : Red Gray, Gn : Green Gray, Bn : Blue Gray (n = Gray level)
Input Signal : 0 = Low level voltage, 1 = High level voltage
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6. Interface Timing
6.1 Timing Parameters ( DE only mode )
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PRODUCT INFORMATION
PRODUCT INFORMATION
NOTEUnitMAX.TYP.MIN.SYMBOLITEMSIGNAL
Clock
Hsync
Vsync
Frequency
C
H
V
Active
Vertical
Display Term
Display
Period
Vertical Total
VD
V
Active
Clocks192019201920T
Horizontal
Display
Period
HD
Display Term
Horizontal
Total
H
clocks222420802056T
Note (1) This product is DE only mode. The input of Hsync & Vsync signal does
not have an effect on normal operation.
(2) Test Point : TTL control signal and CLK at LVDS Tx input terminal in system
-MHz9070521/T
-kHz175134102F
-Hz12412092F
-Lines108010801080T
-Lines174411201110T
Pixel
/clock
Pixel
/clock
(3) Internal Vcc = 3.3V
(4) Best operation clock frequency is 70 MHz (120Hz)
(5) Clock frequency = Frame frequency x
T
(Typ) x
V
T
H
(6) Max, Min variation range is at main clock Typ value
(Typ)
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6.2 Timing diagrams of interface signal ( DE only mode )
DE
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T
V
T
VD
PRODUCT INFORMATION
PRODUCT INFORMATION
T
VB
T
H
DE
DCLK
DATA
SIGNALS
DCLK
T
HD
T
C
T
C
T
CH
T
CL
0.5
V
CC
T
DS
T
DH
DISPLAY
DATA
DE
T
ES
0.5
V
CC
0.5
V
CC
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6.3 Power ON/OFF Sequence
To prevent a latch-up or DC operation of the LCD Module, the power on/off
sequence should be as the diagram below.
0
˺˺˺˺T1˺˺˺˺
10msec
˺˺˺˺T2˺˺˺˺
50msec
0
0
˺˺˺˺T3˺˺˺˺
50msec
˺˺˺˺
T4
1sec
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PRODUCT INFORMATION
PRODUCT INFORMATION
Back-Light
(Recommended)
˺˺˺˺
500msec
100msec
T5
˺˺˺˺
T6
T1 : VDDrising time from 10% to 90%
T2 : The time from V
T3 : The time from valid data off to V
T4 : V
off time for Windows restart
DD
to valid data at power ON.
DD
off at power Off.
DD
T5 : The time from valid data to B/L enable at power ON.
T6 : The time from valid data off to B/L disable at power Off.
The supply voltage of the external system for the Module input should be the same
as the definition of V
DD
.
Apply the lamp voltage within the LCD operation range. When the back light turns on
before the LCD operation or the LCD turns off before the back light turns off,
the display may momentarily show abnormal screen.
In case of V
= off level,
DD
please keep the level of input signals low or keep a high impedance.
T4 should be measured after the Module has been fully discharged between power off
and on period.
Interface signal should not be kept at high impedance when the power is on.
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6.4 VDD Power Dip Condition
V
DD
90%
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T
d
PRODUCT INFORMATION
PRODUCT INFORMATION
80%
V
CC
GND
4.5V ˺ VDD˺ 5.5V
If V
(typ.) x 80% ˺ VCC˺ VDD(typ) x 90%
DD
Then, 0<Td ˺20msec
Note(1) The above conditions are for the glitch of the input voltage.
(2) For stable operation of an LCD Module power, please follow them.
ᆙ
i.e., if typ VDD x 80%
Vccᆙtyp VDD x 90%, then Tdshould be less than 20ms.
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7. Outline Dimension
[ Refer to the next page ]
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PRODUCT INFORMATION
PRODUCT INFORMATION
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8. General Precautions
8.1 Handling
(a) When the module is assembled, it should be attached to the system firmly
using all mounting holes. Be careful not to twist and bend the module.
(b) Because the inverter uses high voltages, it should be disconnected from power
source before it is assembled or disassembled.
(c) Refrain from strong mechanical shock and / or any force to the module.
In addition to damage, it may cause improper operation or damage to the module
and CCFT back light.
(d) Note that polarizer films are very fragile and could be damaged easily.
Do not press or scratch the surface harder than a HB pencil lead.
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PRODUCT INFORMATION
PRODUCT INFORMATION
(e) Wipe off water droplets or oil immediately. If you leave the droplets for a long
time, staining or discoloration may occur.
(f) If the surface of the polarizer is dirty, clean it using absorbent cotton or soft cloth.
(g) Desirable cleaners are water, IPA (Isopropyl Alcohol) or Hexane.
Do not use Ketone type materials (ex. Acetone), Ethyl alcohol, Toluene, Ethyl acid
or Methyl chloride. It might cause permanent damage to the polarizer due to chemical
reaction.
(h) If the liquid crystal material leaks from the panel, it should be kept away
from the eyes or mouth . In case of contact with hands, legs or clothes, it must
be washed away with soap thoroughly.
(i) Protect the Module from static, or the CMOS Gate Array IC would be damaged.
(j) Use finger-stalls with soft gloves in order to keep display clean during the
incoming inspection and assembly process.
(k) Do not disassemble the Module.
(l) Do not pull or fold the lamp wire.
(m) Do not adjust the variable resistor located on the Module.
(n) Protection film for polarizer on the Module should be slowly peeled off just before use
so that the electrostatic charge can be minimized.
(o) Pins of I/F connector should not be touched directly with bare hands.
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8.2 Storage
(a) Do not leave the Module in high temperature, and high humidity for a long time.
It is highly recommended to store the Module with temperature from 0 to 35
and relative humidity of less than 70%.
(b) Do not store the TFT-LCD Module in direct sunlight.
(c) The Module should be stored in a dark place. It is prohibited to apply sunlight or
fluorescent light in storing.
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PRODUCT INFORMATION
PRODUCT INFORMATION
8.3 Operation
(a) Do not connect or disconnect the Module in the "Power On" condition.
(b) Power supply should always be turned on/off by the item 6.3
"Power on/off sequence"
(c) Module has high frequency circuits. Sufficient suppression to the electromagnetic
interference should be done by system manufacturers. Grounding and shielding
methods may be important to minimize the interference.
(d) The cable between the back light connector and its inverter power supply should
be connected directly with a minimized length. A longer cable between
the back light and the inverter may cause lower luminance of lamp(CCFT) and
may require higher startup voltage(Vs).
8.4 Operation Condition Guide
(a) The LCD product should be operated under normal conditions.
(b) If the product will be used in extreme conditions such as high temperature,
humidity, display patterns or operation time etc.., It is strongly recommended
to contact SEC for Application engineering advice. Otherwise, its reliability and
function may not be guaranteed. Extreme conditions are commonly found at
Airports, Transit Stations, Banks, Stock market, and Controlling systems.
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8.5 Others
(a) Ultra-violet ray filter is necessary for outdoor operation.
(b) Avoid condensation of water. It may result in improper operation or disconnection
of electrode.
(c) Do not exceed the absolute maximum rating value. ( supply voltage variation,
input voltage variation, variation in part contents and environmental temperature,
and so on)
Otherwise the Module may be damaged.
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PRODUCT INFORMATION
PRODUCT INFORMATION
(d) If the Module keeps displaying the same pattern for a long period of time,
the image may be "sticked" to the screen.
To avoid image sticking, it is recommended to use a screen saver.
(e) This Module has its circuitry PCB's on the rear side and should be handled
carefully in order not to be stressed.
(f) Please contact SEC in advance when you display the same pattern for a long time.
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