Samsung KS0118C Datasheet

KS0118C GENLOCK ADC
INTRODUCTION
The KS0118C is a CMOS integrated circuit designed for the GEN LOCK and ND Conversion. It is a Monolithic IC that enabled an analog NTSC composite video signal to digitize at a clock rate that is synchronized and locked to the incoming video horizontal line frequency. It includes clamping function, 8-bit digitizing and creation of a line locked sampling clock. It is possible to correspond to the video signal system of LDP by the use of KA9413, KA 9414-D ICS together, which is designed for the Digital Video Signal Processor.
ORDERING IN FORMATION
Device Package Operating Temperature
KS0118C 80-QFP-1420C
FEATURES
NTSC Video Signal Input
Line-locked Sync and Clock Generation
Line to Line Jitter < 20 nsec
Differential Gain 2% Differential Phase 2
Programmable Sample Clock Frequency from 25 to 30 MHz
Built-in 8 Bit CMOS Analog to Digital Converter
Programmable Gain Control and Automatic DC Offset Control for Video Signal Input
Programmable PLL Time Constants for Tracking Different Input Types
Correctly Tracks Line Drop-outs
Provides a Microprocessor 3 Wire Serial Interface
Built-in Decimation Filter
Single Power Supply: +5V
O
80-QFP-1420C
-20Î~+75
Î
KS0118C GENLOCK ADC
BLOCK DIAGRAM
VIN
XTL1 XTL2
70
CLAMP
4 5
CRYSTAL
DRIVER
SERIAL MICOM INTERFACE
19 25 27
SFRS
DIGITAL OFFSET CONTROL
SCLK
SDAT
DTO
8 BIT
ADC
LPF
SYNC DETECTOR
JITTER
REDUCTION
Fig. 1
PIXEL COUNTER
DECIMATION
FILTER
OUTPUT
TIMING
PHASE DET/
PLL FILTER
48 55
35 39 40
16
CVBS<0:7>
LOCK VS SLICE
FSMP
KS0118C GENLOCK ADC
PIN CONFIGURATION
(A)
VRB VRT
CREF1
(A)
V
DD
CAGC
VIN
GND
NC
RREF
GND
(A)
V
DD
RVCO
CREF2
GND
NC NC
DD
DD
GND
NCNCNCNCGND
64 63 62 61 60 59 58 57 56 55 54 53 52 51 49 48 47 46 45 44 43 42 41
V
VDDV
CVBS7
CVBS6
CVBS5
CVBS4
CVBS3
CVBS2
CVBS1
50
65 66 67 68 69 70 71 72 73
KS0118
74 75 76 77 78 79 80
CVBS0
DD
GND
V
NCNCNCNCNC
40
SLICE
39
VS
38
NC
37
NC
36
NC
35
LOCK
34
NC
33
NC
32
NC
31
NC
30
NC
29
NC
28
NC
27
SDAT
26
NC
25
SCLK
1 3 5 6 7 8 9 10 11 12 14 15 18 20 21 22 23 24
2 4 13 16 17 19
(A)
(A)
NC
NC
RSTB
RCPLL
DD
XTL1
DD
XTL2
V
V
NC
GND
SYG
NC
FRZ
DD
V
GND
NC
LDP
FSMP
NCNCNCNCNC
SFRS
Fig. 2
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