Samsung KS0066U Datasheet
KS0066U 16COM / 40SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
INTRODUCTION
KS0066U is a dot matrix LCD driver & controller LSI whichis
fabricated by low power CMOS technology.
It can display 1or 2 lines with the 5×8 dots format or 1 line
with the 5×11 dots format.
FUNCTIONS
• Character type dot matrix LCD driver & controller.
• Internal driver: 16 common and 40 segment signal output.
• Easy interface with 4-bit or 8-bit MPU.
• Display character pattern: 5×8 dots format (208 kinds) & 5×11 dots format (32 kinds).
• The Special character pattern is directly programmable by the Character Generator RAM.
• A customer character pattern is programmable by mask option.
• Programmable Driving Method by the same character font mask option: Display Waveform A-type and B-type
• It can drive a maximum at 80 characters by using the KS0065B or KS0063B externally.
• Various instruction functions.
• Built-in automatic power on reset.
80 QFP-1420C
FEATURES
• Internal Memory
- Character Generator ROM (CGROM): 10,080 bits (204 characters×5×8 dots) & (32 characters×5×11 dots)
- Character Generator RAM (CGRAM): 64×8 bits (8 characters×5×8 dots)
- Display Data RAM (DDRAM): 80×8 bits (80 characters max.)
• Low power operation
- Power supply voltage range (VDD): 2.7 to 5.5 V
- LCD Drive voltage range (VDD−V5): 3.0 to 13.0 V
• CMOS process
• Programmable duty cycle: 1/8, 1/11, 1/16
• Internal oscillator with external resistor
• Low power consumption
• 80 QFP or bare chip available
KS0066U 16COM / 40SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
BLOCK DIAGRAM
VDD
GND
R/W
RS
E
DB0
DB3
DB4
DB7
V1
V2
V3
V4
V5
−
−
Input
/Output
Buffer
8
8
Busy
Flag
Data
Register
(DR)
Instruction
register
(IR)
Character
Generator
ROM
(CGROM)
10080 bits
8
Instruction
Decoder
8
Parallel to Serial
Data Conversion Circuit
5
8
(ID)
5
Character
Generator
RAM
(CGRAM)
512 bits
8
7
7
Display
Data RAM
(DD RAM)
80x8 bits
Cursor
& Blink
Controller
8
40-bit
Shift
Register
40-bit
Latch
Circuit
Segment
Driver
40
S1−S40
D
OSC1
OSC2
Timing
Generator
Circuit
Address
7
7
Counter
16-bit
Shift
Register
Common
Driver
16
C1−C16
CLK1
CLK2
M
KS0066U 16COM / 40SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
PIN CONFIGURATION
64 S39
63 S40
62 C16
61 C15
60 C14
59 C13
58 C12
57 C11
56 C10
55 C9
54 C8
53 C7
52 C6
51 C5
50 C4
49 C3
48 C2
47 C1
46 DB7
45 DB6
44 DB5
43 DB4
42 DB3
41 DB2
S38
S37
S36
S35
S34
S33
S32
S31
S30
S29
S28
S27
S26
S25
S24
S23
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
40 DB1
39 DB0
38 E
37 R/W
36 RS
35 D
34 M
KS0066U
6
5
4
3
2
1
S22
S21
S20
S17
S19
S18
9
8
7
S16
10
12
11
S15
S13
S12
S14
S11
15
13
14
S9
S8
S10
18
16
17
S7
S6
20
19
S5
S4
S3
23
22
21
S2
S1
GND
33 VDD
32 CLK2
31 CLK1
30 V5
29 V4
28 V3
27 V2
26 V1
25 OSC2
24
OSC1
KS0066U 16COM / 40SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
PAD DIAGRAM
S23
S24
S25
S26
S27
S28
S29
S30
S31
S32
S33
S34
S35
S36
S37
S38
S22
S21
S20
S19
S18
S17
S16
S15
S14
S13
S12
S11
S10
S9
S8
S7
S6
S5
S4
S3
S2
S1
GND
OSC1
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
1
2
3
4
5
6
7
8
9
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
KS0066U
Y
(0,0)
X
CHIP SIZE: 4060×3840
PAD SIZE: 100×100
UNIT: µm
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
S39
S40
C16
C15
C14
C13
C12
C11
C10
C9
C8
C7
C6
C5
C4
C3
C2
C1
DB7
DB6
DB5
DB4
DB3
DB2
R/W
E
DB0
DB1
D
V1
V2
V3
V4
V5
CLK1
OSC2
CLK2
M
VDD
RS
NOTE: “KS0066U” marking is to make the PAD No. 65 easy to find.
KS0066U 16COM / 40SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
PAD LOCATION
Table 1. Pad Location
Pad
Pad
No.
Name
1 S22 -1864 1465 21 S2 -1864 -1034 41 DB2 1864 -1488 61 C15 1864 1085
2 S21 -1864 1340 22 S1 -1864 -1159 42 DB3 1864 -1362 62 C16 1864 1210
3 S20 -1864 1215 23 GND -1864 -1285 43 DB4 1864 -1238 63 S40 1864 1341
4 S19 -1864 1090 24 OSC1 -1864 -1414 44 DB5 1864 -1112 64 S39 1864 1466
5 S18 -1864 965 25 OSC2 -1120 -1754 45 DB6 1864 -988 65 S38 886 1754
6 S17 -1864 840 26 V1 -970 -1754 46 DB7 1864 -862 66 S37 760 1754
7 S16 -1864 715 27 V2 -820 -1754 47 C1 1864 -665 67 S36 636 1754
8 S15 -1864 590 28 V3 -670 -1754 48 C2 1864 -540 68 S35 510 1754
9 S14 -1864 465 29 V4 -520 -1754 49 C3 1864 -415 69 S34 386 1754
10 S13 -1864 340 30 V5 -370 -1754 50 C4 1864 -290 70 S33 260 1754
11 S12 -1864 215 31 CLK1 -220 -1754 51 C5 1864 -165 71 S32 136 1754
Coordinate
X Y X Y X Y X Y
Pad
No.
Pad
Name
Coordinate
Pad
No.
Pad
Name
Coordinate
Pad
No.
Pad
Name
(Unit: µm)
Coordinate
12 S11 -1864 90 32 CLK2 -70 -1754 52 C6 1864 -40 72 S31 10 1754
13 S10 -1864 -35 33 VDD 80 -1754 53 C7 1864 85 73 S30 -114 1754
14 S9 -1864 -160 34 M 230 -1754 54 C8 1864 210 74 S29 -240 1754
15 S8 -1864 -285 35 D 380 -1754 55 C9 1864 335 75 S28 -364 1754
16 S7 -1864 -410 36 RS 518 -1754 56 C10 1864 460 76 S27 -490 1754
17 S6 -1864 -535 37 R/W 642 -1754 57 C11 1864 585 77 S26 -614 1754
18 S5 -1864 -660 38 E 768 -1754 58 C12 1864 710 78 S25 -740 1754
19 S4 -1864 -785 39 DB0 894 -1754 59 C13 1864 835 79 S24 -864 1754
20 S3 -1864 -910 40 DB1 1018 -1754 60 C14 1864 960 80 S23 -989 1754
KS0066U 16COM / 40SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
PIN DESCRIPTION
Table 2. Pin Description
Pin
VDD 33 - Supply Voltage Supply Voltage for logical circuit
GND 23 Ground (0V)
V1-V5 26-30 Bias voltage level for LCD driving
S1-S40 1-22,
C1-C16 47-62 O Common output Common signal output for LCD drive LCD
OSC1 24 I Oscillator Oscillator. When using internal oscillator,
OSC2 25 O Oscillator
CLK1 31 O Extension driver
CLK2 32 O Extension driver
M 34 O Alternated signal
Pin
No.
63-80
I/O Name Description Interface
Power Supply
(+3V ± 10%,+5V ± 10%)
O Segment output Segment signal output for LCD drive LCD
External
Latch clock
Shift clock
for LCD driver
output
connect external Rf resistor.
If external clock is used, connect it to
OSC1.
Extension driver latch clock Extension driver
Extension driver shift clock
Outputs the alternating signal to convert
LCD driver waveform to AC.
resistor/oscillator
(OSC1)
Extension driver
D 35 O Display data
interface
RS 36 I Register select Used as register selection input.
R/W 37 I Read/Write Used as read/write selection input.
E 38 I Read/Write enable Used as read/write enable signal. MPU
DB0-DB3 39-42 I/O Data bus 0-7 In 8-bit bus mode, used as low order
DB4-DB7 43-46 In 8-bit bus mode, used as high order
Outputs extension driver data
(the 41st dot's data)
When RS = “High”, Data register is
selected.
When RS = “Low”, Instruction register is
selected.
When RW = “High”, read operation.
When RW = “Low”, write operation.
bidirectional data bus.
In 4-bit bus mode, open these pins.
bidirectional data bus.
In 4-bit bus mode, used as both high and
low order.
DB7 used for Busy Flag output.
Extension driver
MPU
MPU
MPU
MPU
KS0066U 16COM / 40SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
FUNCTION DESCRIPTION
System Interface
This chip has both kinds of interface type with MPU: 4-bit bus and 8-bit bus.
4-bit bus and 8-bit bus are selected by the DL bit in the instruction register.
During read or write operation, two 8-bit registers are used.
One is the data register (DR), and the other is the instruction register (IR).
The data register (DR) is used as a temporary data storage place for being written into or read from
DDRAM/CGRAM. The target RAM is selected by RAM address setting instruction.
Each internal operation, reading from or writing into RAM, is done automatically.
Thus, after MPU reads DR data, the data in the next DDRAM/CGRAM address is transferred into DR
automatically. Also, after MPU writes data to DR, the data in DR is transferred into DDRAM/CGRAM
automatically.
The Instruction register(IR) is used only to store instruction codes transferred from MPU.
MPU cannot use it to read instruction data.
To select a register, you can use RS input pin in 4-bit/8-bit bus mode.
Table 3. Various kinds of Operations according to RS and R/W bits
RS R/W Operation
L L Instruction Write operation (MPU writes Instruction code into IR)
L H Read Busy flag(DB7) and address counter (DB0 to DB6)
H L Data Write operation (MPU writes data into DR)
H H Data Read operation (MPU reads data from DR)
Busy Flag (BF)
BF = “High”, indicates that the internal operation is being processed.
So during this time the next instruction cannot be accepted. BF can be read through DB7 port
when RS = “Low” and R/W = “High” (Read Instruction Operation).
Before executing the next instruction, be sure that BF is not “High”.
Address Counter (AC)
The address Counter (AC) stores DDRAM/CGRAM addresses, transferred from IR.
After writing into (reading from) DDRAM/CGRAM, AC is automatically increased (decreased) by 1.
When RS = “Low” and R/W = “High”, AC can be read through ports DB0 to DB6.
KS0066U 16COM / 40SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
Display Data RAM (DDRAM)
DDRAM stores display data of maximum 80×8 bits (80 characters).
DDRAM address is set in the address counter(AC) as a hexadecimal number (Refer to Fig-1.)
MSB LSB
AC6 AC5 AC4 AC3 AC2 AC1 AC0
Figure 1 . DDRAM Address
1) 1-line display
In case of 1-line display, the address range of DDRAM is 00H−4FH.
An extension driver will be used. Fig-2 shows the example with 40 segment extension driver added.
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
COM1
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17
COM8
SEG1 KS0066U SEG40 SEG1 Extension Driver (40SEG) SEG40 SEG1 Extension Driver (40SEG) SEG40
Display position
DDRAM address
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
COM1
01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18
COM8
SEG1 KS0066U SEG40 SEG1 Extension Driver (40SEG) SEG40 SEG1 Extension Driver (40SEG) SEG40
(After Shift Left)
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
COM1
4F 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16
COM8
SEG1 KS0066U SEG40 SEG1 Extension Driver (40SEG) SEG40 SEG1 Extension Driver (40SEG) SEG40
(After Shift Right)
Figure 2 . 1-line
×
24 char. display with 40 SEG. extension driver
KS0066U 16COM / 40SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
2) 2-line display
In case of 2-line display, the address range of DDRAM is 00H−27H and 40H−67H.
An extension driver will be used. Fig-3 shows the example with 40 segment extension driver added.
Display position
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
COM1
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17
COM8
COM9
40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 54 55 56 57
COM16
SEG1 KS0066U SEG40 SEG1 Extension Driver (40SEG) SEG40 SEG1 Extension Driver (40SEG) SEG40
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
COM1
01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18
COM8
COM9
41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 54 55 56 57 58
COM16
SEG1 KS0066U SEG40
SEG1 Extension Driver (40SEG) SEG40 SEG1 Extension Driver (40SEG) SEG40
DDRAM address
(After Shift Left)
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
COM1
27 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16
COM8
COM9
67 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 5E 4F 50 51 52 53 54 55 56
COM16
SEG1 KS0066U SEG40
SEG1 Extension Driver (40SEG) SEG40 SEG1 Extension Driver (40SEG) SEG40
(After Shift Right)
Figure 3 . 2-line × 24 char. display with 40 SEG. extension driver
KS0066U 16COM / 40SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
CGROM(Character Generator ROM)
CGROM has a 5×8 dots 204 characters pattern and a 5×11 dots 32 characters pattern (Refer to Table 4).
CGROM has 204 character patterns of 5× 8 dots, and 32 character patterns of 5×11 dots.
CGRAM(Character Generator RAM)
CGRAM has up to 5×8 dots 8 characters.
By writing font data to CGRAM, user defined characters can be used (Refer to Table 5)
Timing Generation Circuit
Timing generation circuit generates clock signals for the internal operations.
LCD Driver Circuit
LCD Driver circuit has 16 common and 40 segment signals for LCD driving.
Data from CGRAM/CGROM is transferred to a 40-bit segment latch serially, and then is stored to 40-bit shift latch.
When each common is selected by 16-bit common register, segment data is also output through segment driver
from a 40-bit segment latch.
In case of 1-line display mode, COM1 to COM8 have 1/8 duty or COM1 to COM11 have 1/11 duty,
and in 2-line mode, COM1 to COM16 have a 1/16 duty ratio.
Cursor/Blink Control Circuit
It controls the cursor/blink ON/OFF at cursor position.
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