SAMSUNG KM68B261A Technical data
KM68B261A BiCMOS SRAM
32K x 8 Bit High-Speed BiCMOS Static RAM
FEATURES
• Fast Access Time 6,7,8ns(Max.)
• Low Power Dissipation
Standby (TTL) : 110 mA(Max.)
(CMOS) : 20 mA(Max.)
Operating Current : 170 mA(f=100MHz)
• Single 5V ± 5% Power Supply
• TTL Compatible Inputs and Outputs
• Fully Static Operation
- No Clock or Refresh required
• Three State Outputs
• Center Power/Ground Pin Configuration
• Standard Pin Configuration
KM68B261AJ : 32-SOJ-300
FUNCTIONAL BLOCK DIAGRAM
Pre-Charge Circuit
A0
A1
A2
A3
A4
A5
A6
I/O1-I/O8
Row Select
Data
Cont.
MEMORY ARRAY
128 Rows
256x8 Columns
I/O Circuit
Column Select
GENERAL DESCRIPTION
The KM68B261A is a 262,144-bit high-speed Static
Random Access Memory organized as 32,768 words by
8 bits. The KM68B261A uses eight common input and
output lines and has an output enable pin which
operates faster than address access time at read cycle.
The device is fabricated using Samsung`s advanced
BiCMOS process and designed for high-speed system
applications. It is particularly well suited for use in highdensity high-speed system applications. The
KM68B261A is packaged in a 300 mil 32-pin plastic
SOJ.
PIN CONFIGURATION(TOP VIEW)
/CS
I/O1
I/O2
Vcc
Vss
I/O3
I/O4
/WE
1
A0
2
A1
3
A2
4
A3
5
6
7
8
SOJ
9
10
11
12
13
A4
14
A5
15
A6
16
A7
32
N.C
31
A14
30
A13
29
A12
28
/OE
27
I/O8
26
I/O7
25
Vss
24
Vcc
23
I/O6
22
I/O5
21
A11
20
A10
19
A9
18
A8
17
N.C
/CS
/WE
/OE
A7 A8 A9 A10 A11 A12 A13 A14
PIN DESCRIPTION
Pin Name Pin Function
A0-A14
/WE
/CS
/OE
I/O1-I/O8
Vcc
Vss
N.C
1
Address Inputs
Write Enable
Chip Select
Output Enable
Data Inputs/Outputs
Power (5V)
Ground
No Connection
Rev 2.0
October-1994
KM68B261A BiCMOS SRAM
ABSOLUTE MAXIMUM RATINGS*
Parameter Symbol Rating Unit
Voltage on Any Pin Relative to Vss
Voltage on Vcc Supply Relative to Vss
Power Dissipation
Storage Temperature
Operating Temperature
Stresses greater than those listed under "Absolute Maximum Rating" may cause permanent damage to the device.
*
This is a stress rating only and functional operation of the device at these or any other conditions above those
indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
VIN,OUT
Vcc
PD
Tstg
TA
- 0.5 to 7.0
- 0.5 to 7.0
1.0
- 65 to 150
0 to 70
V
V
W
°C
°C
RECOMMENDED DC OPERATING CONDITIONS(TA= 0 to 70 °C )
Parameter Symbol Min Typ. Max Unit
Supply Voltage
Ground
Input Low Voltage
Input High Voltage
* VIL(Min) = -2.0 (Pulse Width for I
** VIH(Max) = Vcc+2.0V(Pulse width for I
≤3ns)
Vcc
Vss
VIH
VIL
≤ 8ns)
≤ 20mA
≤ 20mA
4.75
0
2.2
-0.5*
5.0
0
5.25
0
-
-
Vcc+0.5**
0.8
V
V
V
V
DC AND OPERATING CHARACTERISTICS
(TA= 0 to 70°C, Vcc=5 V 5%, unless otherwise specified)
Parameter Symbol Test Conditions Min Max Unit
Input Leakage Current
Output Leakage Current
Operating Current
Standby Current
Output Low Voltage
Output High Voltage
±
ILI
ILO
ICC
ISB
ISB1
VOL
VOH
VIN=Vss to Vcc
/CS=VIH or /OE=VIH or /WE=VIL
VOUT=VSS to Vcc
f=100MHz, 100% Duty, /CS=VIL,
VIN=VIH or VIL, IOUT=0mA
Min. Cycle, /CS=VIH
f=0MHz, /CS -0.2V,
≥ Vcc ≤ 0.2V
VIN -0.2V or VIN
IOL=8mA
IOH = - 4mA
≥ Vcc
-10
-10
-
-
-
-
2.4
2
10
10
170
110
20
0.4
-
October-1994
µA
µA
mA
mA
mA
V
V
Rev 2.0
KM68B261A BiCMOS SRAM
CAPACITANCE*(f=1MHz, TA =25 °C)
Item Symbol Test Condition Min. Max. Unit
Input Capacitance
Input/Output Capacitance
* Note: Capacitance is sampled and not 100% tested.
CIN
CI/O
VIN=0V
VI/O=0V
-
-
7
7
AC CHARACTERISTICS
TEST CONDITIONS ON DATA RAM(TA= 0 to 70°C, Vcc=5V 5%, unless otherwise specified.)
Parameter
Input Pulse Level
Input Rise and Fall Time
Input and Output Timing Reference Levels
Output Load
Output Load (A)
DOUT
ZO=50
Ω
RL=50
Ω
Output Load (B)
for tHZ, tLZ, tWHZ, tOW, tOLZ, & tOHZ
DOUT
255
±
Ω
Value
0 to 3 V
3ns
1.5V
See below
+5V
480
Ω
5pF*
pF
pF
VL =1.5V
* Including Scope and Jig Capacitance
3
Rev 2.0
October-1994
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