Samsung KM68512BLTI-7L, KM68512BLT-7L, KM68512BLT-5L Datasheet
Revision 0.0
KM68512B Family
CMOS SRAM
January 1998
1
Advance
Document Title
64Kx8 bit Low Power CMOS Static RAM
Revision History
Revision No.
0.0
Remark
Advance
History
Initial draft
Draft Data
January 10th 1998
The attached datasheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right
to change the specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions about device. If you ha ve
any questions, please contact the SAMSUNG branch office near you.
Revision 0.0
KM68512B Family
CMOS SRAM
January 1998
2
Advance
64Kx8 bit Low Power CMOS Static RAM
The KM68512B family is fabricated by SAMSUNG ′s advanced
CMOS process technology. The family support various operating temperature ranges and small package type for user flexibility of system design. The family also support low data
retention voltage for battery back-up operation with low data
retention current.
GENERAL DESCRIPTIONFEATURES
• Process Technology : 0.4µm CMOS
• Organization : 64Kx8
• Power Supply Voltage : Single 5V ±10%
• Low Data Retention Voltage : 2V(Min)
• Three state output and TTL Compatible
• Package Type : 32-TSOP I -0820F
PIN DESCRIPTION
Name Function
A0~A15 Address Inputs
WE Write Enable Input
CS1, CS2 Chip Select Inputs
OE Output Enable Input
I/O1~I/O8 Data Inputs/Outputs
Vcc Power
Vss Ground
N.C No Connection
PRODUCT FAMILY
Product Family Operating Temperature VCC Range Speed(ns)
Power Dissipation
PKG Type
Standby
(ISB1, Max)
Operating
(ICC2, Max)
KM68512BL-L Commercial(0~70°C)
5V±0.5V
55/70 10µA
60mA 32-TSOP1-F
KM68512BLI-L Industrial(-40~85°C) 70 15µA
FUNCTIONAL BLOCK DIAGRAM
SAMSUNG ELECTRONICS CO., LTD. reserves the right to change products and specifications without notice.
A11
A9
A8
A13
WE
CS2
A15
NC
NC
A14
A12
A7
A6
A5
A4
OE
A10
CS1
I/O8
I/O7
I/O6
I/O5
I/O4
VSS
I/O3
I/O2
I/O1
A0
A1
A2
A3
32-TSOP
Type1 - Forward
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
VCC
Precharge circuit.
Memory array
512 rows
128×8 columns
I/O Circuit
Column select
Clk gen.
Row
select
A0 A1 A2 A3 A9 A11A10
A4
A5
A6
A7
A8
A12
A14
I/O1
Data
cont
Data
cont
I/O8
A13
A15
CS
WE
OE
Control
logic
CS2
Revision 0.0
KM68512B Family
CMOS SRAM
January 1998
3
Advance
PRODUCT LIST
Commercial Temperature Product
(0~70°C)
Industrial Temperature Products
(-40~85°C)
Part Name Function Part Name Function
KM68512BLT-5L
KM68512BLT-7L
32-TSOP1-F, 55ns, LL-pwr
32-TSOP1-F, 70ns, LL-pwr
KM68512BLTI-7L 32-TSOP1-F, 70ns, LL-pwr
FUNCTIONAL DESCRIPTION
1. X means don′t care.(Must be low or high state)
CS1 CS2 OE WE I/O Pin Mode Power
H
X
1)
X
1)
X
1)
High-Z Deselected Standby
X
1)
L
X
1)
X
1)
High-Z Deselected Standby
L H H H High-Z Output Disabled Active
L H L H Dout Read Active
L H X L Din Write Active
ABSOLUTE MAXIMUM RATINGS
1)
1. Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. Functional operation should be
restricted to recommended operating condition. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Item Symbol Ratings Unit Remark
Voltage on any pin relative to Vss VIN,VOUT -0.5 to 7.0 V Voltage on Vcc supply relative to Vss VCC -0.5 to 7.0 V Power Dissipation PD 1.0 W Storage temperature TSTG -65 to 150 °C -
Operating Temperature TA
0 to 70 °C KM68512BL
-40 to 85 °C KM68512BLI
Soldering temperature and time TSOLDER 260°C, 10sec(Lead Only) - -
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