SAMSUNG KM681002C Technical data

PRELIMINARY

PRELIMINARY

KM681002C/CL, KM681002CI/CLI

Document Title

128Kx8 Bit High-Speed CMOS Static RAM(5V Operating).
Operated at Commercial and Industrial Temperature Ranges.

Revision History

Rev. No.

Rev. 0.0

Rev. 1.0

Rev. 2.0

History

Initial release with Preliminary.

Release to Final Data Sheet.

1.1. Delete Preliminary.

2.2. Added Data Retention Characteristics.

Add 10ns part.

CMOS SRAM

Draft Data

Aug. 5. 1998

Mar. 3. 1999

Mar. 3. 2000

Remark

Preliminary

Final

Final

The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the
specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions on the parameters of this device. If you have any ques­tions, please contact the SAMSUNG branch office near your office, call or contact Headquarters.

- 1 -

Revision 2.0

March 2000

PRELIMINARY

PRELIMINARY

KM681002C/CL, KM681002CI/CLI

CMOS SRAM

128K x 8 Bit High-Speed CMOS Static RAM(5.0V Operating)

GENERAL DESCRIPTIONFEATURES

• Fast Access Time 10,12,15,20ns(Max.)

• Low Power Dissipation
Standby (TTL) : 30mA(Max.)
(CMOS) : 5mA(Max.)

0.5mA(Max.) L-ver. only
Operating KM681002C/CL-10 : 80mA(Max.)
KM681002C/CL-12 : 75mA(Max.)
KM681002C/CL-15 : 73mA(Max.)
KM681002C/CL-20 : 70mA(Max.)

• Single 5.0V±10% Power Supply

• TTL Compatible Inputs and Outputs

• I/O Compatible with 3.3V Device

• Fully Static Operation

- No Clock or Refresh required

• Three State Outputs

• 2V Minimum Data Retention; L-ver. only

• Center Power/Ground Pin Configuration

• Standard Pin Configuration
KM681002C/CLJ : 32-SOJ-400
KM681002C/CLT : 32-TSOP2-400CF

FUNCTIONAL BLOCK DIAGRAM

A0
A1
A2
A3
A4
A5
A6
A7
A8

I/O1~I/O8

Clk Gen.

Row Select

Data

Cont.

Pre-Charge Circuit

Memory Array

512 Rows

256x8 Columns

I/O Circuit

Column Select

The KM681002C is a 1,048,576-bit high-speed Static Random
Access Memory organized as 131,072 words by 8 bits. The
KM681002C uses 8 common input and output lines and has an
output enable pin which operates faster than address access
time at read cycle. The device is fabricated using SAMSUNG′s
advanced CMOS process and designed for high-speed circuit
technology. It is particularly well suited for use in high-density
high-speed system applications. The KM681002C is packaged
in a 400mil 32-pin plastic SOJ or TSOP2 forward.

ORDERING INFORMATION

KM681002C/CL-10/12/15/20 Commercial Temp.
KM681002CI/CLI-10/12/15/20 Industrial Temp.

PIN CONFIGURATION(Top View)

1

A0

2

A1

3

A2

4

A3

5

CS

6

I/O1

7

I/O2

8

Vcc
Vss
I/O3
I/O4

WE

A4
A5
A6
A7

9
10
11
12
13
14
15
16

SOJ/

TSOP2

32

A16

31

A15

30

A14

29

A13

28

OE

27

I/O8

26

I/O7

25

Vss

24

Vcc

23

I/O6

22

I/O5

21

A12

20

A11

19

A10

18

A9

17

A8

CS
WE
OE

CLK
Gen.

A10 A11 A12 A13 A14 A15

A9 A16

PIN FUNCTION

Pin Name Pin Function

A0 - A16 Address Inputs

WE Write Enable

CS Chip Select
OE Output Enable

I/O1 ~ I/O8 Data Inputs/Outputs

VCC Power(+5.0V)
VSS Ground
N.C No Connection

- 2 -

Revision 2.0

March 2000

PRELIMINARY

PRELIMINARY

KM681002C/CL, KM681002CI/CLI

CMOS SRAM

ABSOLUTE MAXIMUM RATINGS*

Parameter Symbol Rating Unit

Voltage on Any Pin Relative to VSS VIN, VOUT -0.5 to Vcc+0.5V V
Voltage on VCC Supply Relative to VSS VCC -0.5 to 7.0 V
Power Dissipation Pd 1 W
Storage Temperature TSTG -65 to 150 °C
Operating Temperature Commercial TA 0 to 70 °C

Industrial TA -40 to 85 °C

* Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and

functional operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied.
Exposure to absolute maximum rating conditions for extended periods may affect reliability.

RECOMMENDED DC OPERATING CONDITIONS*(TA=0 to 70°C)

Parameter

Supply Voltage VCC 4.5 5.0 5.5 V
Ground VSS 0 0 0 V
Input High Voltage VIH 2.2 - VCC + 0.5***
Input Low Voltage VIL -0.5** - 0.8

* The above parameters are also guaranteed at industrial temperature range.
** VIL(Min) = -2.0V a.c(Pulse Width ≤ 8ns) for I ≤ 20mA.
*** VIH(Max) = VCC + 2.0V a.c (Pulse Width ≤ 8ns) for I ≤ 20mA.

Symbol

Min

Typ Max Unit

V
V

DC AND OPERATING CHARACTERISTICS*(TA=0 to 70°C, Vcc=5.0V±10%, unless otherwise specified)

Parameter Symbol Test Conditions

Input Leakage Current ILI VIN = VSS to VCC -2 2 µA
Output Leakage Current ILO CS=VIH or OE=VIH or WE=VIL

Operating Current ICC Min. Cycle, 100% Duty

Standby Current ISB Min. Cycle, CS=VIH - 30 mA

ISB1 f=0MHz, CS ≥VCC-0.2V,

Output Low Voltage Level VOL IOL=8mA - 0.4 V
Output High Voltage Level VOH IOH=-4mA 2.4 - V

VOH1** IOH1=-0.1mA - 3.95 V

* The above parameters are also guaranteed at industrial temperature range.
** VCC=5.0V±5%, Temp.=25°C.

VOUT=VSS to VCC

CS=VIL, VIN=VIH or VIL,
IOUT=0mA

VIN≥VCC-0.2V or VIN≤0.2V

10ns - 80 mA
12ns - 75
15ns - 73
20ns - 70

Normal - 5 mA

L-ver. - 0.5

Min Max

-2 2 µA

Unit

CAPACITANCE*(TA=25°C, f=1.0MHz)

Item Symbol Test Conditions MIN Max Unit

Input/Output Capacitance CI/O VI/O=0V - 8 pF
Input Capacitance CIN

* Capacitance is sampled and not 100% tested.

VIN=0V

- 6 pF

- 3 -

Revision 2.0

March 2000