KM62256CL
KM62256C Family |
CMOS SRAM |
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32Kx8 bit Low Power CMOS Static RAM
FEATURES
¡Ü Process Technology : 0.7§- CMOS ¡Ü Organization : 32Kx8
¡Ü Power Supply Voltage : Single 5V ¡¾ 10% ¡Ü Low Data Retention Voltage : 2V(Min)
¡Ü Three state output and TTL Compatible ¡Ü Package Type : JEDEC Standard
28-DIP, 28-SOP, 28-TSOP I -Forward/Reverse
GENERAL DESCRIPTION
The KM62256C family is fabricated by SAMSUNG's advanced CMOS process technology. The family can support various operating temperature ranges and has various package types for user flexibility of system design. The family also support low data retention voltage for battery back-up operation with low data retention current.
PRODUCT FAMILY
Product |
Operating |
Speed |
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Power Dissipation |
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PKG Type |
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Standby |
Operating |
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Family |
Temperature. |
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(ISB1, Max) |
(Icc2) |
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KM62256CL |
Commercial (0~70¡É) |
45*/55/70ns |
28-DIP, 28-SOP |
100§Ë |
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KM62256CL-L |
28-TSOP I R/F |
20§Ë |
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KM62256CLE |
Extended (-25~85¡É) |
70/100ns |
28-SOP |
100§Ë |
70mA |
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KM62256CLE-L |
28-TSOP I R/F |
50§Ë |
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KM62256CLI |
Industrial (-40~85¡É) |
70/100ns |
28-SOP |
100§Ë |
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KM62256CLI-L |
28-TSOP I R/F |
50§Ë |
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* The parameter is measured with 30pF test load.
PIN DESCRIPTION
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1 |
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OE |
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A11 |
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2 |
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A9 |
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3 |
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14 |
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1 |
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28 |
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VCC |
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A8 |
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4 |
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A13 |
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5 |
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6 |
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2 |
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WE |
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12 |
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27 |
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WE |
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VCC |
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7 |
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A7 |
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3 |
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26 |
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A13 |
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A14 |
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8 |
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4 |
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A12 |
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9 |
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A6 |
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25 |
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A8 |
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A7 |
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10 |
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A5 |
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5 |
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24 |
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A9 |
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A6 |
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11 |
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A5 |
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12 |
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A4 |
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6 |
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23 |
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A11 |
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A4 |
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13 |
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28-DIP |
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A3 |
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14 |
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A3 |
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7 |
22 |
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OE |
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A2 |
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8 |
28-SOP |
21 |
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A10 |
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A3 |
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14 |
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9 |
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20 |
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A4 |
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13 |
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A1 |
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CS |
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A5 |
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12 |
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A0 |
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10 |
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19 |
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I/O8 |
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A6 |
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11 |
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A7 |
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10 |
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11 |
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18 |
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I/O7 |
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A12 |
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O1 |
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A14 |
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8 |
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O2 |
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12 |
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17 |
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I/O6 |
VCC |
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7 |
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O3 |
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13 |
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16 |
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I/O5 |
WE |
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6 |
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A13 |
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5 |
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SS |
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14 |
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15 |
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I/O4 |
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A8 |
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4 |
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A9 |
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3 |
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A11 |
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1 |
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OE |
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28-TSOP
Type I - Forward
28-TSOP
Type I - Reverse
28 |
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A10 |
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27 |
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CS |
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26 |
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I/O8 |
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25 |
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I/O7 |
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24 |
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I/O6 |
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23 |
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I/O5 |
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22 |
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I/O4 |
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21 |
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VSS |
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20 |
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I/O3 |
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19 |
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I/O2 |
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18 |
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I/O1 |
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17 |
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A0 |
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16 |
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A1 |
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15 |
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A2 |
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15 |
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A2 |
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16 |
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A1 |
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17 |
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A0 |
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18 |
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I/O1 |
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19 |
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I/O2 |
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20 |
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I/O3 |
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21 |
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VSS |
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22 |
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I/O4 |
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23 |
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I/O5 |
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24 |
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I/O6 |
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25 |
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I/O7 |
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26 |
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I/O8 |
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27 |
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CS |
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28 |
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A10 |
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FUNCTIONAL BLOCK DIAGRAM
A0~A2, A9~11 |
Y-Decoder |
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A3~A8, |
-X |
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A12~14 |
Decoder |
Cell |
Control |
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Array |
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Logic |
CS |
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I/O Buffer |
WE,OE |
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I/O1~8 |
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NameName |
Function |
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A0~A14 |
Address Inputs |
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Write Enable Input |
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WE |
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Chip Select Input |
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CS |
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Output Enable Input |
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OE |
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I/O1~I/O8 |
Data Inputs/Outputs |
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Vcc |
Power(5V) |
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Vss |
Ground |
Revision 3.0
April 1996
KM62256C Family |
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CMOS SRAM |
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PRODUCT LIST & ORDERING INFORMATION |
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PRODUCT LIST |
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Commercial Temp Product |
Extended Temp Products |
Industrial Temp Products |
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(0~70¡É) |
(-25~85¡É) |
(-40~85¡É) |
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Part Name |
Function |
Part Name |
Function |
Part Name |
Function |
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KM62256CLP-4 |
28-DIP, 45ns, L-pwr |
KM62256CLGE-7 |
28-SOP, 70ns, L-pwr |
KM62256CLGI-7 |
28-SOP, 70ns, L-pwr |
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KM62256CLP-4L |
28-DIP, 45ns, LL-pwr |
KM62256CLGE-7L |
28-SOP, 70ns, LL-pwr |
KM62256CLGI-7L |
28-SOP, 70ns, LL-pwr |
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KM62256CLP-5 |
28-DIP, 55ns, L-pwr |
KM62256CLGE-10 |
28-SOP, 100ns, L-pwr |
KM62256CLGI-10 |
28-SOP, 100ns, L-pwr |
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KM62256CLP-5L |
28-DIP, 55ns, LL-pwr |
KM62256CLGE-10L |
28-SOP, 100ns, LL-pwr |
KM62256CLGI-10L |
28-SOP, 100ns, LL-pwr |
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KM62256CLP-7 |
28-DIP, 70ns, L-pwr |
KM62256CLTGE-7 |
28-TSOP F, 70ns, L-pwr |
KM62256CLTGI-7 |
28-TSOP F, 70ns, L-pwr |
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KM62256CLP-7L |
28-DIP, 70ns, LL-pwr |
KM62256CLTGE-7L |
28-TSOP F, 70ns, LL-pwr |
KM62256CLTGI-7L |
28-TSOP F, 70ns, LL-pwr |
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KM62256CLG-4 |
28-SOP, 45ns, L-pwr |
KM62256CLTGE-10 |
28-TSOP F, 100ns, L-pwr |
KM62256CLTGI-10 |
28-TSOP F, 100ns, L-pwr |
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KM62256CLG-4L |
28-SOP, 45ns, LL-pwr |
KM62256CLTGE-10L |
28-TSOP F, 100ns, LL-pwr |
KM62256CLTGI-10L |
28-TSOP F, 100ns, LL-pwr |
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KM62256CLG-5 |
28-SOP, 50ns, L-pwr |
KM62256CLRGE-7 |
28-TSOP R, 70ns, L-pwr |
KM62256CLRGI-7 |
28-TSOP R, 70ns, L-pwr |
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KM62256CLG-5L |
28-SOP, 50ns, LL-pwr |
KM62256CLRGE-7L |
28-TSOP R, 70ns, LL-pwr |
KM62256CLRGI-7L |
28-TSOP R, 70ns, LL-pwr |
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KM62256CLG-7 |
28-SOP, 70ns, L-pwr |
KM62256CLRGE-10 |
28-TSOP R, 100ns, L-pwr |
KM62256CLRGI-10 |
28-TSOP R, 100ns, L-pwr |
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KM62256CLG-7L |
28-SOP, 70ns, LL-pwr |
KM62256CLRGE-10L |
28-TSOP R, 100ns, LL-pwr |
KM62256CLRGI-10L |
28-TSOP R, 100ns, LL-pwr |
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KM62256CLTG-4 |
28-TSOP F, 45ns, L-pwr |
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KM62256CLTG-4L |
28-TSOP F, 45ns, LL-pwr |
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KM62256CLTG-5 |
28-TSOP F, 55ns, L-pwr |
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KM62256CLTG-5L |
28-TSOP F, 55ns, LL-pwr |
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KM62256CLTG-7 |
28-TSOP F, 70ns, L-pwr |
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KM62256CLTG-7L |
28-TSOP F, 70ns, LL-pwr |
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KM62256CLRG-4 |
28-TSOP R, 45ns, L-pwr |
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KM62256CLRG-4L |
28-TSOP R, 45ns, LL-pwr |
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KM62256CLRG-5 |
28-TSOP R, 55ns, L-pwr |
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KM62256CLRG-5L |
28-TSOP R, 55ns, LL-pwr |
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KM62256CLRG-7 |
28-TSOP R, 70ns, L-pwr |
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KM62256CLRG-7L |
28-TSOP R, 70ns, LL-pwr |
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ORDERING INFORMATION
KM6 2 X 256 C X X X - XX X
L-Low Low Power, Blank-Low Power or High Power
Access Time : 4=45ns, 5=55ns, 7=70ns, 10=100ns
Operating temperature : Blank=Commercial, I=Industrial, E=Extended
Package Type : G=SOP, P=DIP, TG=TSOP Forward, RG=TSOP Revers
L-Low Power or Low Low Power, Blank-High Power
Die Version : C=4th generation
Density : 256=256K bit
Blank=5V, V=3.0~3.6V, U=2.7~3.3V
Organization : 2=x8
SEC Standard SRAM
Revision 3.0
April 1996
KM62256C Family |
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CMOS SRAM |
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ABSOLUTE MAXIMUM RATINGS* |
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Item |
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Symbol |
Ratings |
Unit |
Remark |
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Voltage on any pin relative to Vss |
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VIN,VOUT |
-0.5 to VCC+0.5 |
V |
- |
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Voltage on Vcc supply relative to Vss |
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VCC |
-0.5 to |
7.0 |
V |
- |
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Power Dissipation |
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PD |
1.0 |
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W |
- |
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Storage temperature |
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TSTG |
-65 to 150 |
¡É |
- |
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TA |
0 to 70 |
¡É |
KM62256CL/L-L |
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Operating Temperature |
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-25 to |
85 |
¡É |
KM62256CLE/LE-L |
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-40 to |
85 |
¡É |
KM62256CLI/LI-L |
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Soldering temperature and time |
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TSOLDER |
260¡É, 10sec (Lead Only) |
- |
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* Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stres s rating only and functional operation of the device at these or any other conditions above those indicated in the operating section of this specification is not impl ied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS*
Item |
Symbol |
Min |
Typ** |
Max |
Unit |
Supply voltage |
Vcc |
4.5 |
5.0 |
5.5 |
V |
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Ground |
Vss |
0 |
0 |
0 |
V |
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Input high voltage |
VIH |
2.2 |
- |
Vcc+0.5V |
V |
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Input low voltage |
VIL |
-0.5*** |
- |
0.8 |
V |
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*1) Commercial Product : TA=0 to 70¡É, unless otherwise specified
2)Extended Product : TA=-25 to 85¡É, unless otherwise specified
3)Industrial Product : TA=-40 to 85¡É, unless otherwise specified
**TA=25¡É
***VIL(min)=-3.0V for ¡Â 50ns pulse width
CAPACITANCE* (f=1MHz, TA=25¡É)
Item |
Symbol |
Test Condition |
Min |
Max |
Unit |
Input capacitance |
CIN |
VIN=0V |
- |
6 |
pF |
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Input/Output capacitance |
CIO |
VIO=0V |
- |
8 |
pF |
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* Capacitance is sampled not 100% tested
Revision 3.0
April 1996