SAMSUNG K4S51163PF Technical data

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	K4S51163PF-Y(P)F	Mobile-SDRAM
	8M x 16Bit x 4 Banks Mobile-SDRAM

FEATURES

•1.8V power supply.

•LVCMOS compatible with multiplexed address.

•Four banks operation.

•MRS cycle with address key programs.

-. CAS latency (1, 2 & 3).

-. Burst length (1, 2, 4, 8 & Full page). -. Burst type (Sequential & Interleave).

•EMRS cycle with address key programs.

•All inputs are sampled at the positive going edge of the system clock.

•Burst read single-bit write operation.

•Special Function Support.

-. PASR (Partial Array Self Refresh).

-. Internal TCSR (Temperature Compensated Self Refresh)

-. DS (Driver Strength)

•DQM for masking.

•Auto refresh.

•64ms refresh period (8K cycle).

•Commercial Temperature Operation (-25°C ~ 70°C).

•1 /CS Support.

•2Chips DDP 54Balls FBGA( -YXXX -Pb, -PXXX -Pb Free).

GENERAL DESCRIPTION

The K4S51163PF is 536,870,912 bits synchronous high data rate Dynamic RAM organized as 4 x 8,388,608 words by 16 bits, fabricated with SAMSUNG’s high performance CMOS technology. Synchronous design allows precise cycle control with the use of system clock and I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst lengths and programmable latencies allow the same device to be useful for a variety of high bandwidth and high performance memory system applications.

ORDERING INFORMATION

	Part No.	Max Freq.	Interface	Package
	K4S51163PF-Y(P)F75	133MHz(CL=3),83MHz(CL=2)		54 FBGA Pb
			LVCMOS
	K4S51163PF-Y(P)F90	111MHz(CL=3),83MHz(CL=2)
				(Pb Free)
	K4S51163PF-Y(P)F1L	111MHz(CL=3)*1,66MHz(CL=2)

- F : Low Power, Commercial Temperature(-25°C ~ 70°C)

Notes :

1.In case of 40MHz Frequency, CL1 can be supported.

2.Samsung are not designed or manufactured for use in a device or system that is used under circumstance in which human life is potentially at stake. Please contact to the memory marketing team in samsung electronics when considering the use of a product contained herein for any specific purpose, such as medical, aerospace, nuclear, military, vehicular or undersea repeater use.

Address configuration

Organization	Bank	Row	Column Address
32M x16	BA0,BA1	A0 - A12	A0 - A9

1	September 2004

K4S51163PF-Y(P)F

Mobile-SDRAM

FUNCTIONAL BLOCK DIAGRAM

						Data Input Register
		Bank Select
	Address	CounterRefresh	BufferRow	DecoderRow			8M x 16	AMPSense
							8M x 16
							8M x 16
							8M x 16
CLK	Register
ADD
		LRAS	LCBR	Buffer.Col			Column Decoder
						Latency & Burst Length
LCKE						Programming Register
	LRAS	LCBR		LWE	LCAS		LWCBR
				Timing Register
	CLK	CKE	CS	RAS	CAS	WE	L(U)DQM

	I/O					LWE
	Control					LDQM
	Output					DQi
	Buffer

LDQM

2	September 2004

K4S51163PF-Y(P)F

Mobile-SDRAM

D1

Package Dimension and Pin Configuration

< Bottom View*1 >

< Top View*2 >

E1

9	8	7	6	5	4	3	2	1
A								e
B
C
D								D
E
F
G								D/2
H
J
				E
							E/2

*2: Top View

A

A1

Substrate(2Layer)				b		z

*1: Bottom View

< Top View*2 >

#A1 Ball Origin Indicator

XXXX Week SEC

K4S51163PF

54Ball(6x9) FBGA

1

2

3

7

8

9

A

VSS

DQ15

VSSQ

VDDQ

DQ0

VDD

B

DQ14

DQ13

VDDQ

VSSQ

DQ2

DQ1

C

DQ12

DQ11

VSSQ

VDDQ

DQ4

DQ3

D

DQ10

DQ9

VDDQ

VSSQ

DQ6

DQ5

E

DQ8

NC

VSS

VDD

LDQM

DQ7

F

UDQM

CLK

CKE

CAS

RAS

WE

G

A12

A11

A9

BA0

BA1

CS

H

A8

A7

A6

A0

A1

A10

J

VSS

A5

A4

A3

A2

VDD

Pin Name

Pin Function

CLK

System Clock

Chip Select

CS

CKE

Clock Enable

A0 ~ A12

Address

BA0 ~ BA1

Bank Select Address

Row Address Strobe

RAS

Column Address Strobe

CAS

Write Enable

WE

L(U)DQM

Data Input/Output Mask

DQ0 ~ 15

Data Input/Output

VDD/VSS

Power Supply/Ground

VDDQ/VSSQ

Data Output Power/Ground

[Unit:mm]

Symbol

Min

Typ

Max

A

1.00

1.10

1.20

A1

0.27

0.32

0.37

E

-

11.5

-

E1

-

6.40

-

D

-

10.0

-

D1

-

6.40

-

e

-

0.80

-

b

0.45

0.50

0.55

z

-

-

0.10

3	September 2004

K4S51163PF-Y(P)F		Mobile-SDRAM
ABSOLUTE MAXIMUM RATINGS
Parameter	Symbol	Value	Unit
Voltage on any pin relative to Vss	VIN, VOUT	-1.0 ~ 2.6	V
Voltage on VDD supply relative to Vss	VDD, VDDQ	-1.0 ~ 2.6	V
Storage temperature	TSTG	-55 ~ +150	°C
Power dissipation	PD	1.0	W
Short circuit current	IOS	50	mA

NOTES:

Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded.

Functional operation should be restricted to recommended operating condition.

Exposure to higher than recommended voltage for extended periods of time could affect device reliability.

DC OPERATING CONDITIONS

Recommended operating conditions (Voltage referenced to VSS = 0V, TA = -25 to 70°C for Commercial)

Parameter	Symbol	Min	Typ	Max	Unit	Note
Supply voltage	VDD	1.7	1.8	1.95	V
	VDDQ	1.7	1.8	1.95	V
Input logic high voltage	VIH	0.8 x VDDQ	1.8	VDDQ + 0.3	V	1
Input logic low voltage	VIL	-0.3	0	0.3	V	2
Output logic high voltage	VOH	VDDQ -0.2	-	-	V	IOH = -0.1mA
Output logic low voltage	VOL	-	-	0.2	V	IOL = 0.1mA
Input leakage current	ILI	-2	-	2	uA	3

NOTES :

1.VIH (max) = 2.2V AC.The overshoot voltage duration is ≤ 3ns.

2.VIL (min) = -1.0V AC. The undershoot voltage duration is ≤ 3ns.

3.Any input 0V ≤ VIN ≤ VDDQ.

Input leakage currents include Hi-Z output leakage for all bi-directional buffers with tri-state outputs.

4.Dout is disabled, 0V ≤ VOUT ≤ VDDQ.

CAPACITANCE (VDD = 1.8V, TA = 23°C, f = 1MHz, VREF =0.9V ± 50 mV)

Pin

Symbol

Min

Max

Unit

Note

Clock

CCLK

3.0

6.0

pF

CKE

CIN

3.0

6.0

pF

RAS,

CAS,

WE,

CS,

DQM

CIN

1.5

3.0

pF

Address

CADD

3.0

6.0

pF

DQ0 ~ DQ15

COUT

3.0

5.0

pF

4	September 2004