Samsung irlm120a Datasheet

Page 1
Advanced Power MOSFET
IRLM120A
FEATURES
Avalanche Rugged Technology Rugged Gate Oxide Technology Lower Input Capacitance Improved Gate Charge Extended Safe Operating Area Lower Leakage Current : 10 µA (Max.) @ VDS = 100V Lower R
: 0.176 Ω (Typ.)
DS(ON)
Absolute Maximum Ratings
Characteristic Value UnitsSymbol
Drain-to-Source Voltage Continuous Drain Current (TA=25oC) Continuous Drain Current (TA=70oC) Drain Current-Pulsed Gate-to-Source Voltage Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Total Power Dissipation (TA=25oC) Linear Derating Factor
*
*
Operating Junction and Storage Temperature Range Maximum Lead Temp. for Soldering Purposes, 1/8” from case for 5-seconds
T
V
I V E
I E
dv/dt
P
, T
J
T
DSS
I
D
DM
GS
AS
AR
AR
D
STG
L
¨ç
¨è ¨ç ¨ç ¨é
BV
DSS
R
DS(on)
ID = 2.3 A
SOT-223
1
1. Gate 2. Drain 3. Source
100
2.3
1.85 18
¡¾20
105
2.3
0.27
6.5
2.7
0.022
- 55 to +150
300
= 100 V
= 0.22 Ω
2
3
V/ns
W/oC
V A A
V
mJ
A
mJ
W
o
C
Thermal Resistance
Characteristic Max. UnitsSymbol Typ.
R
θJA
Junction-to-Ambient
* When mounted on the minimum pad size recommended (PCB Mount).
*
46.3--
o
C/W
Page 2
IRLM120A
N-CHANNEL
POWER MOSFET
Electrical Characteristics (T
CharacteristicSymbol Max. UnitsTyp.Min. Test Condition
BV ∆BV/∆TJ V
R
t
t
DSS
GS(th)
I
GSS
I
DSS
DS(on)
g
fs
C
iss
C
oss
C
rss
d(on)
t
r
d(off)
t
f
Q
g
Q
gs
Q
gd
Drain-Source Breakdown Voltage Breakdown Voltage Temp. Coeff. Gate Threshold Voltage Gate-Source Leakage , Forward Gate-Source Leakage , Reverse
Drain-to-Source Leakage Current
Static Drain-Source On-State Resistance Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge Gate-Source Charge Gate-Drain(“Miller”) Charge
=25oC unless otherwise specified)
C
VGS=0V,ID=250µA
100
--
1.0
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
--
0.09
--
--
--
--
--
--
4.6
340
90 39
5 10 19
9
10.2
1.7
6.0
-100
--
--
2.0
100
10
100
0.22
-­440 115
50 20 30 50 30 15
--
--
V
ID=250µA See Fig 7
V/oC
VDS=5V,ID=250µA
V
VGS=20V
nA
VGS=--20V VDS=100V
µA
VDS=80V,TC=125oC
VGS=5V,ID=1.15A
Ω
Ω
VDS=40V,ID=1.15A VGS=0V,VDS=25V,f =1MHz
pF
See Fig 5
VDD=50V,ID=9.2A, RG=9
ns
See Fig 13
VDS=80V,VGS=5V,
nC
ID=9.2A
See Fig 6 & Fig 12
4
O
4
O
Ω
5
O4O
5
O4O
Source-Drain Diode Ratings and Characteristics
CharacteristicSymbol Max. UnitsTyp.Min. Test Condition
I
I
SM
V
t
Q
Notes ;
Repetitive Rating : Pulse Width Limited by Maximum Junction Temperature
1
O
2
L=30mH, IAS=2.3A, VDD=25V, RG=27 , Starting TJ =25
O
3
ISD 9.2A, di/dt 300A/ s, VDD BV
O
Pulse Test : Pulse Width = 250 s, Duty Cycle 2%
4
O
Essentially Independent of Operating Temperature
5
O
Continuous Source Current
S
Pulsed-Source Current Diode Forward Voltage
SD
Reverse Recovery Time
rr
Reverse Recovery Charge
rr
_
_
<
<
--
--
2.3
1
--
--
--
98
0.34
18
1.5
--
--
O
4
--
O
--
--
Ω
µ
_
<
DSS
µ
, Starting TJ =25
o
C
o
_
<
C
Integral reverse pn-diode
A
in the MOSFET
V
TJ=25oC,IS=2.3A,VGS=0V
ns
TJ=25oC,IF=9.2A
µC
diF/dt=100A/µs
Page 3
N-CHANNEL
POWER MOSFET
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
V
GS
Top : 7.0 V
6.0 V
1
5.5 V
10
5.0 V
4.5 V
4.0 V
3.5 V Bottom : 3.0 V
0
10
, Drain Current [A]
D
I
-1
10
-1
10
VDS , Drain-Source Voltage [V]
@ Notes :
1. 250 µs Pulse Test
2. TC = 25 oC
0
10
IRLM120A
1
10
150 oC
0
10
25 oC
, Drain Current [A]
D
I
-1
1
10
10
0 2 4 6 8 10
- 55 oC
VGS , Gate-Source Voltage [V]
@ Notes :
1. VGS = 0 V
2. VDS = 40 V
3. 250 µs Pulse Test
0.4
VGS = 5 V
VGS = 10 V
]
Ω
, [
DS(on)
R
0.3
0.2
0.1
Drain-Source On-Resistance
@ Note : TJ = 25 oC
0.0 0 10 20 30 40
600
C
480
360
C
240
Capacitance [pF]
C
120
0
0
10
ID , Drain Current [A]
iss
oss
rss
C
= Cgs+ Cgd ( Cds= shorted )
iss
C
= Cds+ C
oss
gd
C
= C
rss
gd
1
10
VDS , Drain-Source Voltage [V]
@ Notes :
1. VGS = 0 V
2. f = 1 MHz
Fig 4. Source-Drain Diode Forward VoltageFig 3. On-Resistance vs. Drain Current
1
10
0
10
, Reverse Drain Current [A]
150 oC
DR
I
10
25 oC
-1
0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2
@ Notes :
1. VGS = 0 V
2. 250 µs Pulse Test
VSD , Source-Drain Voltage [V]
Fig 6. Gate Charge vs. Gate-Source VoltageFig 5. Capacitance vs. Drain-Source Voltage
6
4
2
, Gate-Source Voltage [V]
GS
V
0
0 2 4 6 8 10 12
VDS = 20 V
VDS = 50 V
VDS = 80 V
@ Notes : ID = 9.2 A
QG , Total Gate Charge [nC]
Page 4
IRLM120A
Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature
1.2
2.5
POWER MOSFET
N-CHANNEL
1.1
1.0
, (Normalized)
DSS
BV
0.9
Drain-Source Breakdown Voltage
0.8
-75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [oC]
2
10
1
10
0
10
@ Notes :
, Drain Current [A]
D
-1
I
10
-2
10
10
1. TC = 25 oC
2. TJ = 150 oC
3. Single Pulse
-1
Operation in This Area is Limited by R
0
10
DS(on)
DC
10
10 ms
1
VDS , Drain-Source Voltage [V]
@ Notes :
1. VGS = 0 V
2. ID = 250 µA
100 µs
1 ms
10
2.0
1.5
, (Normalized)
1.0
DS(on)
R
0.5
Drain-Source On-Resistance
0.0
-75 -50 -25 0 25 50 75 100 125 150 175
@ Notes :
1. VGS = 5 V
2. ID = 4.6 A
TJ , Junction Temperature [oC]
Fig 10. Max. Drain Current vs. Ambient TemperatureFig 9. Max. Safe Operating Area
3
2
1
, Drain Current [A]
D
I
2
0
25 50 75 100 125 150
TA , Ambient Temperature [oC]
2
10
D=0.5
1
10
0.2
0.1
0.05
0
0.02
10
0.01
(t) , Thermal Response
-1
10
JA
θ
Z
-5
10
single pulse
-4
10
-3
10
t1 , Square Wave Pulse Duration [sec]
Fig 11. Thermal Response
@ Notes :
1. Z
(t)=46.3 oC/W Max.
JA
θ
2. Duty Factor, D=t1/t
3. TJM-TA=PDM*Z
P
DM
-2
10
-1
10
0
10
2
(t)
JA
θ
t
1
t
2
1
10
2
10
3
10
Page 5
N-CHANNEL
POWER MOSFET
IRLM120A
Fig 12. Gate Charge Test Circuit & Waveform
5V
“ Current Regulator ”
200nF12V
3mA
Current Sampling (IG)
V
V
in
R
G
50KΩ
V
out
V
Same Type
GS
as DUT
300nF
V
GS
5V
DS
Q
DUT
R
1
Resistor
Fig 13. Resistive Switching Test Circuit & Waveforms
DUT
R
2
Current Sampling (ID)
Resistor
R
L
V
DD
( 0.5 rated V
V
out
90%
)
DS
10%
V
in
gs
t
d(on)tr
t
Q
g
Q
gd
Charge
t
d(off)
t
f
on
t
off
Vary tp to obtain required peak I
5V
Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms
BV
L
DUT
L
BV
I
D
C
V
DD
DSS
I
AS
V
DD
V
DS
D
R
G
t
p
E
= LL I
AS
----
1 2
AS
ID (t)
t
2
p
DSS
-------------------­BV
-- V
DSS
DD
Time
V
(t)
DS
Page 6
IRLM120A
Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms
N-CHANNEL
POWER MOSFET
V
V
GS
( Driver )
DUT
+
V
DS
--
I
S
V
GS
GS
Driver
R
G
D =
Same Type
as DUT
• dv/dt controlled by “RG”
• IS controlled by Duty Factor “D”
Gate Pulse Width
-------------------------­Gate Pulse Period
L
V
DD
5V
I
S
( DUT )
V
DS
( DUT )
IFM , Body Diode Forward Current
I
RM
Body Diode Reverse Current
Body Diode Recovery dv/dt
V
f
Body Diode
Forward Voltage Drop
di/dt
V
DD
Loading...