Samsung DVD-518 Circuit Descriptions
Samsung Electronics 5-1
5. Circuit Descriptions
5-1 S.M.P.S.
5-1-1 Comparsion between Linear Power Supply and S.M.P.S.
5-1-1 (a) Linear
Vreg
Vout
+
–
+
+
–
Vs
(Ns)
Vp
(Np)
REGULATOR
Common power
(Ex.120/220V 50/60Hz)
Fig. 5-1 Linear Power Supply
◆ Waveform/Description
Vs
t
0
Fig. 5-2
Vs
t
0
Fig. 5-3
Vout
t
0
Fig. 5-4
Input : Common power to transformer (Vp).
The output Vs of transformer is determined by the ratio
of 1st Np and 2nd Ns.
Vs = (Ns/Np) x Vp
Vout is output (DC) by diode and condensor.
Circuit Descriptions
5-2 Samsung Electronics
◆ Advantages and disadvantages of linear power supply
1) Advantages : Little noise because the output waveform
of transformer is sine wave.
2) Disadvantages :
ΠAdditional margin is required because Vs is chan-
ged (depending on power source). (The regulator
loss is caused by margin design).
´ Greater core size and condensor capacity are ne-
eded, because the transformer works on a single
power frequency.
5-1-1 (b) S.M.P.S. (Pulse width modulation method)
v
Vreg
Vout
0
t
Change by common power
Regulator loss
Fig. 5-5
◆ Terms
1) 1st : Common power input to 1st winding.
2) 2nd : Circuit followings output winding of transformer.
3) f (Frequency) : Switching frequency (T : Switching cycle)
4) Duty : (Ton/T) x 100
Transformer
Vout
(Np)
(Vp)
Switch
Vs switch
I switch
Vin
ON/OFF Control
+
–
+
–
+
+
+
–
(Vs)
(Ns)
REGULATOR
Fig. 5-6
Circuit Descriptions
Samsung Electronics 5-3
5-1-2 Circuit description (FLY-Back PWM (Plise Width Modulation) Control)
5-1-2 (a) AC Power Rectification/Smoothing Terminal
1) PDS01,PDS02,PDS03,PDS04 : Convert AC power to DC(Wave rectification)
2) PEF10 : Smooth the voltage converted to DC(Refer to VIN of Fig. 5-7)
3) PLF01, PLS01, PCF01, PCF02, PCD01, PCD03, PCS03 : Noise removal at power input/output
4) PVA1 : SMPS protection at power surge input (PVA1 pattern open is to remove noise)
5) PR10 : Rush current limit resistance at the moment of power cord insertion.
ΠRush current = (AC input voltage x 1.414 - Diode drop voltage) / Pattern resistance + PLF01, PLS01
resistance + PCD01 resistance + PRF10) (AC230V based : approx. 26A)
´ Without PRF10, the bridge diode might be damaged as the rush current increases.
5-1-2 (b) SNUBBER Circuit : PRS11, PRS12, PRD12, PCD12, PDS11, PCF11
0
Vswitch
dt
Toff
t
Inverted power
by leakage
inductance
Fig. 5-7
1) Prevent residual high voltage at the terminals of
switch during switch off/Suppress noise.
High inverted power occurs at switch off, because of
the 1st winding of transformer :
(V= LI xdi/dt. LI : Leakage Induction)
A very high residual voltage exists on both terminals
of PICF1 because dt is a very short.
2) SNUBBER circuit protects PICF1 from damage
through leakage voltage suppression by RC,
(Charges the leakage voltage to PDS11 and PCF11,
and discharges to PRS11 and PRS12).
3) PCD12, PRD12 : For noise removal
5-1-2 (c) PICF1 Vcc circuit
1) PCD11, PCF12, PCF13, PCF14 : PICF1 driving resistance
(PICF1 works through driving resistance at power cord in)
2) PICF1 Vcc : PDF13, PRF16, PEF12
Œ
Use the output of transformer as Vcc, because the current starts to flow into transformer while
PICF1 is active.
´ Rectify to PDF13 and smooth to PEF12.
ˇ Use the output of transformer as PICF1 Vcc : The loads are different before and after PICF1 driving.
(Vcc of PICF1 decreases below OFF voltage, using only the resistance due to load increase after PICF1 driving.)
Circuit Descriptions
5-4 Samsung Electronics
1) F/B terminal of PICF1 determines output duty cycle.
2) C-E(Collector-Emitter) of PICS1 and F/B potential of PICF1 are same.
Operation descriptions
1) Internal OP-Amp ‘+’ base potential of PICS2 is 2.5V and external “-” input potential is connected with PRS33
and PRS34 to maintain Vout of 5.8V. (Vout = ((PRS38 x PRS34) / PRS34) x 2.5V)
2) If load of 5.8 V terminal increases(or AC input voltage decreases) and Vout decreases below 5.8V, then :
PICS2 “P” potential down below 2.5V --> PICS2 A-K of base current down --> PICS2 of A-K current down -->
PICS1 Diode current down --> PICS1 C-E current down --> PICS1 C-E voltage up --> PICF1 F/B voltage up -->
Out Duty up --> Transformer 1st current up --> Transformer 1st power up --> Vout up --> Maintain Vout 5.8V
3) If load of 5.8 V terminal decreases(or AC input voltage rises) and Vout rises above 5.8V, then :
Reverse sequence of the above description --> Duty down --> Vout down --> Maintain 5.8V (i.e., the feedback
to maintains 5.8V).
ΠPRD31, PRD32 : Reduce 5.8V overshoot
´ PRS32, PCS32 : Prevent PICS2 oscillation(for phase correction)
5-1-2 (d) Feedback Control Circuit
PICF1
OCP
DRAIN
F/B
PICS1
C
E
1st GND
A
K
PICS2
A
2.5V
K
P
PRD31
PRS32
PCS32
2nd GND
PRS33
PRS34
PRD32
PES37
5.8V
PLS31
PDS33
PES33
Trans
GND
$
!@
#
%
VCC
Fig. 5-8
Circuit Descriptions
Samsung Electronics 5-5
5-1-3 Internal Block Diagram
5-1-3 (a) Internal Block Diagram of S.M.P.S. Circuit
Smoothing
Circuit
Rectified Circuit
Line Filter
Power IN
(85~265V)
Noise
Removal
(SNUBBER)
PWM Control
Circuit
(STR-G6551)
Converter
Voltage
Detection
Circuit
FLT Driving
Circuit
3.3V Rectified
Smoothing Circuit
5V Rectified
Smoothing Circuit
8V Rectified
Smoothing Circuit
-8V Rectified
Smoothing Circuit
3.3V Rectified
VoltageCircuit
5V Rectified
VoltageCircuit (x2)
Motor 8V
1 Port
8V Rectified
VoltageCircuit
-8V Rectified
VoltageCircuit
O
U
T
P
U
T
Fig. 5-9
5-1-3 (b) PICF1 (STR-G6551) Internal Block Diagram
VIN
D
S
4
1
2
O.C.P/
5
GND
3
DRIVE
O.S.C
START O.V.P LATCH
REG.
T.S.D
+
_
Comp
Vin
Fig. 5-10
Circuit Descriptions
5-6 Samsung Electronics
5-2 RF
5-2-1 RIC1 (KS1461)
KS1461 is combined with KS1452 and KS1453 as bipolar IC developed for DVD SERVO system.
Main features include DVD waveform equalizing, CD waveform equalizing, focus error signal generation, 3-beam
tracking error signal generation, DPD 1-beam tracking error, defect, envelope, MIRR output, etc. after receiving the
pick-up output converted into I/V.
5-2-1 (a) Basic Potentiometer
KS1461 uses a single power method and each circuit is based on V of 2.5V.
V (Pin 12, 20, 24, 67) terminal is needed for IC, which uses the peripheral V.
5-2-1(b) RF signal
Fig. 5-11 shows the flow of signal generated by the pick-up.
A, B, C, D signals detected from pick-up are converted in to RF signal(A+B+C+D) via RF summing AMP.
Fig. 5-12 shows the waveform-equalizing block diagram for the RF signal.
It outputs to EQout (Pin 86) terminal by initially changing switching AMP gain of DVD and CD, and then adjusting the level in RF SUM & AGC. It controls RF SUM & AGC gain by means of Pin 89-95 and interfaces with PWM
signal, (output from PWM terminal of KS1453, via low-pass filter to adjust boost gain and peak frequency.
PICK-UP
RE SUM
& AGC
RF EG
DPD
TE
Mhx
ENV
FOK
DEFECT
TESEL
TE
ABCD
SUM
FE
ALPC
MIRR
%
^
&
*
5
6
7
8
3
4
104
104
104
104
?. m
474
104
RFAGCO EQIN
MIRRI
G
,
y
I
i
T
F
P
[
d
MIRR
TE
RFEQO
A
B
C
D
EFLDPD
w
E
ABCD
FE
DFCT1
DFCT2
FOKB
ENV
103
ABCDI
Fig. 5-11
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