5
4
3
2
1
C2 8P
0603L
C6
120P
DVDAT[0..7]
RAMADD1
FD[0..15]
DGND
FA[0..10]
Co
L24.7UH
R4
C7
150,1%
100P
V1.8DSPP
V3DSPP
FCD
FCD ADCI2
TCSMTA
U1
33U/6.3V
FD[0..15]
FA[0..10]
XLGPIO[0..14]
FD15
FD14
FD13
FD12
FD11
FD10
FD9
FD8
FD7
FD6
FD5
FD4
FD3
FD2
FD1
FD0
FA10
FA9
FA8
FA7
FA6
FA5
FA4
FA3
FA2
FA1
FA0
NOR_ALE
XFWE
XFOE
XFRESCE
XFRESBSY
XFEXTBSY
XFEXTCE1
XFEXTCE2
XLGPIO12
V3DSPP
+
XREG
SPICLK
C12
CP80.1U
CP90.1U
CP150.1U
CP200.1U
CP210.1U
CP220.1U
H8
C4
C3
E4
B3
A1
B1
C1
D1
E1
G1
A2
B2
C2
D2
E2
G2
H2
H1
K1
K2
M1
M2
N1
N2
G4
G3
H4
H3
K3
K4
M3
M4
N3
N4
E3
D3
D4
D5
DGND
RAMDAT[0..15]
J9
F4
F1
F2
J1
J2
L1
L2
P1
F3
J4
J3
L3
L4
P4
J8
H9
GND
GND
GNDP
GNDP
VDDP
VDDP
FD15
FD14
FD13
FD12
FD11
FD10
FD9
FD8
FD7
FD6
FD5
FD4
FD3
FD2
FD1
FD0
FA10
FA9
FA8
FA7
FA6
FA5
FA4
FA3
FA2
FA1
FA0
NOR_ALE
XFWE
XFOE
XFRESCE
XFRESBSY
XFEXTBSY
XFEXTCE1
XFEXTCE2
VDD
GND
XREG
SPICLK
XLGPIO12
GNDP
GNDP
GNDP
VDDP
VDDP
VDDIP
GNDP
GNDP
GND
K8
nf
C16
NC
DGND
4
TP3
R5
150,1%
R7 1K,1%
DVDAT[0..7]
DVHS
DVVS
DVALID
DVCLK
DVDAT0
B6A6B7A7B8A8A9
B5A4A5B4A3
B15
C15
D15
A12
NCNCNC
FCD
GND
RSET
DVVS
DVHS
DVCLK
DVALID
DVDAT0
GNDP
GNDP
VDDP
VDDP
VDDP
RAMADD0
RAMADD1
RAMADD2
RAMADD3
GND
P3R3P5R4R5T3U1T1R1P2R2T2U2U3U4T4U5T6T5U6T7U7T8U8T9U9P6R6P7R7R8P8P9R9R10
ide
RAMADD4
CP260.1U
CP250.1U
CP300.1U
ADD1
ADD3
ADD0
ADD4
ADD2
XLGPIO[0..14]
RAMCLK
C3 8P
L34.7UH
0603L
R6
C8
120P
XLGPIO[0..14]
XIRQ
TESTMODE
FLSHTRIG
DVDAT6
DVDAT1
DVDAT7
DVDAT5
DVDAT4
DVDAT3
DVDAT2
DVDAT1
DVDAT2
DVDAT3
DVDAT4
DVDAT5
DVDAT6
XLGPIO11
B9
XIRQ
DVDAT7
FLSHTRIG
TESTMODE
ZR36431BGC COACH VP
150,1%
DACGND
XLGPIO10
XLGPIO10
XLGPIO11
C9
100P
V3DAC
CP70.1U
CP60.1U
XLGPIO14
XLGPIO9
C10
B10
A10D9D8C8D7C7D6C6C5
VDD
GND
XLGPIO9
XLGPIO13
XLGPIO14
V3ADC
CP40.1U
CP30.1U
COS
ADCI2
D13
C13
B13
A13
D12
C12
B12
B11
A11C9D11
C11
D10
C/B
Y/R
COS
VDDP
GNDP
GNDDACD
ADCI2
CVBS/G
VDDADC
VDDDAC
VDDDAC
GNDDACD
GNDDACB
or
ial f
RAMADD5
RAMADD6
RAMADD7
RAMADD8
RAMADD9
RAMADD10
RAMADD11
RAMADD12
RAMADD13
XRAMCS
RAMCKEN
XRAMRAS
XRAMCAS
RAMCLK
RAMDQM
XRAMWE
XLGPIO0
XLGPIO1
XLGPIO2
XLGPIO3
GNDP
GNDP
GND
VDD
VDDP
VDDP
RAMDAT7
RAMDAT8
RAMDAT6
nt
RAMADD9
RAMADD8
RAMADD10
ADD5
ADD6
ADD7
XRAMCS
XRAMRAS
XRAMCAS
R24 47
R2322
R2122
R2222
RAMADD11
RAMADD13
RAMADD12
RAMDQM
XRAMWE
RAMCKEN
XLGPIO2
XLGPIO1
XLGPIO0 XLGPIO13
XLGPIO3
3
RAMDAT9
P10
T10
U10
T11
U11
T12
CP281.0U08 05C
CP290.1U
CP270.1U
RAMDAT9
RAMDAT7
RAMDAT8
RAMDAT5
RAMDAT6
DACGND
TAGSCL
V1.8DSPP
L4 10UH
0805L
L5 10UH
L2520
CP2
+
33U/6.3V
TCSMTA
ADCI0
ADCI1
ADCI2
FLSHTRIG
u
XDSPRS T
TP16
XLGPIO[0 ..14]
V3DSP
XIRQ
TGSLD
AGCSLD
TAGSCL
TAGSDA
HD
VD
RO1
RO2
VID[0..9]
L6 0, 0603R
0603L
DSP_RXD
DSP_TXD
SDA
SCL
日期
ng
C13NC
TP17
DAMCLK
DAFRM
DASCLK
DAIN
DAOUT
Note :
Date :
Monday, March 10, 2003
機種
REV.
TP4
C10 18P
Y1
13.5M
XTAL35
C11 18P
DGND
CP50.1U
AGCSLD
TGSLD
TAGSDA
XDSPRST
R833
R922
R1122
R1022
ADCI0
ADCI1
B17
A17
A16
A15
B14
A14
D14
C14
N.C
N.C
VCLKI
ADCI1
ADCI0
VCLKO
GNDADC
GNDDACP
RAMDAT5
RAMDAT10
RAMDAT4
RAMDAT11
RAMDAT3
RAMDAT12
RAMDAT2
RAMDAT13
U12
T13
U13
T14
U14
T15
U15
T16
RAMDAT11
RAMDAT13
RAMDAT12
RAMDAT10
RAMDAT3
RAMDAT1
RAMDAT4
RAMDAT2
REV.
更改
V1.8DSPP
C17
C16
B16
H10
J10
GND
GND
TGVLD
D16
XRESET
TAGDAT
AGCVLD
TAGCLK
D17
HIS
E16
VIS
E17
READOUT1
F16
READOUT2
E15
GNDMPLL
E14
GNDUPLL
F15
VDDMPLL
F14
VDDUPLL
G15
VDDP
G14
GNDP
ams
H15
VDD
H14
GND
J15
XLGPIO7
J14
XLGPIO8
F17
VID9
G16
VID8
G17
VID7
S
H17
VID6
H16
VID5
J17
VID4
J16
VID3
K17
VID2
K16
VID1
L17
VID0
K15
DAIN
K14
DAFRM
L16
CCLK
L15
DASCLK
L14
DAOUT
M15
DAMCLK
M14
VDDP
M16
GNDUSB
M17
USBDM
N17
USBDP
N16
VDDUSB
P17
RXD
P16
TXD
R17
SDA
R16
SCL
N15
VDDP
N14
VDDP
P15
VDDP
R15
VDDP
P14
GNDP
R14
GNDP
R13
GNDP
P13
GNDP
P12
XLGPIO6
R12
XLGPIO5
R11
XLGPIO4
P11
VDDIP
K10
GND
RAMDAT1
RAMDAT14
RAMDAT0
RAMDAT15
GND
U16
T17
U17
K9
RAMDAT14
RAMDAT15
RAMDAT0
DGND
V3DSP
變 更 內 容 修改人
V3DSPP
XLGPIO7
XLGPIO8
DAIN
DAFRM
DASCLK
DAOUT
DAMCLK
DSP_RXD
DSP_TXD
SDA
SCL
CP240.1U
R25 10K
R26 10K
2
R12 22
R13 22
R14 22
CP120.1U
CP130.1U
VID9
VID8
VID7
VID6
VID5
VID4
VID3
VID2
VID1
VID0
CP160.1U
CP170.1U
CP180.1U
XLGPIO6
XLGPIO5
XLGPIO4
CP230.1U
CP100.1U
CP110.1U
V3ADC
V3DAC
10U/6.3V
TCSMTA
XLGPIO[0..14]
CP140.1U
V3DSPP
V3DSPP
DSP_RXD
DSP_TXD
SDA
SCL
CP1
DGND
C1433P
DGND
C1533P
+
R17 33,1%
R18 33,1%
TP19
TP20
ADCI0
ADCI1
FLSHTRIG
XDSPRS T
XIRQ
TGSLD
AGCSLD
TAGSCL
TAGSDA
DGND
V3DUSB
V3DSP
TP18
Orion 40S
版本
Sheet of
0
USBDM
USBDP
DAMCLK
DAFRM
DASCLK
DAIN
DAOUT
V3DSPP
71
CCLK
Drawing Name :
Drawing No. :
Approver:
V3DSP
審核
+
DGND
名稱
圖號
L7
10UH
CP31
33U/6.3V
TCSMTA
PCB-D / COACH-V
Checker:
1
V1.8DSPP
校對
V1.8DSP
DGND
Designer:
L8
10UH
CP32
+
33U/6.3V
TCSMTA
設計
DSP_TXD
DSP_RXD
ABORT
COS
0603L
C4
120P
DSP_RXD
DSP_TXD
C1 8P
L14.7UH
DGND
TP11
TP12
TP13
TP14
TP15
BTFUART
RAMADD[0..13]
5
R2
150,1%
BTFSD
ADCI0
C5
100P
DGND
V3DSPP
BTFUART
BTFSD
RAMADD2
RAMADD5
RAMADD3
RAMADD4
RAMADD0
RAMADD7
RAMADD6
RAMADD1
100Kx4
RP1
TP1
CVBS_G Y_RC_B
R1
150,1%
DACGND DACGNDDACGND
D D
TP5
TP6
ABORT
TP7
TP
TP8
TP
TP9
TP10
DSP_TXD
DSP_RXD
C C
ABORT
DVHS
DVVS
DVALID
DVCLK
COS
B B
A A
DGND
DVHS
DVVS
DVALID
DVCLK
TESTMODE
RAMADD[0..13]
RAMCKEN
XRAMW E
RAMDQM
123456
78
1 2
RAMADD4
RAMADD3
RAMADD5
R119 100K
R118 100K
R117 100K
R116 100K
R15 33K
R16 33K
NOR_ALE
XFWE
XFOE
XFRESBSY
XFRESCE
XFEXTCE1
XFEXTCE2
XFEXTBSY
XREG
SPICLK
RAMDAT[0..15]
XRAMCS
XRAMRAS
XRAMCAS
RAMCLK
RP4
7 8
5 6
3 4
1 2
33X4
RP5
7 8
5 6
3 4
1 2
33X4
3 4
TP2
5 6
7 8
RAMADD13
RAMADD2
RAMADD10
RAMADD11
RAMADD12
RAMADD9
R3
150,1%
RP2
100Kx4
RAMADD0
RAMADD6
RAMADD8
RAMADD7
NOR_ALE
XFWE
XFOE
XFRESBSY
XFRESCE
XFEXTCE1
XFEXTCE2
XFEXTBSY
XREG
SPICLK
ADD2
ADD5
ADD3
ADD4
ADD0
ADD7
ADD6
ADD1
Printed with FinePrint - register at http://www.fineprint.com
5
V3DRAM V3DSP
XFWE
XFWE
XFOE
XFOE
XFRESCE
XFRESCE
XFRESBSY
XFRESBSY
XFEXTCE1
XFEXTCE1
XFEXTCE2
XFEXTCE2
XFEXTBSY
XFEXTBSY
XDSPRST
FD[0..15]
FA[0..10]
FCD
NOR_ALE
XREG
SPICLK
XRAMCS
XRAMRAS
XRAMCAS
RAMCLK
XRAMWE
RAMDQM
XDSPRST
FD[0..15]
FA[0..10]
FCD
NOR_ALE
XREG
SPICLK
XRAMCS
RAMCKEN
XRAMRAS
XRAMCAS
RAMCLK
XRAMWE
RAMDQM
RAMDAT[0..15]
RAMADD[0..13]
CARDWPIN
D D
RAMCKEN
RAMDAT[0..15]
RAMADD[0..13]
C C
CARDWPIN
RAMDAT0
RAMDAT1
RAMDAT2
RAMDAT3
RAMDAT4
CP40 0.1U
RAMDAT5
RAMDAT6
RAMDAT7
CP42 0.1U
RAMDQM
XRAMWE
XRAMRAS
XRAMCS
RAMADD12
RAMADD13
RAMADD10
RAMADD0
RAMADD1
RAMADD2
RAMADD3
L10 10UH
L322522
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
RAMADD[0..13]
+
CP38 0.1U
U3
Vcc
DQ0
VccQ
DQ1
DQ2
VssQ
DQ3
DQ4
VccQ
DQ5
DQ6
VssQ
DQ7
Vcc
LDQM
XWE
XCAS
XRAS
XCS
A13
A12
A10
A0
A1
A2
A3
Vcc
M12L128168A
DIP54\TSOP
CP43 0.1U
CP44 1.0U
4
RAMDAT[0..15]
CP34 0.1U
CP3647U/6.3V
TCSMTB
54
Vss
53
DQ15
52
VssQ
51
DQ14
50
DQ13
49
VccQ
48
DQ12
47
DQ11
46
VssQ
45
DQ10
44
DQ9
43
VccQ
42
DQ8
41
Vss
40
NC
39
UDQM
38
CLK
37
CKE
36
NC
35
A11
34
A9
33
A8
32
A7
31
A6
30
A5
29
A4
28
Vss
0805C
RAMDAT15
RAMDAT14
RAMDAT13
CP39 0.1U
RAMDAT12
RAMDAT11
RAMDAT10
RAMDAT9
CP41 0.1U
RAMDAT8
RAMDQM
RAMCLKXRAMCAS
RAMCKEN
RAMADD11
RAMADD9
RAMADD8
RAMADD7
RAMADD6
RAMADD5
RAMADD4
XDSPRST
3
V3DSP V3ROM
0, 0805R
CP33 0.1U
R2733
V3DSP
R28
24K
FA0
FA[0..10]
FA1
XFRESBSY
XNANDCE
XFWE
XNANDBSY
XFOE
A1
NC
A2
NC
A9
NC
A10
NC
B1
NC
B9
NC
B10
NC
C3
#WP
C4
ALE
C5
NC
C6
#CE
C7
#WE
C8
RDY/#BSY
D3
NC
D4
#RE
D5
CLE
D6
NC
D7
NC
U2
D8
NC
TBGA63
K9F2808U0B
E3
NC
E4
NC
E5
NC
E6
NC
E7
NC
E8
NC
F3 G8
NC NC
F4
NC
F5
NC
F6
NC
F7
NC
F8
NC
FD[0..15]
L9
+
CP35 10U/6. 3V
TCSMTA
CP37 0.1U
VSS
VSS
VCCQ
VCC
S
0805L
M10
NC
M9
NC
M2
NC
M1
NC
L10
NC
L9
NC
L2
NC
L1
NC
K8
K7
D6
K6
D4
K5
D3
K4
D2
K3
J8
D7
J7
D5
J6
J5
NC
J4
D1
J3
NC
H8
H7
NC
H6
NC
H5
NC
H4
D0
H3
NC
G7
NC
G6
ams
NC
G5
NC
G4
NC
G3
NC
CP45
0.1U
2
FD6
FD4
FD3
FD2
FD7
FD5
FD1
FD0
ng
u
R29 33
1
XNANDCEXFRESCE
or
CARDWPIN
CD WPIN
10 12
V3DSP
TP21
R30
10K
C17
0.1U
DGND
Note :
Date :
Monday, March 10, 2003
機種
Orion 40S
REV.
版本
Sheet of
2
日期
CP46
NC
TCSMTA
V3DSD
0, 0805R
+
L11
Drawing Name :
Drawing No. :
0
Approver:
72
0805L
名稱
圖號
審核
V3DSP
PCB-D / Memory
Checker:
校對
1
Designer:
設計
V3DSPP
DGND
8
NC_DAT1
7
DO_DAT0
6
VSS
5
CLK
4
VDD
3
VSS
2
DI_CMD
1
CS_CD/DAT3
9
NC_DAT2
R31100
J1
WK21913-S2
FCD
11
COMM
V3DSD
R32
B B
24K
ial f
XFEXTBSY
R123 CB-16080 8-121
SPICLK
nt
XREG
XFEXTCE1
ide
nf
A A
R33 33
R34 33
R35 33
SPIDO
TP22
BSPICLK
SPIDI
XSPICS
C18
0.1U
V3DSP
DGND
CP47
0.1U
R36
10K
DGND
Co
REV.
更改
5
4
3
變 更 內 容 修改人
Printed with FinePrint - register at http://www.fineprint.com
5
PHASEA
PHASEB
AF_EN
IRIS_EN
AF_PI_EN
Z_PHASE1
Z_PHASE2
M_PHASE1
M_PHASE2
ZM_PI_EN
ZM_PR_EN
D D
LED1
LED2
C C
B B
A A
MOLEX_52435-2191
PHASEA
PHASEB
AF_EN
IRIS_EN
AF_PI_EN
Z_PHASE1
Z_PHASE2
M_PHASE1
M_PHASE2
ZM_PI_EN
ZM_PR_EN
LED1
LED2
D1
LED_G
J2
ZPR_CAT
1
1
ZPR_VDD
2
2
ZPR_EMI
3
3
ST_2
4
4
ST_3
5
5
ST_4
6
6
ST_1
7
7
SI_02
8
8
SI_01
9
9
AFSTM_B_2
10
10
AFSTM_A_1
11
11
AFSTM_B_BAR_4
12
12
AFSTM_A_BAR_3
13
13
ZPI_VDD
14
14
ZPI_EMI
15
15
ZPI_CAT
16
16
ZM_M
17
17
ZM_P
18
18
AFPI_EMI
19
19
AFPI_VDD
20
20
AFPI_CAT
21
21
VCC_RTC
R42
220
4 3
DGND
LED1
5
TP23
TP24
TP27
TP28
TP29
TP30
TP31
TP32
TP34
LED2
DGND
2
1
6
5
VCC_RTC
R37
100K
DGND DGND
Q1
UMH10N
SOT363
LED_R
D2
560
R47
VCC3
R38
100K
TP25
TP26
AFPI_CAT
AF_PI_EN
ZPI_CAT
R43
220
ZM_PI_EN
R52
Co
DGND
220
TP33
4 3
DGND
4
VMOTOR
CP51
+
47U/6.3V,NEO
TCSMTB
MGND
R39
0.1U
6.8,1%
CP48
0805R
ZM_PR_EN
DGND
2
1
Q2
UMH10N
SOT363
6
5
R44
220
ZPR_CAT
AFPI_EMI
R51
18K
DGND
2
1
Q4
UMH10N
SOT363
6
5
4 3
22K
R54
VCC3
4
CP60
100P
DGND
DGND
TP36
AF_PI_FB ZPR_FB
ide
nf
VMOTOR
0.1U
CP56
MGND
nt
3
U4
1
GND
PHASEB
PHASEA
AFSTM_A_BAR_3ST_3
AFSTM_B_BAR_4 AFSTM_B_2
ST_4
MGND
DGND
2
IN2
3
IN1
4
O2
5
O4
6
O6
7
GND
8 9
GND GND
11-MD141
U7
1
VS
O2
2
O1
IN2
3
IN3
VDD
4 5
GND IN1
ST1151A
EN1
EN2
O1
VD1
O3
O5
VD2
8
7
6
or
VCC3
ial f
TP35
ZPI_EMI
CP61
100P
DGND
R50
22K
ZPI_FB
R55
18K
DGND
REV.
3
DGND
2
1
Q3
UMH10N
SOT363
6
5
4 3
DGND
更改
變 更 內 容 修改人
AF_EN
16
IRIS_EN
15
AFSTM_A_1
14
13
12
ST_2
11
10
ZM_P
S
ZM_M
Z_PHASE2
Z_PHASE1
R49
18K
DGND
R40
ST_1
6.8,1%
VMOTOR
MGND
CP52
0.1U
CP50
0.1U
0805R
CP53
0.1U
ams
VCC3
CP55
NC
CP58
0.1U
DGND
ZPR_EMI
CP59
100P
DGND
VCC3
R53
22K
TP37
2
0.1U
CP49
R41 0
ng
U6
IN1
VCC
IN2
OUT1
FC
OUT2
GND RFG
LB1941T
C55
0.1U
Orion 40S
0
R128 NC
8
7
6
73
R48
1.1,1%
0805R
MGND
Drawing Name :
Drawing No. :
Approver:
審核
u
M_PHASE1
M_PHASE2
2
C21
0.01U
MGND
日期
1
2
3
4 5
Note :
Date :
Monday, March 10, 2003
機種
REV.
版本
Sheet of
1
AF_PI_FB
ZPR_FB
ZPI_FB
MGNDDGND
MGNDDGND
R45
SI_01
0 0805R
R46
SI_02
0 0805R
名稱
PCB-D / MOTOR CONTROL
圖號
Checker:
校對
1
AF_PI_FB
ZPR_FB
ZPI_FB
VMOTOR
MGND
CP57
0.1U
Designer:
設計
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