Samsung C3312, C3310 Schematics
SAMSUNG CONFIDENTIAL
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’ S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
ANT100
HB_TX
LB_TX
BT_CLK_32KHZ
1
1
2
2
C105
C138
C113
GSM850_DCS1800_RX
GSM900_PCS1900_RX
BT
BT_RST
PCM_TXD
PCM_RXD
PCM_SYNC
PCM_CLK
BT_REQ_CLK
ANT101
1
2
C110
L114
TP_BT_CLK
TP_BT_REQ_CLK
1
2
C101
BS
VDD_1.8V
C125
TP_BT_RST
R108
RF
RFS100
C1G
G
A
4
2
3
L104
C104
C111
C139
R109
R104
C142
VDD_1.8V
10
12
19
21
9
TX_HB_IN
TX_LB_IN
BS
RX1
RX2
C103
C106
L110
C143
6253
4
3
ANT
VBATT
VBATT
PAM100
G
G
G
G
G
G
G
G
G
2
1
G
G
7
8
5
6
15
23
22
24
25
G
G
G29G
27G28
G
G
G
G
G
30
G
G
G
39
36
31
32
33
37
38
34
VBAT
C109
C107
C108
R102
17
TXEN
R103
16
VRAMP
R105
11
VSW_EN
RSV
G
G
RSV
G
G
G
13
44
40
41
14
42
43
C116
RSV
RSV
20
18
Antenna
C141
GSM900_PCS1900_RX
GSM850_DCS1800_RX
FM_LNA_SW
TX_EN
RAMP
SW_EN
C140
DCS1800/PCS1900 Tx
2
G
L123
GSM850/GSM900 Tx
GSM850/DCS1800 Rx
GSM900/PCS1900 Rx
FM Radio signal
BT signal
L121
L122
C129
C121
C122
C3
VDD_PADS
A5
VREG_EN_RST#
E6
SPI_PCM#_SEL
D4
PCM_IN
E2
PCM_OUT
D2
PCM_SYNC
D3
PCM_CLK
E1
PIO0
E4
PIO1
D5
PIO2
E3
PIO3
E5
PIO4
C6
PIO9
NC
B4
VREG_IN_HV
1NC2
A4
VREG_OUT_HV
U100
VSS_DIG
C4
C123
D6
B2
C2
C124
A1
VDD_RADIO
XTAL_OUT
UART_RTS
UART_CTS
UART_TX
UART_RX
C126
CLK26M_BT
UART2_RXD
UART2_TXD
F101
IN4OUT
1G3
B1
BT_RF
A2
A3
XTAL_IN
A6
B6
C5
B5
C127
C134
TP_UART_TXD
TP_UART_RXD
C135
VDD_DIG
VDD_AUX
VSS_RADIO
VSS_AUX
C1
RF PART / BT MODULE
F100
1
UNBAL
4
UNBAL
G
2
3G5
L106
FMR TR
R100
C112
C115
C119
R106
FM_ANT
C130
C100
L105
L111
L115
L120
C131
L107
9
BAL1
8
BAL1
7
BAL2
6
BAL2
L101
G
G
10
TR100
1
Mode
GSM850 Rx (RX1)
GSM900 Rx (RX2)
PCS1900 Rx (RX2)
LB_TX
HB_TX
STANDBY
C136
C137
L102
L100
R101
C114
3
HB_RX_P
L109
HB_RX_N
LB_RX_P
L103
LB_RX_N
L119
FM_LNA_OUT
2
C118
C117
C120
R107
TX_EN
L L
L
L
L
H L
H
L
BS
H
LDCS1800 Rx (RX1)
H
H
L L
SW_EN
H
H
H
H
H
H
Service Schematics
SAMSUNG CONFIDENTIAL
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO’ S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
VDD_2.85V
VBAT VSIM_2.85V
C211
VDD_1.8V
C213
C212
C214
C215
ROUTE FROM EACH CAP
ROUTE FROM VDD1V8CP
ISOLATE EACH PATH
VDD_IO1_1.8V
VDD_1.8V
VDD_IO2_1.8V
VDD_EBU_1.8V
MEM_AD(0:15)
VDD_IO2_1.8V
R210
LCD_RD
VDD_1.8V
R212
R211
TH200
R213
VCAM_IO_1.8V
R206
CAM_SCL
CAM_SDA
VDD_IO1_1.8V
C216
R207
C217
DDR_DQ(0:15)
CAM_D(0:7)
FM_LNA_SW
CAM_PCLK_IN
CAM_RST
CAM_HSYNC
CAM_VSYNC
CAM_PWR_EN
USB_I2C_SDA
LCD_RST
KEY_COL(0)
KEY_COL(1)
KEY_COL(3)
TSP_SCL
TSP_SDA
KEY_ROW(0)
DSDS_SCL
EAR_AMP_EN
KEY_ROW(5)
CHAR_ADC
DSDS_SDA
MIC_BB_N
AUX_MIC_N
MIC_BB_P
AUX_MIC_P
SD_DATA(0)
SD_DATA(1)
SD_DATA(2)
SD_DATA(3)
PCM_RXD
PCM_TXD
PCM_CLK
PCM_SYNC
DDR_LDMD
DDR_UDMD
DDR_LDQSD
DDR_UDQSD
BB / MEMORY / JTAG
C224
VDD_TDC_1.3V
C202
V_EARMIC_2.1V
VDD_TRX_1.4V
VUSB_3.1V
C205
VDD_EBU_1.8V
R200
NAND_WAITn
CS0n_OneNAND
TP_CS0n
C225
VUSB_3.1V
C204
C203
GSM850/GSM900 Tx
DCS1800/PCS1900 Tx
GSM850/GSM900 Rx
DCS1800/PCS1900 Rx
MIC signal
Receiver signal
Speaker signal
Ear Speaker L/R
LCD Backlight Enable
3.5 pi Earjack Detect
Ear MIC signal
VBAT
JTAG200
1
VBATT
2
VBUS_5V_J
JIG_ON_J
JIG_TXD
V_BUS
3
GND
4
D+
JIG_RXD
5
HP|PWR
6
D-
JIG_TXD
7
RXD
JIG_RXD
8
TXD
9
JIG_ID
ID
10
ANT
RST_BB_J
TMS
TDI
TCK
TRSTn
TDO
TXD1_J
RXD1_J
C206
P7
P8
A8
A7
P11
N13
C14
B13
H13
G13
M14
VDDD
VDDD
VDDQD
VDDQD
VDDQD
VDDQD
VDDQD
VDDQD
VDDQD
VDDQD
VDDQD
VDDQD
A1_INDEX
CLKO
INTO
RDYO
_AVDO
OneNAND Control
_CEO
_OEO
_WEO
_RPO
DNU
DNU
DNU
DNU
DNU
DNU
DNU
DNU
DNU
DNU
DNU
DNU
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
UME200
VSSQD
VSSO
VSSQD
VSSQD
VSSO
VSSQD
VSSQD
VSSQD
VSSQD
VSSQD
VSSQD
VSSQD
P9
P3
N6
A9
A6
J14
F14
L14
P12
A12
D14
NAND_CLK
MEM_INT
NAND_ADVn
NAND_RDn
WEn
RST_BB
TP_NAND_CLK
TP_MEM_INT
TP_NAND_ADVN
TP_NAND_RDn
WEn
RST_BB
D4
F5
E8
C6
C4
C5
B3
B6
B5
A1
A2
A13
A14
B1
B14
N1
N.C.
N14
P1
P2
P13
P14
A3
B4
B7
B8
B9
B11
B12
C2
C10
C11
D12
D13
E1
E6
E7
E9
E10
E12
F10
G10
J13
L1
M3
M9
M10
M11
M12
N3
N7
N9
N10
N11
N12
1
2
MEMORY
1G OneNand + 512M DDR SDRAM
VDD_IO1_1.8V
CN200
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
JTAG
VDD_IO2_1.8V
VDD_NEG_1.3V
VDD_RF2_2.5V
VDD_TDC_1.3V
VDD_EBU_1.8V
V_MIC_2.2V
VMMC_2.85V
VBAT
VDD_TRX_1.4V
C209
C210
T6
T7
J12
P10
P16
P18
N10
G16
VBAT
VAUX
VCHG
VBATSP
VDDCHG
VDD1V81
L1
DDR_DQ(0)
A0
M2
DDR_DQ(1)
A1
J2
DDR_DQ(2)
A2
L3
DDR_DQ(3)
A3
K3
DDR_DQ(4)
A4
J1
DDR_DQ(5)
A5
K2
DDR_DQ(6)
A6
K4
DDR_DQ(7)
A7
H6
DDR_DQ(8)
A8
H1
DDR_DQ(9)
A9
H3
DDR_DQ(10)
A10
G3
DDR_DQ(11)
A11
G2
DDR_DQ(12)
A12
H2
DDR_DQ(13)
A13
H4
DDR_DQ(14)
A14
G6
DDR_DQ(15)
A15
R5
MEM_AD(0)
A_D0
N5
MEM_AD(1)
A_D1
N3
MEM_AD(2)
A_D2
M4
MEM_AD(3)
A_D3
M1
MEM_AD(4)
A_D4
P3
MEM_AD(5)
A_D5
R3
MEM_AD(6)
A_D6
R4
MEM_AD(7)
A_D7
T3
MEM_AD(8)
A_D8
M5
MEM_AD(9)
A_D9
L5
MEM_AD(10)
A_D10
N4
MEM_AD(11)
A_D11
N6
MEM_AD(12)
A_D12
P7
MEM_AD(13)
A_D13
R1
MEM_AD(14)
A_D14
M3
MEM_AD(15)
A_D15
A8
CAM_D(0)
CIF_D0
B8
CAM_D(1)
CIF_D1
C7
CAM_D(2)
CIF_D2
A9
CAM_D(3)
CIF_D3
B9
CAM_D(4)
CIF_D4
C8
CAM_D(5)
CIF_D5
C9
CAM_D(6)
CIF_D6
E10
CAM_D(7)
CIF_D7
G9
CIF_PD
G8
CIF_PCLK
E8
CIF_RESET
F9
CIF_HSYNC
E9
LCD(0:7)
LCD_CS
LCD_RS
FLM
LCD_WR
TSP_INT
SD_CLK
SD_CMD
CIF_VSYNC
E3
LCD(0)
DIF_D0
D3
LCD(1)
DIF_D1
F4
LCD(2)
DIF_D2
D5
LCD(3)
DIF_D3
C4
LCD(4)
DIF_D4
C3
LCD(5)
DIF_D5
B3
LCD(6)
DIF_D6
D4
LCD(7)
DIF_D7
C1
DIF_D8
F5
DIF_CS1
E5
DIF_CD
E4
DIF_HD
D6
DIF_RD
C2
DIF_VD
C5
DIF_WR
B2
DIF_RESET
A11
KP_IN0
A12
KP_IN1
B12
KP_IN2
C12
KP_IN3
D12
KP_IN4
E12
KP_IN5
R215
D11
KP_OUT0
B11
KP_OUT1
C11
KP_OUT2
E11
KP_OUT3
A2
KP_OUT4
F12
KP_OUT5
N14
M0
T13
M1
R13
M2
J15
MON1
J14
MON2
C6
MON3
R14
C235
MICN1
R15
MICN2
T14
C236
MICP1
T15
MICP2
F3
MMCI_DAT0
G5
MMCI_DAT1
G4
MMCI_DAT2
E1
MMIC_DAT3
F2
MMCI_CLK
F1
MMCI_CMD
A10
I2S1_RX
B10
I2S1_TX
B7
I2C_SCL
A7
I2C_SDA
D10
I2S1_CLK0
C10
I2S1_WA0
L2
BC0_N
J3
BC1_N
L4
BC2_N
G1
BC3_N
VSSCORE
VSSLSR
AGND
VSSCORE
VSSCORE
VSSCORE
VSSCORE
R7
A3
J11
F10
P17
P13
H11
F6
L9
P9
P6
H8
K9
F11
E13
P15
P14
B16
K10
G10
VDDCORE
VDDCORE
VSSMS
VSSMS
L16
L13
C17
N13
H15
R18
B14
G11
G15
M10
M11
VSIM
VMIC
VUSB
VMMC
VDDFS
VDDMS
VDDIO2
VDDIO1
VDDNEG
UCP200
VSSRF_D
VSSRF
VSSRF
VSSRF
VSSRF
F17
F14
F15
F16
E14
VUMIC
VDDXO
VDDRF2
VDDTRX
VDDTDC
VDD_DLL
VSS_SD1
VSS_PMU
VSS_VIB
VSSRF_D
VSSRF_D
T9
T11
R10
G14
E2
VDD_SD1
VDD_EBU
VDD_EBU
VDD_FMR
CC_IO
D1
CC_CLK
D2
CC_RST
A6
CLKOUT0
F8
CLKOUT2
T2
BFCLKO_0
J4
BFCLKO_1
L18
F32K
L17
OSC32K
T17
CP1
R17
CP2
M9
CS
R8
CSB
N2
CS0_N
R2
CS1_N
R6
CS2_N
H13
DIGUP1
G12
DIGUP2
J13
DIGUP_CLK
K14
DMINUS
K13
DPLUS
M17
EPN
M18
EPP
N18
LSN
N17
LSP
D18
RX12
F18
RX34
C18
RX12X
E18
RX34X
A17
TX1
B17
TX2
H14
SWIF_TXRX
B4
USIF1_CTS_N
A5
USIF1_RST_N
J10
USIF2_CTS_N
H9
USIF2_RTS_N
B5
USIF1_RXD_MRST
A4
USIF1_TXD_MTSR
J9
USIF2_RXD_MRST
H10
USIF2_TXD_MTSR
L11
LEDDRV
L10
LEDFBN
K12
LEDFBP
L8
SENSEN
M8
SENSEP
B18
FE1
A16
FE2
M12
FMRIN
M13
FMRINX
G13
FSYS1
F13
FSYS2
K17
FSYS_EN
R16
HSL
T16
HSR
A13
XO
B13
XOX
R11
ONOFF
R9
SD1SW
T8
SD1_FB
P4
CKE
P5
CAS_N
P2
RAS_N
T4
ADV_N
P1
RD_N
L15
RESET_N
H17
TRST_N
J8
WAIT_N
T5
WR_N
K18
TRIG_IN
B6
T2IN
C15
PABIAS
B15
PABS
C14
PAEN
R12
ACD
P11
ANAMON
C16
VDET
T10
VIB
P12
VPMU
A15
VRAMP
T12
VREF
H12
VRF1
L12
VRTC
B1
FCDP_RBN
J5
SDCLKO
H18
TCK
J18
TDI
J17
TDO
G18
TMS
K8
VSHNT
NC3
NC4
NC2
NC1NC
NC1
2
T1
A1
T18
A18
SIM_IO
SIM_CLK
SIM_RST
BT_CLK_32KHZ
CAM_MCLK_OUT
NAND_CLK
DDR_CLKn
C226
CS0n_OneNAND
CS1n_RAM
BT_RST
DETECT_SD
EAR_SW
USB_DM_BB
USB_DP_BB
RCV_N
RCV_P
SPK_N
SPK_P
LB_RX_P
HB_RX_P
LB_RX_N
HB_RX_N
LB_TX
HB_TX
LCD_BL_EN
USB_I2C_SCL
USB_SW_DET
MEM_INT
UART1_RXD
UART1_TXD
UART2_RXD
UART2_TXD
SW_EN
BS
CLK26M_BT
BT_REQ_CLK
EAR_SPK_L
EAR_SPK_R
ONKEY
DDR_CKE
DDR_CASn
DDR_RASn
NAND_ADVn
NAND_RDn
TRSTn
NAND_WAITn
WEn
3.5_DETECT
TX_EN
EAR_ADC
RAMP
VF
DDR_CLK
TCK
TDI
TDO
TMS
C218
C219
VBAT
L200
L201
RST_FSA9590
RST_BB_J
RST_BB
VDD_IO1_1.8V
R214
C238
C222
C220
C223
C221
OSC200
C228
C227
VDD_RF2_2.5V
VDD_NEG_1.3V
C200
C201
C232
FM_LNA_OUT
C233
OSC201
VDD_1.8V
4213
C234
VRTC_2.3V
VDD_1.8V
C237
C239
C240
E5
K7
N2
D1
A5
H1
M2
A11
G12
VDDD
VDDD
VDDD
VDDD
VCCO
VCCO
VCCQO
VCCQO
DRAM
Address input
DRAM
Data I/O
OneNAND Data I/O
ADQ10O
ADQ11O
ADQ12O
ADQ13O
ADQ14O
ADQ15O
DRAM
Control
VSSD
VSSD
VSSD
VSSO
VSSO
VSSD
VSSD
VSSD
VSSO
J2
K8
B2
C1
A4
G5
M1
P10
H12
BOTH HOLE (4.1PI)
G201
G200
G205
G209
G206
C3310
VDD_EBU_1.8V
C208
C207
DDR_DQ(0)
DDR_DQ(1)
DDR_DQ(2)
DDR_DQ(3)
DDR_DQ(4)
DDR_DQ(5)
DDR_DQ(6)
DDR_DQ(7)
DDR_DQ(8)
DDR_DQ(9)
DDR_DQ(10)
DDR_DQ(11)
DDR_DQ(12)
DDR_DQ(13)
DDR_DQ(14)
DDR_DQ(15)
DDR_UDQSD
MEM_AD(0)
MEM_AD(1)
MEM_AD(2)
MEM_AD(3)
MEM_AD(4)
MEM_AD(5)
MEM_AD(6)
MEM_AD(7)
MEM_AD(8)
MEM_AD(9)
MEM_AD(10)
MEM_AD(11)
MEM_AD(12)
MEM_AD(13)
MEM_AD(14)
MEM_AD(15)
MEM_AD(0)
MEM_AD(1)
MEM_AD(2)
MEM_AD(3)
MEM_AD(4)
MEM_AD(5)
MEM_AD(6)
MEM_AD(7)
MEM_AD(8)
MEM_AD(9)
MEM_AD(10)
MEM_AD(11)
MEM_AD(12)
MEM_AD(14)
MEM_AD(15)
DDR_CKE
DDR_CLK
DDR_UDMD
DDR_LDMD
DDR_LDQSD
DDR_CLKn
DDR_CASn
DDR_RASn
WEn
MEM_AD(0:15)
DDR_DQ(0:15)
MEM_AD(0:15)
CS1n_RAM
TP_MEM_AD
F3
A0D
L3
A1D
E3
A2D
K3
A3D
J1
A4D
J3
A5D
K1
A6D
H3
A7D
L2
A8D
G2
A9D
K2
A10D
H2
A11D
F2
A12D
D3
BA0D
G3
BA1D
TP_DDR_DQ
M13
DQ0D
N8
DQ1D
K12
DQ2D
M8
DQ3D
K14
DQ4D
L12
DQ5D
M7
DQ6D
L13
DQ7D
C8
DQ8D
C12
DQ9D
F13
DQ10D
F12
DQ11D
B10
DQ12D
C9
DQ13D
C7
DQ14D
E13
DQ15D
E14
UDQSD
M6
ADQ0O
P6
ADQ1O
M5
ADQ2O
N5
ADQ3O
P5
ADQ4O
M4
ADQ5O
N4
ADQ6O
P4
ADQ7O
H5
ADQ8O
J5
ADQ9O
K5
K6
K9
K10
J10
H10
TP_DDR_CKE
G1
CKED
TP_DDR_CLK
G14
CLKD
C13
UDMD
K13
LDMD
J12
LDQSD
D2
TP_DDRLDQSD
_CSD
H14
TP_DDR_CLKn
_CLKD
F1
TP_DDR_CASn
_CASD
E2
TP_DDR_RASn
_RASD
C3
TP_WEn
_WED
A10
G203
G202
G204G208
C3312 LATIN
R217
R216
R218
Service Schematics
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