Samsung AF4502C Service Manual
P & N-Channel 30-V (D-S) MOSFET
AF4502C
Features
-Low r
Battery Life
-Miniature SO-8 Surface Mount Package Saves
Board Space
-High power and current handling capability
-Low side high current DC-DC Converter
applications
Provides Higher Efficiency and Extends
DS(on)
Product Summary
VDS (V) r
30
-30
Pin Assignments
1
S1
2
G1
S2
3
4
G2
DS(on)
20@VGS=4.5V
13.5@V
30@VGS=-4.5V
19@V
SOP-8
(mΩ) ID (A)
8.4
GS
=-10V
GS
=10V
10.0
-6.8
-8.5
8
D1
7
D1
D2
6
5
D2
General Description
These miniature surface mount MOSFETs utilize
High Cell Density process. Low r
minimal power loss and conserves energy, making
this device ideal for use in power management
circuitry. Typical applications are PWMDC-DC
converters, power management in portable and
battery-powered products such as computers,
printers, battery charger, telecommunication power
system, and telephones power system.
assures
DS(on)
Pin Descriptions
Pin Name Description
S1 Source (NMOS)
G1 Gate (NMOS)
D1 Drain (NMOS)
S2 Source (PMOS)
G2 Gate (PMOS)
D2 Drain (PMOS)
Ordering information
AX 4502C X X X
Feature
F :MOSFET S: SOP-8
This datasheet contains new product information. Anachip Corp. reserves the rig hts to modify the product specification without notice. No liability is assumed as a result of the use of
this product. No rights under any patent accompany the sale of the product.
PN
Package
Lead Free
Blank : Normal
L : Lead Free Package
1/8
Packing
Blank : Tube or Bulk
A : Tape & Reel
Rev. 1.1 Jul 20, 2004
P & N-Channel 30-V (D-S) MOSFET
AF4502C
Absolute Maximum Ratings (T
Symbol Parameter N-Channel P-Channel Units
VDS Drain-Source Voltage 30 -30
VGS Gate-Source Voltage 20 -25
ID Continuous Drain Current
IDM Pulsed Drain Current
(Note 1)
±50 ±50 A
(Note 2)
IS Continuous Source Current (Diode Conduction)
PD Power Dissipation (Note 1)
TJ, T
Operating Junction and Storage Temperature Range - -55 to 150 ºC
STG
Thermal Resistance Ratings
Symbol Parameter Maximum Units
R
Maximum Junction-to-Case
θJC
R
Maximum Junction-to-Ambient
θJA
surface Mounted on 1”x 1” FR4 Board.
Note 1:
Note 2: Pulse width limited by maximum junction temperature
Specifications (T
=25ºC unless otherwise noted)
A
Symbol Parameter Test Conditions
Static
V
Drain-Source breakdown Voltage
(BR)DSS
V
Gate-Threshold Voltage
GS(th)
I
Gate-Body Leakage
GSS
I
Zero Gate Voltage Drain Current
DSS
I
On-State Drain Current (Note 3)
D(on)
r
DS(on)
gfs
Drain-Source On-Resistance
(Note 3)
Forward Tranconductance
(Note 3)
Anachip Corp.
www.anachip.com.tw Rev. 1.1 Jul 20, 2004
(Note 1)
=25ºC unless otherwise noted)
A
V
TA=25ºC 10 -8.5
T
=70ºC 8.1 -6.8
A
2.3 -2.1 A
(Note 1)
TA=25ºC 2.1 2.1
T
=70ºC 1.3 1.3
A
A
W
t < 5 sec 40 ºC/W
t
(Note 1)
VGS=0V, ID=250uA N 30 - -
=0V, ID=-250uA P -30 - -
V
GS
VDS= VGS, ID=250uA N 1 1.95 3
= VGS, ID=-250uA P -1.0 -1.6 -3
V
DS
VGS=20V, VDS=0V N - - ±100
=-20V, VDS=0V P - - ±100
V
GS
VDS=24V, VGS=0V N - - 1
=-24V, VGS=0V P - - -1
V
DS
VDS=5V, VGS=10V N 20 - V
=-5V, VGS=-10V P -50 - -
DS
VGS=10V, ID=10A - 11 13.5
VGS=4.5V, ID=8.4A
VGS=-10V, ID=-8.5A - 16 19
V
=-4.5V, ID=-6.8A
GS
VDS=15V, ID=10A N - 40 -
=-15V, ID=-9.5A P - 31 -
V
DS
2/8
5 sec 60 ºC/W
<
Limits
Ch Min. Typ. Max.
Unit
nA
uA
N
P
- 15 20
- 26 30
mΩ
V
V
A
S
P & N-Channel 30-V (D-S) MOSFET
Specifications (T
Symbol Parameter Test Conditions
Dynamic
Qg Total Gate Charge
Qgs Gate-Source Charge
Qgd Gate-Drain Charge
Switching
t
Turn-On Delay Time
d(on)
tr Rise Time
t
Turn-Off Delay Time
d(off)
tf Fall-Time
Note 3: Pulse test: PW < 300us duty cycle < 2%.
Note 4: Guaranteed by design, not subject to production testing.
=25ºC unless otherwise noted)
A
N-Channel
=15V, VGS=4.5V
V
DS
I
=10A
D
P-Channel
=-15V, VGS=-4.5V
V
DS
=-10A
I
D
N-Channel
V
=15, VGS=10V
DD
=1A, R
I
D
GEN
=25Ω
P-Channel
V
=-15, VGS=-10V
DD
=-1A, R
I
D
GEN
=15Ω
AF4502C
Limits
Ch Min. Typ. Max.
N - 12 19
P - 13 26
N - 3.3 P - 5.8 N - 4.5 P - 12 -
N - 20 30
P - 15 26
N - 9 20
P - 16 21
N - 70 102
P - 62 108
N - 20 81
P 46 71
Unit
nC
nS
Anachip Corp.
www.anachip.com.tw Rev. 1.1 Jul 20, 2004
3/8
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