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BLOCK MODE TIME SLOT ALLOCATION CIRCUIT
SA8702
SA8702
DESCRIPTION
The SA8702 (BMTSAC) is a Block Mode
Time Slot Allocation Circuit. The device is
used to generate 8 consecutive timeslots
in one of 4 blocks in a 32 time-slot PCM
system. Each timeslot pulse is 8 BLCK
cycles long. BCLK is the 2,048 station
clock provided by the system. An active
MRST will disable all outputs until a valid
XSYNC input is recognised. The output
TSX is delayed by half a cycle and indicates
that one of 8 timeslots is currently active.
There are 4 possible modes of operation,
selectable by means of the BL0 and BL1
pins (See Table 1).
PIN CONNECTIONS
All inputs and outputs are C-MOS
compatible. All outputs are push-pull with
the exception of TSX which is open drain.
The inputs MRST and BCLK are Schmitt
Trigger. Inputs BL0 and BL1 have pull-ups.
(See figure 1).
APPLICATIONS
■ PCM Switching Systems
■ PCM Transmission Systems
■ Subscriber Multiplex Equipment
■ PBX Systems
SA8702
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Figure 1.
1
02.02.93
SA8702
Operating Modes
BL1 BL0 Mode of Operation
0 0 Outputs active in timeslots 0 to 7
0 1 Outputs active in timeslots 8 to 15
1 0 Outputs active in timeslots 16 to 23
1 1 Outputs active in timeslots 24 to 31
Table 1.
Input pulse XSYNC occurs periodically in every frame and is used to generate the
first of the eight timeslots and also defines the beginning of Block 0. If XSYNC fails
high then the outputs will be generated as they were before the failure occured.
Should XSYNC fail low then the outputs will be deactivated after completion of the
frame.
Maximum Ratings
All voltages measured with respect to VSS.
Parameter Symbol Value Units
Supply voltage V
Positive voltage on any pin V
Negative voltage on any pin V
Maximum current through any pin I
Storage temperature T
Operating temperature T
Stresses beyond these values may cause permanent damage to the device. Exposure to
maximum rated conditions for extended periods may affect device reliability.
DD
HM
LM
HM
ST
O
+7,5 V
VDD +0,3 V
VSS -0,3 V
±10 mA
-55 to +150 °C
-10 to +70 °C
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