SAMES SA2532A, SA2532C, SA2532U Datasheet

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SA2532
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VERSATILE SINGLE CHIP TELEPHONE
4153
SA2532 A/C/U
PDS039-SA2532-001 Rev. C 23-10-1995
n Speech circuit, LD/MF Dialler and Tone
Ringer on one 28 pin CMOS chip
n Soft clip to avoid harsh distortion n Line Loss Compensation selectable by
pin option
n Power down mode n Versatile applications for different PTT
demands
n 31 digit last number redial n Sliding Cursor protocol with comparison n 2 Flash keys, 100 ms and 280 ms (option
600 ms)
n Pause key for 3 sec Auto Pause or Wait
Function
n Ring frequency discrimination n Operating range from 13 to 100 mA
(down to 5 mA with reduced perform­ance)
n Low noise (max. -72dBmp) n Real or Complex impedance on chip pro-
grammable
n LD/MF switchable dialling n On chip MF filter (CEPT CS 203 compat-
ible)
n 3-tone melody generator with selectable
repetition rates
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GENERAL DESCRIPTION
The SA2532 is a CMOS integrated circuit that contains all the functions needed to form a high performance electronic telephone.
The device incorporates LD/MF dialling, melody generation, ring frequency discrimi­nation and a high quality speech circuit.
A RAM is on chip for a 31 digit last number redial. The sliding cursor procedure makes Last Number Redial easy behind a PABX.
The versatility of the circuit is provided by on chip programmability and a few external com­ponents. This allows easy adaption to differ­ent PTT requirements without changing the PCB of the telephone.
PACKAGE
Available in 28 pin DIP and SOIC
SA2532
HS DP
DR-00975
OSC
C3
C4
RR
14
A
GND
STB
LLC
CI MO
DD
RO2 RO1
LS
V
1
R2
15
R4
R3
C1 C2
M2
MODE
M1
FCI R1
28
SS
V CS
RI LI
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SA2532
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PIN DESCRIPTION
Pin# Symbol Function
23 M1 Microphone Inputs 24 M2 Differential inputs for the microphone (electret). 3 RO1 Receiver Outputs 2 RO2 These are the outputs for driving a dynamic earpiece with an impedance
of 100 to 300
5A
GND
Analog Ground
This is the analog ground for the amplifiers.
28 RI Receive Input
This is the input for the receive signal.
6STBSide Tone Balance Input
This is the input for side tone cancellation.
1LS Line Current Sense Input
This is the input for sensing the line current.
27 LI Line Input
This input is used for power extraction and line current sensing.
25 CS Current Shunt Control Output
This N-channel open drain output controls the external high power shunt transistor for the modulation of the line voltage and for shorting the line during make period of pulse dialling.
4VDDPositive Voltage Supply
This is the supply pin for the circuit.
26 V
SS
Negative Power Supply
8MO Melody Output
Pulse Density Modulated output of the melody generator for tone ringer. At high impedance when not active.
21 FCI Frequency Comparator Input
This is a Schmitt trigger input for ring frequency discrimination. Disabled during off-hook.
10 HS/DP Hook Switch Input and Dial Pulse Output
This is an I/O that is pulled high by the hook switch when off- hook. An open drain pulls it low during break periods of pulse dialling and flash.
11 OSC Oscillator Input
Oscillator pin for Xtal or ceramic resonator (3.58 MHz).
9 LLC Line Loss Compensation
Select pin for line loss compensation.
12 RR Repetition Rate
Select pin for repetition rate of melody.
22 MODE Signalling Mode Select Input
Mode pin Function High LD default mode, make/break = 33/66 ms Open MF only
Low LD default mode, make/break = 40/60 ms 20 R1 Keyboard Rows 19 R2 18 R3 17 R4 16 C1 Keyboard Columns 15 C2 14 C3 13 C4 7CI Complex Impedance Input
Input pin for the capacitor in the complex impedance
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SA2532
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FUNCTIONAL DESCRIPTION Power On Reset
The on chip power on reset circuit monitors the supply voltage (V
DD
). When VDD rises above
approx. 1.2V, a power on reset occurs to assure correct start-up and the RAM is cleared.
DC Conditions
The normal operating range is from 13mA to 100 mA. Operating range with reduced performance is from 5mA to 13mA. In the operating range all functions are operational.
In the line hold range from 0 to 5 mA the device is in a power down mode and the voltage at LI is reduced to maximum 3.5V.
The dc characteristic (excluding diode bridge and Pulsing transistors) is determined by the voltage at LI and the resistor R1 as follows:
VLS = VLI + I
Line
.R1
The voltage at LI is 4.5V. During pulse dialling the speech circuit and other parts of the device not required are in a
power down mode to save current. The CS pin is pulled to VSS in order to turn the external shunt transistor on to keep a low voltage drop at the LS pin during make periods.
AC Impedance
The Characteristic or Output impedance of the SA2532 is set within the IC and adjusted by Mask Options. Available options are for 600 and 1000. When the 1000 option is selected then a capacitor may be added to the circuit at pin CI to add a reactive element and make the output impedance complex.
Oscillator
All the Timing Functions of the SA2532 are based on a Clock Frequency of 3.58MHz. A crystal or ceramic resonator of this frequency should be connected to the OSC pin. In practise minor deviations from the nominal frequency may occur due to the characteristics of the frequency reference device used and so it is recommended that care is taken in the selection of components.
In some cases a small value capacitor ( 47pF) may have to be connected in parallel with the Frequency Reference to ensure start-up and/or operation at the nominal frequency.
Speech Circuit
The speech circuit consists of a transmit and a receive path with soft clip, mute, line loss compensation and side tone cancellation.
Transmit
The gain of the transmit path is 35 dB for M1/M2 to LS (see test circuit figure 5). The microphone input is differential with an input impedance of 25 k.
The soft clip circuit limits the output voltage at LI to 2.0V
PEAK
. The attack time is 30µs/6dB and the decay time is 20 ms/6 dB. When mute is active, during dialling or after pressing the MUTE key, the gain is reduced by > 60 dB.
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SA2532
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Receive
The receive input is the differential signal of RI and STB. The gain of the receive path is 2 dB (test circuit figure 5) with differential outputs, RO1/RO2 (0dB on SA2532C/U). When mute is active during dialling the gain is reduced by > 60dB. During DTMF dialling a MF comfort tone is applied to the receiver. The comfort tone is the DTMF signal with a level that is -30dB relative to the line signal.
Side Tone
Side Tone is controlled along with Return Loss by a Double Balance Bridge as shown in
Fig. 1.
Figure 1
Double balance bridge (return loss and side tone) with one common ground A good side tone cancellation is achieved by using the following equation:
ZBAL = R5 ZLINE R1
The side tone cancellation signal is applied to the STB input.
Line Loss Compensation
When Line Loss Compensation is active the gain of the Transmit and Receive amplifiers are changed by 6dB in accord with the DC conditions as measured at Pins LI and LS. When the LLC Pin is Low this adjustment in gain occurs over the range I
LINE
= 20 to 50 mA.
When LLC is High the range is 45 to 75mA. Note that these figures apply for R1 = R30. When the LLC Pin is open the amplifier gains remain fixed regardless of the Line Current.
ONE COMMON GROUND
Z
BAL
DR-00708
RETURN LOSS
LINE
V
Z
REF
SS
R2
R1
RI
SIDE TONE
R5
STB
SYN
LI
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SA2532
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Dialling Functions
Valid Keys
The keypad of the SA2532 comprises a maximum of 20 keys (of which 3 have no function). A Bi-polar scan technique is used so that the 20 keys are scanned in a 4 x 5 matrix using only 8 pins.
A valid key is detected when one and only one contact closure is detected between a Row and Column Pin. Key contacts are debounced to avoid incorrect detection.
Dial Mode Selection
The default mode (LD or MF) can be selected by the Mode pin. When default LD mode is selected, a temporary change to MF can be invoked by pressing the * key. The circuit will revert to LD by pressing the R (or R2) key or by next on-hook.
When MF mode is selected by the mode pin, the circuit can not be changed temporarily to LD but will remain in MF.
Last Number Redial
LNR is a facility that allows resignalling of the last manually dialled number without keying in all the digits again. The LNR is repeatable.
The current contents of the RAM are overwritten by new entries. A manually entered number is automatically stored in the LNR RAM. The capacity of the
RAM is 31 digits. If a number greater than 31 digits is entered, the LNR facility will be inhibited (Until new entries < 32 digits) and further entries will be buffered in a First In First Out Memory (FIFO).
Post dialled digits, i.e. digits manually entered after LNR has been invoked, are not stored in RAM but buffered in FIFO.
During dialling, one or more pauses can be inserted by pressing the PAUSE KEY. Each pause is 3 secs (optionally 6 secs) when inserted within the first 5 digits. Otherwise a Wait Function will halt dialling until the LNR Key is pressed.
Recall Function
A Recall (R key or R2 key) activation will invoke a Flash (Timed Loop Break). If Recall is the first entry in a digit string, it will be stored in LNR RAM when digit(s) are
entered after the Recall. If the recall key is depressed after a digit string has been entered or dialled out, the recall
will not be stored but buffered in the FIFO together with subsequently entered digits. If pressing the recall key is not followed by digit entries, the LNR RAM remains intact. After a recall, a 3 second pause will automatically be executed.
Mute Function
The MUTE key is enabled in speech mode only. Depressing the MUTE key mutes the microphone amplifier. Repressing the MUTE key deactivates the mute (toggle function). Any key entry overwrites a mute activated by the MUTE key and mute will be deactivated.
When privacy mute is activated a reminder tone is applied to the earpiece every 3 seconds.
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Sliding Cursor Procedure
To accommodate easy and uncomplicated redialling (LNR) behind a PABX, a sliding cursor protocol is implemented. If new entries match the previous RAM contents, pressing the LNR key will dial out the remaining digits.
If there is an error in matching, the LNR will be inhibited until next on-hook, and the RAM will contain the new number.
Tone Generator
The tone generator incorporates the DTMF tones and 3 basic frequencies for the tone ringer.
DTMF Tones
The DTMF Tone Generator creates 12 Tones in compliance with CCITT Recommenda­tion Q23. Signal levels are altered by Mask Option. High group frequencies have a level
2.6dB higher than those of the Low Group. Details of the DTMF Tones are: Low group
Digit 1-2-3 697Hz (Error = -.074%) Digit 4-5-6 770Hz (Error = -.679% Digit 7-8-9 852Hz (Error = -.621%) Digit *-0-# 941Hz (Error = +.139%)
High group
Digit 1-4-7-* 1209Hz (Error = +.533%) Digit 2-5-8-0 1336 Hz (Error = +.176%) Digit 3-6-9-# 1477Hz (Error = -.141%)
Errors are calculated with reference to a base clock of 3.58MHz and at ambient temperature of 24°C. They exclude tolerance errors in the base frequency.
KEYBOARD ARRANGEMENT
Figure 2
DR-00709
R3
R4
LNR/CONT.
#
8 9
PAUSE
R2
R1
C1
4
MUTE
C2
5
1
R
0
R2
*
C3
6
2
C4
7
3
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SA2532
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Microcontroller Interface
The keypad Row and Column Pins can readily be driven by a Microcontroller Interface. When configured in this way the SA2532 inputs and dials the corresponding digits in either LD or DTMF. The LNR store can be used to buffer digits to allow high speed data entry. See Application Note AN3002A for details.
Tone Ringer
The Tone Ringer of the SA2532 incorporates a Discriminator Circuit and adjustable Melody Generator
Ring Frequency Discrimination
The Ring Frequency Discriminator assures that only signals with a frequency between 20Hz and 60Hz (option 13 Hz to 60 Hz) are regarded as valid ring signals.
When a valid ring signal is present for 73ms continuously, the melody generator is activated and remains active as long as the ring signal is present.
Once the melody generator has been started, the ring signal is continuously monitored and the melody generator is instantly turned on or off according to the momentary presence of a valid or unvalid ring signal respectively (until next POR or off-hook).
Melody Generator
When a Valid Ring Signal is detected the Melody generator is activated and creates a ringing Signal comprising 3 frequencies F1 (1065Hz), F2 (1420Hz) and F3 (1734Hz).
These frequencies are repeated in a sequence of 6 time slots constructed by the frequencies
F1 F2 F3 F1 F2 F3
This sequence is repeated 1, 4, 7 or 10 times per second as indicated by the connection of the RR Pin to one of the four rows of the keyboard.
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