SAIFUN SA24C512LZENF, SA24C512LZENFX, SA24C512LZENX, SA24C512LZMF, SA24C512LZMFF Datasheet

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This Datasheet states Saifun's current technical specifications regarding the Products descri bed herein. This Datasheet may be revised by subsequent versions or modifications due to changes in technical specifications.
Publication# 1907 Rev: 1 Amendment: 1 Issue Date: 10 September 2003
SA24C512
Datasheet
= Saifun NROM™ NVM Technology
= Operating voltage: 2.7V to 3.6V
= Clock frequency: 100/400/1700/3400 kHz
= Low power consumption
0.5µ
µµ
µA standby current typical (L version)
<0.2µ
µµ
µA standby current typical (LZ version)
= Write Modes
Byte Mode Page Mode (128 Bytes/Page)
= Schmitt trigger inputs
= Hardware and software write protection for entire or partial array
= Endurance: up to 1 million data changes
= Data Retention: Greater than 40 years
= Packages: 8-Pin DIP, 8-Pin SOIC and MLF Leadless
= Temperature range
Commercial: 0°C to +70°C Industrial (E): -40°C to +85°C
512Kb EEPROM IIC
http://www.saifun.com
Saifun NROMTM is a trademark of Saifun Semiconductors Ltd.
SA24C512 Datasheet
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General Description
SA24C512 is a 512-Kbit CMOS non­volatile serial EEPROM organized as 64K x 8 bit memory. This device conforms to Extended IIC 2-wire protocol that allows accessing of memory in excess of 16Kbit on an IIC bus. This serial communication protocol uses a Clock signal (SCL) and a Data signal (SDA) to synchronously clock data between a master (e.g. a microcontroller) and a slave (EEPROM).
SA24C512 offers hardware write protection whereby the entire memory array can be write protected by pulling WP pin to logic HIGH. The entire memory then becomes unalterable until the WP pin is switched to logic LOW. The device also features programmable write protect with options of full, half, or a quadrant of the array.
The “LZ” version of the SA24C512 offers very low standby current, making it suitable for low-power applications. SA24C512 is designed to minimize pin count and simplify PC board layout requirements. This device is offered in SO, DIP and Leadless MLF packages.
Saifun’s EEPROMs are designed and tested for applications requiring high endurance, high reliability and low power consumption.
SA24C512 Datasheet
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Table of Contents
Features......................................................................... 1
General Description ...................................................... 2
Block Diagram............................................................... 4
Connection Diagram..................................................... 5
Ordering Information .................................................... 6
Product Specifications ................................................. 7
Absolute Maximum Ratings Operating Conditions... 7
ESD/Latchup Specification (JEDEC 8 Spec) ........... 7
Operating Conditions............................................... 7
DC Electrical Characteristics (VCC 2.7V to 3.6V).... 8
Capacitance ............................................................ 8
AC Test Conditions ................................................. 9
AC Testing Input/Output Waveforms....................... 9
AC Characteristics (VCC 2.7V to 3.6V)..................... 9
Bus Timing............................................................ 10
Write Cycle Timing................................................ 11
Typical System Configuration................................ 11
Background Information (IIC Bus) ............................. 12
Slave Address....................................................... 12
Device Type.......................................................... 13
Device/Page Block Selection................................. 13
Read/Write Bit....................................................... 13
Acknowledge......................................................... 13
Array Address#1.................................................... 13
Array Address#0.................................................... 13
Pin Descriptions.......................................................... 14
Serial Clock (SCL)................................................. 14
Serial Data (SDA).................................................. 14
Write Protect (WP) ................................................ 14
Choice 1: Full Array Write Protect ................. 14
Choice 2: Programmable W rite Protect ......... 15
Device Selection Inputs A1 and A0
(as Appropriate)..................................................... 16
Device Operation......................................................... 17
Clock and Data Conventions ................................. 17
START Condition .................................................. 17
STOP Condition .................................................... 17
SA24C512 Array Addressing................................. 17
Switching from F/S to HS Mode and Back............. 18
Write Operations......................................................... 21
Byte Write ............................................................. 21
Page Write ............................................................ 21
Acknowledge Polling ............................................. 22
Write Protection .................................................... 22
Read Operations.......................................................... 23
Current Address Read........................................... 23
Random Read ....................................................... 23
Sequential Read.................................................... 23
Physical Dimensions................................................... 25
Contact Information .................................................... 28
Life Support Policy...................................................... 28
List of Figures
Figure 1. SA24C512 Block Diagram................................ 4
Figure 2. SO, Package (MW), Dual-in-Line Package (N),
Top View ...............................................................5
Figure 3. Leadless Package (MLF), Top View................. 5
Figure 4. SA24C512 Ordering Information ...................... 6
Figure 5. AC Testing Input/Output Waveforms ................ 9
Figure 6. Bus Timing..................................................... 10
Figure 7. Write Cycle Timing......................................... 11
Figure 8. Typical System Configuration ......................... 11
Figure 9 Slave Address ................................................. 12
Figure 10. Data Transfer in Hs-mode ............................ 18
Figure 11. A Complete Hs-mode Transfer ..................... 19
Figure 12. Data Validity ................................................. 19
Figure 13. START and STOP Definition ........................ 20
Figure 14. Acknowledge Response from Receiver ........ 20
Figure 15. Byte Write .................................................... 22
Figure 16. Page Write ................................................... 22
Figure 17. Current Address Read.................................. 24
Figure 18. Random Read .............................................. 24
Figure 19. Sequential Read........................................... 24
Figure 20. 8-Pin Molded Small Outline Package (MW)
Package Number M08D ...................................... 25
Figure 21. Molded Dual-in-Line Package (N) Package
Number N08E...................................................... 26
Figure 22. 8-pin MLF Leadless Package ....................... 27
List of Tables
Table 1. Pin Names......................................................... 5
SA24C512 Datasheet
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Block Diagram
Figure 1. SA24C512 Block Diagram
SA24C512 Datasheet
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Connection Diagram
SA24C512
1
2
3
4
8
7
6
5
A0
A1
NC
V
SS
V
CC
WP
SCL
SDA
Figure 2. SO, Package (MW), Dual-in-Line
Package (N), Top View
SA24C512
1
2
3
4
8
7
6
5
A0
A1
NC
V
SS
V
CC
SCL
SDA
Figure 3. Leadless Package (MLF), Top View
Note:
For more details, see Package Number N08E and M08D.
Table 1. Pin Names
Pin Name Signal Name Description
A0 Device Select Address
Input
Has an internal "weak" pull down so that when left unconnected assumes logic LOW.
A1 Device Select Address
Input
Has an internal "weak" pull down so that when left unconnected assumes logic LOW.
NC No Connect
VSS Device Ground Input
SDA
IIC Data Input/Output Open Collector/Drain type
SCL IIC Clock Input
WP Write Protect Has an internal "weak" pull down so that when
left unconnected assumes logic LOW.
When LOW, Write is allowed to the memory array.
When HIGH, Write is not allowed to the memory array as defined in Write Protect (WP), page 14.
VCC Device Power Input
2.7 V to 3.6 V
Note:
No A2 pin (Pin 3) is provided. Treated as No Connect. Internal address comparison assumes this pin to be 0 and hence the command code should have corresponding bit set to 0.
SA24C512 Datasheet
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Ordering Information
LZXXC24SA Letter
L LZ
512
C
24
SA
Interface
Density
Voltage Operating Range
Description
2.7 V to 3.6 V
2.7 V to 3.6 V < 0.7 µA Standby Current
512 Kb with Write Protect
CMOS EEPROM Technology
IIC - 2 Wire
Saifun Non-Volatile Memory
X
Blank X
Tube Tape and Reel
PP
Package
N MW MF
8-pin DIP 8-pin SOIC (200 mil) 8-lead MLF
F
Blank F
Non-lead Free Lead-free Leads
E
Blank E
Temp. Range 0 to 70 C
-40 to +85 C
o
o
Figure 4. SA24C512 Ordering Information
SA24C512 Datasheet
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Product Specifications
Absolute Maximum Ratings Operating Conditions
Ambient Storage Temperature
–65 °C to +150 °C
All Input or Output Voltages with Respect to Ground
4.5 V to -0.3 V
Lead Temperature
(Soldering, 10 seconds)
+300 °C
ESD Rating 2000 V min.
ESD/Latchup Specification (JEDEC 8 Spec)
Human Body Model Minimum 2 KV
Machine Model Minimum 500 V
Latch up:
100 mA on all pins +125 °C
Operating Conditions
Ambient Operating Temperature
SA24C512
SA24C512E
0 °C to +70 °C
-40 °C to +85 °C
SA24C512 Datasheet
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DC Electrical Characteristics (VCC 2.7V to 3.6V)
Limits Symbol Parameter Test Conditions
Min Typ
(Notes)
Max
Units
f
SCL
= 100 kHz (Read)
2 3 mA
f
SCL
= 100 kHz (Write)
8 11 mA
f
SCL =
400 KHZ (Read)
2 3 mA
f
SCL =
400 kHz (Write)
8 11 mA
f
SCL
= 1.7 MHz (Read)
5 7 mA
f
SCL =
1.7 MHz (Write)
8 11 mA
f
SCL
= 3.4 MHz (Read)
5 7 mA
I
CCA
Active Power Supply
Current
f
SCL
= 3.4 MHz (Write)
8 11 mA
ISB
Standby Current (L)
V
IN
= GND or V
CC
0.5 1
µA
Standby Current (LZ)
V
IN
= GND or VCC
0.2 0.7
µA=
IIL
Input Leakage Current
V
IN
= GND to V
CC
0.1 1
µA
IOL
Output Leakage Current
V
OUT
= GND to V
CC
0.1 1
µA
VIL
Input Low Voltage
-0.3 VCC x 0.3 V
V
IH
Input High Voltage
VCC x 0.7 VCC + 0.5 V
V
OL
Output Low Voltage IOL = 3 mA
0.4 V
Notes
(1) Typical values are TA = 25 °C and nominal supply voltage of 3 volts.
(2) Write frequency is 50 Hz.
Capacitance
T
A
= +25°C, f = 100/400 kHz/1.7 MHz/3.4 MHz, V
CC
= 3V (Note 2)
Symbol Test Conditions Max Units
C
I/O
Input/Output
Capacitance (SDA)
V
I/O =
0V 8 pF
CIN Input Capacitance
(A0, A1, A2, SCL)
V
IN
= 0V 6 pF
Notes:
(1) This parameter is periodically sampled and not 100% tested.
(2) Typical values are T
A
= 25°C and nominal supply voltage of 3 volts.
SA24C512 Datasheet
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AC Test Conditions
Input Pulse Levels VCC x 0.1 to VCC x 0.9
Input Rise and Fall Times 10 ns
Input & Output Timing Levels
VCC x 0.3 to V
CC
x 0.7
Output Load 1 TTL Gate and CL = 100 pF
AC Testing Input/Output Waveforms
Figure 5. AC Testing Input/Output Waveforms
AC Characteristics (VCC 2.7V to 3.6V)
100 kHz 400 kHz 1.7 MHz 3.4 MHz Symbol Parameter
Min Max Min Max Min Max Min Max
Units
f
SCL
SCL Clock Frequency 100 400 1700 3400 kHz
t
LOW
Clock Low Period 4700 1300 320 160 ns
t
HIGH
Clock High Period 4000 600 120 60 ns
tSU:STA
START Condition Setup Time (for a Repeated START Condition)
4700 600 160 160 ns
t
HD:STA
START Condition
Hold Time (for a Repeated START Condition)
4000 600 160 160 ns
t
SU:STO
STOP Condition
Setup Time
4000 600 160 160 ns
t
RDA
SDA Rise Time
(depend on external pull-up)
1000 300 20 170 10 85 ns
t
FDA
SDA Fall Time 300 300 20 170 10 85 ns
t
RCL
SCL Rise Time
(depend on external pull-up)
1000 300 20 80 10 40 ns
t
FCL
SCL Fall Time 300 300 20 80 10 40 ns
t
RCL1
SCL Rise Time after
repeated START or after ACK bit
NA NA NA 20 160 10 80 ns
t
SU:DAT
Data in Setup Time 250 100 20 20 ns
t
HD:DAT
Data in Hold Time 0 0 0 0 ns
tDH Data Out Hold Time 300 100 0 0 ns
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