ROHM BU9829GUL-W Technical data

A
WL-CSP EEPROM family SPI BUS
BU9829GUL-W
Description
BU9829GUL-W is Serial EEPROM built-in LDO regulator by SPI BUS interface.
Features EEPROM PART
1) 2,048 words×8 bits architecture serial EEPROM
2) Wide operating voltage range (1.6V~3.6V)
3) Serial Peripheral Interface
4) Self-timed write cycle with automatic erase
5) Low Power consumption Write (3.6V) : 1.5mA (Typ.) Read (3.6V) : 0.5mA (Typ.) Standby (3.6V) : 0.1µA (Typ.)
6) Auto-increment of registers address for Read mode
7) 32 byte Page Write mode
8) DATA security Defaults to power up with write-disabled state Software instructions for write-enable/disable Block writes protection by status register Write inhibit at low Vcc
9) Initial data FFh in all address, 00h in status register and 10 in VSET[1:0].
10) Data retention: 10 years
11) Endurance : 100,000 erase/write cycles LDO REGULATOR PART
12) Low power consumption Standby (3.6V) : 0.1 µA (Typ.) Operation (3.6V) : 0.1mA (Typ.)
13) Power on/off by enable pin
14) Initial LDO output voltage 2.9V
15) Setting output voltage by EEPROM command (VSET WRITE)
Absolute maximum rating (Ta=25℃)
Parameter Symbol Rating Unit
Supply Voltage
Power Dissipation Pd 220 mW Storage Temperature Tstg -65 125 Operating Temperature Topr -30 ~ 85 Terminal Voltage -0.3~Vcc+0.3 V
EEPROM recommended operating condition
Parameter Symbol Rating Unit
Supply Voltage Vcc1 1.6~3.6 Input Voltage VIN 0~Vcc1
LDO regulator recommended operating condition
Parameter Symbol Rating Unit
Supply Voltage Vcc2 2.9~3.6 Input Voltage VIN 0~Vcc2
Vcc1(EEPROM)
Vcc2(LDO)
-0.34.5 V
No.10001EAT13
V
V
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1/16
2010.09 - Rev.
BU9829GUL-W
A
Technical Note
Memory cell characteristics (Ta=25, Vcc1=1.63.6V) Input/output capacity (Ta=25, Frequency=5MHz)
Parameter
Write/Erase Cycle *1 100,000 Cycle Input Capacitance *1CIN VIN=GND 8pF
Min. Typ. Max. Min. Max.
Data Retention *1 10 Year Output Capacitance*1C
*1 : Not 100% tested *1:Not 100% TESTED
Limits
Unit Parameter Symbol Conditions
OUTVOUT
=GND 8pF
Limits
Unit
EEPROM DC operating characteristics (Unless otherwise specified, Ta=-30~85, Vcc1=1.6~3.6V)
Parameter Symbol
Min. Typ. Max.
Limits
Unit Test condition
"H" Input Voltage1 VIH1 0.7xVcc1 - Vcc1+0.3 V 2.5≦Vcc1≦3.6V "H" Input Voltage2 VIH2 0.75xVcc1 - Vcc1+0.3 V 1.6≦Vcc1<2.5V "L" Input Voltage1 VIL1 -0.3 0.3xVcc1 V 2.5V≦Vcc1≦3.6V "L" Input Voltage2 VIL2 -0.3 0.25xVcc1 V 1.6V≦Vcc1<2.5V "L" Output Voltage1 VOL1 0 0.2 V IOL=1.0mA , 2.5V≦Vcc1≦3.6V "L" Output Voltage2 VOL2 0 0.2 V IOL=1.0mA , 1.6V≦Vcc1<2.5V "H" Output Voltage1 VOH1 Vcc1-0.2 Vcc1 V IOH=-0.4mA , 2.5V≦Vcc1≦3.6V "H" Output Voltage1 VOH2 Vcc1-0.2 Vcc1 V IOH=-100µA , 1.6V≦Vcc1<2.5V Input Leakage Current ILI -1 1 µA VIN=0~Vcc1 Output Leakage Current ILO -1 1 µA VOUT=0~Vcc1 , CSB=Vcc1
ICC1 1.5 mA
Operating Current Write
ICC2 2.0 mA
ICC3 0.2 mA
Operating Current Read
ICC4 0.6 mA
Standby Current ISB 1.0 µA
This product is not designed for protection against radioactive rays.
Vcc1=1.8V , fSCK =2MHz, tE/W=5ms Byte Write, Page Write, Write Status Register
Vcc1=2.5V , fSCK =5MHz,tE/W=5ms Byte Write, Page Write, Write Status Register
Vcc1=1.8V , fSCK=2MHz , SO=OPEN Read, Read Status Register
Vcc1=2.5V , fSCK=5MHz,SO=OPEN Read, Read Status Register
Vcc1=3.6V , CSB=Vcc1 , SCK , SI=Vcc1/GND ,SO=OPEN
EEPROM AC operating characteristics (Ta=-3085)
Parameter Symbol
1.6VCC11.8V 1.8VCC13.6V
Min. Typ. Max. Min. Typ. Max.
Unit
SCK clock Frequency fSCK 2.5 5 MHz SCK High Time tSCKWH 200 80 ns SCK Low Time tSCKWL 200 80 ns CSB High Time tCS 200 90 ns CSB Setup Time tCSS 150 60 ns CSB Hold Time tCSH 150 60 ns SCK Setup Time tSCKS 50 50 ns SCK Hold Time tSCKH 50 50 ns SI Setup Time tDIS 50 20 ns SI Hold Time tDIH 50 20 ns Output Data Delay Time tPD 100 80 ns Output Hold Time tOH 0 0 ns Outuput Disable Time SCK Rise Time SCK Fall Time Output Rise Time Output Fall Time
*1
tOZ 200 80 ns
*1
tRC 1 1 µs
*1
tFC 1 1 µs
*1
tRO 50 50 ns
*1
tFO 50 50 ns
Write Cycle Time tE/W 5 5 ms
Wait Time From Vcc1 ON To EEPROM Command
*1 : Not 100% tested
tON 15 - 15 - - ms
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2/16
2010.09 - Rev.
BU9829GUL-W
A
Technical Note
Synchronous data input/output timing
VCC1
CSB
SCK
SI
SO
tON
tSCKS
tCSS
tSCKWL tSCKWH
tDIH
tDIS
Hi-Z
tRC
CSB
SCK
tFC
SI
SO
tPD
tOH
tCSH
tRO,tFO
tCS
tSCKH
tOZ
Hi-Z
Fig.1 Input timing
Fig.2 Input and output timing
SI data is latched into the chip at the rising edge of SCK clock. Address and data must be transferred from MSB.
SO data toggles at the falling edge of SCK clock. Output data toggles from MSB.
AC condition
Parameter Symbol
Limits
Min. Typ. Max.
Unit
Load Capacitance CL - - 100 pF
Input Rise times - - - 50 ns
Input Fall times - - - 50 ns
Input Pulse Voltage - 0.25Vcc1/0.75Vcc1 V
Input and Output Timing Reference Voltages - 0.3VCc1/0.7Vcc1 V
Pin configuration Pin function
Land
No.
C
C1
B
B1
A
A1
C2
B2
A2
C3
B3
A3
INDEX POST
A1 Vcc1 Power Supply (EEPROM)
A2 CSB IN Chip Select Control
A3 SCK IN Serial Data Clock Input B1 Vcc2 Power Supply (LDO)
B2 SI IN Start Bit, Op.code, Address, Serial Data Input
Pin
Name
I/O Function
B3 SO OUT Serial Data Output
1
2
3
C1 V
OUT LDO Regulator Output
OUT
C2 GND Ground (0V)
Fig.3 Pin configuration (bottom view)
C3 LDOEN IN LDO Regulator Enable
LDO regulator DC operating characteristics (Unless otherwise specified Ta=-30~85)
Parameter Symbol
Specification
Min. Typ. Max.
Unit test condition
Output Voltage1-1 VOUT1-1 2.9 3.0 3.2 V 3.2V≦Vcc2≦3.6V, IOUT=0, 2mA, VSET=1, 0=[1:1] Output Voltage1-2 VOUT1-2 2.9 3.0 3.1 V 3.2V≦Vcc2≦3.6V, IOUT=2, 10mA, VSET=1, 0=[1:1] Output Voltage2-1 VOUT2-1 2.8 2.9 3.1 V 3.1V≦Vcc2≦3.6V, IOUT=0, 2mA, VSET=1, 0=[1:0] Output Voltage2-2 VOUT2-2 2.8 2.9 3.0 V 3.1V≦Vcc2≦3.6V, IOUT=2, 10mA, VSET=1, 0=[1:0] Output Voltage3-1 VOUT3-1 2.7 2.8 3.0 V 3.0V≦Vcc2≦3.6V, IOUT=0, 2mA, VSET=1, 0=[0:1] Output Voltage3-2 VOUT3-2 2.7 2.8 2.9 V 3.0V≦Vcc2≦3.6V, IOUT=2, 10mA, VSET=1, 0=[0:1] Output Voltage4-1 VOUT4-1 2.6 2.7 2.9 V 2.9V≦Vcc2≦3.6V, IOUT=0, 2mA, VSET=1, 0=[0:0] Output Voltage4-2 VOUT4-2 2.6 2.7 2.8 V 2.9V≦Vcc2≦3.6V, IOUT=2, 10mA, VSET=1, 0=[0:0]
Operating Current ICC - - 200 µA Vcc2=3.6V, IOUT=0A
Standby Current ISB - - 1.0 µA Vcc2=3.6V, IOUT=0A, LDOEN=GND “H” Input Voltage VIH 1.4 - Vcc2+0.3 V 2.9V≦Vcc2≦3.6V “L” Input Voltage VIL -0.3 - 0.6 V 2.9V≦Vcc2≦3.6V
This product is not designed for protection against radioactive rays.
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3/16
2010.09 - Rev.
BU9829GUL-W
A
r
y
Technical Note
LDO regulator AC operating characteristics
Parameter Symbol
Specification
Min. Typ. Max.
Unit Test condition
Vcc1 Rise Time tVCC1 - - 5 msec VCC1 x 0%VCC1 x 95% point
LDOEN Wait Time tLDOEN 15 - - msec VCC1 x 0%point LDOEN=High
Output voltage depend on VSET bit The 2bit data are stored into the VSET memory and output voltage change among VOUT1~VOUT4. VSET data are Written into non-volatile memory array. Initial VSET data is 1,0 in VSET[1:0] and VOUT is 2.9V.
STEP VOUT(typ.) [V] VSET1 VSET0
VOUT1 VOUT2 VOUT3 VOUT4
3.0
2.9
2.8
2.7
1 1 0 0
1 0 1 0
Input power supply regulation timing
Using EEPROM PART
In case of using EEPROM part, be sure to raise Vcc1 up to operating voltage. In this time, Vcc2 has no connection with operating.
Vcc1
EEPROM
EEPROM
Power Supply
Vcc2
LDOレー
LDO regulator
Power Supply
Not
作不可 EEPROM動作可能範囲 動作不可 EEPROM動作可能範囲 動作不可
Operating
Operating
Not Operating
Operating
Not Operating
Fig.4 Using EEPROM Part, Regulation Timing
Using LDO regulator part
In case of using LDO regulator part, be sure to raise Vcc1 and Vcc2 up to operating voltage. After rising Vcc1, wait 15msec and rising LDOEN. When LDOEN is raised, Vcc1 must be operating voltage.
tVcc1:MAX 5msec
tVcc1:MAX 5msec
Vcc1
EEPROM
Power Suppl
Vcc2
LDO regulato
Power Supply
LDOEN
t
LDOEN : MIN 15msec
t
LDOEN : MIN 15msec
Not Operating
Operating
Not Operating
Operating
Not Operating
Fig.5 Using LDO Regulator Part, Regulation Timing
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© 2010 ROHM Co., Ltd. All rights reserved.
4/16
2010.09 - Rev.
BU9829GUL-W
A
Block diagram
CSB
SCK
INSTRUCTION
DECODE
CONTROL CLOCK
GENERATION
SI
INSTRUCTION
REGISTER
ADDRESS
REGISTER
INHIBITION
DETECTION
WRITE
11bit
VOLTAGE
ADDRESS
DECODER
SO
DATA
REGISTER
8bit
VOUT
AMP
+
B.R
RESISTOR
Fig.6 Block diagram
Characteristic data (The following characteristic data are typical values.)
5
Ta=-30℃
4
Ta=25℃ Ta=85℃
3
VIH[V]
2
1
0
01234
Fig.7  "H" input voltage VIH (EEPROM)
3
2.5
2
1.5
VOH[V]
1
0.5
0
0 0.4 0.8 1.2
4
3
SPEC
Vcc[V]
SPEC
Ta=-30℃ Ta=25℃ Ta=85℃
IOH[mA]
Fig.10 "H" output voltage VOH
fSCK=2MHz DATA=00h
SPEC
2
ICC1[mA]]
1
0
01234
Fig.13 Current consumption at WRITE operation ICC1
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SPEC
© 2010 ROHM Co., Ltd. All rights reserved.
Vcc[V]
Ta=-40℃ Ta=-30℃ Ta=25℃ Ta=85℃
5
Ta=-30℃
4
Ta=25℃ Ta=85℃
3
VIL[V]
2
1
0
01234
Fig.8  "L" input voltage VIL (EEPROM)
5
4
Ta=-30℃ Ta=25℃
3
Ta=85℃
ILI[μA]
2
1
0
01234
Fig.11 Input leak current ILI
2.5
fSCK=2MHz
2
DATA=AAh
1.5
1
ICC3(READ)[mA]
0.5
0
01234
Fig.14 Consumption Current at READ operation ICC3
SPEC
Vcc[V]
Vcc[V]
Vcc[V]
SPEC
Ta=-30℃ Ta=25℃ Ta=85℃
5/16
HIGH VOLTAGE
GENERATOR
11bit
16,384 bit
EEPROM
R/W
8bit
AMP
LDOEN
2bit
VOUT SETTING REGISTER
1
Ta=-30℃ Ta=25℃
0.8
Ta=85℃
0.6
VOL[V]
0.4
0.2
SPEC
0
0123
5
4
Ta=-30℃ Ta=25℃
3
Ta=85℃
ILO[μA]
2
1
0
01234
Fig.12 Output leak current ILO
12
10
Ta=-30℃ Ta=25℃ Ta=85℃
8
6
ISB[μA]
4
2
0
01234
Fig.15 Standby operation ISB (EEPROM)
Technical Note
SPEC
IOL[mA]
Fig.9 "L" output voltage VOL
SPEC
VOUT[V]
SPEC
Vcc[V]
2010.09 - Rev.
BU9829GUL-W
A
(
)
Characteristic data
100
10
fSCK[MHz]
1
Ta=-30℃ Ta=25℃ Ta=85℃
0.1 01234
250
200
Ta=-30℃ Ta=25℃
150
Ta=85℃
tCS[ns]
100
50
0
01234
60
40
Ta=-30℃ Ta=25℃ Ta=85℃
tDIS[ns]
20
SPEC
Vcc[V]
Fig.16 SCK frequency fSCK
SPEC
Vcc[V]
Fig.19 CSB high time tCS
SPEC
SPEC
SPEC
SPEC
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© 2010 ROHM Co., Ltd. All rights reserved.
0
01234
250
200
Ta=-30℃ Ta=25℃
150
Ta=85℃
tOZ [ns]
100
50
0
01234
3
2.5
Ta=-30℃ Ta=25℃ Ta=85℃
2
1.5
VIH[V]
1
0.5
0
01234
Fig.28 "H" input voltage VIH (L DO)
3.2
3.1
3
VOUT[V]
2.9
2.8
2.7
0246810121416
Vcc[V]
Fig.22 SI setup time tDIS
SPEC
Fig.25 Output disable time tOZ
SPEC
Vcc[V]
Vcc[V]
Ta=-30℃ Ta=25℃ Ta=85℃
SPEC
SPEC
Iout[mA]
Fig.31 Vout response (LDO)
VSET=1,0
SPEC
SPEC
250
200
150
100
tSCKWH [ns]
50
0
01234
200
160
120
tCSS[ns]
80
40
0
01234
60
40
tDIH[ns]
20
0
01234
8
6
4
tE/W[ms]
2
0
01234
3
2.5
2
1.5
VIL[V]
1
0.5
0
250
200
150
ICC[uA]
100
50
SPEC
Ta=-30℃ Ta=25℃ Ta=85℃
Vcc[V]
Fig.17 SCK high time tSCKWH
SPEC
Ta=-30℃ Ta=25℃ Ta=85℃
Vcc[V]
Fig.20 CSB setup time tCSS
SPEC
Ta=-30℃ Ta=25℃ Ta=85℃
Vcc[V]
Fig.23 SI hold time tDIH
SPEC
Ta=-30℃ Ta=25℃ Ta=85℃
Vcc[V]
Fig.26 Write cycl e time tE/W
Ta=-30℃ Ta=25℃ Ta=85℃
01234
Fig.29 "L" input voltage VIL (LDO)
Ta=-30℃ Ta=25℃ Ta=85℃
0
01234
Fig.32 Current consumption ICC (LDO)
Vcc[V]
Vcc[V]
SPEC
SPEC
SPEC
SPEC
SPEC
6/16
Technical Note
250
200
Ta=-30℃
150
Ta=25℃ Ta=85℃
100
tSCKWL [ns]
50
0
01234
200
160
Ta=-30℃
120
Ta=25℃ Ta=85℃
tCSH[ns]
80
40
0
01234
120
100
80
60
tPD [ns]
40
20
0
01234
8
6
Ta=-30℃
4
Ta=25℃
ISB[us]
Ta=85℃
2
0
01234
Fig.27 Standby operation ISB (LDO)
160
120
Ta=-30℃ Ta=25℃ Ta=85℃
80
tVcc1[us]
40
0
01234
SPEC
SPEC
Vcc[V]
Fig.18 SCK low time tSCKWL
SPEC
SPEC
Vcc[V]
Fig.21 CSB hold time tCSH
SPEC
SPEC
Ta=-30℃ Ta=25℃ Ta=85℃
Vcc[V]
Fig.24 Data output delay time tPD
Vcc[V]
=
Vcc[V]
Fig.30 Vcc1 rise time tVcc1
2010.09 - Rev.
SPEC
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