ROHM BU9798KV Technical data

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Multifunction LCD Segment Driver
BU97930MUV MAX 108 segments (SEG27×COM4)
Features
Integrated RAM for display data (DDRAM):
27 x 4 bit (Max 108 Segment)
LCD drive output:
4 Common output, Max 27 Segment output
Integrated 1ch LED driver circuit Segment /GPO(Max 4port) output mode selectable Support PWM generation from ext. or internal clock
(Resolution: 8bit)
Support standby mode Integrated Power-on-Reset circuit (POR) Integrated Oscillator circuit No external component Low power consumption design Independent power supply for LCD driving Support Blink function
(Blink frequency 1.6, 2.0, 2.6, 4.0Hz selectable)
Applications
 Telephone  FAX  Portable equipment (POS, ECR, PDA etc.)  DSC  DVC  Car audio  Home electrical appliance  Meter equipment
etc.
Ty pical A pplication Circuit
LED/GPO using case
5.0V
3.3V
VSS
VLCD
VDD
BU97930MUV
Input signal from controlle
INHb
Key Specifications
Supply Voltage Range: +1.8V to +3.6V
LCD drive power supply Range: +2.7V to +5.5V
Operating Temperature Range: -40°C to +85°C
Max Segments: 108 Segments
Display Duty: Static, 1/3, 1/4 selectable
Bias: Static, 1/3
Interface: 3wire serial interface
Package W (Typ.) x D (Typ.) x H (Max.)
QFN040V6060
6.00mm x 6.00mm x 1.00mm
VLED=5.0V
arding resistor value
*Re
Please detect the value accordin
ut current value
in
LED
SEG26
GPO1
to
GPO4
SEG23
to
to
SEG
COM3
22
CLKINCSB SD SCL
CLKIN
External CLK input terminal
If not in use, , connect to VSS or o
SEG0
COM0
Datashee
to
current MAX = 20m
Othe
device
LCD
en .
Figure 1. T ypical application circuit
Product structureSilicon monolithic integrated circuitThis product is not designed for protection against radioactive rays.
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Datasheet
BU97930MUV MAX 108 segments (SEG27×COM4)
r
r
(typ=40.96
12345678910302928272625242322
21
Datasheet
Block Diagram / Pin Configuration / Pin Description
VLCD
LCD voltage
G enerator
COM0……COM3
common
drive
SEG0 …...22 SEG23...26
Segment
driver
LCD
BIAS
SELECTOR
common
counter
blink timing
generator
GPO data latch
divider
(Div.2)
Command
Data
CSB
Decoder
serial inter face
IF FILTER
SD
Power On
Reset
INHb
CLKIN
VDD
VSS
VSS
CR O
OS C block
kHz
DDRAM
SCL
Segment
driver/GPO
Controlle
GPO
LED
LED
drive
PWM
Generator
CSB
SCL
SD
VDD
INHb
CLKIN
VLCD
COM0
COM1
COM2
40
VSS COM3
39
LED SEG0
38
SEG26 SEG1
37
SEG25 SEG2
36
SEG24 SEG3
35
SEG23 SEG4
34
SEG22 SEG5
33
SEG21 SEG6
32
SEG20 SEG7
31
SEG19 SEG8
SEG18
SEG17
SEG16
EXT-PAD
SEG15
SEG14
SEG13
SEG12
SEG11
11
12
13
14
15
16
17
18
19
20
SEG10
SEG9
Figure 2. Block Diagram Figure 3. Pin Configuration (BOTTOM VIEW)
Table 1 Pin Description
Terminal
CSB 1 I - Chip select: "L" active
SCL 2 I - Serial data transfer clock
SD 3 I - Input serial data
VDD 4 - - Power supply for LOGIC
CLKIN 6 I OPEN / VSS
VSS 40 - - GND
VLCD 7 - - Power supply for LCD
INHb 5 I VDD
COM0 to 3 8 to 11 O OPEN COMMON output for LCD
Terminal
number
I/O unused case Function
External clock input terminal (for display/PWM using selectable); Support Hi-Z input mode at internal clock mode
Display turning on/off select terminal H: turning on display, L: turning off display
INHb = “L”: All SEG/COM terminals : output VSS level GPO terminal : output VSS level LED drive terminal : output Hi-Z
SEG0 to 22 12 to 34 O OPEN SEGMENT output for LCD
SEG23 to 26 35 to 38 O OPEN SEGMENT output for LCD/GPO
LED 39 O OPEN LED driver output
EXT-PAD - - VSS substrate
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Datasheet
BU97930MUV MAX 108 segments (SEG27×COM4)
Absolute Maximum Ratings (VSS=0V)
Parameter Symbol Ratings Unit Remarks
Power supply voltage 1 VDD -0.3 to +4.5 V Power supply Power supply voltage 2 VLCD -0.5 to +7.0 V Power supply for LCD Power Dissipation Pd 0.8* Input voltage range VIN -0.5 to VDD+0.5 V Operational temperature range Topr -40 to +85 Storage temperature range Tstg -55 to +125
Iout1 5 mA SEG output
Output current
*1 When operated higher than Ta=25℃, subtract 8.0mW per degree. (using ROHM standard board) (board size: 74.2mm×74.2mm×1.6mm material: FR4 board copper foil: land pattern only).
Recommended Operating Ratings(Ta=-40°C to +85°C,VSS=0V)
Parameter Symbol
Power supply voltage 1 VDD 1.8 - 3.6 V Power supply Power supply voltage 2 VLCD 2.7 - 5.5 V Power supply for LCD Output current Iout4 - - 20 mA Per LED port 1ch
Electrical Characteristics
DC characteristics (Ta=-40°C to +85°C, VDD=1.8V to 3.6V, VLCD=2.7V to 5.5V, VSS=0)
Parameter Symbol
“H” level input voltage VIH 0.8VDD - VDD V SD, SCL, CSB, CLKIN, INHb “L” level input voltage VIL VSS - 0.2VDD V SD, SCL, CSB, CLKIN, INHb Hysteresis width VH - 0.2 - V SCL, INHb, VDD=3.3V, Ta=25°C
“H” level input current IIH1 - - 5 µA “L” level input current IIL1 -5 - - µA
VOH1
“H” level output voltage (*2)
“L” level output voltage (*2)
Current consumption (*1)
*1 Power save mode 1 and frame inversion setting *2 Iload: In this case, load current from only one port
VOH2 VOH3
VOL1 - - 0.4 V VOL2 - - 0.4 V VOL3 - - 0.5 V VOL4 - 0.11 0.5 V
IstVDD - 3 10 µA
IstVLCD - 0.5 5 µA
IVDD1 - 8 15 µA
IVDD2 - 30 45 µA
IVLCD1 - 10 15 µA
IVLCD2 - 30 48 µA
Iout2 5 mA COM output Iout3 10 mA GPO output Iout4 50 mA LED output
Ratings
MIN TYP MAX
Limit
MIN TYP MAX
VLCD
-0.4
VLCD
-0.4
VLCD
-0.6
- - V
- - V
- - V
1
Unit Remarks
Unit Condition
W
SD, SCL, CSB, CLKIN, INHb, VI=3.6V SD, SCL, CSB, CLKIN, INHb, VI=0V Iload=-50µA, VLCD=5.0V SEG0 to SEG26 Iload=-50µA, VLCD=5.0V, COM0 to COM3 Iload=-1mA,VLCD=5.0V, SEG23 to SEG26(GPO mode) Iload= 50µA, VLCD=5.0V, SEG0 to SEG26 Iload= 50µA, VLCD=5.0V, COM0 to COM3 Iload=1mA, VLCD=5.0V, SEG23 to SEG26(GPO mode) Iload=20mA, VLCD=5.0V, LED Input terminal ALL’L’, Display off, Oscillation off Input terminal ALL’L’, Display off, Oscillation off VDD=3.3V, Ta=25°C, 1/3bias, fFR=64Hz, PWM generate off, All output pin open VDD=3.3V, Ta=25°C, 1/3bias, fFR=64Hz, PWM Frequency=500Hz setting, All output pin open VLCD=5.0V, Ta=25°C, 1/3bias, fFR=64Hz, LED generate off, All output pin open VLCD=5.0V , Ta=25, 1/3bias, fFR=64Hz, PWM Frequency=500Hz setting, All output pin open
Datasheet
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Datasheet
BU97930MUV MAX 108 segments (SEG27×COM4)
W
f
Electrical Characteristics – continued
Oscillation Frequency Characteristics (Ta=-40°C to +85°C, VDD=1.8V to 3.6V, VLCD=2.7V to 5.5V, VSS=0)
Parameter Symbol
Frame frequency 1 fFR1 57.6 64 70.4 Hz Frame frequency 2 fFR2 51.2 64 73.0 Hz Frame frequency 3 fFR3 45.0 - 64 Hz
MPU interface Characteristics (Ta=-40°C to +85°C, VDD=1.8V to 3.6V, VLCD=2.7V to 5.5V, VSS=0)
Parameter Symbol
Input rise time tr - - 50 ns Input fall time tf - - 50 ns SCL cycle time tSCYC 250 - - ns “H” SCL pulse width tSHW 50 - - ns “L” SCL pulse width tSLW 50 - - ns SD setup time tSDS 50 - - ns SD hold time tSDH 50 - - ns CSB setup time tCSS 50 - - ns CSB hold time tCSH 50 - - ns “H” CSB pulse width tCHW 50 - - ns
CSB
SCL
SD
tCSS
t
tSL
tSDS tSDH
MIN MIN MIN
MIN TYP MAX
tSCYC
tSHW
Limit
Limit
Unit Condition
VDD=3.3V, Ta=25°C, fFR=64Hz setting VDD=2.5 to 3.6V fFR=64Hz setting VDD=1.8 to 2.5V fFR=64Hz setting
unit Condition
tCSH
tr
Datasheet
tCHW
Figure 4. Serial interface timing
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Datasheet
BU97930MUV MAX 108 segments (SEG27×COM4)
I/O equivalent circuit
VLCD
VSS
VDD
CSB, SD, SCL,INHb
CLKIN
VSS
VLCD
SEG23-26
VSS
VDD
VSS
VLCD
SEG0-22
COM0-3
VSS
LED
VSS
Datasheet
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Figure 5. I/O equivalent circuit
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Datasheet
BU97930MUV MAX 108 segments (SEG27×COM4)
r
r
Example of recommended circuit
1) LED/GPO operation
2) SEG output only operation
5.0 V
3. 3V
VSS
VLCD VDD
BU97930MUV
Input signal from controlle
INHb
LED
CLKINCSB SD SCL
CLKIN
External CLK input terminal
In case being unused, connect to VSS
VLED =5. 0V
*Regarding resistor value
Please detect the value according to
input current value (
SEG26(GPO
to
SEG0
COM0 to COM3
1)
SEG23( GPO 4)
SEG22
to
Datasheet
current MAX = 20mA)
Othe
device
LCD
or be opened
.
VLCD
LED
VDD
OPEN if unused
BU97930MUV
5.0V 3.3V
VSS
Input signal from controller
INHb
CLKINCSB SD SCL
CLKIN
External CLK input terminal connect to VSS or open. If unused
SEG0
COM0toCOM3
Figure 6. Example of Recommended Circuit
to
SEG26
LCD
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Datasheet
BU97930MUV MAX 108 segments (SEG27×COM4)
CD/C
3
0
4D6D5
2
Datasheet
Function description
Command and data transfer method 3-SPI (3-wire serial interface)
This device is controlled by a 3-wire signal (CSB, SCL, and SD). First, Interface counter is initialized with CSB=“H". Setting CSB=”L”, enables SD and SCL inputs. The protocol of 3-SPI transfer is as follows. Each command starts with Command or Data judgment bit (D/C) as MSB data, followed by data D6 to D0 (this is when CSB =”L”). (Internal data is latched at the rising edge of SCL, serial data is converted to an 8-bit parallel data at the falling edge of the 8th CLK.)
When CSB changes from “L” to “H”, and at this time serial commands are less than 8 bits, command and data transfers are cancelled. To start sending command again, please set CSB=”L" and send command continuously.
After sending RAMWR or BLKWR or GPOSET command, this device is in the RAM data input mode. Under this mode, device can not accept new commands.
In this case, execute a “H” to “L” transition at CSB, after this sequence, the device is released from RAM data input mode, and can accept new command.
CSB
1st byte Command 2nd byte Command
3rd byte Command
SCL
SD
D/C
D3 D6D0 D0
D
D2
D/
D1 D
D5
D6D5D4D
D/CD4 D3 D2 D1
D1 D
D6
Figure 7. 3-SPI Data transfer Format
* 8-bit data, sending after RAMWR command, are display RAM data * 8-bit data, sending after BLKWR command, are blink RAM data * SCL and SD can be set to “H” or cleared to “L” during CSB=”H”.
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Datasheet
BU97930MUV MAX 108 segments (SEG27×COM4)
A
A
A
A
j
Datasheet
Write display data and transfer method
This device has Display Data RAM (DDRAM) of 28×4=112bit. The relationship between data input and display data, DDRAM data and address are as follows.
Command
1st Byte
10000011
ddress set
2nd Byte
Command
00000000
Command
10100000
RAM Write
a
b
Display RAM data
c
de
g
h
f
i
kl m
no
p
According to this command, an 8-bit binary data will be written to the DDRAM. The starting address of the DDRAM where data will be written is specified by “ADSET” command, and is automatically incremented for every 4 bits of data received..
Writing data to DDRAM can be done by continuously sending data. (In case data is sent continuously after write date at 1Ah (SEG26), RAM data will be written to 1Bh (dummy address) and return to address 00h (SEG0) automatically.)
In case SEG port assigned to GPO port by OUTSET command, corresponding SEG address do not change and used as dummy address.
DDRAM address
00 01 02 03 04 05 06 07
・・・
0 a e i m 1 b f j n 2 c g k o
BIT
3 d h l p
SEG
SEG
0
1
SEG
2
SEG
3
SEG4SEG5SEG6SEG
・・・
7
19h 1Ah 1Bh
SEG
25
SEG
26
ADDRESS
DUMMY
Display data write to DDRAM every 4 bits. In case CSB changes from ”L” to ”H” before 4 bits of data transfer was finished, RAM write is cancelled.
Command
Display data
CSB
1st byte Command / 2nd byte Command
COM0 COM1 COM2 COM3
SCL
SD D2 D5 D4 D3 D2 D1 D0
Internal signal RAM write
Address set command RAMWR command
Command
RAMWR command
CSB
SCL
Internal signal RAM write
1st byte Command / 2nd byte Command
Address set command
D6 D5 D4 D3D7 D1
ddress 00h
D7 D6SD
D4 D3 D2 D0
Address 00h
ddress 01h
RAM write every 4bit
Address 30h
D0 D7
D6
ddress 02h
Display data
D7
Address 31h
data lower than 4bit case
RAM write is canceled
D5
D5 D6
D4D4 D2 D1D5 D3
Addres00h
Auto increment
Return to address 00h
Figure 8. Display Data Transfer Method
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Datasheet
BU97930MUV MAX 108 segments (SEG27×COM4)
Blink function
This device has Blink function. Blink function can set each segment port individually. Blink ON/OFF and Blink frequency are set by the BLKSET command. Blink frequency varies according to fCLK characteristics. Blink setup of each segment is controlled by BLKWR command.
The write start address is specified by “BLKADSET” command. And this address will automatically increment every 4 bits of blink data received. The relation of BLKWR command, blink ram data, and blinking segment port is below.
In case data is “1”, segment will blink, on the other hand when data is “0”, segment will not blink. (In case data is written continuously after write data at 1Ah (SEG26), RAM data will be written to 1Bh (dummy address) and return to address 00h (SEG0) automatically.)
Please refer to the following figures about Blink operation of each segment. In case SEG port assigned to GPO port by OUTSET command, corresponding SEG address does not change and used
as dummy address.
1st Byte
Command
10000100
Command
Blink set
2nd Byte
00000011
1st Byte
Command
10000111
2nd Byte
Command
00000000
Blink Address set
Command
11000000
Blink
RAMWR
a
b
d
c
Blink RAM data
g
f
e
h i
j
k
m
n o
l
Blink RAM address
00 01 02 03 04 05 06 07
0 a e i m
・・・
19h 1Ah 1Bh
ADDRESS
DUMMY
1 b f j n COM1 2 c g k o COM2
BIT
3 d h l p COM3
SEG 0 SEG 1 SEG 2 SEG 3 SEG4 SEG5 SEG6 SEG
7
SEG
25
SEG
26
Datasheet
p
COM0
DDRAM data
SEG A SEG B SEG C SEG D
Blink RAM data
SEG A SEG B SEG C SEG D
Segment output
SEG A SEG B SEG C SEG D SEG A SEG B SEG C SEG D SEG A SEG B SEG C SEG D SEG A SEG B SEG C SEG D
under the 2Hz stting segment output will blink every 0.5 second (ON->OFF->ON)
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Blink frequency
Figure 9. Blink Operation
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Datasheet
BU97930MUV MAX 108 segments (SEG27×COM4)
LCD Driver Bias/Duty Circuit
BU97930MUV generates LCD driving voltage using an on-chip Buffer AMP. Also, it can drive LCD with low power consumption
*Line and frame inversion can be set by MODESET command. *1/4duty, 1/3duty and static mode can be set by DISCTL command.
About each LCD driving waveform, please refer to “LCD driving waveform” descriptions.
Initial state
Initial state after SWRST command input
Display off All command register values are in Reset state. DDRAM address data and Blink address data are initialized
(DDRAM data and Blink RAM data are not initializing. Please write DDRAM data and Blink RAM data before Display on.)
Command / Function list
Function description table
NO Command Function
1 Mode Set (MODESET) Sets LCD drive mode (display on/off, current mode) 2 Display control (DISCTL) 3 Address set (ADSET)
4 Blink set (BLKSET) 5 Blink address set (BLKADSET)
SEG/GPO port change
6
(OUTSET) LED drive control (PWMSET)
7
(H piece adjustment of PWM)
8 RAM WRITE (RAMWR) Writes display data to display data RAM
9 Blink RAM WRITE (BLKWR) Writes Blink data to BLINK data RAM 10 All Pixel ON (APON) Sets all Pixel display on 11 All Pixel OFF (APOFF) Sets all Pixel display off 12 All Pixel On/Off mode off (NORON) 13 Software Reset (SWRST) Software Reset 14
OSC external input (OSCSET)
15 GPO output set (GPOSET) Sets GPO output data
Sets LCD drive mode (frame freq., line/frame inversion)
Sets display data RAM address for RAMWR command Sets Blink mode on/off Sets Blink data RAM address for BLKWR command
Selects segment output/general purpose output (GPO) Sets PWM1 signal “H” width for LED driving
Sets normal display mode (APON/APOFF cancel)
Enables External clock input
Datasheet
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