ROHM BU9729K Datasheet
1
Standard ICs
Segment-type LCD driver
BU9729K
The BU9729K is a driver for segmented liquid crystal displays, which enables connection with a microcomputer
through a serial interface. 4-bit common output and an internal power supply circuit for LCD drive make it possible to
configure a low-cost display system.
1) Serial interface (8-bit length).
2) Display RAM: 72bits, internal (up to 72 segments
can be displayed).
3) Internal power supply circuit for liquid crystal drive.
4) Display duty: 1 / 4.
5) Low-voltage and low-current operation supported.
•
Block diagram
Serial
Interface
Address
Counter
LCD Driver
Bias Circuit
Display Data RAM
(DD RAM)
LCD
Segment
Driver
18bits
LCD
Common
Driver
4bits
COM1
SEG1
COM2
COM3
COM4
SD
Command / Data
Register
Command
Decoder
Timing
Generator
Common
Counter
OSC1
OSC2
SCK
C / D
CS
VLCD
SEG2
SEG18
VC
VDD
VSS
•
Features
•
Applications
Movie projectors, car audio equipment, telephones
2
Standard ICs BU9729K
•
Pin assignments
SEG10
SEG11 25
SEG12
SEG13
SEG14
SEG15
SEG16
SEG17
SEG18
OSC1
1234567
Fig.1
8
24 23 22 21 20 19 18 17
OSC2
V
SS
VC
VLCD
VDD
SCK
SD
SEG3
SEG2
SEG1
COM4
COM3
COM2
COM1
C / D
CS
SEG4
SEG5
SEG6
SEG7
SEG8
SEG9
26
27
28
29
30
31
32
16
15
14
13
12
11
10
9
3
Standard ICs BU9729K
•
Pin descriptions
I / OPin name Function
OSC1
OSC2
V
SS
VC
VLCD
VDD
SCK
SD
CS
C / D
COM1
~
COM4
SEG1
~
SEG18
I
O
—
—
—
I
I
I
I
O
O
Pin No.
1
2
3
4
5
6
7
8
9
10
11 ~ 14
15 ~ 32
These are the I / O pins for the internal oscillator.
Resistance should be connected between the pins when the internal clock is operating.
When an external clock is operating, input should be done from OSC1, and OSC2 should be left open.
This is the VSS pin.
This is the power supply pin for LCD drive.
The condition V
LCD ⭌ VC ⭌ VSS must be satisfied.
This is the V
DD pin.
This is the shift lock input pin for serial data.
The contents of the SD pin are read one bit at a time at the rising edge of this pin.
This is the serial data input pin.
Display data and commands are input here.
When this is
“0”, display data is not displayed, and when “1”, the data is displayed.
This is the chip select signal input pin.
When this is LOW, SD input can be received.
The SCK counter is incremented at the timing at which CS goes from HIGH to LOW.
This is the signal input which recognizes whether the SD input consists of commands or display data.
When the SCK of the eighth clock rises, this pin judges the input to be display data if the
le
vel is LOW, and a command if the level is HIGH.
These are the common output pins for LCD drive.
They are connected to the commons of the LCD panel.
These are the segment output pins for LCD drive.
They are connected to the segments of the LCD panel.
•
Absolute maximum ratings (Ta = 25°C, VSS = 0V)
Parameter Symbol Limits
Unit
Power supply voltage 1
Power supply voltage 2
Operating temperature
Storage temperature
Input voltage
Output voltage
V
DD
VLCD
Pd
T
opr
Tstg
VIN
VOUT
– 0.3 ~ + 7.0
– 0.3 ~ + 7.0
∗
1
400
∗
2
– 20 ~ + 75
– 55 ~ + 125
– 0.3 ~ V
DD + 0.3
– 0.3 ~ V
DD + 0.3
V
V
mW
°C
°C
V
V
∗
1 The condition VLCD ⭌ VC ⭌ VSS must be satisfied.
∗
2 Reduced by – 4.0mW for each increase in Ta of 1°C over 25°C.
Power dissipation
4
Standard ICs BU9729K
•
Recommended operating conditions (Ta = 25°C, VSS = 0V)
Parameter Symbol UnitMax.Typ.Min.
Power supply voltage 1
Power supply voltage 2
Oscillation frequency
V
DD
V
LCD
f
OSC
V
V
kHz
Conditions
2.5
2.5
—
5.5
5.5
—
—
—
36
—
The condition V
LCD
⭌ VC ⭌ VSS must be satisfied.
Rf
=
470k
Ω
•
Electrical characteristics
DC characteristics (unless otherwise noted, V
DD = 2.5V to 5.5V, VSS = 0V, Ta = 25°C)
Parameter
Symbol Min. Typ. Max. Unit Conditions
LCD driver on-resistance
∗
1
Input high level current 2
Input low level current
Input capacitance
Current consumption
Input high level voltage
Input low level voltage
V
IH1
V
IL1
R
ON
I
IL2
I
IH
C
I
I
DD
0.8
×
VDD
0
—
—
–
2
—
—
—
—
—
—
—
—
—
—
5
0.05
8
40
100
V
DD
0.2 ×
V
DD
30
2
—
—
1
25
80
250
kΩ
µA
µA
pF
µA
µA
µA
µA
V
V
∆V
ON
= 0.1V
V
IN
= 0
V
IN
= V
DD
While quiescent
∗
2
When “ALL OFF” is displayed
For display operations
∗
3
For access operations
∗
4
Applicable pin
OSC1, SD, SCK, C / D, CS
SEG1
~
32, COM1
~
4
OSC1, SD, SCK, C / D, CS
OSC1, SD, SCK, C / D ,CS
SD,SCK, C / D, CS
V
DD
∗
1 The internal power supply impedance is not included in the LCD driver on-resistance.
∗
2 All input is fixed at either VDD or VSS.
∗
3 Except for Rf = 470kΩ and OSC1, all input is fixed at VDD or VSS.
∗
4 Rf = 470kΩ, fSCK = 200kHz.
—
——
—
AC characteristics (unless otherwise noted, VDD = 2.5V to 5.5V, VSS = 0V, Ta = 25°C)
t
SU2
t
H2
t
SU3
t
H3
t
CCH
t
SCH
100
100
100
100
100
100
—
—
—
—
—
—
—
—
—
—
—
—
ns
ns
ns
ns
ns
ns
8th rise of SCK used as reference
CS rise used as reference
8th fall of SCK used as reference
∗
5 Should satisfy either one of these conditions.
Parameter
Symbol Min. Typ. Max. Unit Conditions
SCK rise time
SCK fall time
SCK cycle time
Command wait time
SCK pulse width HIGH
SCK pulse width LOW
Data setup time
Data hold time
CS pulse width HIGH
CS pulse width LOW
CS setup time
CS hold time
C / D setup time
C / D hold time
C / D-CS time
∗
5
C / D-SCK time
∗
5
t
TLH
t
THL
t
CYC
t
WAIT
t
WH1
t
WL1
t
SU1
t
H1
t
WH2
t
WL2
—
—
800
800
300
300
100
100
300
6400
—
—
—
—
—
—
—
—
—
—
100
100
—
—
—
—
—
—
—
—
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
—
—
—
—
—
—
—
—
—
—
—
—
—
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