ROHM BU8272GUW Technical data

GPIO ICs Series
GPIO Expander IC
Description GPIO expander is useful especially for the application that is in short of IO ports. It can
1. Control GPIO output states by I
2. Know GPIO input states by I Furthermore,it has the interrupt function that can release CPU from polling the registers in the GPIO expander. GPIO expander are also equipped with Built-in power on reset, 3V tolerant input,and NMOS open-drain output.
Features
1) 400Kbps, 2-Wire serial interface
2) Interrupt output
3) 20-bit General purpose input/output interface
8-bit and 12-bit IO groups are designed for different power supply voltages from the device core voltage supply
Absolute Maximum Ratings
(Ta=25℃)
Item Symbol Value Unit comment
Supply Voltage
Input voltage VI
Storage temperature range Tstg -55 ~ +125 Package power PD 310 *2 mW -
*1
The input voltage range doesn't exceed absolute maximum ratings even including +0.5 V.
*2
Package dissipation will be reduced each 3.1mW/
This IC is not designed to be X-ray proof.
Recommended Operating Conditions
(Ta=-25
o
C ~+85 oC)
2
C write protocol.
2
C read protocol.
VDD -0.3 ~ +2.5 V -
VDDI2C -0.3 ~ +3.5 V -
VDDIO -0.3 ~ +3.5 V -
-0.3 ~ VDD +0.5
*1
V CMOS Core
-0.3 ~ VDDI2C +0.5 *1 V CMOS I/O for 2-Wire
-0.3 ~ VDDIO +0.5 *1 V CMOS I/O
o
C -
o
C when the ambient temperature increases beyond 25 oC.
No.09098EAT01
Item Symbol
Unit Condition
Min Typ Max
Limit
Supply voltage (VDD V Supply voltage(VDDI2C) V Supply voltage(VDDIO1) V Supply voltage(VDDIO2) V 2-Wire operating Frequency F
1.65 1.80 1.95 V Core
VDD
1.65 - 3.45 V 2-Wire,INT,ADR, XRST
VDDI2C
1.65 - 3.45 V GPIO[7:0]
VDDIO1
1.65 - 3.45 V GPIO[19:8]
VDDIO2
- - 400 KHz Slave
I2C
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© 2009 ROHM Co., Ltd. All rights reserved.
2009.09 - Rev.A
BU8272GUW
Package SpecificationVBGA035W040
Technical Note
Fig.1 Package Specification
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© 2009 ROHM Co., Ltd. All rights reserved.
2009.09 - Rev.A
BU8272GUW
Pin Diagram
F
E
D
C
B
A
VDDI2C VDDIO2GPIO18 GPIO16 GPIO14 GPIO13
VDD VDDIO1GPIO0 GPIO1 GPIO3
INT GPIO7GPIO2 GPIO4 GPIO6
SCL
GND
GND GND
GPIO5
GPIO9
ADR GPIO10SDA GND GND GPIO11
1
2
3
4
5
Technical Note
GPIO8XRST
GPIO12GPIO19 GPIO17 GPIO15 VDD
6
Fig.2 Pin DiagramBottom View
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© 2009 ROHM Co., Ltd. All rights reserved.
2009.09 - Rev.A
BU8272GUW
Block Diagram
INT
VDDI2C
ADR
SCL
SDA
XRST
VDD
Input Filter
Reset
Functional Block Diagram
Interrupt
Logic
I2C Bus Control
Fig.3 Functional Block Diagram
INT_MASK
IN/OUT
Control
Shift
Register
Write Pulse Read Pulse
8bit
12bit
GPIO
[7:0]
GPIO [19:8]
Technical Note
VDDIO1
8bit
GPIO[7:0]
12bit
GPIO[19:8]
VDDIO2
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© 2009 ROHM Co., Ltd. All rights reserved.
2009.09 - Rev.A
BU8272GUW
Electrical Specification
VDD=1.8V, VDDIO=3.0V, VDDI2C=3.0V, Ta=25 oCwithout output load conditions
Item Symbol
Min. Typ. Max. Input H Voltage VIH 0.75xVDDIO - - V ­Input L Voltage VIL - - 0.25xVDDIO V -
Limit
Unit comment
Technical Note
Input H Current IIH 0 - 3 Input L Current IIL -3 - 0 Output H Voltage VOH VDDIO0.2 - - V IOH=-1.0mA Output L Voltage VOL - - 0.2 V IOL=1.0mA SCL clk frequency fSCL - - 400 KHz Bus free time tBUF 1.3 - ­repeatStart condition
Setup Time
repeatStart condition
Hold Time
SCL Low Time tLOW 1.3 - ­SCL High Time tHIGH 0.6 - ­Data Setup Time tSU:DAT 100 - - ns Data Hold Time tHD:DAT 0 - - ns
Stop condition Setup Time
Interrupt Valid tIV - - 0.1 Interrupt Reset tIR - - 1.0 Output Data Valid tDV - - 0.8 Input Data Setup Time tDS 100 - - ns
tSU:STA 0.6 - -
tHD:STA 0.6 - -
tSU:STO 0.6 - -
A A
s s
s s
s
s s
s s
-
-
Input Data Hold Time tDH 0 - ­Standby Current I
- - 3.0
STBY
s
A
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© 2009 ROHM Co., Ltd. All rights reserved.
2009.09 - Rev.A
BU8272GUW
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2
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2
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2
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2
Pin-out Functional Descriptions
1. Pin table
PIN No.
Land
number
PIN name I/O
Power source system
1 A1 VDDI2C - ­2 (NC) - - ­3 C3 GND - ­4 C1 ADR IN VDDI2C 5 C2 SDA INOUT VDDI2C 6 D1 SCL IN VDDI2C 7 D2 XRST IN VDDI2C 8 E1 INT OUT VDDI2C
9 E2 GND - ­10 F1 VDD - ­11 F2 GPIO0 INOUT VDDIO1 12 D3 GND - ­13 F3 GPIO1 INOUT VDDIO1 14 E3 GPIO2 INOUT VDDIO1 15 F4 GPIO3 INOUT VDDIO1 16 E4 GPIO4 INOUT VDDIO1 17 F5 GPIO5 INOUT VDDIO1 18 E5 GPIO6 INOUT VDDIO1 19 F6 VDDIO1 - ­20 E6 GPIO7 INOUT VDDIO1 21 D4 GND - ­22 D6 GPIO8 INOUT VDDIO2 23 D5 GPIO9 INOUT VDDIO2 24 C6 GPIO10 INOUT VDDIO2 25 C5 GPIO11 INOUT VDDIO2 26 B6 GPIO12 INOUT VDDIO2 27 B5 VDD 28 A6 VDDIO2 - ­29 A5 GPIO13 INOUT VDDIO2 30 C4 GND - ­31 A4 GPIO14 INOUT VDDIO2 32 B4 GPIO15 INOUT VDDIO2 33 A3 GPIO16 INOUT 34 B3 GPIO17 INOUT
VDDIO2 General purpose inout. Pull-up to VDD
VDDIO2 General purpose inout. Pull-up to VDD 35 A2 GPIO18 INOUT VDDIO2 36 B2 GPIO19 INOUT
*1
The Low Active or High Active of interrupt output level and specific bit mask control are decided by internal register value.
*2
When IOSEL register is set to “1”, please pull-up IO output to the same value as VDDIO1 or VDDIO2 voltages respectively.
VDDIO2 General purpose inout. Pull-up to VDD
Technical Note
Function
B Serial data inout for 2-Wire A Clock for 2-Wire B ResetLow Active Interrupt signal
General purpose inout. Pull-up to VDD
General purpose inout. Pull-up to VDD General purpose inout. Pull-up to VDD General purpose inout. Pull-up to VDD General purpose inout. Pull-up to VDD General purpose inout. Pull-up to VDD General purpose inout. Pull-up to VDD
General purpose inout. Pull-up to VDD
General purpose inout. Pull-up to VDD General purpose inout. Pull-up to VDD General purpose inout. Pull-up to VDD General purpose inout. Pull-up to VDD General purpose inout. Pull-up to VDD
General purpose inout. Pull-up to VDD
General purpose inout. Pull-up to VDD General purpose inout. Pull-up to VDD
General purpose inout. Pull-up to VDD
Cell
Type
B
C
A
A A A A A A
A
A A A A A
A
A A A A A A
XRST
-
Hi-z
-
L
-*3
Hi-z
Hi-z Hi-z Hi-z Hi-z Hi-z Hi-z
Hi-z
Hi-z Hi-z Hi-z Hi-z Hi-z
Hi-z
Hi-z Hi-z Hi-z Hi-z Hi-z Hi-z
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2009.09 - Rev.A
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