●Description
Low Voltage CMOS Op-Amp integrates one or two or four independent output full swing Op-Amps and phase compensation
capacitors on a single chip. Especially, this series is operable with low voltage, low supply current and low input bias current.
Input Common-mode Voltage Range Vicm (VSS-0.3)(VDD+0.3) V
Operating Temperature Topr -40 ~ +85 -40 ~ +105 ℃
Storage Temperature Tstg -55 ~ +125 ℃
Maximum Junction Temperature Tjmax +125 ℃
Note: Absolute maximum rating item indicates the condition which must not be exceeded.
Application of voltage in excess of absolute maximum rating or use out absolute maximum rated temperature environment
may cause deterioration of characteristics.
(*1) The voltage difference between inverting input and non-inverting input is the differential input voltage.
Then input terminal voltage is set to more than VSS.
●Electrical characteristics
○BU7261 family (Unless otherwise specified VDD=+3[V], VSS=0[V], Ta=25[℃])
Limits
Parameter
Symbol
Temperature
Range
BU7261G,
BU7261SG
Unit
Min. Typ. Max.
Input Offset Voltage
Input Offset Current
(*2)(*3)
Vio
(*2)
Iio 25℃ - 1 - pA
25℃ - 1 9
Full range- - 10
mV
Technical Note
Condition
VDD=1.8 ~ 5.5[V],
VOUT=VDD/2
-
Input Bias Current
Supply Current
(*2)
Ib 25℃ - 1 - pA
(*3)
IDD
25℃ - 250 550
Full range- - 600
RL=∞ All Op-Amps
μA
AV=0[dB], VIN=1.5[V]
-
High Level Output Voltage VOH 25℃ VDD-0.1 - - V RL=10[kΩ]
Low Level Output Voltage
VOL 25℃ - - VSS+0.1V RL=10[kΩ]
Large Signal Voltage Gain AV 25℃ 70 95 - dB RL=10[kΩ]
Input Common-mode Voltage Range Vicm 25℃ 0 - 3 V VDD-VSS=3[V]
Common-mode Rejection Ratio CMRR 25℃ 45 60 - dB -
Power Supply Rejection Ratio PSRR 25℃ 60 80 - dB -
Output Source Current
Output Sink Current
(*4)
IOH 25℃ 4 10 - mA VDD-0.4[V]
(*4)
IOL 25℃ 5 12 - mA VSS+0.4[V]
Slew Rate SR 25℃ - 1.1 - V/μs CL=25[pF]
Gain Band width FT 25℃ - 2 - MHz CL=25[pF], AV=40[dB]
Phase Margin θ 25℃ - 50 - ° CL=25[pF], AV=40[dB]
(*2) Absolute value
(*3) Full range: BU7261: Ta=-40[℃] ~ +85[℃] BU7261S: Ta=-40[℃] ~ +105[℃]
(*4) Under the high temperature environment, consider the power dissipation of IC when selecting the output current.
When the terminal short circuits are continuously output, the output current is reduced to climb to the temperature inside IC.
○BU7262 family (Unless otherwise specified VDD=+3[V], VSS=0[V], Ta=25[℃])
Limits
Parameter
Symbol
Temperature
Range
BU7262F/FVM/NUX
BU7262S F/FVM/NUX
Unit
Min. Typ. Max.
Input Offset Voltage
Input Offset Current
(*5)(*6)
Vio
(*5)
Iio 25℃ - 1 - pA
25℃ - 1 9
Full range- - 10
mV
Technical Note
Condition
VDD=1.8 ~ 5.5[V]
VOUT=VDD/2
-
Input Bias Current
Supply Current
(*5)
Ib 25℃ - 1 - pA
(*6)
IDD
25℃ - 550 1100
Full range- - 1200
RL=∞ All Op-Amps
μA
AV=0[dB], VIN=1.5[V]
-
High Level Output Voltage VOH 25℃ VDD-0.1 - - V RL=10[kΩ]
Low Level Output Voltage VOL 25℃ - - VSS+0.1V RL=10[kΩ]
Large Signal Voltage Gain AV 25℃ 70 95 - dB RL=10[kΩ]
Input Common-mode Voltage Range Vicm 25℃ 0 - 3 V VDD-VSS=3[V]
Common-mode Rejection Ratio CMRR 25℃ 45 60 - dB
Power Supply Rejection Ratio PSRR 25℃ 60 80 - dB
Output Source Current
Output Sink Current
(*7)
IOH 25℃ 4 10 - mA VDD-0.4[V]
(*7)
IOL 25℃ 5 12 - mA VSS+0.4[V]
-
-
Slew Rate SR 25℃ - 1.1 - V/μs CL=25[pF]
Gain Band width FT 25℃ - 2 - MHz CL=25[pF], AV=40[dB]
Phase Margin θ 25℃ - 50 - ° CL=25[pF], AV=40[dB]
Total Harmonic Distortion THD 25℃ - 0.05 - %
VOUT=0.8[Vp-p],
f=1[kHz]
Channel Separation CS 25℃ - 100 - dB AV=40[dB]
(*5) Absolute value
(*6) Full range: BU7262: Ta=-40[℃] ~ +85[℃] BU7262S: Ta=-40[℃] ~ +105[℃]
(*7) Under the high temperature environment, consider the power dissipation of IC when selecting the output current.
When the terminal short circuits are continuously output, the output current is reduced to climb to the temperature inside IC.
○BU7264 family (Unless otherwise specified VDD=+3[V], VSS=0[V], Ta=25[℃])
Limits
Parameter
Symbol
Temperature
Range
BU7264F
BU7264SF
Unit
Min. Typ. Max.
Input Offset Voltage
(*8)(*9)
Vio
25℃ - 1 9
Full range- - 10
mV
Technical Note
Condition
VDD=1.8 ~ 5.5[V]
VOUT=VDD/2
(*9)
(*8)
(*8)
Input Offset Current
Input Bias Current
Supply Current
High Level Output Voltage
Low Level Output Voltage
Large Signal Voltage Gain
Input Common-mode Voltage Range
Common-mode Rejection Ratio
Power Supply Rejection Ratio
(*10)
(*10)
Output Source Current
Output Sink Current
Iio 25℃ - 1 - pA
Ib 25℃ - 1 - pA
IDD
25℃ - 1100 2300
Full range- - 2800
VOH 25℃ VDD-0.1 - - V
VOL 25℃ - - VSS+0.1V
AV 25℃ 70 95 - dB
Vicm 25℃ 0 - 3 V
RL=∞ All Op-Amps
μA
AV=0[dB], VIN=1.5[V]
RL=10[kΩ]
RL=10[kΩ]
RL=10[kΩ]
VDD-VSS=3[V]
CMRR 25℃ 45 60 - dB
PSRR 25℃ 60 80 - dB
IOH 25℃ 4 10 - mA
IOL 25℃ 5 12 - mA
VDD-0.4[V]
VSS+0.4[V]
-
-
-
-
Slew Rate
Gain Band width
Phase Margin
Total Harmonic Distortion
Channel Separation
(*8) Absolute value
(*9) Full range: BU7264: Ta=-40[℃] ~ +85[℃] BU7264S: Ta=-40[℃] ~ +105[℃]
(*10) Under the high temperature environment, consider the power dissipation of IC when selecting the output current.
When the terminal short circuits are continuously output, the output current is reduced to climb to the temperature inside IC.
○BU7295 family (Unless otherwise specified VDD=+3[V], VSS=0[V], Ta=25[℃])
Limits
Parameter
Symbol
Temperature
Range
BU7295HFV
BU7295SHFV
Unit
Min. Typ. Max.
Technical Note
Condition
(*12)
(*11)
(*11)
(*11)
Input Offset Voltage
Input Offset Current
Input Bias Current
Supply Current
High Level Output Voltage
Low Level Output Voltage
Large Signal Voltage Gain
Input Common-mode Voltage Range
Common-mode Rejection Ratio
Power Supply Rejection Ratio
Output Source Current
(*13)
Vio 25℃ - 1 6 mV
Iio 25℃ - 1 - pA
Ib 25℃ - 1 - pA
IDD
25℃ - 150 300
Full range- - 400
VOH 25℃ VDD-0.1 - - V
VOL 25℃ - - VSS+0.1V
AV 25℃ 60 95 - dB
Vicm 25℃ 0 - 3 V
RL=∞ All Op-Amps
μA
AV=0[dB], VIN=1.5[V]
RL=10[kΩ]
RL=10[kΩ]
RL=10[kΩ]
VDD-VSS=3[V]
CMRR 25℃ 45 60 - dB
PSRR 25℃ 60 80 - dB
IOH 25℃ 4 8 - mA
VDD-0.4[V]
-
-
-
-
-
Output Sink Current
(*13)
Slew Rate
Gain Band width
Phase Margin
(*11) Absolute value
(*12) Full range: BU7295: Ta=-40[℃] ~ +85[℃] BU7295S: Ta=-40[℃] ~ +105[℃]
(*13) Under the high temperature environment, consider the power dissipation of IC when selecting the output current.
When the terminal short circuits are continuously output, the output current is reduced to climb to the temperature inside IC.
○BU7241 family (Unless otherwise specified VDD=+3[V], VSS=0[V], Ta=25[℃])
Limits
Parameter
Symbol
Temperature
Range
BU7241G,
BU7241SG
Unit
Min. Typ. Max.
Input Offset Voltage
(*14)(*15)
Vio
25℃ - 1 9
Full range- - 10
mV
Technical Note
Condition
VDD=1.8 ~ 5.5[V]
VOUT=VDD/2
(*15)
(*14)
(*14)
Input Offset Current
Input Offset Current
Supply Current
High Level Output Voltage
Low Level Output Voltage
Large Signal Voltage Gain
Input Common-mode Voltage Range
Common-mode Rejection Ratio
Power Supply Rejection Ratio
(*16)
(*16)
Output Source Current
Output Sink Current
Iio 25℃ - 1 - pA
Ib 25℃ - 1 - pA
IDD
25℃ - 70 150
Full range- - 250
VOH 25℃ VDD-0.1 - - V
VOL 25℃ - - VSS+0.1V
AV 25℃ 70 95 - dB
Vicm 25℃ 0 - 3 V
RL=∞ All Op-Amps
μA
AV=0[dB], VIN=1.5[V]
RL=10[kΩ]
RL=10[kΩ]
RL=10[kΩ]
VDD-VSS=3[V]
CMRR 25℃ 45 60 - dB
PSRR 25℃ 60 80 - dB
IOH 25℃ 4 10 - mA
IOL 25℃ 5 12 - mA
VDD-0.4[V]
VSS+0.4[V]
-
-
-
-
Slew Rate
Gain Band width
Phase Margin
Total Harmonic Distortion
(*14) Absolute value
(*15) Full range: BU7241: Ta=-40[℃] ~ +85[℃] BU7241S: Ta=-40[℃] ~ +105[℃]
(*16) Under the high temperature environment, consider the power dissipation of IC when selecting the output current.
When the terminal short circuits are continuously output, the output current is reduced to climb to the temperature inside IC.
○BU7242 family (Unless otherwise specified VDD=+3[V], VSS=0[V], Ta=25[℃])
Limits
Parameter
Symbol
Temperature
Range
BU7242F/FVM/NUX
BU7242S F/FVM/NUX
Unit
Min. Typ. Max.
Input Offset Voltage
(*17) (*18)
Vio
25℃ - 1 9
Full range- - 10
mV
Technical Note
Condition
VDD=1.8 ~ 5.5[V]
VOUT=VDD/2
(*18)
(*17)
(*17)
Input Offset Current
Input Bias Current
Supply Current
High Level Output Voltage
Low Level Output Voltage
Large Signal Voltage Gain
Input Common-mode Voltage Range
Common-mode Rejection Ratio
Power Supply Rejection Ratio
(*19)
(*19)
Output Source Current
Output Sink Current
Iio 25℃ - 1 - pA
Ib 25℃ - 1 - pA
IDD
25℃ - 180 360
Full range- - 600
VOH 25℃ VDD-0.1 - - V
VOL 25℃ - - VSS+0.1V
AV 25℃ 70 95 - dB
Vicm 25℃ 0 - 3 V
RL=∞ All Op-Amps
μA
AV=0[dB], VIN=1.5[V]
RL=10[kΩ]
RL=10[kΩ]
RL=10[kΩ]
VDD-VSS=3[V]
CMRR 25℃ 45 60 - dB
PSRR 25℃ 60 80 - dB
IOH 25℃ 4 10 - mA
IOL 25℃ 5 12 - mA
VDD-0.4[V]
VSS+0.4[V]
-
-
-
-
Slew Rate
Gain Band width
Phase Margin
Total Harmonic Distortion
Channel Separation
(*17) Absolute value
(*18) Full range: BU7242: Ta=-40[℃] ~ +85[℃] BU7242S: Ta=-40[℃] ~ +105[℃]
(*19) Under the high temperature environment, consider the power dissipation of IC when selecting the output current.
When the terminal short circuits are continuously output, the output current is reduced to climb to the temperature inside IC.
○BU7244 family (Unless otherwise specified VDD=+3[V], VSS=0[V], Ta=25[℃])
Limits
Parameter
Symbol
Temperature
Range
BU7244F
BU7244SF
Unit
Min. Typ. Max.
Input Offset Voltage
(*20) (*21)
Vio
25℃ - 1 9
Full range- - 10
mV
Technical Note
Condition
VDD=1.8 ~ 5.5[V]
VOUT=VDD/2
(*21)
(*20)
(*20)
Input Offset Current
Input Bias Current
Supply Current
High Level Output Voltage
Low Level Output Voltage
Large Signal Voltage Gain
Input Common-mode Voltage Range
Common-mode Rejection Ratio
Power Supply Rejection Ratio
(*22)
(*22)
Output Source Current
Output Sink Current
Iio 25℃ - 1 - pA
Ib 25℃ - 1 - pA
IDD
25℃ - 360 750
Full range- - 1200
VOH 25℃ VDD-0.1 - - V
VOL 25℃ - - VSS+0.1V
AV 25℃ 70 95 - dB
Vicm 25℃ 0 - 3 V
RL=∞ All Op-Amps
μA
AV=0[dB], VIN=1.5[V]
RL=10[kΩ]
RL=10[kΩ]
RL=10[kΩ]
VDD-VSS=3[V]
CMRR 25℃ 45 60 - dB
PSRR 25℃ 60 80 - dB
IOH 25℃ 4 10 - mA
IOL 25℃ 5 12 - mA
VDD-0.4[V]
VSS+0.4[V]
-
-
-
-
Slew Rate
Gain Band width
Phase Margin
Total Harmonic Distortion
Channel Separation
(*20) Absolute value
(*21) Full range: BU7244: Ta=-40[℃] ~ +85[℃] BU7244S: Ta=-40[℃] ~ +105[℃]
(*22) Under the high temperature environment, consider the power dissipation of IC when selecting the output current.
When the terminal short circuits are continuously output, the output current is reduced to climb to the temperature inside IC.
○BU7275 family (Unless otherwise specified VDD=+3[V], VSS=0[V], Ta=25[℃])
Limits
Parameter
Symbol
Temperature
Range
BU7275HFV
BU7275SHFV
Unit
Min. Typ. Max.
Technical Note
Condition
(*24)
(*23)
(*23)
(*23)
Input Offset Voltage
Input Offset Current
Input Bias Current
Supply Current
High Level Output Voltage
Low Level Output Voltage
Large Signal Voltage Gain
Input Common-mode Voltage Range
Common-mode Rejection Ratio
Power Supply Rejection Ratio
Output Source Current
(*25)
Vio 25℃ - 1 6 mV
Iio 25℃ - 1 - pA
Ib 25℃ - 1 - pA
IDD
25℃ - 40 80
Full range- - 130
VOH 25℃ VDD-0.1 - - V
VOL 25℃ - - VSS+0.1V
AV 25℃ 60 95 - dB
Vicm 25℃ 0 - 3 V
RL=∞ All Op-Amps
μA
AV=0[dB], VIN=1.5[V]
RL=10[kΩ]
RL=10[kΩ]
RL=10[kΩ]
VDD-VSS=3[V]
CMRR 25℃ 45 60 - dB
PSRR 25℃ 60 80 - dB
IOH 25℃ 4 8 - mA
VDD-0.4[V]
-
-
-
-
-
Output Sink Current
(*25)
Slew Rate
Gain Band width
Phase Margin
(*23) Absolute value
(*24) Full range: BU7275: Ta=-40[℃] ~ +85[℃] BU7275S: Ta=-40[℃] ~ +105[℃]
(*25) Under the high temperature environment, consider the power dissipation of IC when selecting the output current.
When the terminal short circuits are continuously output, the output current is reduced to climb to the temperature inside IC.