●Description
Low Voltage CMOS Op-Amp integrates one or two or four independent output full swing Op-Amps and phase compensation
capacitors on a single chip. Especially, this series is operable with low voltage, low supply current and low input bias current.
Input Common-mode Voltage Range Vicm (VSS-0.3)(VDD+0.3) V
Operating Temperature Topr -40 ~ +85 -40 ~ +105 ℃
Storage Temperature Tstg -55 ~ +125 ℃
Maximum Junction Temperature Tjmax +125 ℃
Note: Absolute maximum rating item indicates the condition which must not be exceeded.
Application of voltage in excess of absolute maximum rating or use out absolute maximum rated temperature environment
may cause deterioration of characteristics.
(*1) The voltage difference between inverting input and non-inverting input is the differential input voltage.
Then input terminal voltage is set to more than VSS.
●Electrical characteristics
○BU7261 family (Unless otherwise specified VDD=+3[V], VSS=0[V], Ta=25[℃])
Limits
Parameter
Symbol
Temperature
Range
BU7261G,
BU7261SG
Unit
Min. Typ. Max.
Input Offset Voltage
Input Offset Current
(*2)(*3)
Vio
(*2)
Iio 25℃ - 1 - pA
25℃ - 1 9
Full range- - 10
mV
Technical Note
Condition
VDD=1.8 ~ 5.5[V],
VOUT=VDD/2
-
Input Bias Current
Supply Current
(*2)
Ib 25℃ - 1 - pA
(*3)
IDD
25℃ - 250 550
Full range- - 600
RL=∞ All Op-Amps
μA
AV=0[dB], VIN=1.5[V]
-
High Level Output Voltage VOH 25℃ VDD-0.1 - - V RL=10[kΩ]
Low Level Output Voltage
VOL 25℃ - - VSS+0.1V RL=10[kΩ]
Large Signal Voltage Gain AV 25℃ 70 95 - dB RL=10[kΩ]
Input Common-mode Voltage Range Vicm 25℃ 0 - 3 V VDD-VSS=3[V]
Common-mode Rejection Ratio CMRR 25℃ 45 60 - dB -
Power Supply Rejection Ratio PSRR 25℃ 60 80 - dB -
Output Source Current
Output Sink Current
(*4)
IOH 25℃ 4 10 - mA VDD-0.4[V]
(*4)
IOL 25℃ 5 12 - mA VSS+0.4[V]
Slew Rate SR 25℃ - 1.1 - V/μs CL=25[pF]
Gain Band width FT 25℃ - 2 - MHz CL=25[pF], AV=40[dB]
Phase Margin θ 25℃ - 50 - ° CL=25[pF], AV=40[dB]
(*2) Absolute value
(*3) Full range: BU7261: Ta=-40[℃] ~ +85[℃] BU7261S: Ta=-40[℃] ~ +105[℃]
(*4) Under the high temperature environment, consider the power dissipation of IC when selecting the output current.
When the terminal short circuits are continuously output, the output current is reduced to climb to the temperature inside IC.
○BU7262 family (Unless otherwise specified VDD=+3[V], VSS=0[V], Ta=25[℃])
Limits
Parameter
Symbol
Temperature
Range
BU7262F/FVM/NUX
BU7262S F/FVM/NUX
Unit
Min. Typ. Max.
Input Offset Voltage
Input Offset Current
(*5)(*6)
Vio
(*5)
Iio 25℃ - 1 - pA
25℃ - 1 9
Full range- - 10
mV
Technical Note
Condition
VDD=1.8 ~ 5.5[V]
VOUT=VDD/2
-
Input Bias Current
Supply Current
(*5)
Ib 25℃ - 1 - pA
(*6)
IDD
25℃ - 550 1100
Full range- - 1200
RL=∞ All Op-Amps
μA
AV=0[dB], VIN=1.5[V]
-
High Level Output Voltage VOH 25℃ VDD-0.1 - - V RL=10[kΩ]
Low Level Output Voltage VOL 25℃ - - VSS+0.1V RL=10[kΩ]
Large Signal Voltage Gain AV 25℃ 70 95 - dB RL=10[kΩ]
Input Common-mode Voltage Range Vicm 25℃ 0 - 3 V VDD-VSS=3[V]
Common-mode Rejection Ratio CMRR 25℃ 45 60 - dB
Power Supply Rejection Ratio PSRR 25℃ 60 80 - dB
Output Source Current
Output Sink Current
(*7)
IOH 25℃ 4 10 - mA VDD-0.4[V]
(*7)
IOL 25℃ 5 12 - mA VSS+0.4[V]
-
-
Slew Rate SR 25℃ - 1.1 - V/μs CL=25[pF]
Gain Band width FT 25℃ - 2 - MHz CL=25[pF], AV=40[dB]
Phase Margin θ 25℃ - 50 - ° CL=25[pF], AV=40[dB]
Total Harmonic Distortion THD 25℃ - 0.05 - %
VOUT=0.8[Vp-p],
f=1[kHz]
Channel Separation CS 25℃ - 100 - dB AV=40[dB]
(*5) Absolute value
(*6) Full range: BU7262: Ta=-40[℃] ~ +85[℃] BU7262S: Ta=-40[℃] ~ +105[℃]
(*7) Under the high temperature environment, consider the power dissipation of IC when selecting the output current.
When the terminal short circuits are continuously output, the output current is reduced to climb to the temperature inside IC.
○BU7264 family (Unless otherwise specified VDD=+3[V], VSS=0[V], Ta=25[℃])
Limits
Parameter
Symbol
Temperature
Range
BU7264F
BU7264SF
Unit
Min. Typ. Max.
Input Offset Voltage
(*8)(*9)
Vio
25℃ - 1 9
Full range- - 10
mV
Technical Note
Condition
VDD=1.8 ~ 5.5[V]
VOUT=VDD/2
(*9)
(*8)
(*8)
Input Offset Current
Input Bias Current
Supply Current
High Level Output Voltage
Low Level Output Voltage
Large Signal Voltage Gain
Input Common-mode Voltage Range
Common-mode Rejection Ratio
Power Supply Rejection Ratio
(*10)
(*10)
Output Source Current
Output Sink Current
Iio 25℃ - 1 - pA
Ib 25℃ - 1 - pA
IDD
25℃ - 1100 2300
Full range- - 2800
VOH 25℃ VDD-0.1 - - V
VOL 25℃ - - VSS+0.1V
AV 25℃ 70 95 - dB
Vicm 25℃ 0 - 3 V
RL=∞ All Op-Amps
μA
AV=0[dB], VIN=1.5[V]
RL=10[kΩ]
RL=10[kΩ]
RL=10[kΩ]
VDD-VSS=3[V]
CMRR 25℃ 45 60 - dB
PSRR 25℃ 60 80 - dB
IOH 25℃ 4 10 - mA
IOL 25℃ 5 12 - mA
VDD-0.4[V]
VSS+0.4[V]
-
-
-
-
Slew Rate
Gain Band width
Phase Margin
Total Harmonic Distortion
Channel Separation
(*8) Absolute value
(*9) Full range: BU7264: Ta=-40[℃] ~ +85[℃] BU7264S: Ta=-40[℃] ~ +105[℃]
(*10) Under the high temperature environment, consider the power dissipation of IC when selecting the output current.
When the terminal short circuits are continuously output, the output current is reduced to climb to the temperature inside IC.
○BU7295 family (Unless otherwise specified VDD=+3[V], VSS=0[V], Ta=25[℃])
Limits
Parameter
Symbol
Temperature
Range
BU7295HFV
BU7295SHFV
Unit
Min. Typ. Max.
Technical Note
Condition
(*12)
(*11)
(*11)
(*11)
Input Offset Voltage
Input Offset Current
Input Bias Current
Supply Current
High Level Output Voltage
Low Level Output Voltage
Large Signal Voltage Gain
Input Common-mode Voltage Range
Common-mode Rejection Ratio
Power Supply Rejection Ratio
Output Source Current
(*13)
Vio 25℃ - 1 6 mV
Iio 25℃ - 1 - pA
Ib 25℃ - 1 - pA
IDD
25℃ - 150 300
Full range- - 400
VOH 25℃ VDD-0.1 - - V
VOL 25℃ - - VSS+0.1V
AV 25℃ 60 95 - dB
Vicm 25℃ 0 - 3 V
RL=∞ All Op-Amps
μA
AV=0[dB], VIN=1.5[V]
RL=10[kΩ]
RL=10[kΩ]
RL=10[kΩ]
VDD-VSS=3[V]
CMRR 25℃ 45 60 - dB
PSRR 25℃ 60 80 - dB
IOH 25℃ 4 8 - mA
VDD-0.4[V]
-
-
-
-
-
Output Sink Current
(*13)
Slew Rate
Gain Band width
Phase Margin
(*11) Absolute value
(*12) Full range: BU7295: Ta=-40[℃] ~ +85[℃] BU7295S: Ta=-40[℃] ~ +105[℃]
(*13) Under the high temperature environment, consider the power dissipation of IC when selecting the output current.
When the terminal short circuits are continuously output, the output current is reduced to climb to the temperature inside IC.
○BU7241 family (Unless otherwise specified VDD=+3[V], VSS=0[V], Ta=25[℃])
Limits
Parameter
Symbol
Temperature
Range
BU7241G,
BU7241SG
Unit
Min. Typ. Max.
Input Offset Voltage
(*14)(*15)
Vio
25℃ - 1 9
Full range- - 10
mV
Technical Note
Condition
VDD=1.8 ~ 5.5[V]
VOUT=VDD/2
(*15)
(*14)
(*14)
Input Offset Current
Input Offset Current
Supply Current
High Level Output Voltage
Low Level Output Voltage
Large Signal Voltage Gain
Input Common-mode Voltage Range
Common-mode Rejection Ratio
Power Supply Rejection Ratio
(*16)
(*16)
Output Source Current
Output Sink Current
Iio 25℃ - 1 - pA
Ib 25℃ - 1 - pA
IDD
25℃ - 70 150
Full range- - 250
VOH 25℃ VDD-0.1 - - V
VOL 25℃ - - VSS+0.1V
AV 25℃ 70 95 - dB
Vicm 25℃ 0 - 3 V
RL=∞ All Op-Amps
μA
AV=0[dB], VIN=1.5[V]
RL=10[kΩ]
RL=10[kΩ]
RL=10[kΩ]
VDD-VSS=3[V]
CMRR 25℃ 45 60 - dB
PSRR 25℃ 60 80 - dB
IOH 25℃ 4 10 - mA
IOL 25℃ 5 12 - mA
VDD-0.4[V]
VSS+0.4[V]
-
-
-
-
Slew Rate
Gain Band width
Phase Margin
Total Harmonic Distortion
(*14) Absolute value
(*15) Full range: BU7241: Ta=-40[℃] ~ +85[℃] BU7241S: Ta=-40[℃] ~ +105[℃]
(*16) Under the high temperature environment, consider the power dissipation of IC when selecting the output current.
When the terminal short circuits are continuously output, the output current is reduced to climb to the temperature inside IC.
○BU7242 family (Unless otherwise specified VDD=+3[V], VSS=0[V], Ta=25[℃])
Limits
Parameter
Symbol
Temperature
Range
BU7242F/FVM/NUX
BU7242S F/FVM/NUX
Unit
Min. Typ. Max.
Input Offset Voltage
(*17) (*18)
Vio
25℃ - 1 9
Full range- - 10
mV
Technical Note
Condition
VDD=1.8 ~ 5.5[V]
VOUT=VDD/2
(*18)
(*17)
(*17)
Input Offset Current
Input Bias Current
Supply Current
High Level Output Voltage
Low Level Output Voltage
Large Signal Voltage Gain
Input Common-mode Voltage Range
Common-mode Rejection Ratio
Power Supply Rejection Ratio
(*19)
(*19)
Output Source Current
Output Sink Current
Iio 25℃ - 1 - pA
Ib 25℃ - 1 - pA
IDD
25℃ - 180 360
Full range- - 600
VOH 25℃ VDD-0.1 - - V
VOL 25℃ - - VSS+0.1V
AV 25℃ 70 95 - dB
Vicm 25℃ 0 - 3 V
RL=∞ All Op-Amps
μA
AV=0[dB], VIN=1.5[V]
RL=10[kΩ]
RL=10[kΩ]
RL=10[kΩ]
VDD-VSS=3[V]
CMRR 25℃ 45 60 - dB
PSRR 25℃ 60 80 - dB
IOH 25℃ 4 10 - mA
IOL 25℃ 5 12 - mA
VDD-0.4[V]
VSS+0.4[V]
-
-
-
-
Slew Rate
Gain Band width
Phase Margin
Total Harmonic Distortion
Channel Separation
(*17) Absolute value
(*18) Full range: BU7242: Ta=-40[℃] ~ +85[℃] BU7242S: Ta=-40[℃] ~ +105[℃]
(*19) Under the high temperature environment, consider the power dissipation of IC when selecting the output current.
When the terminal short circuits are continuously output, the output current is reduced to climb to the temperature inside IC.
○BU7244 family (Unless otherwise specified VDD=+3[V], VSS=0[V], Ta=25[℃])
Limits
Parameter
Symbol
Temperature
Range
BU7244F
BU7244SF
Unit
Min. Typ. Max.
Input Offset Voltage
(*20) (*21)
Vio
25℃ - 1 9
Full range- - 10
mV
Technical Note
Condition
VDD=1.8 ~ 5.5[V]
VOUT=VDD/2
(*21)
(*20)
(*20)
Input Offset Current
Input Bias Current
Supply Current
High Level Output Voltage
Low Level Output Voltage
Large Signal Voltage Gain
Input Common-mode Voltage Range
Common-mode Rejection Ratio
Power Supply Rejection Ratio
(*22)
(*22)
Output Source Current
Output Sink Current
Iio 25℃ - 1 - pA
Ib 25℃ - 1 - pA
IDD
25℃ - 360 750
Full range- - 1200
VOH 25℃ VDD-0.1 - - V
VOL 25℃ - - VSS+0.1V
AV 25℃ 70 95 - dB
Vicm 25℃ 0 - 3 V
RL=∞ All Op-Amps
μA
AV=0[dB], VIN=1.5[V]
RL=10[kΩ]
RL=10[kΩ]
RL=10[kΩ]
VDD-VSS=3[V]
CMRR 25℃ 45 60 - dB
PSRR 25℃ 60 80 - dB
IOH 25℃ 4 10 - mA
IOL 25℃ 5 12 - mA
VDD-0.4[V]
VSS+0.4[V]
-
-
-
-
Slew Rate
Gain Band width
Phase Margin
Total Harmonic Distortion
Channel Separation
(*20) Absolute value
(*21) Full range: BU7244: Ta=-40[℃] ~ +85[℃] BU7244S: Ta=-40[℃] ~ +105[℃]
(*22) Under the high temperature environment, consider the power dissipation of IC when selecting the output current.
When the terminal short circuits are continuously output, the output current is reduced to climb to the temperature inside IC.
○BU7275 family (Unless otherwise specified VDD=+3[V], VSS=0[V], Ta=25[℃])
Limits
Parameter
Symbol
Temperature
Range
BU7275HFV
BU7275SHFV
Unit
Min. Typ. Max.
Technical Note
Condition
(*24)
(*23)
(*23)
(*23)
Input Offset Voltage
Input Offset Current
Input Bias Current
Supply Current
High Level Output Voltage
Low Level Output Voltage
Large Signal Voltage Gain
Input Common-mode Voltage Range
Common-mode Rejection Ratio
Power Supply Rejection Ratio
Output Source Current
(*25)
Vio 25℃ - 1 6 mV
Iio 25℃ - 1 - pA
Ib 25℃ - 1 - pA
IDD
25℃ - 40 80
Full range- - 130
VOH 25℃ VDD-0.1 - - V
VOL 25℃ - - VSS+0.1V
AV 25℃ 60 95 - dB
Vicm 25℃ 0 - 3 V
RL=∞ All Op-Amps
μA
AV=0[dB], VIN=1.5[V]
RL=10[kΩ]
RL=10[kΩ]
RL=10[kΩ]
VDD-VSS=3[V]
CMRR 25℃ 45 60 - dB
PSRR 25℃ 60 80 - dB
IOH 25℃ 4 8 - mA
VDD-0.4[V]
-
-
-
-
-
Output Sink Current
(*25)
Slew Rate
Gain Band width
Phase Margin
(*23) Absolute value
(*24) Full range: BU7275: Ta=-40[℃] ~ +85[℃] BU7275S: Ta=-40[℃] ~ +105[℃]
(*25) Under the high temperature environment, consider the power dissipation of IC when selecting the output current.
When the terminal short circuits are continuously output, the output current is reduced to climb to the temperature inside IC.
This circuit controls output voltage (Vout) equal input
voltage (Vin), and keeps V out with stable because of high
input impedance and low output impedance.
Vout is shown next formula.
Vout=Vin
For inverting amplifier, Vin is amplified by voltage gain
decided R1 and R2, and phase reversed voltage is
outputted.
Vout is shown next formula.
Vout=-(R2/R1)・Vin
Input impedance is R1.
For non-inverting amplifier, Vin is amplified by voltage
gain decided R1 and R2, and phase is same with Vin.
Vout is shown next formula.
Vout=(1+R2/R1)・Vin
Vout
This circuit realizes high input impedance because Input
impedance is operational amplifier’s input Impedance.
dder circuit output the voltage that added up Input
voltage. A phase of the output voltage turns over,
because non-inverting circuit is used.
Vout is shown next formula.
Vout = -R3(Vin1/R1+Vin2/R2)
When three input voltage is as above, it connects
with input through resistance like R1 and R2.
Differential amplifier output the voltage
that amplified a difference of input voltage.
In the case of R1=R3=Ra, R2=R4=Rb
Vout is shown next formula.
●Description of electrical characteristics
Described here are the terms of electric characteristics used in this technical note. Items and symbols used are also shown.
Note that item name and symbol and their meaning may differ from those on another manufacture’s document or general document.
1. Absolute maximum ratings
Absolute maximum rating item indicates the condition which must not be exc eeded. Application of voltage in excess of
absolute maximum rating or use out of absolute maximum rated temp erature environment may cause deterioration of
dharacteristics.
1.1 Power supply voltage (VDD/VSS)
1.2 Differential input voltage (Vid)
1.3 Input common-mode voltage range (Vicm)
1.4 Power dissipation (Pd)
2. Electrical characteristics item
2.1 Input offset voltage (Vio)
2.2 Input offset current (Iio)
2.3 Input bias current (Ib)
2.4 Circuit current (IDD)
2.5 High level outp ut voltage / Low level outp ut voltage (VOM)
Indicates the maximum voltage that can be applied between the positive po wer supply terminal and negative po wer
supply terminalwithout deterioration or destruction of characteristics of internal circuit.
Indicates the maximum voltage that can be applied between non-inverting terminal and inverting ter minal without
deterioration and destruction of characteristics of IC.
Indicates the maximum voltage that can be applied to non-inverting terminal and inverting terminal without
deterioration or destruction of characteristics. Input common-mode voltage range of the maximum ratings not assure
normal operation of IC. When normalOperation of IC is desired, the input common-mode voltage of characteristics
item must be followed.
Indicates the power that can be consumed by specified mounted board at the ambient temperature 25℃(normal
temperature).
As for package product, Pd is determined by the temperature that can be permitted by IC chip in the package
(maximum junction temperature) and thermal resistance of the package.
Indicates the voltage difference between non-inverting terminal and inverting terminal. It can be translated into the
input voltage difference required for setting the output voltage at 0 [V].
Indicates the difference of input bias current between non-inverting terminal and inverting terminal.
Indicates the current that flows into or out of the input terminal. It is defined by the average of input bias current at
non-inverting terminal and input bias current at inverting terminal.
Indicates the IC current that flows under specified conditions and no-load steady status.
Indicates the voltage range that can be output by the IC und er specified load condition. It is typically divided into
high-level output voltage and low-level output voltage. High-level output voltage indicates the upper limit of output
voltage. Low-level output voltage indicates the lower limit.
Indicates the amplifying rate (gain) of output voltage against the voltage difference between non-inve rting terminal
and inverting terminal. It is normally the amplifying rate (gain) with reference to DC voltage.
Av = (Output voltage fluctuation) / (Input offset fluctuation)
Indicates the input voltage range where IC operates normally.
Indicates the ratio of fluctuation of input offset voltage when in-phase input voltage is changed. It is normall y the
fluctuation of DC.
CMRR =(Change of Input common-mode voltage)/(Input offset fluctuation)
Indicates the ratio of fluctuation of input offset voltage when supply voltage is changed. It is normally the fluctuation of DC.
PSRR=(Change of power supply voltage)/(Input offset fluctuation)
Indicates the fluctuation of input offset voltage or that of output voltage with reference to the change of output voltage
of driven channel.
Indicates the time fluctuation ratio of voltage output when step input signal is applied.
Indicates a frequency where the voltage gain of Op-Amp is 1.
Indicates the fluctuation of input offset voltage or that of output voltage with reference to the change of output voltage
of driven channel.
Indicates a noise voltage generated inside the operational amplifier equivalent by ideal voltage source connected in
●Derating curve
Power dissipation (total loss) indicates the power that can be consumed by IC at Ta=25℃(normal temperature).IC is heated
when it consumed power, and the temperature of IC ship becomes higher than ambient temperature. T he temperature that
can be accepted by IC chip depends on circuit configuration, manufacturing process, and co nsumable power is limited.
Power dissipation is determined by the temperature allowed in IC chip (maximum junction temperature) and thermal
resistance of package (heat dissipation capability). The maximum junction temperature is typically equal to the maximum
value in the storage temperature range. Heat generated by consumed power of IC radiates from the mold resin or lead frame
of the package. The parameter which indicates this heat dissipation capability (hardness of heat release) is called the rmal
resistance, represented by the symbol θj-a[℃/W]. The temperature of IC inside the package can be estimated by this
thermal resistance. Fig.195 (a) shows the model of thermal resistance of the package. Thermal resistance θja, ambient
temperature Ta, junction temperature Tj, and power dissipation Pd can be calculated by the equation below :
θja = (Tj-Ta) / Pd [℃/W] ・・・・・ (Ⅰ)
Derating curve in Fig.195(b) indicates power that can be consumed by IC with reference to ambient temperature. Power that
can be consumed by IC with reference to ambient temperature. Power that can be consumed by IC begins to attenuate at
certain ambient temperature. This gradient is determined by thermal resistance θja. Thermal resistance θja depends on chip
size, power consumption, package, ambient temperature, package condition, wind velocity, etc even when the same of
package is used. Thermal reduction curve indicates a reference value measured at a specifi ed condition. Fig196(c) ~ (h)
show a derating curve for an example of low voltage full swing
CMOS Op-Amp.
[W]
Pd(max)
θja = ( Tj ーTa ) / Pd [℃/W]
Ta [℃]
周囲温度
Ambient temperature Ta [℃]
P2
P1
θja1
θja2 <θja1
θja2
Tj(max)
0
1000
Chip surface temp er ature Tj [℃]
チップ表面温度
Power dissin]
消費電力P[W]
(a)Thermal resistance
800
600
400
200
POWER DISSIPATION [mW]
0
050100150
1000
800
AMBIENT TEMPERATURE[℃]
(c) BU7261G BU7241G
BU7275HFV BU7295HFV
540[mW]
600
540[mW]
535[mW]
85
535[mW]
Tj[℃]
Fig. 195 Thermal resistance and derating
BU7261G(*26)
BU7241G(*26)
BU7295HFV(*30)
BU7275HFV(*30)
BU7261SG(*26)
BU7241SG(*26)
BU7295SHFV(*30)
BU7275SHFV(*30)
1000
800
600
400
200
POWER DISSIPATION [mW]
0
050100150
AMBIENT TEMPERATURE[℃]
(d) BU7262F/FVM/NUX BU7242F/FVM/NUX
1000
800
600
620[mW]
480[mW]
412[mW]
620[mW]
480[mW]
412[mW]
400
200
POWER DISSIPATION [mW]
0
050100150
AMBIENT TEMPERATURE[℃]
(f) BU7261SG BU7241SG
BU7275SHFV BU7295SHFV
105
(*26) (*27) (*28)
5.4 6.2 4.8
400
200
POWER DISSIPATION [mW]
0
050100150
AMBIENT TEMPERATURE[℃]
(g) BU7262S F/FVM/NUX BU7242S F/FVM/NUX
(*29)
4.12
25125
℃]
Ta[
Ambient temperature Ta [℃]
(b) Derating curve
BU7262F(*27)
BU7242F(*27)
BU7262FVM(*28)
BU7242FVM(*28)
BU7262NUX(*29)
BU7242NUX(*29)
85
BU7262SF(*27)
BU7242SF(*27)
BU7262SFVM(*28)
BU7242SFVM(*28)
BU7262SNUX(*29)
BU7242SNUX(*29)
105
(*30) (*31) Unit
5.35
When using the unit above Ta=25[℃], subtract the value above per degree[℃]. Permissible dissipation is the value.
when FR4 glass epoxy board 70[mm]×70[mm]×1.6[mm] (cooper foil area below 3[%]) is mounted.
1) Absolute maximum ratings
Absolute maximum ratings are the values which indicate the limits, within which the given voltage range ca n be safely
charged to the terminal. However, it does not guarantee the circuit operation.
2) Applied voltage to the input terminal
For normal circuit operation of voltage comparator, please input voltage for its input terminal within input common mode
voltage VDD + 0.3[V].
Then, regardless of power supply voltage, VSS-0.3[V] can be applied to input terminals without deterioration or destruction
of its characteristics.
3) Operating power supply (split power supply/single power supply)
The voltage comparator operates if a given level of voltage is applied between VDD and VSS.
Therefore, the operational amplifier can be operated under single power supply or split power supply.
4) Power dissipation (pd)
If the IC is used under excessive power dissipation. An increase in the chip temperatur e will cause deterioration of the
radical characteristics of IC. For example, reduction of current capability. Take consideration of the effective power
dissipation and thermal design with a sufficient margin. Pd is reference to the provided power dissipation curve.
5) Short circuits between pins and incorrect mounting
Short circuits between pins and incorrect mounting when mounting the IC on a printed circuits board, take notice of the
direction and positioning of the IC.
If IC is mounted erroneously, It may be damaged. Also, when a foreign object is inserted between output, bet ween output
and VDD terminal or VSS terminal which causes short circuit, the IC may be damaged.
6) Using under strong electromagnetic field
Be careful when using the IC under strong electromagnetic field because it may malfunction.
7) Usage of IC
When stress is applied to the IC through warp of the printed circuit board, The characteristics may fluctuate due to the
piezo effect. Be careful of the warp of the printed circuit board.
8) Testing IC on the set board
When testing IC on the set board, in cases where the capacitor is connected to the low impedance, make sure to
discharge per fabrication because there is a possibility that IC may be damaged by stress.
When removing IC from the set board, it is essential to cut supply voltage. As a countermeasure against the static
electricity, observe proper grounding during fabrication process and take due care when carrying and storage it.
9) The IC destruction caused by capacitive load
The transistors in circuits may be damaged when VDD terminal and VSS terminal is shorted with the charged output
terminal capacitor.When IC is used as a operational amplifier or as an application circuit, where oscillation is not activated
by an output capacitor, the output capacitor must be kept below 0.1[μF] in order to prevent the damage mentioned above.
10) Decupling capacitor
Insert the decupling capacitance between VDD and VSS, for stable operation of operational amplifier.
11) Latch up
Be careful of input voltage that exceed the VDD and VSS. When CMOS device have sometimes occur latch up operation.
And protect the IC from abnormaly noise
12) Decupling capacitor
Insert the decupling capacitance between VDD and VSS, for stable operation of operational amplifier.
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Examples of application circuits, circuit constants and any other information contained herein
illustrate the standard usage and operations of the Products. The peripheral conditions must
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