ROHM BU2880 Technical data
1
Video ICs
Digital servo controller for VCRs
BU2880 series
The BU2880 series are linear digital-servo controllers that allow construction of a VCR servo system using one IC.
The DRUM and CAPSTAN systems have digital filters, and the IC is compatible with VISS / VASS overwriting and
wide-aspect operation.
•
Applications
Video cassette recorders
•
Absolute maximum ratings (Ta = 25°C)
Parameter
Symbol Limits Unit
7.0 V
Pd mW
Topr °C
Tstg °C
V
DD
500
∗
– 15 ~ + 70
– 55 ~ + 125
Power supply voltage
Power dissipation
Operating temperature
Storage temperature
∗
Reduced by 5mW for each increase in Ta of 1°C over 25°C.
•
Features
1) All VCR servo functions on a single chip.
2) Digital filters in the DRUM and CAPSTAN speed and
phase systems.
3) Built-in CTL amplifier with serial gain setting.
4) VISS / VASS overwriting and INDEX detection func-
tions for wide-aspect operation.
5) DRUM f
H compensation calculation function from
speed detect function.
6) 6.5H discrimination.
7) Compatible with 19µm heads.
•
Recommended operating conditions (Ta = 25°C)
Parameter Symbol Min. Typ. Max. Unit
VV
DD
4.5 5.0 5.5Power supply voltage
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2
Video ICs BU2880 series
•
Block diagram
1
2
3
4
5
6
7
8
9
10
11
12
19
20
21
22
23
24
18
17
16
15
14
13
CTL COUNT
SEARCH DET
DRUM ROM CAL
CAP REF
CAP TRAPE
ROM
CAPFV
FF
DIGITAL
FILTER
DIGITAL
FILTER
+ MIX
+ MIX
RECCTL
1 / M
R2R
– +
F
F
ROMDATA
R
R
REC
REC
CTLOUT1
∗
1FWD
SAMPLE
SAMPLE
CTLOUT2
TRIG
HIGH
TRIG
CFGOUT
CFG
COUNT
VP DELAY
VP WIDTH
VFF
H
VPON
AHSWON
PGMM
FG COUNTER
(SERVOFF)
CK R
DPG
ROMDATA
ROMDATA
VD
P.SET
SAMPLE
SAMPLE
DRUMFV
TRA MM +
CTL DELAY
REF COUNTER
DRUM TRAPE
FSC
BIT PAT.
PWMGEN
VD
SYNC SEP
SIDATA DET
MODE
DFG
DUTY DET
VISS DET
6.5H DET
6.5H
SDATA
VSYNCIN
FSCIN
CFGOUT
CTLOUT1
CTLOUT2
DRUMPFV
CAPPFV
V
DD
CTLAMPOUT
CTLAMP
–
CTLAMP
+
VHSW
CTLDUTY
DFGIN
DPGIN
AHSW
VHPULSE
VPDLY
CFGIN
VSS
CTLCOMPIN
RECCTL
+
RECCTL
–
+
–
REC
3
Video ICs BU2880 series
•
Pin descriptions
Pin No.
1 SDATA
2 VSYNCIN
3 FSCIN
4 CFGOUT
5 CTLOUT1
6 CTLOUT2
7 DRUMPFV
8 CAPPFV
9
10 CTLAMPOUT
11 CTLAMP
–
12 CTLAMP
+
13 RECCTL
–
14 RECCTL
+
15 CTLCOMPIN
16 VSS
17 CFGIN
18 VPDLY
19 VHPULSE
20 AHSW
21 DPGIN
22 DFGIN
23 CTLDUTY
24 VHSW
V
DD
Pin name Function
Serial data input (tri-state)
Composite sync input
System clock input
CFG divider output
CTL comparator output
CTL divider output
DRUM control output (digital filter output)
CAPSTAN control output (digital filter output)
Power supply
CTLAMP output
CTLAMP – input
CTLAMP + input
Recording CTL – output
Recording CTL + output
CTL comparator input
GND
CFG input
Quasi-VH pulse delay amount control input
Quasi-VH pulse output
Head switch audio output
DRUM PG input
DRUM FG input
Duty discrimination, VISS discrimination, 6.5H discrimination output / VASS duty control input
HEAD SW video output
•
Input / output circuits
OUT
4: CFGOUT
5: CTLOUT1
6: CTLOUT2
7: DRUMPFV
8: CAPPFV
20: AHSW
24: VHSW
Logic output
+
+
60k
60k
2k
500
1.5 / 5V
DD
1 / 5VDD
45
INIOP
INION
IN
23: CTLDUTY
Shared input / output terminal
DUTY I / O: OFF
6.5H discrimination: ON
–
–
420
FSCIN
52k
3: FSCIN
FSC input
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