ROHM BU21010MUV Technical data

Capacitive Sensor Control IC Series
Capacitive Sensor Switch Control IC
Description
BU21010MUV are the capacitive sensor controller with 8 channels respectively. Half of sensor ports are available to use to LED driver. Also gesture function can recognize the short touch, long touch and finger motion.
Features
1) Gesture function
2) LED driver
3) 2 wire serial interface
4) Power supply = 2.5V to 3.3V, I/O power supply = 1.7V to 3.3V
5) Integrated 10bit AD converter, clock and reset
6) Package VQFN016V3030
Applications
It is possible to use it widely as a switch such as a Mobile phone, Portable equipment, and Audiovisual apparatuses.
Absolute Maximum Ratings (Ta=25℃)
PARAMETER SYMBOL
APPLIED VOLTAGE
INPUT VOLTAGE
STORAGE TEMPERATURE RANGE Tstg -55 125
POWER DISSIPATION Pd 215 mW
Recommended Operating conditions
PARAMETER SYMBOL
APPLIED VOLTAGE
OPERATINGTEMPERATURE RANGE Topr -40 25 85
AVD D - 0.3 4. 5
DVDD -0.3 4.5
AIN -0.3 AVDD + 0.3
V
VDIN -0.3 DVDD + 0.3
AVDD 2.5 3.0 3.3 V
DVDD 1.7 3.0 3.3 V
MIN MAX
MIN TYP MAX
RATING
RATING
No.09048EBT02
UNIT
V
V
UNIT
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© 2009 ROHM Co., Ltd. All rights reserved.
1/14
2009.04 - Rev.B
BU21010MUV
Electrical characteristicsEspecially, Topr=25 and AVDD=DVDD=0 as long as it doesn't specify it.
PARAMETER SYMBOL
H INPUT VOLTAGE VIHIO
L INPUT VOLTAGE VILIO
Output "H" voltage VOHIO
VOLLED
Output "L" voltage
VOLTXD
VOLINT
Input leakage current IIZ
MIN TYP MAX
DVDDx0.8 - DVDD+0.3 V
DVSS-0.3
DVDD-0.7
AVSS
DVSS
DVSS
-1
RATING
-
-
-
-
-
-
UNIT Condition
DVDDx0.2 V
DVDD V
0.5
0.5
DVDDx0.3
0.5
IOH=-2[mA]. Overshoot is excluded.
I
OL=8[mA]. Undershoot is excluded. LED output.
I
OL=3[mA]. Undershoot is
excluded. SDA/TXD
V
application.
OL=2[mA]. Undershoot is excluded. INT
I application.
1 μA
Technical Note
DVDD > 2[V]
DVDD 2[V]
Off leakage current IOZ
Standby current IST
Current of operation IDD
-1
-
- - 2 μA
- 300 - μA
1 μA
Shutdown (SDN=”L”)
A/D Converter
PARAMETER SYMBOL
MIN TYP MAX
RATING
UNIT Condition
Resolution - 10 - bit
Analog Input voltage VAIN AVSS - AVDD V change clock frequency fadck 0.2 - 2.0 MHz change time ftim - 77 - μsec fadck = 1[MHz] Zero scale voltage - - AVSS+0.07 V full scale voltage AVDD-0.07 - - V differential Non line accurate DNL - - ±3 LSB Integrate Non line accurate INL - - ±3 LSB
^
CR Oscillator characteristic
PARAMETER SYMBOL
Frequency Oscillation
f
cr
MIN TYP MAX
0.4 1.1 2.0 MHz
RATING
UNIT Condition
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© 2009 ROHM Co., Ltd. All rights reserved.
2/14
2009.04 - Rev.B
BU21010MUV
Block Diagram, Pin configuration
AVDD DVDD
SREF
SIN[7:0]
Sensor I/F CV translate circuit
ADC
Data corre ction and
making to format
SIN6
Technical Note
LED1
SIN2
SIN1/ LED0
LED2
SIN4
SIN5/
SIN3/
SIN7/
LED3
AVDD
DVDD
SDA
SCL
INT
SDN
SCL
SDA
SDN
Reset
generation
Conversion
sequence control
Clock
generation
CR oscill ation
GND
Data register
host I/F
Power
management
INT
GND
SIN0
SREF
Sensor I/F CV translate circuit
This module selects between sensor inputs. The selection sequences between all 16 channels.
AD Conversion
The voltage into which CV is converted is converted into a digital value. Conversion is 10 bit and full scale corresponds to AVDD.
Conversion sequence control
Performs timing generation for the analogue circuitry and a sequencer circuit for selection of the sensor channel for conversion.
Data correction and making to format
This module provides the digital intelligence of the sensor. The block includes, amongst other things, scaling, adding offsets and input filtering for de-bouncing. Registers are formatted to simplify usage by the softwareapplication. The block implements auto-calibration to manage drift in temperature, process variation, voltage variation and aging effects.
Data register
This stores the results for the software application. Please refer to the register map for details.
HOST I/F
2 wire serial interface.
Power management
The power management block provides smart power control. When the sensors are not in use, the Controller automatically transitions into a low-power mode. When a sensor is touched, then the device automatically wakes up and enters its normal operation. The chip drives an INT pin for alerting the controller device in this case.
Reset generation
The circuit is initialized by the external SDN pin.
Clock generation
The device has an internal oscillator. Provision is also made if the application would like to make use of an external clock input.
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© 2009 ROHM Co., Ltd. All rights reserved.
3/14
2009.04 - Rev.B
BU21010MUV
Technical Note
Pin Description
Pin
No.
Name I/O Function Note
1 SDA In/Out
2 SCL In
Communication data sending and receiving Communication synchronous clock input
3 INT Out Output of interrupt
4 SDN In Shutdown input
- DVDD "Hi-Z"
- DVDD -
"L" : Active mode "H" : Idle mode "L" : Halt condition "H" : state of operation
Supply
Reference
Reset
Level
DVDD "L"
DVDD -
5 SREF AIn Standard capacitor input - AVDD "Hi-Z"
6 SIN0 AIn sensor input0 - AVDD "Hi-Z"
7 GND Ground Analog and digital ground - - - -
8 SIN1/LED0 AIn/Out sensor input 1 / LED control output 0
sensor input , LED drive select
AVDD "Hi-Z"
9 SIN2 AIn sensor input2 - AVDD "Hi-Z"
10 SIN3/LED1 AIn/Out sensor input 3 / LED control output 1
sensor input , LED drive select
AVDD "Hi-Z"
11 SIN4 AIn sensor input4 - AVDD "Hi-Z"
12 SIN5/LED2 AIn/Out sensor input 5 / LED control output 2
sensor input , LED drive select
AVDD "Hi-Z"
13 SIN6 AIn sensor input6 - AVDD "Hi-Z"
14 SIN7/LED3 AIn/Out sensor input 7 / LED control output 3
sensor input , LED drive select
AVDD "Hi-Z"
15 AVDD Power Digital part Power supply - AVDD - -
I/O Pad
16 DVDD Power Analog part Power supply - DVDD - -
I/O Circuit
CMOS INPUT CMOS Schmitt INPUT CMOS OUTPUT
CIN
PAD
CMOS 3stute OUTPUT with
ANALOG-SW
PADCIN
CMOS Schmitt INOUT
I
ASW
AIN
PADI
OE
CIN
PADI
OEN
PAD
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© 2009 ROHM Co., Ltd. All rights reserved.
4/14
2009.04 - Rev.B
BU21010MUV
Technical Note
HOST I/F 2 wire serial, BUS
Slave mode only Slave Address = 5Eh Normal Normal mode. 100kHz Transfer rate Fs mode (Fast mode. 400kHz Transfer rate) also. Not adapting sequential read / write.
Data format
t
HD;STA
t
SU;STO
SDA
t
SU;DAT
t
HD;DAT
SCL
Address
Read
ACK
Data Data
ACK
ACK
Parameter
Standard mode High Speed mode
MIN MAX MIN MAX
fSCL : SCL Clock Freq 0 100 0 400 kHz
tHD;STA : START condition hold time 4.0 - 0.6 - μsec
tLOW : SCL “L” 4.7 - 1.3 - μsec
tHIGH : SCL “H” 4.0 - 0.6 - μsec
tHD;DAT : Data hold time 0.1 3.45 0.1 0.9 μsec
tSU;DAT : Data setup time 0.25 - 0.1 - μsec
tSU;STO : START condition hold time 4.0 - 0.6 - μsec tBUF : Free time of bus between STOP condition and START
condition
4.7 - 1.3 - μsec
PROTOCOL
Unit
Write Protocol
S SLAVE ADDRESS W
7bit = 5Eh 8bit 8bit
A
REGISTER
ADDRESS
A WRITE DATA AP
・Read Protocol
S SLAVE ADDRESS W
A
REGISTER
ADDRESS
A S SLAVE ADDRESS R A READ DATA N P
7bit = 5Eh 8bit 7bit = 5Eh 8bit
from Master to Slave S = START condition
from Slave to Master P = STOP condition
R = data direction READ (SDA HIGH)
W = data direction WRITE (SDA LOW)
A = acknowledge (SDA LOW)
N = not acknowledge (SDA HIGH)
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© 2009 ROHM Co., Ltd. All rights reserved.
5/14
2009.04 - Rev.B
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