MUTE attenuation MTV - -60 -50 dB Vin=1.0Vpp, f=4.43MHz
Common mode rejection ratio CMRR- -60 -40 dB Vin=1Vpp, f=20kHz
Voltage gain
0dB GV0
-6dB GV6
Frequency characteristics 1
[f=24kHz LPF MODE]
Frequency characteristics 2
[THROUGH MODE]
GF11
GF12
GF2
-0.4 0.0 0.4 dB Vin=1Vrms, f=1kHz
A
-6.4 -6.0 -5.6 dB Vin=1Vrms, f=1kHz
A
-2.0 -0.5 1.0 dB Vin=1Vrms, f=24kHz/1kHz
A
- -26 -15 dB Vin=1Vrms, f=96kHz/1kHz
A
-1.0 0.0 1.0 dB Vin=1Vrms, f=50kHz/1kHz
A
Total harmonic distortion THD+N- 0.0020.1 % Vin=1Vrms, f=1kHz ※1
AUDIO
Maximum output level VOM
Cross talk CTA - -100-85 dB Vin=2Vrms, f=1kHz ※1
2.0 2.4 - Vrmsf=1kHz, THD<0.3% ※1
A
MUTE attenuation MTA - -100-85 dB Vin=2Vrms, f=1kHz ※1
Residual noise1
[THROUGH MODE]
Residual noise2
[f=24kHz LPF MODE]
NA - 10 - uVrms
N
A_LPF
- 20 - uVrms
Common mode rejection ratio CMRR- -70 -40 dB Vin=1Vrms, f=1kHz
PSRR PSRR
- -50 - dB ※3
A
[SCL,SDA]
VIL ※4 Vin1L0 - 1.0 V Low Level input voltage
VIH ※4 Vin1H2.0 - 5.5 V High Level input voltage
Input bias current IINI2C-10 0 10 uA
I2C
SDA output voltage VoL 0 - 0.4 V at 3.0mA sink current
[ADR]
VIL Vin2L0 - 1.0 V Low Level input voltage
VIH Vin2H2.0 - 5.1 V High Level input voltage ※5
Input impedance ZIN
※1 400HzHPF + 30kHzLPFON
※2 IHF-A Filter ON
※3 Vin=0.3Vpp, f=100Hz at VCC, 30kHzLPF ON
2
C-BUS(SCL,SDA) SPEC> VIL:-0.5[V]~0.3VDD[V], VIH:0.7 VDD[V]~VDD+0.5 or 5.5[V] (VDD:I2C-BUS_Supply voltage)
※4 <I
<BH7649KS2> Be sure to use as VIL:0.0[V]~1.0[V], VIH:2.0[V]~5.5[V]※5 We recommend that it is connect ADR Pin to 38Pin(VREG Pin) when ADR Pin is used as “H”.
When power is turned on, all parts start from LOW condition.
[Prohibited matter] The terminal inputs of ADR do not change from start to stop condition. Operation error might happen.
*1. 75 ohm Driver connection
At CLAMP mode: Connect directly
At BIAS mode: Connect via coupling capacitor
(N ot o nly 27 -28 pin, b ut a ls o 29 -30 pi n)
75
*1
28 27
MPU
1μ
22μ
VIN1
VGND2
1 2 3
*4
*2. When adjusting gain by external resistors.
(Not only 32-33 pin, but also 34-35pin)
[Abou t the va lue o f the se comp onent s]
○Adju stin g gain by R 2(0 to 2.2kΩ)
○Ad ju stin g C2 re fer to the va lu e of R 2.
*2
SCL
VRE G
LIN1
ARE T1
4 5 6 7 8 9 10 11
1μ 1μ 1μ
R1:2.2kΩ
C2:15pF
R2:2.2kΩ
*2
SDA
VOU T1
RIN1
ABIAS
22μ
C1: 0.1μF (at CLAMP)
1.0μF (at BI AS)
3332
C1:0.1μF(at CLAMP m ode)
1.0μF(at BI AS mo de)
*2
10k
C1 C1
VDIN1
VOU T2
LIN2
ARET 2
1μ 1μ 1μ
Fig.4
10k
VGND 1
VD1 N2
RIN2
AGND
*3. When video isolator is off
(Not only 39-40 pin, but also 41-52 pin)
75
open
4039
*3
22μ
Technical Note
*1
75
75
100μ
22μ
2930 3132 333435 36 37 38 39
VDO UT2
VDSAG2
LIN3
ARET 3
12 13
1μ 1μ 1μ
+
1μ
75
75
100 μ
3
open
22μ
0. 1μ
10μ
10μ
10μ
10μ
22μ
1μ
1μ
1μ
1μ
1μ
1μ
27 28
VVcc
VDSAG1
RIN3
0.1μ
*4. When audio isolator is off
(Not only 6-8 pin, but also 10-12, 14-16, 18-20 pin)
If the absolute maximum ratings for applied voltage and/or operation temperature are exceeded, LSI damage may
result. Therefore, do not apply voltage or use in a temperature that exceeds these absolute maximum ratings. If it is
possible that absolute maximum ratings will be exceeded, use a physical safety device such as a fuse and make sure
that no conditions that might exceed the absolute maximum ratings will be applied to the LSI IC.
(2) GND potential
Regardless of the operation mode, the voltage of the GND pin should be at least the minimum voltage. Actually check
whether or not the voltage at each pin, including transient phenomena, is less than the
GND pin voltage.
(3) Thermal design
The thermal design should be done using an ample margin that takes into consideration the allowable dissipation
under actual use conditions. Perform thermal design in which there are adequate margins by taking into account the
allowable power dissipation in actual states of use.
(4) Shorts between pins and mounting errors
When mounting LSI ICs onto the circuit board, make sure each LSI’s orientation and position is correct. The ICs may
become damaged if they are not mounted correctly when the power is turned on. Similarly, damage may also result if a
short occurs, such as when a foreign object is positioned between pins in an IC, or between a pin and power supply or
GND connection.
(5) Operation in strong electromagnetic field
When used within a strong electromagnetic field, evaluate carefully to avoid the risk of operation faults.
(6) When not using a sag compensation circuit
Connect the sag compensation pin and output pin as closely as possible. There is a danger of high frequency
oscillation. Also make the distance from the output pin (OUT pin, SAG pin) to the 75Ω resistance as short as possible.
(7) When using a sag compensation circuit
Make the length of the output pin (OUT pin, SAG pin) and capacitor as short as possible. There is a danger of high
frequency oscillation. Also make the distance from the output pin (OUT pin, SAG pin) to the 75Ω resistance as short
as possible. If these cautions is not observed in board layout, connect a capacitor (0.01µF~0.1µF) as short as
possible
(8) VGND1(31pin), VGND2(1pin) and AGND(9pin) connection
When to float any one of GND pins(VGND1, VGND2 and AGND) during operation, the internal ESD protection diode
Between VGND1, VGND2 and AGND may be damaged by large current surge. If the abnormal design like floating any
one of GND pins is required, it is advisable to connect external diodes between GND pins. The connection detail of
external diodes is illustrated in Fig.7.
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consent of ROHM Co.,Ltd.
The content specied herein is subject to change for improvement without notice.
The content specied herein is for the purpose of introducing ROHM's products (hereinafter
"Products"). If you wish to use any such Product, please be sure to refer to the specications,
which can be obtained from ROHM upon request.
Examples of application circuits, circuit constants and any other information contained herein
illustrate the standard usage and operations of the Products. The peripheral conditions must
be taken into account when designing circuits for mass production.
Great care was taken in ensuring the accuracy of the information specied in this document.
However, should you incur any damage arising from any inaccuracy or misprint of such
information, ROHM shall bear no responsibility for such damage.
The technical information specied herein is intended only to show the typical functions of and
examples of application circuits for the Products. ROHM does not grant you, explicitly or
implicitly, any license to use or exercise intellectual property or other rights held by ROHM and
other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the
use of such technical information.
The Products specied in this document are intended to be used with general-use electronic
equipment or devices (such as audio visual equipment, ofce-automation equipment, communication devices, electronic appliances and amusement devices).
The Products specied in this document are not designed to be radiation tolerant.
While ROHM always makes efforts to enhance the quality and reliability of its Products, a
Product may fail or malfunction for a variety of reasons.
Please be sure to implement in your equipment using the Products safety measures to guard
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The Products are not designed or manufactured to be used with any equipment, device or
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