ROHM BH6456GUL Technical data

A
2-wire serial interface Lens Driver for Voice Coil Motor (I2C BUS compatible)
BH6456GUL
General Description
The BH6456GUL motor driver provide 1 Full on Driver a H-bridge. This lens driver is offered in an ultra-small functional lens system for use in an auto focus system using a Piezo actuator.
Features
Ultra-small chip size package . Low ON-Resistance Power CMOS output. Built-in 15MHz Oscillator Built-in UVLO (Under Voltage Locked Out: UVLO). Built-in TSD (Thermal Shut Down) circuit. Standby current consumption: 0μA Typ. 1.8V can be put into each control input terminal
Applications
For Auto focus of camera module Digital still camera Camera Modules Lens Auto focus Web Cameras
Typical Application Circuit(s)
SDA
SCL
2-wire
Serial
Interface
TSD
UVLO
PS
Controller
15MHz
OSC
Pre
Driver
Fig.1 Block Diagram
Product structureSilicon monolithic integrated circuitThis product is not designed protection against radioactive rays
Key Specifications
Pch ON Resistance: 0.70Ω(Typ.) Nch ON Resistance: 0.70Ω(Typ.) Standby current consumption: 0μA (Typ.) 15MHz OSC: ±3.0% Operating temperature range: -25 to +85
Package(s) W(Typ.) x D(Typ.) x H(Max.)
VCSP50L1 1.95mm x 1.00mm x 0.55mm
VCC
Band
Gap
VREG
VM
OUTA
H Bridge
OUTB
GND
No.12015EAT03
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1/19
2012.03 - Rev.
BH6456GUL
A
Technical Note
Absolute maximum ratings (Ta=+25°C)
Parameter Symbol Limit Unit Power supply voltage VCC -0.3 to +4.5 V Motor power supply voltage VM -0.3 to +5.5 V Power save input voltage VPS
-0.3 to VCC+0.3 V Control input voltage VIN -0.3 to VCC+0.3 V Power dissipation Pd 530*1 mW Operating temperature range
Topr -25 to +85 °C
Junction temperature Tjmax +125 °C Storage temperature range Tstg -55 to +125 °C H-bridge output current Iout -500 to +500*2 mA
*1
Conditions: mounted on a glass epoxy board (50mm 58mm 1.75mm; 8 layers). In case of Ta>25°C, reduced by 5.3 mW/°C.
*2
Must not exceed Pd, ASO, or Tjmax of 125°C.
Operating Conditions (Ta= -25°C to +85°C)
Parameter Symbol Min. Typ. Max. Unit Power supply voltage VCC 2.3 3.0 3.6 V Motor power supply voltage VM 2.3 3.0 4.8 V Power save input voltage VPS Control input voltage VIN 2-wire serial interface transmission rate SCL
0 - VCC V 0 - VCC V
- - 400 kHz
H-bridge output current Iout - - 400*3 mA
*3
Must not exceed Pd, ASO.
Package Outline Pin Arrangement (Top View)
1PIN MARK
1 2 3 4
AAU
(φ0.15) INDEX POST
0.225±0.05
1.0±0.05
1.95±0.05
φ0.25±0.1
P=0.5×3
Lot No.
0.55MAX
0.1±0.05
P=0.5×1
0.25±0.05
Fig.2 VCSP50L1 Package (Unit: mm)
AVM OUTB SCL SDA
Top View
B OUTA GND VCC PS
Fig.3 Pin Arrangement (Top View)
Side View
Bottom View
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© 2012 ROHM Co., Ltd. All rights reserved.
2/19
2012.02 - Rev.
BH6456GUL
A
Electrical Characteristics (Unless otherwise specified Ta=25°C, VCC=3.0V )
Parameter Symbol
Min. Typ. Max.
Limit
Unit Conditions
Overall Circuit current
during standby operation
ICCST - 0 1
μA
PS=L
Circuit current ICC - 3.2 6.4 mA PS=H, SCL=400kHz, OSC active UVLO UVLO voltage VUVLO 1.8 - 2.2 V Power save input High level input voltage VPSH 1.5 - VCC V Low level input voltage VPSL 0 - 0.5 V High level input current Low level input current
IPSH
IPSL
15 30 60 μA VINH=3.0V
-3 0 - μA VINL=0V Control input(SDA,SCL) High level input voltage Low level input voltage Low level output voltage High level input current Low level input current
VINH VINL
VOL IINH
IINL
1.5 - VCC V 0 - 0.5 V
- - 0.4 V IIN=3.0mA (SDA)
-10 - 10 μA Input voltage=VCC
-10 - 10 μA Input voltage=GND
H Bridge Drive
Output ON-Resistance
Cycle length of sequence drive
RONP - 0.7 1.0 RONN - 0.7 1.0
TMIN 10.35 10.67 11.00 μs*4 Built in CLK 160 count
Output rise time Tr - 0.1 0.8 μs Output fall time Tf - 0.02 0.4 μs
*4
The time that 1 cycle of sequence drive at the below setting of 2-wire serial data
*5
Output switching wave
ta[7:0] = 0x13, brake1[7:0] = 0x03, tb[7:0] = 0x1E, brake2[7:0] = 0x6B, osc[2:0] = 0x0
*5
7.5Ω load condition
*5
7.5Ω load condition
Output voltage
90%
10%
10%
Tf Tr
90%
100
0%
Technical Note
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© 2012 ROHM Co., Ltd. All rights reserved.
3/19
2012.02 - Rev.
BH6456GUL
A
Technical Note
2 wire Serial Interface Register detail
Write mode :S 0 0 0 1 1 0 0 0 A PST2T1T0W3W2W1W0 A D7D6D5D4D3D2D1D0 A P Master is output
Read mode :S00011000APST2T1T0W3W2W1W0AS00011001AD7D6D5D4D3D2D1D0nA P
S=Start condition A=Acknowledge PS=Power save W3~W0=Resister address P=Stop condition nA=not Acknowledge T2~T0=Test bit D7~D0=Data
Write Up date Slave is output
Write Read
Resister
Address W3 W2 W1 W0 D7 D6 D5 D4 D3 D2 D1 D0
0H 0 0 0 0 HiZE initB[2] initB[1] InitB[0] init START MODE dir
1H 0 0 0 1 ta[7] ta[6] ta[5] ta[4] ta[3] ta[2] ta[1] ta[0]
2H 0 0 1 0 brake1[7] brake1[6] brake1[5] brake1[4] brake1[3] brake1[2] brake1[1] brake1[0]
3H 0 0 1 1 tb[7] tb[6] tb[5] tb[4] tb[3] tb[2] tb[1] tb[0]
4H 0 1 0 0 brake2[7] brake2[6] brake2[5] brake2[4] brake2[3] brake2[2] brake2[1] brake2[0]
5H 0 1 0 1 cnt[7] cnt[6] cnt[5] cnt[4] cnt[3] cnt[2] cnt[1] cnt[0]
6H 0 1 1 0 cnt[15] cnt[14] cnt[13] cnt[12] cnt[11] cnt[10] cnt[9] cnt[8]
7H 0 1 1 1 pa pb osc[2] osc[1] osc[0] cntck[2] cntck[1] cntck[0]
8H 1 0 0 0 TEST TEST TEST TEST TEST TEST TEST TEST
9H 1 0 0 1 TEST TEST TEST TEST TEST TEST TEST TEST
AH 1 0 1 0 TEST TEST TEST TEST TEST TEST EXT initEXT
BH 1 0 1 1 TEST TEST TEST TEST TEST TEST TEST TEST
CH 1 1 0 0 TEST TEST TEST TEST TEST TEST TEST TEST
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4/19
2012.02 - Rev.
BH6456GUL
A
Technical Note
2 wire Serial Interface Action Timing Characteristics (Unless otherwise specified, Ta=-25 to +85°C, VCC=2.3 to 4.8V)
Parameter Symbol
FAST-MO DE*6 STANDARD-MODE*6
Min. Typ. Max. Min. Typ. Max. SCL frequency fSCL - - 400 - - 100 kHz Data clock high time tHIGH 0.6 - - 4.0 - - μs Data clock low time tLOW 1.3 - - 4.7 - - μs Start condition hold time tHD:STA 0.6 - - 4.0 - - μs Start condition setup time tSU:STA 0.6 - - 4.7 - - μs Data hold time tHD:DAT 0 - 0.9 0 - 3.45 μs Data setup time tSU:DAT 100 - - 250 - - ns Stop condition setup time tSU:STO 0.6 - - 4.0 - - μs BUS release time tBUF 1.3 - - 4.7 - - μs Noise removal valid period tI 0 - 50 0 - 50 ns
*6
Standard-mode and Fast-mode 2-wire serial interface devices must be able to transmit or receive at that speed.
The maximum bit transfer rates of 100 kbit/s for Standard-mode devices and 400 kbit/s for Fast-mode devices
This transfer rates is provided the maximum transfer rates, for example it is able to drive 100 kbit/s of clocks with Fast-mode.
2 wire Serial Interface Data timing
SCL
SDA
tHD : STA
tBUF
tR
tF
tSU : DAT
tLOW
tHIGH
tHD : DAT
SCL
SDA
tSU : STA
tHD : STA
START BIT
tSU : STO
STOP BIT
Fig.4 Serial data timing Fig.5 Start stop bit timing
Recommend to power supply turning on operation timing
Parameter Symbol
Recommendation limit
Min. Typ. Max.
Unit
PS input H voltage set-up time TPS 1 - - us 2-wire serial interface input data set-up time
tI2C 1 - - us
Sequence of data input timing to power supply
VCC,VM
50%
PS
50%
2-wire serial input
50%
Serial data
Unit
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© 2012 ROHM Co., Ltd. All rights reserved.
tPS tI2C
5/19
2012.02 - Rev.
BH6456GUL
A
Driving wave setting
The structure of the driving wave for SIDM
1cycle=(ta+1)+brake1+tb+brake2
Technical Note
1osc 1osc1osc1osc 1osc1osc
ta+1
Ⅱcw(ccw) Ⅵ CCW(cw)
*1
Ⅰ.HiZ
*1
The state at A or B and C is HiZ.
*2
At mode=0,the output logic is a setting of a short brake.
dir(addressOH,D2) Note
Driving wave is set by the 4 parameters of ta / brake1 / tb / brake2. osc period is set by the osc(Internal CLK basic cycle setting).
ta : On section is ( ta +1-1) = ta counts for cw(ccw) state. brake1 : On section is (brake1 -1) count for short brake state. tb : On section is (tb1 -1) count for ccw(cw) state. brake2 : On section is (brake2 -1) count for short brake state.
Ex. In case of setting 1 cycle = 10.67
osc[2:0]( = Basic cycle setting ) = 3’b000 = Basic cycle = 66.67ns)、and ta / brake1 / tb / brake2 setting below;
brake1
*1
ⅢHiZ
Ⅴ HiZ
Ⅳ Short brake
tb
*1
*2
Ⅶ HiZ
*1
0 OUTA OUTB Move to the direction of Macro
1 OUTB OUTA Move to the direction of
μsta = 1.27μsbrake1 = 0.13μstb = 1.93μs, brake2 = 7.07μs.
ta[7:0] = 0x13 = 19 count ON section = 19+1-1= 19 count brake1[7:0] = 0x03 = 3 count ON section = 2 count tb[7:0] = 0x1E = 30 count ON section = 29 count brake2[7:0] = 0x6B = 107 count ON section = 106 count
brake2
Ⅷ Short brake
*2
CW:Forward rotation
CCW:Reverse rotation
ta
Ⅱ cw(ccw)
*1
Ⅰ HiZ
Ⅲ HiZ
*1
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6/19
2012.02 - Rev.
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