ROHM BH2227FV, BH2228FV Technical data

D/A Converter Series for Electronic Adjustments
Standard 8bit 4ch6ch Type D/A Converters
Description
The BH2227FV and BH2228FV ICs are 8bit R-2R-type D/A converters with 4 and 6 channels, respectively. Optimized circuitry allows two output voltages to be supplied (3V/5V). Furthermore, the built-in RESET function ensures that the output voltage at all channels is Low during power up. A broad power supply voltage range is available (2.7V-5.5V), providing design flexibility.
Features
1) Suitable for 2 independent power sources (3V/5V)
2) Built-in RESET function
3) High speed output response characteristics
4) 3-line serial interface
5) Broad power supply voltage range: 2.7V-5.5V
Applications
DVCs, DSCs, DVDs, CD-Rs, CD-RWs
Lineup
Parameter BH2227FV BH2228FV
Power source voltage range 2.7 to 5.5V 2.7 to 5.5V
Number of channels 4ch 6ch
Current consumption 0.9mA 0.9mA
Differential non linearity error ±1.0LSB ±1.0LSB
Integral non linearity error ±1.5LSB ±1.5LSB
Output current performance ±1.0mA ±1.0mA
Settling time 100µs 100µs
Data transfer frequency 10MHz 10MHz
Input method CMOS CMOS
Data latch method CSB method CSB method
Package SSOP-B14 SSOP-B14
Absolute Maximum Ratings(Ta=25)
Parameter Symbol Limits Unit Remarks
Power source voltage VCC -0.3 to 7.0 V -
Terminal voltage VIN -0.3 to VCC V ­Storage temperature range TSTG -55 to 125 -
Power dissipation PD 400*1 mW -
*1 Derated at 4.0mW/ at Ta>25 *2 This product is not robust against radiation.
No.11052EBT04
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1/8
2011.08 - Rev.B
BH2227FV, BH2228FV
Recommended Operating Conditions(Ta=25)
Parameter Symbol
VDD power source voltage VDD 2.7 - 5.5 V -
VFS voltage to be impressed VFS 2.7 - 5.5 V -
Terminal input voltage range VIN 0 - VDD V -
Analog output current IO -1.0 - 1.0 mA ­Action temperature range TOPR -20 - 85 -
Serial clock frequency FCLK - 1.0 10.0 MHz -
Limit load capacity CL - - 0.1 µF -
Electrical Characteristics(Unless otherwise specified, VDD=VFS=3.0V, RL=OPEN, CL=0pF, Ta=25℃)
Parameter Symbol
<Current consumption> VDD system IDD - 0.5 1.5 mA VDD=5V,CLK=1MHz
VFS system IFS - 0.3 0.9 mA
<Logic interface>
L input voltage VIL VSS - 0.6 V VDD=5.0V
H input voltage VIH 2.4 - VDD V VDD=5.0V
Input current IIN -10 - 10 µA
<Buffer amplifier>
Output zero scale voltage ZS
FS1
Output full scale voltage
FS2
<D/A converter precision>
Differential non linearity error DNL -1.0 - 1.0 LSB Input code 02H to FDH
Integral non linearity error INL -1.5 - 1.5 LSB Input code 02H to FDH VDD power source voltage rise time trVDD 100 - - µs VDD=0→2.7
Power ON reset release voltage VPOR - 1.9 - V
Min. Typ. Max.
Min. Typ. Max.
VSS - 0.1 V 00h setting, at no load
VSS - 0.3 V 00h setting, IOL=1.0mA
VDD-0.1 - VDD V FFh setting, at no load
VDD-0.3 - VDD V FFh setting,IOH=1.0mA
VFS-0.1 - VFS V FFh setting, at no load
VFS-0.3 - VFS V FFh setting,IOH=1.0mA
Limits
Limits
Unit Remarks
Unit Conditions
Technical Note
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2011.08 - Rev.B
BH2227FV, BH2228FV
A
Timing Chart(Unless otherwise specified, VDD = VFS = 3.0V, RL = OPEN, CL = 0pF, Ta = 25℃)
Limits
Parameter Symbol
MIN. TYP. MAX.
CLK L level time
CLK H level time
DI setup time
DI hold time
CSB setup time
CSB hold time
CSB H level time
D/A Output settling time
tCLKL 50 - - ns
tCLKH 50 - - ns
tsDI 20 - - ns
thDI 40 - - ns
tsCSB 50 - - ns
thCSB 50 - - ns
tCSBH 50 - - ns
tOUT - - 100 µs CL=50pF,RL=10k
tCLKL tCLKH
CLK
tsDI thDI
DI
tsCSB
thCSB
tCSBH
CSB
tOUT
nalog output
Fig.1
Technical Note
Unit Conditions
2.4V
0.6V
2.4V
0.6V
2.4V
0.6V
90% 10%
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3/8
2011.08 - Rev.B
BH2227FV, BH2228FV
Terminal Description / Block Diagrams
(BH2227FV) Terminal Terminal name Function
1 AO1
2 AO2
3 TESTMONI1
4 TESTMONI2
5 AO3
6 AO4
7 NC
8 NC
9 VDD
10 CSB
11 CLK
12 DI
13 VFS
14 VSS
Analog output terminal
Test terminal (OPEN at normal use)
Analog output terminal
Internally not connected yet
Power source terminal (AO3, 4 full scale voltage use in common)
Chip select signal input terminal
Serial clock input terminal
Serial data input terminal AO1,2 full scale
Voltage setting terminal Ground terminal
AO1
AO2
TEST
MONI1
TEST
MONI2
AO3
AO4
NC
VDD
1
VDD
2
3
4
VDD
5
VDD
6
7
VFS
R2R REG
VFS
R2R REG
VDD
R2R REG
VDD
R2R REG
(BH2228FV) Terminal Terminal name Function
1 AO1
2 AO2
3 AO3
4 AO4
Analog output terminal
5 AO5
6 AO6
7 NC
8 NC
Internally not connected yet
Power source terminal
9 VDD
(AO4~6 full scale voltage use
in common) 10 CSB
11 CLK
12 DI
13 VFS
14 VSS
Chip select signal input terminal
Serial clock input terminal
Serial data input terminal
AO1,2,3 full scale
Voltage setting terminal
Ground terminal
AO1
AO2
AO3
AO4
AO5
AO6
NC
VDD
1
VDD
2
VDD
3
VDD
4
VDD
5
VDD
6
7
VFS
R2R REG
VFS
R2R REG
VFS
R2R REG
VDD
R2R REG
VDD
R2R REG
VDD
R2R REG
Equivalent Circuits
Terminal Equivalent circuit Terminal Equivalent circuit
Fig.2
Fig.3
Technical Note
Serial
Interface
PowerOn
Reset
VFS
VDD
Serial
Interface
VDD
PowerOn
Reset
VDD
14
13
12
11
10
14
13
12
11
10
VSS
VFS
DI
CLK
CSB
9
VDD
8
NC
VSS
VFS
DI
CLK
CSB
9
VDD
8
NC
AO1 AO2 AO3 AO4 AO5 AO6
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VDD VDD
DI
CLK
VSS VSS
CSB
VDDVDD
VSSVSS
Fig.4 Equivalent circuit
4/8
2011.08 - Rev.B
BH2227FV, BH2228FV
Technical Note
Operation Description
Command Transmission
The Control command consists of 3-lines of 12bit serial input data (MSB first). Data is read at the rise edge of CLK, and data becomes valid in the CSB Low area (before the CSB rise for 12bit data).
CSB
1 23456789 10 11 12
CLK
DI
D2D3D4D5D6D7D8 D9 D10 D11 X X
D0 D1
Fig.5
Data Settings
D0 D1 D2 D3 D4 D5 D6 D7 Setting
0 0 0 0 0 0 0 0 GND 1 0 0 0 0 0 0 0 (VDD or VFS-GND)/256x1 0 1 0 0 0 0 0 0 (VDD or VFS-GND)/256x2 1 1 0 0 0 0 0 0 (VDD or VFS-GND)/256x3 0 0 1 0 0 0 0 0 (VDD or VFS-GND)/256x4
~ ~ 0 1 1 1 1 1 1 1 (VDD or VFS-GND)/256x254 1 1 1 1 1 1 1 1 (VDD or VFS-GND)/256x255
Note: Initial status D[7:0]=00h
Channel Settings
D8 D9 D10 D11 BH2227FV BH2228FV
0 0 0 0 Inconsequential Inconsequential 0 0 0 1 AO1 AO1 0 0 1 0 AO2 AO2 0 0 1 1 Inconsequential AO3 0 1 0 0 Inconsequential AO4 0 1 0 1 AO3 AO5 0 1 1 0 AO4 AO6 0 1 1 1 Inconsequential Inconsequential 1 0 0 0 Inconsequential Inconsequential 1 0 0 1 Inconsequential Inconsequential 1 0 1 0 Inconsequential Inconsequential 1 0 1 1 Inconsequential Inconsequential 1 1 0 0 Inconsequential Inconsequential 1 1 0 1 Inconsequential Inconsequential 1 1 1 0 Inconsequential Inconsequential 1 1 1 1 Inconsequential Inconsequential
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2011.08 - Rev.B
BH2227FV, BH2228FV
Electrical Characteristics Curves
0.6
0.5
0.4
0.3
0.2
0.1
CIRCUIT CURRENT:IDD[mA]
0.0
85
25
-20
0.0 1.0 2.0 3.0 4.0 5.0 6.0
SUPPLY VOLTAGE:VDD[V]
Fig.6 VDD current
consumption
0.4
VDD=3.0V VDD=3.0V
0.3
0.2
0.1
0.0
-0.1
DNL [LSB]
-0.2
-0.3
-0.4
0 64 128 192 256
INPUT CODE [dec]
0.6
0.5
0.4
85
0.3
25
-20
0.2
0.1
CIRCUIT CURRENT:IFS[mA]
0.0
0.0 1.0 2.0 3.0 4.0 5.0 6.0
SUPPLY VOLTAGE:VFS[V]
Fig.7 VFS current
consumption
1.0
0.8
0.6
0.4
0.2
0.0
-0.2
INL [LSB]
-0.4
-0.6
-0.8
-1.0
0 64 128 192 256
INPUT CODE [dec]
Technical Note
3.0
VDD=3.0V
2.5
2.0
1.5
1.0
0.5
OUTPUT VOLTAGE:Vo[V]
0.0
0 64 128 192 256
INPUT CODE [dec]
Fig.8 Output voltage
characteristic
0.25
0.20
0.15
0.10
DNL [LSB]
0.05
0.00
0.0 1.0 2.0 3.0 4.0 5.0 6.0
SUPPLY VOLTAGE:VCC[V]
Fig.9 Differential non linearity
error
0.45
0.40
0.35
0.30
0.25
0.20
INL [LSB]
0.15
0.10
0.05
0.00
0.0 1.0 2.0 3.0 4.0 5.0 6.0
SUPPLY VOLTAGE:VCC[V]
Fig.12 Power source voltage
to integral non linearity error
3.0
2.5
2.0
1.5
1.0
0.5
RESET VOLTAGE:VPOR[V]
0.0
-50 - 25 0 25 50 75 100
TEMPARATURE:Ta[℃]
Fig.10 Integral non linearity
error
80.0
IL=1.0mA IL=1.0mA
70.0
60.0
50.0
40.0
30.0
20.0
10.0
ZERO SCALE VOLTAGE:ZS[mV]
0.0
85
25
-20
0.0 1.0 2.0 3.0 4.0 5.0 6.0
SUPPLY VOLTAGE:VCC[V]
Fig.13 Output zero scale
voltage
100
80
-20
SETTLING TIME:tOUT[µs]
60
40
20
25 85
0
0.0 1.0 2.0 3.0 4.0 5.0 6.0
SUPPLY VOLTAGE:VCC[V]
Fig.11 Power source voltage to
differential non linearity error
0
-20
-40
-60
-80
-20
-100
-120
FULL SCALE VOLTAGE:FS[mV]
-140
0.0 1.0 2.0 3.0 4.0 5.0 6.0
25
85
SUPPLY VOLTAGE:VCC[V]
Fig.14 Output full scale
voltage
3.0
2.5
2.0
1.5
1.0
0.5
INPUT VOLTAGE:VIL,VIH[V]
0.0
0.0 1.0 2.0 3.0 4.0 5.0 6.0
VIH
VIL
SUPPLY VOLTAGE:VCC[V]
Fig.15 Reset release voltage
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Fig.16 Settling time
6/8
Fig.17 Input voltage
2011.08 - Rev.B
BH2227FV, BH2228FV
Operation Notes
(1) Absolute maximum ratings
Operating or testing the device over the maximum specifications may damage the part itself as well as peripheral components. Therefore, please ensure that the specifications are not exceeded.
(2) GND potential
Ensure that the GND terminal is at the lowest potential under all operating conditions.
(3) Thermal design
Use a thermal design that allows for a sufficient margin regarding power dissipation (Pd) under actual operating conditions.
(4) Terminal shorts and mis-mounting
Incorrect orientation or misalignment of the IC when mounting to the PCB may damage part. Short-circuits caused by The introduction of foreign matter between the output terminals or across the output and power supply or GND may also result in destruction.
(5) Operation in a strong magnetic field
Operation in a strong electromagnetic field may cause malfunction.
(6) Set the power source voltage so that VDD VFS.
(7) Reset function
The power on reset circuit, which initializes internal settings, may malfunction during abrupt power ons. Therefore, set the time constant so as to satisfy the power source rise time.
Thermal Derating Curve SSOP-B14
Board size : 70 x 70 x 1.6mm Material : FR4 glass epoxy board (copper foil area less than 3%)
500
400
300
PD [mW]
200
100
0
0 25 50 75 100 125
Ta [ ℃]
Fig.18
Technical Note
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2011.08 - Rev.B
BH2227FV, BH2228FV
Ordering part number
B H 2 2 2 7 F V - E 2
Part No. Part No.
SSOP-B14
6.4 ± 0.3
0.2
±
4.4
14
1
5.0 ± 0.2
8
0.3Min.
7
0.15 ± 0.1
Package
FV: SSOP-B14
<Tape and Reel information>
Embossed carrier tapeTape
Quantity
Direction of feed
2500pcs E2
The direction is the 1pin of product is at the upper left when you hold
()
reel on the left hand and you pull out the tape on the right hand
Packaging and forming specification E2: Embossed tape and reel
Technical Note
1.15 ± 0.1
0.10
0.65
0.22 ± 0.1
0.1
Direction of feed
(Unit : mm)
Reel
1pin
Order quantity needs to be multiple of the minimum quantity.
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Notes
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Examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the Products. The peripheral conditions must be taken into account when designing circuits for mass production.
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