ROHM BD9673EFJ Technical data

Single-chip Type with Built-in FET Switching Regulators
Flexible Step-down Switching Regulator with Built-in Power MOSFET
BD9673EFJ
Description
Output 1.5A and below High Efficiency Rate Step-down Switching Regulator Power MOSFET Internal Type BD9673EFJ mainly used as secondary side Power supply, for example from fixed Power supply of 12V, 24V etc, Step-down Output of
1.2V/1.8V/3.3V/5V, etc, can be produced. This IC has external Coil/Capacitor down-sizing through 300 kHz Frequency operation, inside Nch-FET SW for 45V “withstand-pressure” commutation and also, high speed load response through Current Mode Control is a simple external setting phase compensation system, through a wide range external constant, a compact Power supply can be produced easily.
Features
1) Internal 200 m Nch MOSFET
2) Output Current 1.5A
3) Oscillation Frequency 300kHz
4) Synchronizes to External Clock ( 200kHz500kHz )
5) Feedback Voltage 1.0V±1.0%
6) Internal Soft Start Function
7) Internal Over Current Protect Circuit, Low Input Error Prevention Circuit, Heat Protect Circuit
8) ON/OFF Control through EN Pin (Standby Current 0 A Typ.)
9) Package: HTSOP-J8 Package
Applications
For Household machines in general that have 12V/24V Lines, etc.
Absolute Maximum Rating
Parameter Symbol Ratings Unit
No.12027ECT57
VCC-GND Supply Voltage BST-GND Voltage BST-Lx Voltage EN-GND Voltage Lx-GND Voltage FB-GND Voltage VC-GND Voltage SYNC-GND Voltage High-side FET Drain Current Power Dissipation Operating Temperature Storage Temperature Junction Temperature
(*1)During mounting of 70×70×1.6t mm 4layer board (Copper area:70mm×70mm).Reduce by 30.08mW for every 1 increase. (Above 25℃)
Operating Conditions (Ta=25) Parameter Symbol
Power Supply Voltage VCC 7 42 V Output Voltage VOUT 1.0
(*2)Restricted by minimum on pulse typ. 200ns
VCC 45 V
VBST 50 V
VBST 7 V
VEN 45 V
VLX 45 V VFB 7 V
VC 7 V
SYNC 7 V
IDH 2.0 A
Pd 3.76 Topr -40~+105 Tstg -55~+150
Tjmax +150
Min. Typ. Max.
(*2)
VCC×0.7 V
(*1)
W
Ratings
Unit
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1/18
2012.02 - Rev.C
BD9673EFJ
Electrical Characteristics (Unless otherwise specified, Ta=25,VCC=24V, Vo=5V, EN=3V) Parameter Symbol
Min. Typ. Max.
Limits
Circuit Current
Technical Note
Unit Conditions
Stand-by current of VCC
Circuit current of VCC
Under Voltage Lock Out (UVLO)
Detect Voltage
Hysteresis width
Oscillator
Oscillating frequency
Max Duty Cycle
Error Amp
FB threshold voltage
Input bias current
Error amplifier DC gain
Trans Conductance
Soft Start Time
Ist 0 10 µA
Icc
1 2 mA
Vuv 6.1 6.4 6.7 V
Vuvhy
200 300 mV
fosc 270 300 330 kHz
Dmax 85 91 97 %
VFB 0.990 1.000 1.010 V
IFB -1.0 0 1.0 µA
A
700 7000 70000 V/V
VEA
110 220 440 µA/V
G
EA
Tsoft 7 10 13 ms
VEN=0V
FB=1.2V
VFB=0V
IVC=±10µA, VC=1.5V
Current Sense Amp
VC to switch current transconductance
Output
Lx NMOS ON resistance
Lx pre-charge NMOS ON resistance
Over Current Detect Current
CTL
EN Pin Control voltage
ON OFF
EN Pin input current
SYNC
SYNC Pin Control voltage
High Low
SYNC Pin input current
SYNC falling edge to LX rising edge delay
Not designed to withstand radiation.
5 10 20 A/V
G
CS
RonH 200 340 m
RonL
10 17
Iocp 2.0 3.3 A
VENON 2 VCC V
VENOFF -0.3 0.8 V
REN 2.7 5.5 11 µA
VSYNCH 2.0 5.5 V VSYNCL -0.3 0.8 V
REN 6 12 24 µA
tdelay 200 400 600 ns
VEN=3V
VSYNC=3V
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V
A
A
BD9673EFJ
Pin Description
8765
Thermal Pad
Technical Note
Pin
No.
Pin
Name
Function
1 Lx Terminal for inductor
2 GND Ground pin
3 VC Error amplifier output
4 FB Inverting node of the trans conductance error amplifier
1 234
Fig.1 Pin Layout Diagram
Block Diagram
ON/OFF
EN
FB
1.0
Soft
Start
­+ +
TSD
shutdown
Error
MP
VC
ReferenceUVLO
VREF
Comparator
-
Σ
+
Oscillator
300kHz
5 SYNC
Input pin of an external signal for the device synchronized by external signal
6 EN Stand-by ON/OFF pin
7 BST Voltage Supply pin for High Side FET Driver
8 VCC Voltage input pin
VCC
REG
Sense
Current
Current
RQ S
MP
BST
200m
LX
10
GND
SYNC
Fig.2 Block Diagram
VOUT
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BD9673EFJ
Block Description
1. Reference This block generates Error Amp standard voltage. Standard voltage is 1.0V.
2. REG This is a Gate Drive Voltage Generator and 5V Low saturation regulator for internal circuit power supply.
3. OSC This is a precise wave oscillation circuit with operation frequency fixed to 300 kHz fixed (self-running mode). To implement the synchronization feature connect a square wave (Hi Level: higher than 2V, Low Level: lower than
0.8V )to the SYNC pin. The synchronization frequency range is 200 kHz to 500 kHz. After connecting the rising edge of LX will be synchronized to the falling edge of SYNC pin signal after 3 counts. At the synchronization remove the external clock, the device transitions self-running mode after 7 microseconds.
4. Soft Start A circuit that does soft start to the output voltage of DC/DC comparator, and prevents rush current during start-up. Soft start time is set at IC internal, after 10 ms from starting-up EN pin, standard voltage comes to 1.0V, and output voltage becomes set voltage.
5. ERROR AMP This is an Error amplifier what detects output signal, and outputs PWM control signal. Internal Standard Voltage is set to 1.0V. Also, C and R are connected between the output (VC) pin GND of Error Amp as Phase compensation elements. (See p.11)
6. ICOMP This is a Voltage-Pulse Width Converter that controls output voltage in response to input voltage. This compares the Voltage added to the internal SLOPE waveform in response to the FET WS current with Error amplifier output voltage, controls the width of output Pulse and outputs to driver.
7. Nch FET SW This is an internal commutation SW that converts Coil Current of DC/DC Comparator. It contains 45V” with stand pressure” 200m SW. Because the Current Rating of this FET is 2.0A included ripple current, please use at within 2.0A. The device has the circuit of over current protection for protecting the FET from over current. To detect OCP 2 times sequentially, the device will stop and after 13msec restart.
8. UVLO This is a Low Voltage Error Prevention Circuit. This prevents internal circuit error during increase of power supply voltage and during decline of power suppl y voltage. It monitors VCC pin voltage and internal REG voltage, and when VCC voltage becomes 6.4V and below, it turns off all output FET and turns off DC/DC comparator output and soft start circuit resets. Now this threshold has hysteresis of 200mV.
9. TSD This is a Heat Protect (Temperature Protect) Circuit. When it detects an abnormal temperature exceeding Maximum Junction Temperature (Tj=150), it turns off all output FET, and turns off DC/DC comparator output. When Temperature falls, it has/with hysteresis and automatically returns.
10. EN With the Voltage applied to EN Pin (6pin), IC ON/OFF can be controlled. When a Voltage of 2.0V or more is applied, it turns on, at open or 0V application, it turns off. About 550 k pull-down resistance is contained within the pin.
Technical Note
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BD9673EFJ
Technical Note
Detailed Description
Synchronizes to External Clock
The SYNC pin can be used to synchronize the regulator to an exter nal system clock. To implement the synchronization feature connect a square wave to SYNC pin. The square wave am plitude must transition lo wer than 0.8V and higher than
2.0V on the SYNC pin and have an on time greater than 100 ns and an off time greater than 100 ns. The synchronization frequency range is 200 kHz to 500 kHz. The rising edge of the LX will be synchronized to the falling edge of SYNC pin signal after SYNC input pulse 3 count. At the synchronization, the external clock is removed, the device transitions self-running mode after 7 microseconds. If the function of the synchronization is not used, please connect SYNC pin to ground.
SYNC
SYNC_LATCH
Set the latch for synchronization
400nsec
Lx
about 7µsec
Fig.3 Timing chart at Synchronization
SOFT START
The soft start time of BD9763EFJ is determined by the DCDC operating frequency (self-run mode 300 kHz 10ms). If synchronization is used at the time of EN=ON, The soft start time is restricted by SYNC pin input pulse frequency. SYNC pin input pulse frequency is fosc_ex kHz, the soft start time is expressed by below equation.
Tss = × 10 [ms]
300
fosc_ex
The case of not using the function of synchronization
Although the SYNC pin is pulled down by resistor in this
device, if the function of the synchronization is not used , it is recommended to connect SYNC pin to ground.
Fig.4 the method to disposal the SYNC pin without synchronization
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BD9673EFJ
OCP operation
The device has the circuit of over current protection for protecting the FET from over current. To detect OCP 2 times sequentially, the device will stop and after 13msec restart.
VC
VC voltage rising by
output connect to GND
OCP threshold
Lx
VC voltage discharged
by OCP latch
force the High side FET OFF
by detecting OCP current
(pulse by pulse protection)
output connect to GND
VOUT
OCP
set the OCP latch by detectin g
the OCP current 2 times sequencially
OCP_LATCH
Fig.5 Timing chart at OCP operation
Technical Note
OCP latch reset after 13 msec
(300Hz 4000 counts)
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6/18
2012.02 - Rev.C
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