ROHM BD8301MUV Technical data

Single-chip Type with Built-in FET Switching Regulator Series

High-efficiency Step-up/down Switching Regulator with Built-in Power MOSFET

BD8301MUV

●General Description

ROHM’s highly-efficient step-up/down switching regulator BD8301MUV produces step-up/down output including 3.3 V from 1 cell of lithium battery with just one coil. This IC adopts an original step-up/down drive system and creates a higher efficient power supply than conventional Sepic-system or H-bridge system switching regulators.

●Features

1) Highly-efficient step-up/down DC/DC converter to be constructed just with one inductor.

2) Input voltage 2.5 V - 5.5 V

3) Output current 1 A at 3.3 V 800 mA at 5.0 V

4) Incorporates soft-start function.

5) Incorporates timer latch system short protecting function.

6) High heat radiation surface mounted package VQFN020V4040

●Application

General portable equipment like portable audio or DSC/DVC

●Absolute Maximum Ratings

Parameter Symbol Ratings Unit

Maximum applied power voltage Vcc,PVCC 7.0 V

Maximum input current Iinmax 2.0 A

Maximum input voltage

Power dissipation Pd 700 mW

Operating temperature range Topr -25 to +85 ºC

Storage temperature range Tstg -55 to +150 ºC

Junction temperature Tjmax 150 ºC

*1 When installed on a 70.0 mm × 70.0 mm × 1.6 mm glass epoxy board. The rating is reduced by 5.6 mW/°C at Ta = 25°C or more.

●Operating Conditions (Ta = 25°C)

Parameter Symbol

Power supply voltage Vcc 2.5 to 5.5 V

Output voltage OUT 2.8 to 5.2 V

Lx1 7.0 V

Lx2 7.0 V

Voltage range Unit

No.09027ECT07

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BD8301MUV

●Electrical Characteristics

(Unless otherwise specified, Ta = 25 °C, VCC = 3.7 V)

Parameter Symbol

[Low voltage input malfunction preventing circuit]

Detection threshold voltage VUV - 2.25 2.45 V Vcc monitor Hysteresis range ΔVUVhy 50 100 150 mV

[Oscillator] Oscillation frequency fosc 0.8 1.0 1.2 MHz RT=47kΩ

[Error AMP]

INV threshold voltage VINV 0.790 0.800 0.810 V

Input bias current IINV -50 0 50 nA Vcc=7.0V , VINV=3.5V Soft-start time Tss 0.6 1.00 1.4 msec RT=47kΩ Output source current IEO 10 20 30 μA VINV=0.5V , VFB =1.5V

Output sink current IEI 0.7 1.5 3.0 mA VINV=1.1V , VFB =1.5V

[PWM comparator]

LX1 Max Duty Dmax1 - - 100 %

LX2 Max Duty Dmax2 77 85 93 %

[Output] LX1 PMOS ON resistance RON1p - 120 200 mΩ VGS=3.0V LX1 NMOS ON resistance RON1n - 100 160 mΩ VGS=3.0V LX2 PMOS ON resistance RON2p - 120 200 mΩ VGS=3.0V LX2 NMOS ON resistance RON2n - 100 160 mΩ VGS=3.0V LX1 leak current I leak1 -1 0 1 μA LX2 leak current I leak2 -1 0 1 μA

[STB]

STB pin ontrol voltage

STB pin pull-down resistance RSTB 250 400 700 kΩ

[Circuit current]

Standby current

Circuit current at operation VCC Icc1 - 500 750 μA VINV=1.2V

Circuit current at operation PVCC Icc2 - 10 20 μA VINV=1.2V

Operation VSTBH 1.5 - 5.5 V

No-operation VSTBL -0.3 - 0.3 V

VCC pin ISTB1 - - 1 μA PVCC pin ISTB2 - - 1 μA VOUT pin ISTB3 - - 1 μA

Target Value

Min Typ Max

Unit Conditions

Technical Note

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BD8301MUV

●Description of Pins

PVCC

15 14 13 12 11

PGND Lx1

PVCC

VCC

STB

PGND

Lx2

VOUT

Fig.1 Pin layout

12345

INV

VOUT

GND

Pin No. Pin Name Function

1 FB

2 INV

3～4 5～6 VOUT 7～8 Lx2

9～12 PGND 13～14 Lx1 15～17

18 VCC

19 STB

20 RT

●Block Diagram

STB

VCC

STBY_IO

GND

ERROR_AMP

INV

VREF

Soft Start

+-+

OSC

Reference

VREF

FB H

STOP

CONTROL

DRIVER

PWM

PRE

UVLO

SCP

16000 ｃount

TIMMING

CONTROL

TIMMING

CONTROL

DRIVER

VOUT

LX2

Fig.2 Block diagram

PVCC

PRE

GND

PVCC

PRE

DRIVER

PRE

DRIVER

Technical Note

Error AMP output terminal

Error AMP input terminal

Ground terminal

Output voltage terminal

Output side coil connecting terminal

Power transistor ground terminal

Input side coil connecting terminal

DC/DC converter input terminal Control part power supply input

terminal ON/OFF terminal

Oscillation frequency set terminal

LX1

PGND

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BD8301MUV

●Description of Blocks

1.VREF This block generates ERROR AMP reference voltage. The reference voltage is 0.8 V.

2.UVLO Circuit for preventing low voltage malfunction Prevents malfunction of the internal circuit at activation of the power supply voltage or at low power supply voltage. Monitors VCC pin voltage to turn off all output FET and DC/DC converter output when VCC voltage is lower than 2.2 V, and reset the timer latch of the internal SCP circuit and soft-start circuit.

3.SCP Timer latch system short-circuit protection circuit When the INV pin is the set 0.8 V or lower voltage, the internal SCP circuit starts counting. The internal counter is in synch with OSC; the latch circuit activates after the counter counts about 16000 oscillations to turn off DC/DC converter output (about 16 msec when RT = 47kΩ). To reset the latch circuit, turn off the STB pin once. Then, turn it on again or turn on the power supply voltage again.

4.OSC Oscillation circuit to change frequency by external resistance of the RT pin (20 pin). When RT = 47 kΩ, operation frequency is set at 1 MHz.

5.ERROR AMP Error amplifier for detecting output signals and output PWM control signals The internal reference voltage is set at 0.8 V.

6.PWM COMP Voltage-pulse width converter for controlling output voltage corresponding to input voltage Comparing the internal SLOPE waveform with the ERROR AMP output voltage, PWM COMP controls the pulse width and outputs to the driver. Max Duty and Min Duty are set at the primary side and the secondary side of the inductor respectively, which are as follows: Primary side (Lx1) Max Duty : 100 %, Min Duty : 0 % Secondary side (Lx2) Max Duty : 100 %, Min Duty : About 15 %

7.SOFT START Circuit for preventing in-rush current at startup by bringing the output voltage of the DC/DC converter into a soft-start Soft-start time is in synch with the internal OSC, and the output voltage of the DC/DC converter reaches the set voltage after about 1000 oscillations (About 1 msec when RT = 47 kΩ).

8.PRE DRIVER CMOS inverter circuit for driving the built-in Pch/Nch FET Dead time is provided for preventing feedthrough during switching. The dead time is set at about 15 nsec for each individual SWs.

9. STBY_IO Voltage applied on STB pin (19 pin) to control ON/OFF of IC Turned ON when a voltage of 1.5 V or higher is applied and turned OFF when the terminal is open or 0 V is applied. Incorporates approximately 400 kΩ pull-down resistance.

10. Pch/Nch FET SW Built-in SW for switching the coil current of the DC/DC converter. Pch FET is about 120 mΩ and Nch is 100 mΩ. Since the current rating of this FET is 2 A, it should be used within 2 A in total including the DC current and ripple current of the coil.

Technical Note

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BD8301MUV

●Reference Data

(Unless otherwise specified, Ta = 25°C, VCC = 3.7 V)

0.810

0.805

0.800

VCC=3.7V

INV THRESHOLD [V]

VCC=2.4V

0.795

0.790

-50 0 50 100 150

TEMPERATURE [℃]

Fig.3 INV threshold

VCC=5.5V

VCC=7.0V

1.20

1.15

1.10

1.05

1.00

0.95

0.90

FREQUENCY [MHz]

0.85

0.80

23456

VCC [℃]

Fig.6 Oscillation frequency

(power supply property)

INV=0.5V

-5

-10

-15

-20

-25

-30

FB SOURCE CURRENT [uA]

-35

-40

0.0 0.5 1.0 1.5 2.0

FB VOLTAGE [V]

Fig.9 FB source current

0.810

UVLO

0.805

0.800

INV THRESHOLD [V]

0.795

0.790

0.0 2.0 4.0 6.0 8.0

VCC [V]

Fig.4. INV threshold (power supply property)

2.6

2.5

2.4

2.3

2.2

2.1

2.0

UVLO THRESHOLD [V]

1.9

1.8

-50 0 50 100 150

TEMPARATURE [℃]

RESET

DETECT

Fig.7 UVLO threshold

300

Io=500mA

250

VCC=2.0V

200

150

100

ON RESISTANCE [mΩ]

-60 - 10 40 90 140

VCC=3.0V

VCC=3.7V

TEMPERATURE [℃]

VCC=6.0V

Fig.10 Lx1 Pch FET ON resistance

Technical Note

1.20

1.15

1.10

1.05

1.00

0.95

0.90

FREQUENCY [MHz]

0.85

0.80

-50 0 50 100 150

TEMPERATURE [℃]

Fig.5 Oscillation frequency

2.0

INV=1.1V

1.8

1.6

1.4

1.2

1.0

0.8

0.6

FB SINK CURRENT [mA]

0.4

0.2

0.0

01234

300

250

200

150

100

ON RESISTANCE [mΩ]

-60 - 10 40 90 140

Fig.11 Lx1 Nch FET ON resistance

FB VO LTAGE [V]

Fig.8 FB sink current

Io=500mA

VCC=3.7V

VCC=2.0V

VCC=3.0V

TEMPERATURE [℃]

VCC=6.0V

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BD8301MUV

300

Io=500mA

250

200

150

VCC=2.0V

VCC=3.0V

VCC=3.7V

100

ON RESISTANCE [mΩ]

-60 - 10 40 90 140

TEMPERATURE [℃]

Fig.12 Lx2 Pch FET ON resistance

INV=1.1V

PVCC CURRENT [uA]

01 23 45 67

PVCC VOLTAGE [V]

Fig.15 PVCC input current

VCC=6.0V

300

Io=500mA

250

200

150

VCC=2.0V

100

ON RESISTANCE [mΩ]

-60 - 10 40 90 140

VCC=3.0V

TEMPERATURE [℃]

VCC=6.0V

VCC=3.7V

Fig.13 Lx2 Nch FET ON resistance

INV=1.1V

VOUT CURRENT [uA]

01 23 45 67

VOUT VOLTAGE [V]

Fig.16 VOUT input current

Technical Note

1000

INV=1.1V

800

600

400

VCC CURRENT [uA]

200

01 234567

VCC VOLTAGE [V]

Fig.14 VCC input current

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●Example of Application Input: 2.8 to 5.5 V, output: 3.3 V / 1.0 A, frequency 600 kHz

10uF(ceramic)

murata

GRM31CB11A106KA01

2.8～5.5V

1213

PVCC

Lx1

PVCC

RVIN

PVCC

Lx1

PGND

VCC

Lx2

ON/OFF

STB

Lx2

82k

INV

GND

VOUT

5432

CVCC 1uF

CFB

1500p

RFB 7.5k

Fig.17 Example of Application

●Example of Board Layout

GND

VBAT

CVIN

Lx1

PGND

RVCC

CVCC

CFB RFB

RC CC

↑

1pin

VOUT

RINV2

RINV1

Lx2

CVOUT

VOUT

VCC

GND

Fig.18 Example of Board Layout

Technical Note

4.7uH TOKO DE3518C

10uF(ceramic)

murata

GRM31CB11A106KA01

RINV1

75k

RINV2

24k

150p

5.1k

3.3V/1.0A

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BD8301MUV

Technical Note

●Reference Application Data

100

VBAT=2.8V

EF FIC IENC Y [%]

1 10 100 1000

VBAT=3.7V

VBAT=4.2V

OU TPUT CURRE NT [ mA]

Fig.19 Power conversion efficiency

3.33

Io=600mA

3.32

3.31

3.30

3.29

OUTPUT VOLTAGE [V]

3.28

3.27

2.0 3.0 4.0 5.0 6.0

INPUT VOLTAGE [V]

Fig.20 Line regulation

3.33

VBAT=3.7V

3.32

3.31

3.30

3.29

OUTPUT VOLTAGE [V]

3.28

3.27 1 10 100 1000

OUTPUT CURRENT [mA]

Fig.21 Load regulation

●Selection of Parts for Applications

(1) Output inductor

A shielded inductor that satisfies the current rating (current value, Ipeak as shown in the drawing below) and has a low DCR (direct current resistance component) is recommended. Inductor values affect output ripple current greatly. Ripple current can be reduced as the coil L value becomes larger and the switching frequency becomes higher as the equations shown below.

ΔIL

Ipeak =Iout ×(Vout/VIN) /η+ ∆IL/2 [A] (1)

Fig. 22 Ripple current

(Vin-Vout)

Vout

⊿IL= × × [A] (in step-down mode) (2)

|(Vin-Vout)|

Vin

Vout×2×0.85

⊿IL= × × [A] (in step-up/down mode) (3)

(Vin+Vout)

(Vout-Vin)

⊿IL= × × [A] (in step-up mode) (4)

Vin

Vout

(η: Efficiency, ∆IL: Output ripple current, f: Switching frequency)

As a guide, output ripple current should be set at about 20 to 50% of the maximum output current.

* Current over the coil rating flowing in the coil brings the coil into magnetic saturation, which may lead to lower efficiency or output oscillation. Select an inductor with an adequate margin so that the peak current does not exceed the rated current of the coil.

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Technical Note

(2) Output capacitor

A ceramic capacitor with low ESR is recommended for output in order to reduce output ripple. There must be an adequate margin between the maximum rating and output voltage of the capacitor, taking the DC bias property into consideration. Output ripple voltage when ceramic capacitor is used is obtained by the following equation.

Vpp=⊿IL× + ⊿IL×R

2π×f×Co

[V] ・・・ (5)

ESR

Setting must be performed so that output ripple is within the allowable ripple voltage.

(3) Setting of oscillation frequency

Oscillation frequency can be set using a resistance value connected to the RT pin (1 pin). Oscillation frequency is set at 1 MHz when RT = 47 kΩ, and frequency is inversely proportional to RT value. See Fig. 23 for the relationship between RT and frequency. Soft-start time changes along with oscillation frequency. See Fig. 24 for the relationship between RT and soft-start time.

10000

1000

SWITCHNG FREQUENCY [kHz]

100

1 10 100 1000

RT PIN RESISTANCE [kΩ]

SOFT START TIME [msec]

0.1

1 10 100 1000

RT PIN RESISTANCE [kΩ]

Fig. 23 Oscillation frequency – RT pin resistance

* Note that the above example of frequency setting is just a design target value, and may differ from the actual equipment.

Fig. 24 Soft-start time – RT pin resistance

(4) Output voltage setting

The internal reference voltage of the ERROR AMP is 0.8 V. Output voltage should be obtained by referring to Equation (8) of Fig. 25.

VOUT

INV

ERROR AMP

(R1+R2)

Vo= ×0.8 [V] ・・・ (8)

VREF

0.8V

Fig. 25 Setting of feedback resistance

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Technical Note

(5) Determination of phase compensation

Condition for stable application The condition for feedback system stability under negative feedback is as follows:

- Phase delay is 135 °or less when gain is 1 (0 dB) (Phase margin is 45° or higher)

Since DC/DC converter application is sampled according to the switching frequency, the GBW of the whole system (frequency at which gain is 0 dB) must be set to be equal to or lower than 1/5 of the switching frequency. In summary, target property of applications is as follows:

- Phase delay must be 135°or lower when gain is 1 (0 dB) (Phase margin is 45° or higher).

- The GBW at that time (frequency when gain is 0 dB) must be equal to or lower than 1/5 of the switching frequency.

For this reason, switching frequency must be increased to improve responsiveness.

One of the points to secure stability by phase compensation is to cancel secondary phase delay (-180°) generated by LC resonance by the secondary phase lead (i.e. put two phase leads). Since GBW is determined by the phase compensation capacitor attached to the error amplifier, when it is necessary to reduce GBW, the capacitor should be made larger.

GAIN [dB]

(A)

-20dB/decade

(B)

PHASE [degree]

Fig.26 General integrator

Error AMP is a low-pass filter because phase compensation such as (1) and (2) is performed. For DC/DC converter application, R is a parallel feedback resistance.

0°

-90°

Phase margin

-180°

Point (A) fp= [Hz] (9)

2πRCA

Point (B) f

= [Hz] (10)

GBW

2πRC

Fig.27 Frequency property of integrator

Phase compensation when output capacitor with low ESR such as ceramic capacitor is used is as follows:

When output capacitor with low ESR (several tens of mΩ) is used for output, secondary phase lead (two phase leads) must be put to cancel secondary phase lead caused by LC. One of the examples of phase compensation methods is as follows:

VOUT

Phase delay fp1 = [Hz] (13)

LC resonance frequency = [Hz] (14)

Fig.28 Example of setting of phase compensation

Phase lead fz1 = [Hz] (11)

Phase lead fz2 = [Hz] (12)

2πR1C1

2πR4C2

2πR3C1

2π√(LC)

For setting of phase-lead frequency, both of them should be put near LC resonance frequency. When GBW frequency becomes too high due to the secondary phase lead, it may get stabilized by setting the primary phase delay to a frequency slightly higher than the LC resonance frequency by R3 to compensate it.

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Technical Note

●I/O Equivalence Circuit

VCC VCC

INV

VCCVCC

INV

VOUT,Lx2,PGND

VOUT

Lx2

PVCC,Lx1,PGND

PVCC

Lx1

VCC

PGND

VCC

PGND

STB

VCC

STB

VCC

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Fig.29 I/O Equivalence Circuit

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Technical Note

●Precautions for Use

1) Absolute Maximum Rating We dedicate much attention to the quality control of these products, however the possibility of deterioration or destruction exists if the impressed voltage, operating temperature range, etc., exceed the absolute maximum ratings. In addition, it is impossible to predict all destructive situations such as short-circuit modes, open circuit modes, etc. If a special mode exceeding the absolute maximum rating is expected, please review matters and provide physical safety means such as fuses, etc.

2) GND Potential Keep the potential of the GND pin below the minimum potential at all times.

3) Thermal Design Work out the thermal design with sufficient margin taking power dissipation (Pd) in the actual operation condition into account.

4) Short Circuit between Pins and Incorrect Mounting Attention to IC direction or displacement is required when installing the IC on a PCB. If the IC is installed in the wrong way, it may break. Also, the threat of destruction from short-circuits exists if foreign matter invades between outputs or the output and GND of the power supply.

5) Operation under Strong Electromagnetic Field Be careful of possible malfunctions under strong electromagnetic fields.

6) Common Impedance When providing a power supply and GND wirings, show sufficient consideration for lowering common impedance and reducing ripple (i.e., using thick short wiring, cutting ripple down by LC, etc.) as much as you can.

7) Thermal Protection Circuit (TSD Circuit) This IC contains a thermal protection circuit (TSD circuit). The TSD circuit serves to shut off the IC from thermal runaway and does not aim to protect or assure operation of the IC itself. Therefore, do not use the TSD circuit for continuous use or operation after the circuit has tripped.

8) Rush Current at the Time of Power Activation Be careful of the power supply coupling capacity and the width of the power supply and GND pattern wiring and routing since rush current flows instantaneously at the time of power activation in the case of CMOS IC or ICs with multiple power supplies.

) IC Terminal Input

This is a monolithic IC and has P+ isolation and a P substrate for element isolation between each element. P-N junctions are formed and various parasitic elements are configured using these P layers and N layers of the individual elements. For example, if a resistor and transistor are connected to a terminal as shown on Fig.30:

○The P-N junction operates as a parasitic diode when GND > (Terminal A) in the case of a resistor or

when GND > (Pin B) in the case of a transistor (NPN)

○Also, a parasitic NPN transistor operates using the N layer of another element adjacent to the previous diode in

the case of a transistor (NPN) when GND > (Pin B). The parasitic element consequently rises under the potential relationship because of the IC’s structure. The parasitic element pulls interference that could cause malfunctions or destruction out of the circuit. Therefore, use caution to avoid the operation of parasitic elements caused by applying voltage to an input terminal lower than the GND (P board), etc.

(Pin A)

Resistor

P Substrate

P+

Parasitic Element

Fig.30 Example of simple structure of Bipolar IC

(Pin B)

Parasitic Element

Transistor (NPN)

P Substrate

～

GND

(Pin A)

Parasitic Element

GND

～

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●Ordering part number

B D 8 3 0 1 M U V - E 2

Part No. Part No.

VQFN020V4040

4.0±0.1

0.4±0.1

1.0MAX

0.08 S C0.2

1.0

15 11

1PIN MARK

2.1±0.1

4.0±0.1

0.02

(0.22)

+0.03

0.5

0.02

2.1±0.1

+0.05

0.25

0.04

(Unit : mm)

Package

MUV: VQFN020V4040

Embossed carrier tapeTape

Quantity

Direction of feed

2500pcs E2

The direction is the 1pin of product is at the upper left when you hold

()

reel on the left hand and you pull out the tape on the right hand

Reel

1pin

Packaging and forming specification E2: Embossed tape and reel

Order quantity needs to be multiple of the minimum quantity.

∗

Technical Note

Direction of feed

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Notes

No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd.

The content specied herein is subject to change for improvement without notice.

The content specied herein is for the purpose of introducing ROHM's products (hereinaf ter "Products"). If you wish to use any such Product, please be sure to refer to the specications, which can be obtained from ROHM upon request.

Examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the Products. The peripheral conditions must be taken into account when designing circuits for mass production.

Great care was taken in ensuring the accuracy of the information specied in this document. However, should you incur any damage arising from any inaccuracy or misprint of such information, ROHM shall bear no responsibility for such damage.

The technical information specied herein is intended only to show the typical functions of and examples of application circuits for the Products. ROHM does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by ROHM and other par ties. ROHM shall bear no responsibility whatsoever for any dispute arising from the use of such technical information.

Notice

The Products specied in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, ofce-automation equipment, communication devices, electronic appliances and amusement devices).

The Products specied in this document are not designed to be radiation tolerant.

While ROHM always makes ef forts to enhance the quality and reliability of its Products, a Product may fail or malfunction for a variety of reasons.

Please be sure to implement in your equipment using the Products safety measures to guard against the possibility of physical injury, re or any other damage caused in the event of the failure of any Product, such as derating, redundancy, re control and fail-safe designs. ROHM shall bear no responsibility whatsoever for your use of any Product outside of the prescribed scope or not in accordance with the instruction manual.

The Products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injur y (such as a medical instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuel-controller or other safety device). ROHM shall bear no responsibility in any way for use of any of the Products for the above special purposes. If a Product is intended to be used for any such special purpose, please contact a ROHM sales representative before purchasing.

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ROHM BD8301MUV Technical data

Specifications and Main Features

Frequently Asked Questions

User Manual