Power Supply IC Series for TFT-LCD Panels
ingleS -channel Source Voltage
Output Power Supply + Gamma Buffer Amp ICs
BD8151EFV,BD8157EFV
●Description
The BD8151EFV,BD8157EFV power supply IC are designed for use with TFT-LCD panels. It incorporates a built-in source
voltage step-up switching regulator and gamma correction buffer amp. The combination of a source power supply and
gamma correction buffer on a single chip delivers significant cost savings.
Compatible with input voltages from 2.5 V to 5.5 V (BD8151EFV), 2.1 V to 4.0 V (BD8157EFV), the IC supports low-voltage
operation and reaches over 85% efficiency with a 2.5 V input, contributing to low power consumption designs.
●Features
1) Single-chip implementation of a source power supply and gamma correction buffer
2) Support for low-voltage operation, with input voltages from 2.5 V to 5.5 V (BD8151EFV)
2.1 V to 4.0 V (BD8157EFV)
3) Built-in 1.4 A, 0.2 low-voltage FET
4) Switchable step-up DC/DC switching frequencies: 600 kHz/1.2 MHz
5) Current mode PWM control
6) Under-voltage lockout protection circuit
7) Built-in overcurrent protection circuit
8) Built-in thermal shutdown circuit
●Applications
Satellite navigation systems, laptop PC TFT LCD panels
LCD monitor panels
●Absolute maximum ratings (Ta = 25℃)
Parameter Symbol Limit Unit
Power supply voltage Vcc 7 V
Power dissipation Pd 1000* mW
Operating temperature range
Storage temperature range Tstg −55 to +150 ℃
Switching pin current Isw 1.5** A
Switching pin voltage Vsw 15 V
VS voltage VS 15 V
Maximum junction temperature Tjmax 150 °C
* Reduced by 8 mW/℃ over 25℃, when mounted on a glass epoxy board (70 mm x 70 mm x 1.6 mm).
** Must not exceed Pd.
●Recommended Operating Ranges (Ta = 25℃)
Parameter Symbol
Power supply voltage BD8151EFV Vcc 2.5 3.3 5.5 V
Power supply voltage BD8157EFV Vcc 2.1 2.5 4.0 V
Switching current ISW — — 1.4 A
Switching pin voltage VSW — — 14 V
VS pin voltage VS 5 9 14 V
BD8151EFV
BD8157EFV −40 to +125
Topr
Min. Typ. Max.
−40 to +85
Limit
No.09035EBT11
℃
Unit
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1/17
2009.07 - Rev.B
BD8151EFV, BD8157EFV
●Electrical Characteristics BD8151EFV (Unless otherwise specified, Ta = 25℃; Vcc = 3.3V, ENB = 3.3V)
Parameter Symbol
[Triangular waveform oscillator]
Oscillating frequency 1 FOSC1 540 600 660 kHz FCLK = 0 V
Oscillating frequency 2 FOSC2 1.08 1.20 1.32 MHz FCLK = Vcc
[Overcurrent protection circuit]
Overcurrent limit ISW — 2 — A
[Soft start circuit]
SS source current ISO 6 10 14 µA Vss = 0.5 V
[Under-voltage lockout protection circuit]
Off threshold voltage VUTOFF 2.1 2.2 2.3 V
On threshold voltage VUTON 2.0 2.1 2.2 V
[Error amp]
Input bias current IB — 0.1 0.5 µA
Feedback voltage VFB 1.232 1.245 1.258 V Buffer
[Output]
On resistance RON — 200 300 mΩ *Isw = 1 A
Max. duty ratio DMAX 72 80 88 % RL = 100 Ω
[ENB]
ENB on voltage VON Vcc × 0.7 Vcc — V
ENB off voltage VOFF — 0 Vcc × 0.3 V
[Overall]
Standby current ISTB — 0 10 μA VENB = 0 V
Average consumption current ICC — 1.2 2.4 mA no switching
[Amp]
Input bias current Ibo −1 0 1 μA IN += 4.5 V
Drive current 1 IOO1 50 70 140 mA OUT1 to OUT4
Drive current 2 IOO2 150 200 400 mA VCOM
Max. output current Voho VS-0.16 VS-0.1 — V Io = −5 mA, IN += VS
Min. output current Vohl — 0.1 0.16 V Io = 5 mA, IN += 0 V
This product is not designed for protection against radio active rays.
* Design guarantee (No total shipment inspection is made.)
Min. Typ. Max.
Limit
Unit Conditions
Technical Note
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2/17
2009.07 - Rev.B
BD8151EFV, BD8157EFV
●Electrical Characteristics BD8157EFV (Unless otherwise specified, Ta = 25℃; Vcc = 2.5V, ENB = 2.5V)
Parameter Symbol
[Triangular waveform oscillator]
Oscillating frequency 1 FOSC1 480 600 720 kHz FCLK = 0 V
Oscillating frequency 2 FOSC2 0.96 1.20 1.44 MHz FCLK = Vcc
[Overcurrent protection circuit]
Overcurrent limit ISW — 2 — A
[Soft start circuit]
SS source current ISO 6 10 14 µA Vss = 0.5 V
[Under-voltage lockout protection circuit]
Off threshold voltage VUTOFF 1.7 1.8 1.9 V
On threshold voltage VUTON 1.6 1.7 1.8 V
[Error amp]
Input bias current IB — 0.1 0.5 µA
Feedback voltage VFB 1.232 1.245 1.258 V Buffer
[Output]
On resistance RON — 200 600 mΩ *Isw = 1 A
Max. duty ratio DMAX 75 85 95 % RL = 100 Ω
[ENB]
ENB on voltage VON Vcc × 0.7 Vcc — V
ENB off voltage VOFF — 0 Vcc × 0.3 V
[Overall]
Standby current ISTB — 0 10 μA VENB = 0 V
Average consumption current ICC — 1.2 2.4 mA no switching
[Amp]
Input bias current Ibo −1 0 1 μA IN += 4.5 V
Drive current 1 IOO1 50 70 140 mA OUT1 to OUT4
Drive current 2 IOO2 120 200 400 mA VCOM
Max. output current Voho VS-0.16 VS-0.1 — V Io = −5 mA, IN += VS
Min. output current Vohl — 0.1 0.16 V Io = 5 mA, IN += 0 V
This product is not designed for protection against radio active rays.
* Design guarantee (No total shipment inspection is made.)
Min. Typ. Max.
Limit
Unit Conditions
Technical Note
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3/17
2009.07 - Rev.B
BD8151EFV, BD8157EFV
●Reference Data (Unless otherwise specified, Ta = 25℃)
1.75
1.50
1.25
1.00
0.75
0.50
SUPPLY CURRENT: ICC[mA] .
0.25
0.00
0.5
0123456
Fig. 1 Total Supply Current
-40℃
SUPPLY VOLT AGE : VCC[ V]
25℃
150℃
2.0
1.5
1.0
0.5
0.0
-0.5
-1.0
-1.5
STANDBY CURRENT : ICC[μA] .
-2.0
01234
25℃
SUPPLY VOLTAGE : VCC[V]
Fig. 2 Standby Current
0
2.0
-4
-8
-12
SS CURRENT : ISS[μA]
-16
-20
00.5 11.52
SS VOLTAGE : VSS[V]
Fig. 4 SS Source Current
20
15
125
2 .4
℃
1.5
1.0
0.5
REFERENCE VOLTAGE : VREF[V]
0.0
0 1.5 3 4.5 6 7.5
SUPPLY VOLT AGE : VCC[V]
Fig. 5 Reference Voltage
Temperature
20
15
125℃
10
25℃
10
25℃
5
FCLK CURRENT : FCLK[μA] .
0
0.0 0.5 1.0 1.5 2.0 2.5 3.0
Fig. 7 FCLK Pin Current
FC LK VOLTAGE : FC LK[V]
-40℃
5
ENB CURRENT : ENB[μA] .
0
0.0 0.5 1.0 1.5 2.0 2.5 3.0
ENB VOLTAGE : VEN B[V]
Fig. 8 ENB Pin Current
100
95
90
Max Duty [%]
85
EFFICIENCY [%]
100
90
80
70
60
VCC=2.5V f=600kHz
VCC=2.5V f=1200kHz
80
-40 0 40 80 120
AMBIENT TEM PERATU RE : Ta[℃]
Fig. 10 Max. Duty Ratio Temperature
125
50
0 0.05 0.1 0.15 0.2 0.25 0.3
OUTPUT CURRENT : IO[A]
Fig. 11 Vcc = 2.5 V Power
125℃
-40℃
BD8157EFV
-40℃
Efficiency
Technical Note
1.260
1.255
1.250
1.245
1.240
1.235
REFERENCE VOLTAGE : VREF[V] .
1.230
-40 -15 10 35 60 85 110
AM BIE NT TE MP ER ATURE : Ta[℃]
Fig. 3 Reference Voltage
Temperature
2000
1500
1000
500
SWITCHING FREQUENCY : FSW[kHz]
0
-40 -15 10 35 60 85 110
AMBIENT TEM PERATU RE : Ta[℃]
VFCLK=VCC
VFCLK=GND
Fig. 6 Switching Frequency
Temperature
100
50
0
-50
COMP CURRENT : ICOMP[uA] .
-100
1.0 1.1 1.2 1.3 1.4 1. 5
COM P VOLTAGE : VC OMP[V]
Fig. 9 COMP Sinking vs Source
Current
100
VCC=3.3V f=600kHz
90
80
70
EFFICIENCY [%]
60
VCC=3.3V f=1200kHz
BD8151EFV
50
0.02
0 0. 15 0.3 0.45 0. 6
OUTPUT CURRENT : IO[A]
Fig. 12 Vcc = 3.3 V Power
Efficiency
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4/17
2009.07 - Rev.B
BD8151EFV, BD8157EFV
V
.
.
Technical Note
●Reference Data (Unless otherwise specified, Ta = 25℃)
100
90
80
70
EFFICIENCY [%]
60
50
2.0 2.5 3.0 3.5 4.0
SUPPLY VOLT AGE : VCC[V]
Fig. 13 Power Efficiency vs
Power Supply Voltage
10
1
BD8157EFV
0.8
BD8157EFV
0.6
0.4
0.2
MAXIMUM CURRENT : IOMAX[A] .
0
2.1 2.4 2.7 3.0 3.3 3.6 3.9
F=600kHz
F=1200kHz
SUPPLY VOLT AGE : VCC[ V]
Fig. 14 Max. Load Current vs
Power Supply Voltage
10
8
6
Io=0mA
VO
100mV/div
Fig. 15 Load Response
Waveform
9
8.8
8.6
Io=100mA
20us/div
0.1
DELAY TIME [ms]
0.01
0.001 0.01 0.1
10
SS CAPAC ITAN CE [μ F]
Fig. 16 SS Capacitance vs
Delay Time
5
0
-5
-10
-15
OFFSET VOLTAGE:VOFFSET[m
-20
123456789
BUF FER INPUT VOLTAGE:VIN[ V]
Fig. 19 Buffer Voltage
9
8
7
6
5
4
125℃
3
2
OUTPU T VOLTAGE : VOUT[V]
1
0
0 50 100 150 200 250 300
OUTPU T CU RRENT : IOU T[mA] .
Fig. 22 VCOM Sinking Current
25℃
-40℃
4
VS CURRENT : IS[mA]
2
0
0 5 10 15
VS VOLTAGE : VS[V]
Fig. 17 VS Pin Current
9
8
OUTPUT VOLTAGE : VOUT[V]
7
6
5
4
3
2
1
0
-40℃
25℃
125℃
0 25 50 75 100 125 150 175 200
OUTPUT CURRENT : IOUT[mA] .
Fig. 20 Buffer Sinking Current
9
8
7
-40℃ 25℃
6
5
4
3
2
OUTPU T VOLTAGE : VOUT[V]
1
0
-300 - 250 -200 -150 - 100 -50 0
OUTPU T CU RRENT : IOU T[mA]
125℃
Fig. 23 VCOM Source Current
8.4
8.2
OUTPUT VOLTAGE : VO[V]
8
0.0 0.1 1.0
LOAD CURRENT : IO[A]
Fig. 18 Output voltage
Load Regulation 1
9
8
7
6
-40℃
5
4
3
2
OUTPUT VOLTAGE : VOUT[V]
1
0
-200 -175 -150 -125 -100 - 75 -50 - 25 0
OUTPUT CURRENT : IOUT[mA] .
25℃
125℃
Fig. 21 Buffer Source Current
IN
OUT
1us/div
Fig. 24 Slew Rate Waveform
2V/div
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5/17
2009.07 - Rev.B
BD8151EFV, BD8157EFV
+
+
●Pin Assignment Diagram ●Block Diagram
SW
1
SW
VCC
ENB
FCLK
COMIN
IN1
IN2
IN3
IN4
VS
PGND
GND
FB
COMP
SS
VCOM
OUT1
OUT2
OUT3
OUT4
VCC
ENB
FCLK
VS
COMIN
IN1
2
3
4
5
6
7
BUFFER SUPPLY
IN2
8
IN3
9
IN4
10
TOP VIEW
Fig. 25 Pin Assignment Diagram and Block Diagram
●Pin Assignment Diagram and Pin Functions
SLOPE
OSC
UVLO
TSD
CURRENT
SENSE
+
Technical Note
20
PGND
DRV
LOGIC
RESET
PWM
-
SDWN
OCP
ERR
SOFT
START
SET
19
GND
-
18
FB
1.245V
COMP
17
SS
16
15
VCOM
14
OUT1
13
OUT2
OUT3
12
11
OUT4
Pin No. Pin name Function
1 SW N-channel power FET drain output
2 VCC Power supply input pin
3 ENB Control input pin
4 FCLK Frequency switching pin
5 VS Buffer power supply input pin
6 COMIN VCOM input pin
7 IN1 Amp input pin 1
8 IN2 Amp input pin 2
9 IN3 Amp input pin 3
10 IN4 Amp input pin 4
11 OUT4 Amp output pin 4
12 OUT3 Amp output pin 3
13 OUT2 Amp output pin 2
14 OUT1 Amp output pin 1
15 VCOM VCOM output pin
16 SS Soft start current output pin
17 COMP Error amp output pin
18 FB Error amp inversion input pins
19 GND Ground pin
20 PGND Ground pin
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2009.07 - Rev.B
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BD8151EFV, BD8157EFV
+
+
Technical Note
●Description of Operation of Each Block
10uH
RB161M-20
10uF
Vo
VCC
2.5V
10uF
20k
20k
Ω
20k
20k
Ω
20k
Ω
20k
Ω
Ω
20k
Ω
1
SW
2
VCC
3
ENB
4
FCLK
5
VS
COMIN
IN4
6
7
IN1
8
IN2
9
IN3
10
Ω
SLOPE
OSC
UVLO
TSD
BUFFER SUPPLY
TOP VIEW
CURRENT
SENSE
+
DRV
SET
LOGIC
PWM
OCP
SDWN
-
RESET
SOFT
START
20
PGND
19
-
18
ERR
1.245V
17
16
15
14
13
12
11
GND
FB
COMP
SS
VCOM
OUT1
OUT2
OUT3
OUT4
0.01uF
100k
5.1k
Ω
15k
Ω
VCOM
V1
V2
V3
V4
Ω
3300pF
Fig. 26 Application Circuit Diagram
Error amp (ERR)
This is the circuit to compare the reference voltage 1.245 V (Typ.) and the feedback voltage of output voltage. The COM
pin voltage resulting from this comparison determines the switching duty. At the time of start, since the soft start is
operated by the SS pin voltage, the COMP pin voltage is limited to the SS pin voltage.
Oscillator (OSC)
This block generates the oscillating frequency. Either a 600 kHz or 1.2 MHz (Typ.) frequency can be selected with the
FCLK pin.
SLOPE
This block generates the triangular waveform from the clock generated by OSC. Generated triangular waveform is sent to
the PWM comparator.
PWM
The COMP pin voltage output by the error amp is compared to the SLOPE block's triangular waveform to determine the
switching duty. Since the switching duty is limited by the maximum duty ratio which is decided internally, it does not
become 100%.
Reference voltage (VREF)
This block generates the internal reference voltage of 1.245 V (Typ.).
Protection circuit (UVLO/TSD)
UVLO (under-voltage lockout protection circuit) shuts down the circuits when the voltages are 2.2 V (Typ.BD8151EFV)
1.8 V (Typ.ND8157EFV) or lower. Thermal shutdown circuit shuts down IC at 175°C (Typ.) and recovers at 160°C (Typ.).
Overcurrent protection circuit (OCP)
Current flowing to the power FET is detected by voltage at the CURRENT SENSE and the overcurrent protection operates
at 3 A (Typ.). When the overcurrent protection operates, switching is turned off and the SS pin capacity is discharged.
Soft start circuit
Since the output voltage rises gradually while restricting the current at the time of startup, it is possible to prevent the
output voltage overshoot or the inrush current.
Buffer amp and VCOM
This buffer amp is used to set the gamma correction voltage, which can be set in from 0.2 V to (VOUT - 0.2 V). Use the
VOUT resistance division to set the gamma correction voltage. The VCOM voltage is set similarly.
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2009.07 - Rev.B
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BD8151EFV, BD8157EFV
●Timing Chart
Startup sequence
Overcurrent protection operating
SS
SW
VCC
ENB
SS
SW
VO
2.5V
VCC,ENB
VO
IO
Technical Note
Fig. 27 Startup sequence
Fig. 28 Overcurrent protection operating
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8/17
2009.07 - Rev.B
BD8151EFV, BD8157EFV
Technical Note
●Selecting Application Components
(1) Setting the output L constant
The coil L to use for output is decided by the rating current I
and input current maximum value I
LR
of the coil.
INMAX
IL
INMAX+ ∆IL should not reach
I
the rating value level
L
average
I
current
Vcc
IL
Vo
Co
t
Fig. 29 Coil Current Waveform
Fig. 30 Output Application Circuit Diagram
Adjust so that I
+ ∆IL does not reach the rating current value ILR. At this time, ∆IL can be obtained by the following
INMAX
equation.
∆I
L =
1
Vcc
L Vcc f
Vo-Vcc
1
[A] Where, f is the switching frequency.
Set with sufficient margin because the coil L value may have the dispersion of approx. 30%. If the coil current exceeds
the rating current I
of the coil, it may damage the IC internal element.
LR
BD8157EFV uses the current mode DC/DC converter control and has the optimized design at the coil value. The following
coil values are recommended from the aspects of power efficiency, response and safety. When the coil out of this range is
selected, the stable continual operation is not guaranteed such as the switching waveform becomes irregular. Please pay
attention to it.
Switching frequency: L = 10 µH to 22 µH at 600 kHz
Switching frequency: L = 4.7 µH to 15 µH at 1,200 kHz
(2) Setting the output capacitor
For the capacitor C to use for the output, select the capacitor which has the larger value in the ripple voltage V
value and the drop voltage allowance value at the time of sudden load change. Output ripple voltage is decided by the
following equation.
PP = ILMAX×RESR +
∆V
1
fCo Vo 2
Vcc
(ILMAX-
∆IL
) [V] Where, f is the switching frequency.
Perform setting so that the voltage is within the allowable ripple voltage range.
For the drop voltage during sudden load change; V
, please perform the rough calculation by the following equation.
DR
VDR =
∆I
10 µ sec [V]
Co
However, 10 µs is the rough calculation value of the DC/DC response speed. Please set the capacitance considering the
sufficient margin so that these two values are within the standard value range.
(3) Selecting the input capacitor
Since the peak current flows between the input and output at the DC/DC converter, a capacitor is required to install at the
input side. For this reason, the low ESR capacitor is recommended as an input capacitor which has the value more than
10 µF and less than 100 m. If a capacitor out of this range is selected, the excessive ripple voltage is superposed on the
input voltage, accordingly it may cause the malfunction of IC.
However these conditions may vary according to the load current, input voltage, output voltage, inductance and switching
frequency. Be sure to perform the margin check using the actual product.
PP allowance
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2009.07 - Rev.B
BD8151EFV, BD8157EFV
Technical Note
(4) Selecting the output rectification diode
Schottky barrier diode is recommended as the rectification diode to use at the DC/DC converter output stage. Select the
diode paying attention to the max. inductor current and max. output voltage.
Max. Inductor current I
Max. output voltage V
OMAX
+ ∆IL < Rating current of diode
INMAX
< Rating voltage of diode
Since each parameter has 30% to 40% of dispersion, be sure to design providing sufficient margins.
(5) Design of the feedback resistor constant
Refer to the following equation to set the feedback resistor. As the setting range, 10 k to 330 k is recommended. If the
resistor is set to a 10 k or lower, it causes the reduction of power efficiency. If it is set to 330 k or larger, the offset
voltage becomes larger by the input bias current 0.4 µA (Typ.) in the internal error amplifier.
Step-up
Vo =
R8 + R9
R9
1.245 [V]
Vo
R8
R9
Reference voltage 1.245 V
＋
ERR
2
－
FB
(6) Setting the soft start time
Soft start is required to prevent the coil current at the time of startup from increasing
Fig. 31Feedback Resistance Setting
10
and the overshoot of the output voltage at the starting time. Fig. 32 shows the
relation between the capacitance and soft start time. Please refer to it to set the
capacitance.
1
As the capacitance, 0.001 µF to 0.1µF is recommended. If the capacitance is set to
0.001 µF, the overshooting may occur on the output voltage. If the capacitance is
0.1
DELAY TIME[ms]
set to 0.1 µF or larger, the excessive back current flow may occur in the internal
parasitic elements when the power is turned OFF and it may damage IC. When the
capacitor of 0.1 µF or larger is used, be sure to insert a diode to Vcc in series, or a
bypass diode between the SS pin and VCC.
Bypass diode
Back current prevention diode
VCC
0.01
0.001 0.01 0.1
SS CAPACITANCE[uF]
Fig.32 SS Pin Capacitance vs
Delay Time
Output pin
Fig. 33 Bypass Diode Example
When there is the startup relation (sequences) with other power supplies, be sure to use the high accuracy product (such as X5R).
Soft start time may vary according to the input voltage, output voltage loads, coils and output capacity. Be sure to verify the
operation using the actual product.
(7) Setting the ENB pin
When the ENB pin is set to Hi, the internal circuit becomes active and the DC/DC converter starts operating. When it is set
to Low, the shut down is activated and all circuits will be turned OFF.
(8) Setting the frequency by FCLK
It is possible to change the switching frequency by setting the FCLK pin to Hi or Low. When it is set to Low, the product
operates at 600 kHz (Typ.). When it is set to Hi, the product operates at 1,200 kHz (Typ.).
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2009.07 - Rev.B
BD8151EFV, BD8157EFV
Technical Note
(9) Setting RC, CC of the phase compensation circuit
In the current mode control, since the coil current is controlled, a pole (phase lag) made by the CR filter composed of the
output capacitor and load resistor will be created in the low frequency range, and a zero (phase lead) by the output
capacitor and ESR of capacitor will be created in the high frequency range. In this case, to cancel the pole of the power
amplifier, it is easy to compensate by adding the zero point with C
and RC to the output from the error amplifier as shown
C
in the illustration.
Open loop gain
Gain
【dB】
A
0
fp(Min)
l
OUTMin
fp(Max)
OUTMax
l
fz(ESR)
fp =
fz (ESR) =
2 Ro Co
1
2 E
SR Co
Pole at the power amplification stage
1
[Hz]
[Hz]
When the output current reduces, the load resistance
increases and the pole frequency lowers.
R
0
Phase
【deg】
-90
Error amplifier phase compensation
A
Gain
【dB】
0
O
fp(Min) =
fz(Max) =
2 Ro
2
RoMin Co
1
Max Co
1
[Hz]
[Hz]
Zero at the power amplification stage
When the output capacitor is set larger, the pole
frequency lowers but the zero frequency will not
change. (This is because the capacitor ESR
becomes 1/2 when the capacitor becomes 2 times.)
Phase
【deg】
0
-90
Fig. 34 Gain vs Phase
L
Vo
fp (Amp.) =
2
1
Rc Cc
[Hz]
COMP
Vcc,PVcc
SW
GND,PGND
VCC
Cin
Rc
Cc
ESR
Co
Ro
Fig. 35 Application Circuit Diagram
It is possible to realize the stable feedback loop by canceling the pole fp (Min.), which is created by the output capacitor
and load resistor, with CR zero compensation of the error amplifier as shown below.
fz (Amp.) = fp (Min.)
1
2 Rc Cc 2
=
1
Romax Co
[Hz]
As the setting range for the resistor, 1 k to 10 k is recommended. When the resistor is set to 1 k or lower, the effect by
phase compensation becomes low and it may cause the oscillation of output voltage. When it is set to 10 k or larger, the
COMP pin becomes Hi-Z and the switching noise becomes easy to superpose. Therefore the stable switching pulse
cannot be generated and the irregular ripple voltage may be generated on the output voltage.
As the setting range for the capacitance, 3,300 pF to 10,000 pF is recommended. When the capacitance is set to 3,300 pF
or lower, the irregular ripple voltage may be generated on the output voltage due to the effect of switching noise. When it is
set to 10,000 pF or larger, the response becomes worse and the output voltage fluctuation becomes large. Accordingly it
may require the output capacitor which is larger than the necessary value.
(At light-load)
(At heavy-load)
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11/17
2009.07 - Rev.B
BD8151EFV, BD8157EFV
(10) Using the buffer amp and VCOM
The 4-channel buffer amp and 1-channel VCOM output are used to generate the gamma compensation voltage that is
input to the source driver. The VS pin serves as the power supply for the buffer amp and VCOM.
Use caution as the gamma correction buffer amp and VCOM have different output current capacities. A range from I/O
power supply to ground potentials can be set for the built-in buffer amplifier. If output voltage noise becomes problematic,
insert a 0.1 µF capacitor in the output circuit. A capacitance value of 0 pF to 1 µF is recommended for this capacitor. Large
capacitance values of 1 µF or larger may cause back current to flow through internal parasitic diodes in the event of a
supply voltage ground fault, causing damage to internal IC elements. For applications where such modes are anticipated,
implement a bypass diode or other preventive measure.
VS
VCOMIN
V
IN1
VIN2
VIN3
V
IN4
Fig. 36 Example Buffer Amp Circuit
Fig. 37 Gamma Correction Voltage Startup Waveform
VCOM voltage output
V1
V2
V3
V4
For gamma correction
Gamma correction voltage output
Wait for trigger
Vs
V1
V2
V3
V4
Technical Note
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© 2009 ROHM Co., Ltd. All rights reserved.
12/17
2009.07 - Rev.B
BD8151EFV, BD8157EFV
+
+
+
+
Technical Note
●Application Examples
* Although ROHM is sure that the application examples are recommendable ones, further check the characteristics of
components that require high precision before using them.When a circuit is used modifying the externally connected circuit
constant, be sure to decide allowing sufficient margins considering the dispersion of values by external parts as well as our
IC including not only the static but also the transient characteristic.
For the patent, we have not acquired the sufficient confirmation. Please acknowledge the status.
(1) When the charge pump is removed from the DC/DC converter to make it 3-channel output mode:
It is possible to create the charge pump by using the switching operation of DC/DC converter. When the application shown
in the following diagram is used, 1-channel DC/DC converter output, 1-channel positive side charge pump and 1-channel
negative side charge pump can be output as a total of 3 channels.
0.1uF
10uH
RB161M-20
VOUT
10uF
0.1uF
DAN217U
VCC
2.5V
10uF
1
SW
2
COMIN
VCC
3
ENB
4
FCLK
5
VS
6
7
IN1
8
IN2
9
IN3
10
IN4
SLOPE
OSC
UVLO
TSD
BUFFER SUPPLY
TOP VIEW
CURRENT
SENSE
+
DRV
SET
LOGIC
OCP
RESET
SDW N
PWM
-
20
PGND
19
GND
-
18
ERR
1.245V
FB
17
COMP
SOFT
16
START
SS
15
VCOM
14
OUT1
13
OUT2
12
OUT3
11
OUT4
VCOM
V1
V2
V3
V4
1uF 1uF
0.1uF
DAN217U
1uF
UDZ
Series
UDZ
Series
2SD2657k
2SB1695k
1uF
Fig. 38 3 ch Application Circuit Diagram Example
(2) When the output voltage is set to 0 V:
Since the switch does not exist between the input and output in the application using the step-up type DC/DC converter,
the output voltage is generated even if the IC is turned off. When it is intended to keep the output voltage 0 V until IC
operates, insert the switch as shown in the following circuit diagram.
10uH
RB161M-20
10uF
Vo
VCC
2.5V
10uF
1
SW
2
FCLK
COMIN
IN4
VCC
ENB
IN1
IN2
IN3
3
4
5
VS
6
7
8
9
10
SLOPE
OSC
UVLO
TSD
BUFFER SUPPLY
TOP VIEW
CURRENT
SENSE
+
DRV
SET
LOGIC
PWM
OCP
SDWN
-
RESET
SOFT
START
20
PGND
19
GND
-
18
ERR
1.245V
FB
17
COMP
16
SS
15
VCOM
14
OUT1
13
OUT2
12
OUT3
11
OUT4
Fig. 39 Switch Application Circuit Diagram Example
VCOM
V1
V2
V3
V4
VGH
1uF
VGL
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13/17
2009.07 - Rev.B
© 2009 ROHM Co., Ltd. All rights reserved.
BD8151EFV, BD8157EFV
●I/O Equivalent Circuit Diagrams
1.SW 11.OUT4 12.OUT3 13.OUT2 14.OUT1 15.VCOM
3.ENB 4.FCLK 16.SS
6.COMIN 7.IN1 8.IN2 9.IN3 10.IN4 17.COMP
18.FB
Vcc
200kΩ
VS
Fig.40 I/O Equivalent Circuit Diagrams
VS
Vcc
Vcc
Technical Note
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© 2009 ROHM Co., Ltd. All rights reserved.
14/17
2009.07 - Rev.B
BD8151EFV, BD8157EFV
Technical Note
●Notes for use
1) Absolute maximum ratings
Use of the IC in excess of absolute maximum ratings such as the applied voltage or operating temperature range may
result in IC damage. Assumptions should not be made regarding the state of the IC (short mode or open mode) when such
damage is suffered. A physical safety measure such as a fuse should be implemented when use of the IC in a special
mode where the absolute maximum ratings may be exceeded is anticipated.
2) GND potential
Ensure a minimum GND pin potential in all operating conditions.
3) Setting of heat
Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating conditions.
4) Pin short and mistake fitting
Use caution when orienting and positioning the IC for mounting on an application board. Improper mounting may result in
damage to the IC. Shorts between output pins or between output pins and the power supply and GND pins caused by the
presence of a foreign object may result in damage to the IC.
5) Actions in strong magnetic field
Use caution when using the IC in the presence of a strong magnetic field as doing so may cause the IC to malfunction.
6) Testing on application boards
When testing the IC on an application board, connecting a capacitor to a pin with low impedance subjects the IC to stress.
Always discharge capacitors after each process or step. Ground the IC during assembly steps as an antistatic measure,
and use similar caution when transporting or storing the IC. Always turn the IC's power supply off before connecting it to or
removing it from a jig or fixture during the inspection process.
7) Ground wiring patterns
When using both small signal and large current GND patterns, it is recommended to isolate the two ground patterns,
placing a single ground point at the application's reference point so that the pattern wiring resistance and voltage
variations caused by large currents do not cause variations in the small signal ground voltage. Be careful not to change the
GND wiring patterns of any external components.
8) This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them isolated.
P/N junctions are formed at the intersection of these P layers with the N layers of other elements to create a variety of
parasitic elements. For example, when the resistors and transistors are connected to the pins as shown in Fig. 41, a
parasitic diode or a transistor operates by inversing the pin voltage and GND voltage.
The formation of parasitic elements as a result of the relationships of the potentials of different pins is an inevitable result
of the IC's architecture. The operation of parasitic elements can cause interference with circuit operation as well as IC
malfunction and damage. For these reasons, it is necessary to use caution so that the IC is not used in a way that will
trigger the operation of parasitic elements, such as the application of voltages lower than the GND (P substrate) voltage to
input and output pins.
(Pin A)
N N
P
Fig.41 Example of a Simple Monolithic IC Architecture
Resistor
N
P
GND
～
～
Parasitic
element
Transistor (NPN)
P＋
B
C
～
～
E
N
P
P＋
N
P substrate
GND
(Pin B)
P＋ P＋
N N
Parasitic elements
GND
(Pin B)
(Pin A)
C
B
～
～
E
GND
Parasitic
elements
～
～
Parasitic
element
GND
9) Overcurrent protection circuits
An overcurrent protection circuit designed according to the output current is incorporated for the prevention of IC
destruction that may result in the event of load shorting. This protection circuit is effective in preventing damage due to
sudden and unexpected accidents. However, the IC should not be used in applications characterized by the continuous
operation or transitioning of the protection circuits. At the time of thermal designing, keep in mind that the current capacity
has negative characteristics to temperatures.
10) Thermal shutdown circuit (TSD)
This IC incorporates a built-in TSD circuit for the protection from thermal destruction. The IC should be used within the
specified power dissipation range. However, in the event that the IC continues to be operated in excess of its power
dissipation limits, the attendant rise in the chip's temperature Tj will trigger the temperature protection circuit to turn off
output p
ower elements. The circuit automatically resets once the chip's temperature Tj drops.
Operation of the TSD circuit presumes that the IC's absolute maximum ratings have been exceeded. Application designs
should never make use of the TSD circuit.
11) Testing on application boards
At the time of inspection of the installation boards, when the capacitor is connected to the pin with low impedance, be sure
to discharge electricity per process because it may load stresses to the IC. Always turn the IC's power supply off before
connecting it to or removing it from a jig or fixture during the inspection process. Ground the IC during assembly steps as
an antistatic measure, and use similar caution when transporting or storing the IC.
all
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15/17
2009.07 - Rev.B
BD8151EFV, BD8157EFV
●Power Dissipation Reduction
2000
1500
1000
1000
500
POWRE DISSIPATION :
0 25 50 75 100 125
On 70×70×1.6mm Board
BD8151EF
85
AMBIENT MPERATURE :Ta[℃]
Fig.42 Power Dissipation Reduction
BD8157EF
Technical Note
150
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© 2009 ROHM Co., Ltd. All rights reserved.
16/17
2009.07 - Rev.B
BD8151EFV, BD8157EFV
●Ordering part number
B D 8 1 5 1 E F V - E 2
Technical Note
Part No.
HTSSOP-B20
6.4±0.2
1.0MAX
Part No.
8151
8157
6.5±0.1
(MAX 6.85 include BURR)
(4.0)
1120
1.0±0.2
+0.05
0.17
-
0.03
(Unit : mm)
0.5±0.15
4.4±0.1
110
0.325
0.65
0.85±0.05
0.08±0.05
0.24
+0.05
-
0.04
(2.4)
S
0.08 S
Package
EFV : HTSSOP-B20
<Tape and Reel information>
Embossed carrier tape (with dry pack)Tape
Quantity
Direction
of feed
2500pcs
E2
The direction is the 1pin of product is at the upper left when you hold
()
reel on the left hand and you pull out the tape on the right hand
Reel
Packaging and forming specification
E2: Embossed tape and reel
1pin
Order quantity needs to be multiple of the minimum quantity.
∗
Direction of feed
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17/17
2009.07 - Rev.B
Notes
No copying or reproduction of this document, in part or in whole, is permitted without the
consent of ROHM Co.,Ltd.
The content specied herein is subject to change for improvement without notice.
The content specied herein is for the purpose of introducing ROHM's products (hereinafter
"Products"). If you wish to use any such Product, please be sure to refer to the specications,
which can be obtained from ROHM upon request.
Examples of application circuits, circuit constants and any other information contained herein
illustrate the standard usage and operations of the Products. The peripheral conditions must
be taken into account when designing circuits for mass production.
Great care was taken in ensuring the accuracy of the information specied in this document.
However, should you incur any damage arising from any inaccuracy or misprint of such
information, ROHM shall bear no responsibility for such damage.
The technical information specied herein is intended only to show the typical functions of and
examples of application circuits for the Products. ROHM does not grant you, explicitly or
implicitly, any license to use or exercise intellectual property or other rights held by ROHM and
other par ties. ROHM shall bear no responsibility whatsoever for any dispute arising from the
use of such technical information.
Notice
The Products specied in this document are intended to be used with general-use electronic
equipment or devices (such as audio visual equipment, ofce-automation equipment, communication devices, electronic appliances and amusement devices).
The Products specied in this document are not designed to be radiation tolerant.
While ROHM always makes ef forts to enhance the quality and reliability of its Products, a
Product may fail or malfunction for a variety of reasons.
Please be sure to implement in your equipment using the Products safety measures to guard
against the possibility of physical injury, re or any other damage caused in the event of the
failure of any Product, such as derating, redundancy, re control and fail-safe designs. ROHM
shall bear no responsibility whatsoever for your use of any Product outside of the prescribed
scope or not in accordance with the instruction manual.
The Products are not designed or manufactured to be used with any equipment, device or
system which requires an extremely high level of reliability the failure or malfunction of which
may result in a direct threat to human life or create a risk of human injury (such as a medical
instrument, transportation equipment, aerospace machinery, nuclear-reactor controller,
fuel-controller or other safety device). ROHM shall bear no responsibility in any way for use of
any of the Products for the above special purposes. If a Product is intended to be used for any
such special purpose, please contact a ROHM sales representative before purchasing.
If you intend to export or ship overseas any Product or technology specied herein that may
be controlled under the Foreign Exchange and the Foreign Trade Law, you will be required to
obtain a license or permit under the Law.
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More detail product informations and catalogs are available, please contact us.
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